1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
12 static enum hal_tcl_encap_type
13 ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb)
15 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
17 if (tx_info->control.flags & IEEE80211_TX_CTRL_HW_80211_ENCAP)
18 return HAL_TCL_ENCAP_TYPE_ETHERNET;
20 return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI;
23 static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb)
25 struct ieee80211_hdr *hdr = (void *)skb->data;
28 if (!ieee80211_is_data_qos(hdr->frame_control))
31 qos_ctl = ieee80211_get_qos_ctl(hdr);
32 memmove(skb->data + IEEE80211_QOS_CTL_LEN,
33 skb->data, (void *)qos_ctl - (void *)skb->data);
34 skb_pull(skb, IEEE80211_QOS_CTL_LEN);
36 hdr = (void *)skb->data;
37 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
40 static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb)
42 struct ieee80211_hdr *hdr = (void *)skb->data;
43 struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb);
45 if (cb->flags & ATH11K_SKB_HW_80211_ENCAP)
46 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
47 else if (!ieee80211_is_data_qos(hdr->frame_control))
48 return HAL_DESC_REO_NON_QOS_TID;
50 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
53 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)
56 case WLAN_CIPHER_SUITE_WEP40:
57 return HAL_ENCRYPT_TYPE_WEP_40;
58 case WLAN_CIPHER_SUITE_WEP104:
59 return HAL_ENCRYPT_TYPE_WEP_104;
60 case WLAN_CIPHER_SUITE_TKIP:
61 return HAL_ENCRYPT_TYPE_TKIP_MIC;
62 case WLAN_CIPHER_SUITE_CCMP:
63 return HAL_ENCRYPT_TYPE_CCMP_128;
64 case WLAN_CIPHER_SUITE_CCMP_256:
65 return HAL_ENCRYPT_TYPE_CCMP_256;
66 case WLAN_CIPHER_SUITE_GCMP:
67 return HAL_ENCRYPT_TYPE_GCMP_128;
68 case WLAN_CIPHER_SUITE_GCMP_256:
69 return HAL_ENCRYPT_TYPE_AES_GCMP_256;
71 return HAL_ENCRYPT_TYPE_OPEN;
75 int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
78 struct ath11k_base *ab = ar->ab;
79 struct ath11k_dp *dp = &ab->dp;
80 struct hal_tx_info ti = {0};
81 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
82 struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
83 struct hal_srng *tcl_ring;
84 struct ieee80211_hdr *hdr = (void *)skb->data;
85 struct dp_tx_ring *tx_ring;
90 u8 ring_selector = 0, ring_map = 0;
93 if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags))
96 if (!(info->control.flags & IEEE80211_TX_CTRL_HW_80211_ENCAP) &&
97 !ieee80211_is_data(hdr->frame_control))
100 pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);
102 /* Let the default ring selection be based on a round robin
103 * fashion where one of the 3 tcl rings are selected based on
104 * the tcl_ring_selector counter. In case that ring
105 * is full/busy, we resort to other available rings.
106 * If all rings are full, we drop the packet.
107 * //TODO Add throttling logic when all rings are full
109 ring_selector = atomic_inc_return(&ab->tcl_ring_selector);
112 tcl_ring_retry = false;
113 ti.ring_id = ring_selector % DP_TCL_NUM_RING_MAX;
114 ring_map |= BIT(ti.ring_id);
116 tx_ring = &dp->tx_ring[ti.ring_id];
118 spin_lock_bh(&tx_ring->tx_idr_lock);
119 ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0,
120 DP_TX_IDR_SIZE - 1, GFP_ATOMIC);
121 spin_unlock_bh(&tx_ring->tx_idr_lock);
124 if (ring_map == (BIT(DP_TCL_NUM_RING_MAX) - 1)) {
125 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
129 /* Check if the next ring is available */
134 ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |
135 FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |
136 FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);
137 ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);
138 ti.meta_data_flags = arvif->tcl_metadata;
140 if (info->control.hw_key)
142 ath11k_dp_tx_get_encrypt_type(info->control.hw_key->cipher);
144 ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;
146 ti.addr_search_flags = arvif->hal_addr_search_flags;
147 ti.search_type = arvif->search_type;
148 ti.type = HAL_TCL_DESC_TYPE_BUFFER;
150 ti.lmac_id = ar->lmac_id;
151 ti.bss_ast_hash = arvif->ast_hash;
152 ti.dscp_tid_tbl_idx = 0;
154 if (skb->ip_summed == CHECKSUM_PARTIAL) {
155 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |
156 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |
157 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |
158 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |
159 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);
162 if (ieee80211_vif_is_mesh(arvif->vif))
163 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_MESH_ENABLE, 1);
165 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);
167 ti.tid = ath11k_dp_tx_get_tid(skb);
169 switch (ti.encap_type) {
170 case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:
171 ath11k_dp_tx_encap_nwifi(skb);
173 case HAL_TCL_ENCAP_TYPE_RAW:
174 /* TODO: for CHECKSUM_PARTIAL case in raw mode, HW checksum offload
175 * is not applicable, hence manual checksum calculation using
176 * skb_checksum_help() is needed
178 case HAL_TCL_ENCAP_TYPE_ETHERNET:
179 /* no need to encap */
181 case HAL_TCL_ENCAP_TYPE_802_3:
183 /* TODO: Take care of other encap modes as well */
185 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
186 goto fail_remove_idr;
189 ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
190 if (dma_mapping_error(ab->dev, ti.paddr)) {
191 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
192 ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
194 goto fail_remove_idr;
197 ti.data_len = skb->len;
198 skb_cb->paddr = ti.paddr;
199 skb_cb->vif = arvif->vif;
202 hal_ring_id = tx_ring->tcl_data_ring.ring_id;
203 tcl_ring = &ab->hal.srng_list[hal_ring_id];
205 spin_lock_bh(&tcl_ring->lock);
207 ath11k_hal_srng_access_begin(ab, tcl_ring);
209 hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);
211 /* NOTE: It is highly unlikely we'll be running out of tcl_ring
212 * desc because the desc is directly enqueued onto hw queue.
214 ath11k_hal_srng_access_end(ab, tcl_ring);
215 ab->soc_stats.tx_err.desc_na[ti.ring_id]++;
216 spin_unlock_bh(&tcl_ring->lock);
219 /* Checking for available tcl descritors in another ring in
220 * case of failure due to full tcl ring now, is better than
221 * checking this ring earlier for each pkt tx.
222 * Restart ring selection if some rings are not checked yet.
224 if (ring_map != (BIT(DP_TCL_NUM_RING_MAX) - 1)) {
225 tcl_ring_retry = true;
232 ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc +
233 sizeof(struct hal_tlv_hdr), &ti);
235 ath11k_hal_srng_access_end(ab, tcl_ring);
237 spin_unlock_bh(&tcl_ring->lock);
239 atomic_inc(&ar->dp.num_tx_pending);
244 dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE);
247 spin_lock_bh(&tx_ring->tx_idr_lock);
248 idr_remove(&tx_ring->txbuf_idr,
249 FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id));
250 spin_unlock_bh(&tx_ring->tx_idr_lock);
258 static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,
260 struct dp_tx_ring *tx_ring)
263 struct sk_buff *msdu;
264 struct ath11k_skb_cb *skb_cb;
266 spin_lock_bh(&tx_ring->tx_idr_lock);
267 msdu = idr_find(&tx_ring->txbuf_idr, msdu_id);
269 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
271 spin_unlock_bh(&tx_ring->tx_idr_lock);
275 skb_cb = ATH11K_SKB_CB(msdu);
277 idr_remove(&tx_ring->txbuf_idr, msdu_id);
278 spin_unlock_bh(&tx_ring->tx_idr_lock);
280 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
281 dev_kfree_skb_any(msdu);
283 ar = ab->pdevs[mac_id].ar;
284 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
285 wake_up(&ar->dp.tx_empty_waitq);
289 ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
290 struct dp_tx_ring *tx_ring,
291 struct ath11k_dp_htt_wbm_tx_status *ts)
293 struct sk_buff *msdu;
294 struct ieee80211_tx_info *info;
295 struct ath11k_skb_cb *skb_cb;
298 spin_lock_bh(&tx_ring->tx_idr_lock);
299 msdu = idr_find(&tx_ring->txbuf_idr, ts->msdu_id);
301 ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",
303 spin_unlock_bh(&tx_ring->tx_idr_lock);
307 skb_cb = ATH11K_SKB_CB(msdu);
308 info = IEEE80211_SKB_CB(msdu);
312 idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
313 spin_unlock_bh(&tx_ring->tx_idr_lock);
315 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
316 wake_up(&ar->dp.tx_empty_waitq);
318 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
320 memset(&info->status, 0, sizeof(info->status));
323 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
324 info->flags |= IEEE80211_TX_STAT_ACK;
325 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +
327 info->status.is_valid_ack_signal = true;
329 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
333 ieee80211_tx_status(ar->hw, msdu);
337 ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,
338 void *desc, u8 mac_id,
339 u32 msdu_id, struct dp_tx_ring *tx_ring)
341 struct htt_tx_wbm_completion *status_desc;
342 struct ath11k_dp_htt_wbm_tx_status ts = {0};
343 enum hal_wbm_htt_tx_comp_status wbm_status;
345 status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;
347 wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS,
350 switch (wbm_status) {
351 case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK:
352 case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:
353 case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:
354 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);
355 ts.msdu_id = msdu_id;
356 ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
358 ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
360 case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
361 case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
362 ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring);
364 case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY:
365 /* This event is to be handled only when the driver decides to
366 * use WDS offload functionality.
370 ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status);
375 static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar,
376 struct sk_buff *msdu,
377 struct hal_tx_status *ts)
379 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
381 if (ts->try_cnt > 1) {
382 peer_stats->retry_pkts += ts->try_cnt - 1;
383 peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len;
385 if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) {
386 peer_stats->failed_pkts += 1;
387 peer_stats->failed_bytes += msdu->len;
392 static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
393 struct sk_buff *msdu,
394 struct hal_tx_status *ts)
396 struct ath11k_base *ab = ar->ab;
397 struct ieee80211_tx_info *info;
398 struct ath11k_skb_cb *skb_cb;
400 if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {
401 /* Must not happen */
405 skb_cb = ATH11K_SKB_CB(msdu);
407 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
411 if (!rcu_dereference(ab->pdevs_active[ar->pdev_idx])) {
412 dev_kfree_skb_any(msdu);
417 dev_kfree_skb_any(msdu);
421 info = IEEE80211_SKB_CB(msdu);
422 memset(&info->status, 0, sizeof(info->status));
424 /* skip tx rate update from ieee80211_status*/
425 info->status.rates[0].idx = -1;
427 if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED &&
428 !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
429 info->flags |= IEEE80211_TX_STAT_ACK;
430 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +
432 info->status.is_valid_ack_signal = true;
435 if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX &&
436 (info->flags & IEEE80211_TX_CTL_NO_ACK))
437 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
439 if (ath11k_debug_is_extd_tx_stats_enabled(ar)) {
440 if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {
441 if (ar->last_ppdu_id == 0) {
442 ar->last_ppdu_id = ts->ppdu_id;
443 } else if (ar->last_ppdu_id == ts->ppdu_id ||
444 ar->cached_ppdu_id == ar->last_ppdu_id) {
445 ar->cached_ppdu_id = ar->last_ppdu_id;
446 ar->cached_stats.is_ampdu = true;
447 ath11k_update_per_peer_stats_from_txcompl(ar, msdu, ts);
448 memset(&ar->cached_stats, 0,
449 sizeof(struct ath11k_per_peer_tx_stats));
451 ar->cached_stats.is_ampdu = false;
452 ath11k_update_per_peer_stats_from_txcompl(ar, msdu, ts);
453 memset(&ar->cached_stats, 0,
454 sizeof(struct ath11k_per_peer_tx_stats));
456 ar->last_ppdu_id = ts->ppdu_id;
459 ath11k_dp_tx_cache_peer_stats(ar, msdu, ts);
462 /* NOTE: Tx rate status reporting. Tx completion status does not have
463 * necessary information (for example nss) to build the tx rate.
464 * Might end up reporting it out-of-band from HTT stats.
467 ieee80211_tx_status(ar->hw, msdu);
473 static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
474 struct hal_wbm_release_ring *desc,
475 struct hal_tx_status *ts)
478 FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);
479 if (ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
480 ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)
483 if (ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)
486 ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,
488 ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER,
490 ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT,
492 ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI,
494 if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU)
495 ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU;
496 ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3);
497 ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3);
498 if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID)
499 ts->rate_stats = desc->rate_stats.info0;
504 void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
507 struct ath11k_dp *dp = &ab->dp;
508 int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
509 struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
510 struct sk_buff *msdu;
511 struct hal_tx_status ts = { 0 };
512 struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
517 ath11k_hal_srng_access_begin(ab, status_ring);
519 while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) !=
520 tx_ring->tx_status_tail) &&
521 (desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) {
522 memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],
523 desc, sizeof(struct hal_wbm_release_ring));
524 tx_ring->tx_status_head =
525 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);
528 if ((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
529 (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) == tx_ring->tx_status_tail)) {
530 /* TODO: Process pending tx_status messages when kfifo_is_full() */
531 ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
534 ath11k_hal_srng_access_end(ab, status_ring);
536 while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {
537 struct hal_wbm_release_ring *tx_status;
540 tx_ring->tx_status_tail =
541 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail);
542 tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];
543 ath11k_dp_tx_status_parse(ab, tx_status, &ts);
545 desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
546 tx_status->buf_addr_info.info1);
547 mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);
548 msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);
550 if (ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW) {
551 ath11k_dp_tx_process_htt_tx_complete(ab,
558 spin_lock_bh(&tx_ring->tx_idr_lock);
559 msdu = idr_find(&tx_ring->txbuf_idr, msdu_id);
561 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
563 spin_unlock_bh(&tx_ring->tx_idr_lock);
566 idr_remove(&tx_ring->txbuf_idr, msdu_id);
567 spin_unlock_bh(&tx_ring->tx_idr_lock);
569 ar = ab->pdevs[mac_id].ar;
571 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
572 wake_up(&ar->dp.tx_empty_waitq);
574 ath11k_dp_tx_complete_msdu(ar, msdu, &ts);
578 int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
579 enum hal_reo_cmd_type type,
580 struct ath11k_hal_reo_cmd *cmd,
581 void (*cb)(struct ath11k_dp *, void *,
582 enum hal_reo_cmd_status))
584 struct ath11k_dp *dp = &ab->dp;
585 struct dp_reo_cmd *dp_cmd;
586 struct hal_srng *cmd_ring;
589 cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];
590 cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);
592 /* cmd_num should start from 1, during failure return the error code */
596 /* reo cmd ring descriptors has cmd_num starting from 1 */
603 /* Can this be optimized so that we keep the pending command list only
604 * for tid delete command to free up the resoruce on the command status
607 dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC);
612 memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid));
613 dp_cmd->cmd_num = cmd_num;
614 dp_cmd->handler = cb;
616 spin_lock_bh(&dp->reo_cmd_lock);
617 list_add_tail(&dp_cmd->list, &dp->reo_cmd_list);
618 spin_unlock_bh(&dp->reo_cmd_lock);
624 ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab,
625 int mac_id, u32 ring_id,
626 enum hal_ring_type ring_type,
627 enum htt_srng_ring_type *htt_ring_type,
628 enum htt_srng_ring_id *htt_ring_id)
630 int lmac_ring_id_offset = 0;
635 lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC;
636 if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF +
637 lmac_ring_id_offset) ||
638 ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF +
639 lmac_ring_id_offset))) {
642 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
643 *htt_ring_type = HTT_SW_TO_HW_RING;
646 *htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING;
647 *htt_ring_type = HTT_HW_TO_SW_RING;
649 case HAL_RXDMA_MONITOR_BUF:
650 *htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING;
651 *htt_ring_type = HTT_SW_TO_HW_RING;
653 case HAL_RXDMA_MONITOR_STATUS:
654 *htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING;
655 *htt_ring_type = HTT_SW_TO_HW_RING;
657 case HAL_RXDMA_MONITOR_DST:
658 *htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING;
659 *htt_ring_type = HTT_HW_TO_SW_RING;
661 case HAL_RXDMA_MONITOR_DESC:
662 *htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING;
663 *htt_ring_type = HTT_SW_TO_HW_RING;
666 ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type);
672 int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id,
673 int mac_id, enum hal_ring_type ring_type)
675 struct htt_srng_setup_cmd *cmd;
676 struct hal_srng *srng = &ab->hal.srng_list[ring_id];
677 struct hal_srng_params params;
680 int len = sizeof(*cmd);
681 dma_addr_t hp_addr, tp_addr;
682 enum htt_srng_ring_type htt_ring_type;
683 enum htt_srng_ring_id htt_ring_id;
686 skb = ath11k_htc_alloc_skb(ab, len);
690 memset(¶ms, 0, sizeof(params));
691 ath11k_hal_srng_get_params(ab, srng, ¶ms);
693 hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng);
694 tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng);
696 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
697 ring_type, &htt_ring_type,
703 cmd = (struct htt_srng_setup_cmd *)skb->data;
704 cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,
705 HTT_H2T_MSG_TYPE_SRING_SETUP);
706 if (htt_ring_type == HTT_SW_TO_HW_RING ||
707 htt_ring_type == HTT_HW_TO_SW_RING)
708 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
709 DP_SW2HW_MACID(mac_id));
711 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
713 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,
715 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);
717 cmd->ring_base_addr_lo = params.ring_base_paddr &
718 HAL_ADDR_LSB_REG_MASK;
720 cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >>
721 HAL_ADDR_MSB_REG_SHIFT;
723 ret = ath11k_hal_srng_get_entrysize(ring_type);
730 cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,
732 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,
733 params.num_entries * ring_entry_sz);
734 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,
735 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
736 cmd->info1 |= FIELD_PREP(
737 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP,
738 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
739 cmd->info1 |= FIELD_PREP(
740 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP,
741 !!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP));
742 if (htt_ring_type == HTT_SW_TO_HW_RING)
743 cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS;
745 cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK;
746 cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >>
747 HAL_ADDR_MSB_REG_SHIFT;
749 cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK;
750 cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >>
751 HAL_ADDR_MSB_REG_SHIFT;
753 cmd->ring_msi_addr_lo = 0;
754 cmd->ring_msi_addr_hi = 0;
757 cmd->intr_info = FIELD_PREP(
758 HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH,
759 params.intr_batch_cntr_thres_entries * ring_entry_sz);
760 cmd->intr_info |= FIELD_PREP(
761 HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH,
762 params.intr_timer_thres_us >> 3);
765 if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {
766 cmd->info2 = FIELD_PREP(
767 HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH,
768 params.low_threshold);
771 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
778 dev_kfree_skb_any(skb);
783 #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
785 int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab)
787 struct ath11k_dp *dp = &ab->dp;
789 struct htt_ver_req_cmd *cmd;
790 int len = sizeof(*cmd);
793 init_completion(&dp->htt_tgt_version_received);
795 skb = ath11k_htc_alloc_skb(ab, len);
800 cmd = (struct htt_ver_req_cmd *)skb->data;
801 cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,
802 HTT_H2T_MSG_TYPE_VERSION_REQ);
804 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
806 dev_kfree_skb_any(skb);
810 ret = wait_for_completion_timeout(&dp->htt_tgt_version_received,
811 HTT_TARGET_VERSION_TIMEOUT_HZ);
813 ath11k_warn(ab, "htt target version request timed out\n");
817 if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) {
818 ath11k_err(ab, "unsupported htt major version %d supported version is %d\n",
819 dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR);
826 int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)
828 struct ath11k_base *ab = ar->ab;
829 struct ath11k_dp *dp = &ab->dp;
831 struct htt_ppdu_stats_cfg_cmd *cmd;
832 int len = sizeof(*cmd);
836 skb = ath11k_htc_alloc_skb(ab, len);
841 cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data;
842 cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,
843 HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);
845 pdev_mask = 1 << (ar->pdev_idx);
846 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);
847 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);
849 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
851 dev_kfree_skb_any(skb);
858 int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id,
859 int mac_id, enum hal_ring_type ring_type,
861 struct htt_rx_ring_tlv_filter *tlv_filter)
863 struct htt_rx_ring_selection_cfg_cmd *cmd;
864 struct hal_srng *srng = &ab->hal.srng_list[ring_id];
865 struct hal_srng_params params;
867 int len = sizeof(*cmd);
868 enum htt_srng_ring_type htt_ring_type;
869 enum htt_srng_ring_id htt_ring_id;
872 skb = ath11k_htc_alloc_skb(ab, len);
876 memset(¶ms, 0, sizeof(params));
877 ath11k_hal_srng_get_params(ab, srng, ¶ms);
879 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
880 ring_type, &htt_ring_type,
886 cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data;
887 cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,
888 HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG);
889 if (htt_ring_type == HTT_SW_TO_HW_RING ||
890 htt_ring_type == HTT_HW_TO_SW_RING)
892 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
893 DP_SW2HW_MACID(mac_id));
896 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
898 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,
900 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,
901 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
902 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,
903 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
905 cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,
907 cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0;
908 cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1;
909 cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2;
910 cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;
911 cmd->rx_filter_tlv = tlv_filter->rx_filter;
913 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
920 dev_kfree_skb_any(skb);
926 ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type,
927 struct htt_ext_stats_cfg_params *cfg_params,
930 struct ath11k_base *ab = ar->ab;
931 struct ath11k_dp *dp = &ab->dp;
933 struct htt_ext_stats_cfg_cmd *cmd;
934 int len = sizeof(*cmd);
937 skb = ath11k_htc_alloc_skb(ab, len);
943 cmd = (struct htt_ext_stats_cfg_cmd *)skb->data;
944 memset(cmd, 0, sizeof(*cmd));
945 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG;
947 cmd->hdr.pdev_mask = 1 << ar->pdev->pdev_id;
949 cmd->hdr.stats_type = type;
950 cmd->cfg_param0 = cfg_params->cfg0;
951 cmd->cfg_param1 = cfg_params->cfg1;
952 cmd->cfg_param2 = cfg_params->cfg2;
953 cmd->cfg_param3 = cfg_params->cfg3;
954 cmd->cookie_lsb = lower_32_bits(cookie);
955 cmd->cookie_msb = upper_32_bits(cookie);
957 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
959 ath11k_warn(ab, "failed to send htt type stats request: %d",
961 dev_kfree_skb_any(skb);
968 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
970 struct ath11k_pdev_dp *dp = &ar->dp;
971 struct htt_rx_ring_tlv_filter tlv_filter = {0};
972 int ret = 0, ring_id = 0;
974 ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
977 tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;
978 tlv_filter.pkt_filter_flags0 =
979 HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 |
980 HTT_RX_MON_MO_MGMT_FILTER_FLAGS0;
981 tlv_filter.pkt_filter_flags1 =
982 HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 |
983 HTT_RX_MON_MO_MGMT_FILTER_FLAGS1;
984 tlv_filter.pkt_filter_flags2 =
985 HTT_RX_MON_FP_CTRL_FILTER_FLASG2 |
986 HTT_RX_MON_MO_CTRL_FILTER_FLASG2;
987 tlv_filter.pkt_filter_flags3 =
988 HTT_RX_MON_FP_CTRL_FILTER_FLASG3 |
989 HTT_RX_MON_MO_CTRL_FILTER_FLASG3 |
990 HTT_RX_MON_FP_DATA_FILTER_FLASG3 |
991 HTT_RX_MON_MO_DATA_FILTER_FLASG3;
994 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
995 HAL_RXDMA_MONITOR_BUF,
996 DP_RXDMA_REFILL_RING_SIZE,
1001 ring_id = dp->rx_mon_status_refill_ring.refill_buf_ring.ring_id;
1003 tlv_filter.rx_filter =
1004 HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;
1006 tlv_filter = ath11k_mac_mon_status_filter_default;
1008 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
1009 HAL_RXDMA_MONITOR_STATUS,
1010 DP_RXDMA_REFILL_RING_SIZE,