Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
[linux-2.6-microblaze.git] / drivers / net / wireless / ath / ath11k / dp_tx.c
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  */
5
6 #include "core.h"
7 #include "dp_tx.h"
8 #include "debug.h"
9 #include "hw.h"
10 #include "peer.h"
11
12 static enum hal_tcl_encap_type
13 ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb)
14 {
15         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
16
17         if (tx_info->control.flags & IEEE80211_TX_CTRL_HW_80211_ENCAP)
18                 return HAL_TCL_ENCAP_TYPE_ETHERNET;
19
20         return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI;
21 }
22
23 static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb)
24 {
25         struct ieee80211_hdr *hdr = (void *)skb->data;
26         u8 *qos_ctl;
27
28         if (!ieee80211_is_data_qos(hdr->frame_control))
29                 return;
30
31         qos_ctl = ieee80211_get_qos_ctl(hdr);
32         memmove(skb->data + IEEE80211_QOS_CTL_LEN,
33                 skb->data, (void *)qos_ctl - (void *)skb->data);
34         skb_pull(skb, IEEE80211_QOS_CTL_LEN);
35
36         hdr = (void *)skb->data;
37         hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
38 }
39
40 static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb)
41 {
42         struct ieee80211_hdr *hdr = (void *)skb->data;
43         struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb);
44
45         if (cb->flags & ATH11K_SKB_HW_80211_ENCAP)
46                 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
47         else if (!ieee80211_is_data_qos(hdr->frame_control))
48                 return HAL_DESC_REO_NON_QOS_TID;
49         else
50                 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
51 }
52
53 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)
54 {
55         switch (cipher) {
56         case WLAN_CIPHER_SUITE_WEP40:
57                 return HAL_ENCRYPT_TYPE_WEP_40;
58         case WLAN_CIPHER_SUITE_WEP104:
59                 return HAL_ENCRYPT_TYPE_WEP_104;
60         case WLAN_CIPHER_SUITE_TKIP:
61                 return HAL_ENCRYPT_TYPE_TKIP_MIC;
62         case WLAN_CIPHER_SUITE_CCMP:
63                 return HAL_ENCRYPT_TYPE_CCMP_128;
64         case WLAN_CIPHER_SUITE_CCMP_256:
65                 return HAL_ENCRYPT_TYPE_CCMP_256;
66         case WLAN_CIPHER_SUITE_GCMP:
67                 return HAL_ENCRYPT_TYPE_GCMP_128;
68         case WLAN_CIPHER_SUITE_GCMP_256:
69                 return HAL_ENCRYPT_TYPE_AES_GCMP_256;
70         default:
71                 return HAL_ENCRYPT_TYPE_OPEN;
72         }
73 }
74
75 int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
76                  struct sk_buff *skb)
77 {
78         struct ath11k_base *ab = ar->ab;
79         struct ath11k_dp *dp = &ab->dp;
80         struct hal_tx_info ti = {0};
81         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
82         struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
83         struct hal_srng *tcl_ring;
84         struct ieee80211_hdr *hdr = (void *)skb->data;
85         struct dp_tx_ring *tx_ring;
86         void *hal_tcl_desc;
87         u8 pool_id;
88         u8 hal_ring_id;
89         int ret;
90         u8 ring_selector = 0, ring_map = 0;
91         bool tcl_ring_retry;
92
93         if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags))
94                 return -ESHUTDOWN;
95
96         if (!(info->control.flags & IEEE80211_TX_CTRL_HW_80211_ENCAP) &&
97             !ieee80211_is_data(hdr->frame_control))
98                 return -ENOTSUPP;
99
100         pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);
101
102         /* Let the default ring selection be based on a round robin
103          * fashion where one of the 3 tcl rings are selected based on
104          * the tcl_ring_selector counter. In case that ring
105          * is full/busy, we resort to other available rings.
106          * If all rings are full, we drop the packet.
107          * //TODO Add throttling logic when all rings are full
108          */
109         ring_selector = atomic_inc_return(&ab->tcl_ring_selector);
110
111 tcl_ring_sel:
112         tcl_ring_retry = false;
113         ti.ring_id = ring_selector % DP_TCL_NUM_RING_MAX;
114         ring_map |= BIT(ti.ring_id);
115
116         tx_ring = &dp->tx_ring[ti.ring_id];
117
118         spin_lock_bh(&tx_ring->tx_idr_lock);
119         ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0,
120                         DP_TX_IDR_SIZE - 1, GFP_ATOMIC);
121         spin_unlock_bh(&tx_ring->tx_idr_lock);
122
123         if (ret < 0) {
124                 if (ring_map == (BIT(DP_TCL_NUM_RING_MAX) - 1)) {
125                         atomic_inc(&ab->soc_stats.tx_err.misc_fail);
126                         return -ENOSPC;
127                 }
128
129                 /* Check if the next ring is available */
130                 ring_selector++;
131                 goto tcl_ring_sel;
132         }
133
134         ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |
135                      FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |
136                      FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);
137         ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);
138         ti.meta_data_flags = arvif->tcl_metadata;
139
140         if (info->control.hw_key)
141                 ti.encrypt_type =
142                         ath11k_dp_tx_get_encrypt_type(info->control.hw_key->cipher);
143         else
144                 ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;
145
146         ti.addr_search_flags = arvif->hal_addr_search_flags;
147         ti.search_type = arvif->search_type;
148         ti.type = HAL_TCL_DESC_TYPE_BUFFER;
149         ti.pkt_offset = 0;
150         ti.lmac_id = ar->lmac_id;
151         ti.bss_ast_hash = arvif->ast_hash;
152         ti.dscp_tid_tbl_idx = 0;
153
154         if (skb->ip_summed == CHECKSUM_PARTIAL) {
155                 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |
156                              FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |
157                              FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |
158                              FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |
159                              FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);
160         }
161
162         if (ieee80211_vif_is_mesh(arvif->vif))
163                 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_MESH_ENABLE, 1);
164
165         ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);
166
167         ti.tid = ath11k_dp_tx_get_tid(skb);
168
169         switch (ti.encap_type) {
170         case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:
171                 ath11k_dp_tx_encap_nwifi(skb);
172                 break;
173         case HAL_TCL_ENCAP_TYPE_RAW:
174                 /*  TODO: for CHECKSUM_PARTIAL case in raw mode, HW checksum offload
175                  *        is not applicable, hence manual checksum calculation using
176                  *        skb_checksum_help() is needed
177                  */
178         case HAL_TCL_ENCAP_TYPE_ETHERNET:
179                 /* no need to encap */
180                 break;
181         case HAL_TCL_ENCAP_TYPE_802_3:
182         default:
183                 /* TODO: Take care of other encap modes as well */
184                 ret = -EINVAL;
185                 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
186                 goto fail_remove_idr;
187         }
188
189         ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
190         if (dma_mapping_error(ab->dev, ti.paddr)) {
191                 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
192                 ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
193                 ret = -ENOMEM;
194                 goto fail_remove_idr;
195         }
196
197         ti.data_len = skb->len;
198         skb_cb->paddr = ti.paddr;
199         skb_cb->vif = arvif->vif;
200         skb_cb->ar = ar;
201
202         hal_ring_id = tx_ring->tcl_data_ring.ring_id;
203         tcl_ring = &ab->hal.srng_list[hal_ring_id];
204
205         spin_lock_bh(&tcl_ring->lock);
206
207         ath11k_hal_srng_access_begin(ab, tcl_ring);
208
209         hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);
210         if (!hal_tcl_desc) {
211                 /* NOTE: It is highly unlikely we'll be running out of tcl_ring
212                  * desc because the desc is directly enqueued onto hw queue.
213                  */
214                 ath11k_hal_srng_access_end(ab, tcl_ring);
215                 ab->soc_stats.tx_err.desc_na[ti.ring_id]++;
216                 spin_unlock_bh(&tcl_ring->lock);
217                 ret = -ENOMEM;
218
219                 /* Checking for available tcl descritors in another ring in
220                  * case of failure due to full tcl ring now, is better than
221                  * checking this ring earlier for each pkt tx.
222                  * Restart ring selection if some rings are not checked yet.
223                  */
224                 if (ring_map != (BIT(DP_TCL_NUM_RING_MAX) - 1)) {
225                         tcl_ring_retry = true;
226                         ring_selector++;
227                 }
228
229                 goto fail_unmap_dma;
230         }
231
232         ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc +
233                                          sizeof(struct hal_tlv_hdr), &ti);
234
235         ath11k_hal_srng_access_end(ab, tcl_ring);
236
237         spin_unlock_bh(&tcl_ring->lock);
238
239         atomic_inc(&ar->dp.num_tx_pending);
240
241         return 0;
242
243 fail_unmap_dma:
244         dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE);
245
246 fail_remove_idr:
247         spin_lock_bh(&tx_ring->tx_idr_lock);
248         idr_remove(&tx_ring->txbuf_idr,
249                    FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id));
250         spin_unlock_bh(&tx_ring->tx_idr_lock);
251
252         if (tcl_ring_retry)
253                 goto tcl_ring_sel;
254
255         return ret;
256 }
257
258 static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,
259                                     int msdu_id,
260                                     struct dp_tx_ring *tx_ring)
261 {
262         struct ath11k *ar;
263         struct sk_buff *msdu;
264         struct ath11k_skb_cb *skb_cb;
265
266         spin_lock_bh(&tx_ring->tx_idr_lock);
267         msdu = idr_find(&tx_ring->txbuf_idr, msdu_id);
268         if (!msdu) {
269                 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
270                             msdu_id);
271                 spin_unlock_bh(&tx_ring->tx_idr_lock);
272                 return;
273         }
274
275         skb_cb = ATH11K_SKB_CB(msdu);
276
277         idr_remove(&tx_ring->txbuf_idr, msdu_id);
278         spin_unlock_bh(&tx_ring->tx_idr_lock);
279
280         dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
281         dev_kfree_skb_any(msdu);
282
283         ar = ab->pdevs[mac_id].ar;
284         if (atomic_dec_and_test(&ar->dp.num_tx_pending))
285                 wake_up(&ar->dp.tx_empty_waitq);
286 }
287
288 static void
289 ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
290                                  struct dp_tx_ring *tx_ring,
291                                  struct ath11k_dp_htt_wbm_tx_status *ts)
292 {
293         struct sk_buff *msdu;
294         struct ieee80211_tx_info *info;
295         struct ath11k_skb_cb *skb_cb;
296         struct ath11k *ar;
297
298         spin_lock_bh(&tx_ring->tx_idr_lock);
299         msdu = idr_find(&tx_ring->txbuf_idr, ts->msdu_id);
300         if (!msdu) {
301                 ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",
302                             ts->msdu_id);
303                 spin_unlock_bh(&tx_ring->tx_idr_lock);
304                 return;
305         }
306
307         skb_cb = ATH11K_SKB_CB(msdu);
308         info = IEEE80211_SKB_CB(msdu);
309
310         ar = skb_cb->ar;
311
312         idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
313         spin_unlock_bh(&tx_ring->tx_idr_lock);
314
315         if (atomic_dec_and_test(&ar->dp.num_tx_pending))
316                 wake_up(&ar->dp.tx_empty_waitq);
317
318         dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
319
320         memset(&info->status, 0, sizeof(info->status));
321
322         if (ts->acked) {
323                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
324                         info->flags |= IEEE80211_TX_STAT_ACK;
325                         info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +
326                                                   ts->ack_rssi;
327                         info->status.is_valid_ack_signal = true;
328                 } else {
329                         info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
330                 }
331         }
332
333         ieee80211_tx_status(ar->hw, msdu);
334 }
335
336 static void
337 ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,
338                                      void *desc, u8 mac_id,
339                                      u32 msdu_id, struct dp_tx_ring *tx_ring)
340 {
341         struct htt_tx_wbm_completion *status_desc;
342         struct ath11k_dp_htt_wbm_tx_status ts = {0};
343         enum hal_wbm_htt_tx_comp_status wbm_status;
344
345         status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;
346
347         wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS,
348                                status_desc->info0);
349
350         switch (wbm_status) {
351         case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK:
352         case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:
353         case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:
354                 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);
355                 ts.msdu_id = msdu_id;
356                 ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
357                                         status_desc->info1);
358                 ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
359                 break;
360         case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
361         case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
362                 ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring);
363                 break;
364         case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY:
365                 /* This event is to be handled only when the driver decides to
366                  * use WDS offload functionality.
367                  */
368                 break;
369         default:
370                 ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status);
371                 break;
372         }
373 }
374
375 static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar,
376                                           struct sk_buff *msdu,
377                                           struct hal_tx_status *ts)
378 {
379         struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
380
381         if (ts->try_cnt > 1) {
382                 peer_stats->retry_pkts += ts->try_cnt - 1;
383                 peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len;
384
385                 if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) {
386                         peer_stats->failed_pkts += 1;
387                         peer_stats->failed_bytes += msdu->len;
388                 }
389         }
390 }
391
392 static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
393                                        struct sk_buff *msdu,
394                                        struct hal_tx_status *ts)
395 {
396         struct ath11k_base *ab = ar->ab;
397         struct ieee80211_tx_info *info;
398         struct ath11k_skb_cb *skb_cb;
399
400         if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {
401                 /* Must not happen */
402                 return;
403         }
404
405         skb_cb = ATH11K_SKB_CB(msdu);
406
407         dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
408
409         rcu_read_lock();
410
411         if (!rcu_dereference(ab->pdevs_active[ar->pdev_idx])) {
412                 dev_kfree_skb_any(msdu);
413                 goto exit;
414         }
415
416         if (!skb_cb->vif) {
417                 dev_kfree_skb_any(msdu);
418                 goto exit;
419         }
420
421         info = IEEE80211_SKB_CB(msdu);
422         memset(&info->status, 0, sizeof(info->status));
423
424         /* skip tx rate update from ieee80211_status*/
425         info->status.rates[0].idx = -1;
426
427         if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED &&
428             !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
429                 info->flags |= IEEE80211_TX_STAT_ACK;
430                 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +
431                                           ts->ack_rssi;
432                 info->status.is_valid_ack_signal = true;
433         }
434
435         if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX &&
436             (info->flags & IEEE80211_TX_CTL_NO_ACK))
437                 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
438
439         if (ath11k_debug_is_extd_tx_stats_enabled(ar)) {
440                 if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {
441                         if (ar->last_ppdu_id == 0) {
442                                 ar->last_ppdu_id = ts->ppdu_id;
443                         } else if (ar->last_ppdu_id == ts->ppdu_id ||
444                                    ar->cached_ppdu_id == ar->last_ppdu_id) {
445                                 ar->cached_ppdu_id = ar->last_ppdu_id;
446                                 ar->cached_stats.is_ampdu = true;
447                                 ath11k_update_per_peer_stats_from_txcompl(ar, msdu, ts);
448                                 memset(&ar->cached_stats, 0,
449                                        sizeof(struct ath11k_per_peer_tx_stats));
450                         } else {
451                                 ar->cached_stats.is_ampdu = false;
452                                 ath11k_update_per_peer_stats_from_txcompl(ar, msdu, ts);
453                                 memset(&ar->cached_stats, 0,
454                                        sizeof(struct ath11k_per_peer_tx_stats));
455                         }
456                         ar->last_ppdu_id = ts->ppdu_id;
457                 }
458
459                 ath11k_dp_tx_cache_peer_stats(ar, msdu, ts);
460         }
461
462         /* NOTE: Tx rate status reporting. Tx completion status does not have
463          * necessary information (for example nss) to build the tx rate.
464          * Might end up reporting it out-of-band from HTT stats.
465          */
466
467         ieee80211_tx_status(ar->hw, msdu);
468
469 exit:
470         rcu_read_unlock();
471 }
472
473 static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
474                                              struct hal_wbm_release_ring *desc,
475                                              struct hal_tx_status *ts)
476 {
477         ts->buf_rel_source =
478                 FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);
479         if (ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
480             ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)
481                 return;
482
483         if (ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)
484                 return;
485
486         ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,
487                                desc->info0);
488         ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER,
489                                 desc->info1);
490         ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT,
491                                 desc->info1);
492         ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI,
493                                  desc->info2);
494         if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU)
495                 ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU;
496         ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3);
497         ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3);
498         if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID)
499                 ts->rate_stats = desc->rate_stats.info0;
500         else
501                 ts->rate_stats = 0;
502 }
503
504 void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
505 {
506         struct ath11k *ar;
507         struct ath11k_dp *dp = &ab->dp;
508         int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
509         struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
510         struct sk_buff *msdu;
511         struct hal_tx_status ts = { 0 };
512         struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
513         u32 *desc;
514         u32 msdu_id;
515         u8 mac_id;
516
517         ath11k_hal_srng_access_begin(ab, status_ring);
518
519         while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) !=
520                 tx_ring->tx_status_tail) &&
521                (desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) {
522                 memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],
523                        desc, sizeof(struct hal_wbm_release_ring));
524                 tx_ring->tx_status_head =
525                         ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);
526         }
527
528         if ((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
529             (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) == tx_ring->tx_status_tail)) {
530                 /* TODO: Process pending tx_status messages when kfifo_is_full() */
531                 ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
532         }
533
534         ath11k_hal_srng_access_end(ab, status_ring);
535
536         while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {
537                 struct hal_wbm_release_ring *tx_status;
538                 u32 desc_id;
539
540                 tx_ring->tx_status_tail =
541                         ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail);
542                 tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];
543                 ath11k_dp_tx_status_parse(ab, tx_status, &ts);
544
545                 desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
546                                     tx_status->buf_addr_info.info1);
547                 mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);
548                 msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);
549
550                 if (ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW) {
551                         ath11k_dp_tx_process_htt_tx_complete(ab,
552                                                              (void *)tx_status,
553                                                              mac_id, msdu_id,
554                                                              tx_ring);
555                         continue;
556                 }
557
558                 spin_lock_bh(&tx_ring->tx_idr_lock);
559                 msdu = idr_find(&tx_ring->txbuf_idr, msdu_id);
560                 if (!msdu) {
561                         ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
562                                     msdu_id);
563                         spin_unlock_bh(&tx_ring->tx_idr_lock);
564                         continue;
565                 }
566                 idr_remove(&tx_ring->txbuf_idr, msdu_id);
567                 spin_unlock_bh(&tx_ring->tx_idr_lock);
568
569                 ar = ab->pdevs[mac_id].ar;
570
571                 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
572                         wake_up(&ar->dp.tx_empty_waitq);
573
574                 ath11k_dp_tx_complete_msdu(ar, msdu, &ts);
575         }
576 }
577
578 int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
579                               enum hal_reo_cmd_type type,
580                               struct ath11k_hal_reo_cmd *cmd,
581                               void (*cb)(struct ath11k_dp *, void *,
582                                          enum hal_reo_cmd_status))
583 {
584         struct ath11k_dp *dp = &ab->dp;
585         struct dp_reo_cmd *dp_cmd;
586         struct hal_srng *cmd_ring;
587         int cmd_num;
588
589         cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];
590         cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);
591
592         /* cmd_num should start from 1, during failure return the error code */
593         if (cmd_num < 0)
594                 return cmd_num;
595
596         /* reo cmd ring descriptors has cmd_num starting from 1 */
597         if (cmd_num == 0)
598                 return -EINVAL;
599
600         if (!cb)
601                 return 0;
602
603         /* Can this be optimized so that we keep the pending command list only
604          * for tid delete command to free up the resoruce on the command status
605          * indication?
606          */
607         dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC);
608
609         if (!dp_cmd)
610                 return -ENOMEM;
611
612         memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid));
613         dp_cmd->cmd_num = cmd_num;
614         dp_cmd->handler = cb;
615
616         spin_lock_bh(&dp->reo_cmd_lock);
617         list_add_tail(&dp_cmd->list, &dp->reo_cmd_list);
618         spin_unlock_bh(&dp->reo_cmd_lock);
619
620         return 0;
621 }
622
623 static int
624 ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab,
625                               int mac_id, u32 ring_id,
626                               enum hal_ring_type ring_type,
627                               enum htt_srng_ring_type *htt_ring_type,
628                               enum htt_srng_ring_id *htt_ring_id)
629 {
630         int lmac_ring_id_offset = 0;
631         int ret = 0;
632
633         switch (ring_type) {
634         case HAL_RXDMA_BUF:
635                 lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC;
636                 if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF +
637                                   lmac_ring_id_offset) ||
638                     ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF +
639                                 lmac_ring_id_offset))) {
640                         ret = -EINVAL;
641                 }
642                 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
643                 *htt_ring_type = HTT_SW_TO_HW_RING;
644                 break;
645         case HAL_RXDMA_DST:
646                 *htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING;
647                 *htt_ring_type = HTT_HW_TO_SW_RING;
648                 break;
649         case HAL_RXDMA_MONITOR_BUF:
650                 *htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING;
651                 *htt_ring_type = HTT_SW_TO_HW_RING;
652                 break;
653         case HAL_RXDMA_MONITOR_STATUS:
654                 *htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING;
655                 *htt_ring_type = HTT_SW_TO_HW_RING;
656                 break;
657         case HAL_RXDMA_MONITOR_DST:
658                 *htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING;
659                 *htt_ring_type = HTT_HW_TO_SW_RING;
660                 break;
661         case HAL_RXDMA_MONITOR_DESC:
662                 *htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING;
663                 *htt_ring_type = HTT_SW_TO_HW_RING;
664                 break;
665         default:
666                 ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type);
667                 ret = -EINVAL;
668         }
669         return ret;
670 }
671
672 int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id,
673                                 int mac_id, enum hal_ring_type ring_type)
674 {
675         struct htt_srng_setup_cmd *cmd;
676         struct hal_srng *srng = &ab->hal.srng_list[ring_id];
677         struct hal_srng_params params;
678         struct sk_buff *skb;
679         u32 ring_entry_sz;
680         int len = sizeof(*cmd);
681         dma_addr_t hp_addr, tp_addr;
682         enum htt_srng_ring_type htt_ring_type;
683         enum htt_srng_ring_id htt_ring_id;
684         int ret;
685
686         skb = ath11k_htc_alloc_skb(ab, len);
687         if (!skb)
688                 return -ENOMEM;
689
690         memset(&params, 0, sizeof(params));
691         ath11k_hal_srng_get_params(ab, srng, &params);
692
693         hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng);
694         tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng);
695
696         ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
697                                             ring_type, &htt_ring_type,
698                                             &htt_ring_id);
699         if (ret)
700                 goto err_free;
701
702         skb_put(skb, len);
703         cmd = (struct htt_srng_setup_cmd *)skb->data;
704         cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,
705                                 HTT_H2T_MSG_TYPE_SRING_SETUP);
706         if (htt_ring_type == HTT_SW_TO_HW_RING ||
707             htt_ring_type == HTT_HW_TO_SW_RING)
708                 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
709                                          DP_SW2HW_MACID(mac_id));
710         else
711                 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
712                                          mac_id);
713         cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,
714                                  htt_ring_type);
715         cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);
716
717         cmd->ring_base_addr_lo = params.ring_base_paddr &
718                                  HAL_ADDR_LSB_REG_MASK;
719
720         cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >>
721                                  HAL_ADDR_MSB_REG_SHIFT;
722
723         ret = ath11k_hal_srng_get_entrysize(ring_type);
724         if (ret < 0)
725                 goto err_free;
726
727         ring_entry_sz = ret;
728
729         ring_entry_sz >>= 2;
730         cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,
731                                 ring_entry_sz);
732         cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,
733                                  params.num_entries * ring_entry_sz);
734         cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,
735                                  !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
736         cmd->info1 |= FIELD_PREP(
737                         HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP,
738                         !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
739         cmd->info1 |= FIELD_PREP(
740                         HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP,
741                         !!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP));
742         if (htt_ring_type == HTT_SW_TO_HW_RING)
743                 cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS;
744
745         cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK;
746         cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >>
747                                               HAL_ADDR_MSB_REG_SHIFT;
748
749         cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK;
750         cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >>
751                                               HAL_ADDR_MSB_REG_SHIFT;
752
753         cmd->ring_msi_addr_lo = 0;
754         cmd->ring_msi_addr_hi = 0;
755         cmd->msi_data = 0;
756
757         cmd->intr_info = FIELD_PREP(
758                         HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH,
759                         params.intr_batch_cntr_thres_entries * ring_entry_sz);
760         cmd->intr_info |= FIELD_PREP(
761                         HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH,
762                         params.intr_timer_thres_us >> 3);
763
764         cmd->info2 = 0;
765         if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {
766                 cmd->info2 = FIELD_PREP(
767                                 HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH,
768                                 params.low_threshold);
769         }
770
771         ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
772         if (ret)
773                 goto err_free;
774
775         return 0;
776
777 err_free:
778         dev_kfree_skb_any(skb);
779
780         return ret;
781 }
782
783 #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
784
785 int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab)
786 {
787         struct ath11k_dp *dp = &ab->dp;
788         struct sk_buff *skb;
789         struct htt_ver_req_cmd *cmd;
790         int len = sizeof(*cmd);
791         int ret;
792
793         init_completion(&dp->htt_tgt_version_received);
794
795         skb = ath11k_htc_alloc_skb(ab, len);
796         if (!skb)
797                 return -ENOMEM;
798
799         skb_put(skb, len);
800         cmd = (struct htt_ver_req_cmd *)skb->data;
801         cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,
802                                        HTT_H2T_MSG_TYPE_VERSION_REQ);
803
804         ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
805         if (ret) {
806                 dev_kfree_skb_any(skb);
807                 return ret;
808         }
809
810         ret = wait_for_completion_timeout(&dp->htt_tgt_version_received,
811                                           HTT_TARGET_VERSION_TIMEOUT_HZ);
812         if (ret == 0) {
813                 ath11k_warn(ab, "htt target version request timed out\n");
814                 return -ETIMEDOUT;
815         }
816
817         if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) {
818                 ath11k_err(ab, "unsupported htt major version %d supported version is %d\n",
819                            dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR);
820                 return -ENOTSUPP;
821         }
822
823         return 0;
824 }
825
826 int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)
827 {
828         struct ath11k_base *ab = ar->ab;
829         struct ath11k_dp *dp = &ab->dp;
830         struct sk_buff *skb;
831         struct htt_ppdu_stats_cfg_cmd *cmd;
832         int len = sizeof(*cmd);
833         u8 pdev_mask;
834         int ret;
835
836         skb = ath11k_htc_alloc_skb(ab, len);
837         if (!skb)
838                 return -ENOMEM;
839
840         skb_put(skb, len);
841         cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data;
842         cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,
843                               HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);
844
845         pdev_mask = 1 << (ar->pdev_idx);
846         cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);
847         cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);
848
849         ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
850         if (ret) {
851                 dev_kfree_skb_any(skb);
852                 return ret;
853         }
854
855         return 0;
856 }
857
858 int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id,
859                                      int mac_id, enum hal_ring_type ring_type,
860                                      int rx_buf_size,
861                                      struct htt_rx_ring_tlv_filter *tlv_filter)
862 {
863         struct htt_rx_ring_selection_cfg_cmd *cmd;
864         struct hal_srng *srng = &ab->hal.srng_list[ring_id];
865         struct hal_srng_params params;
866         struct sk_buff *skb;
867         int len = sizeof(*cmd);
868         enum htt_srng_ring_type htt_ring_type;
869         enum htt_srng_ring_id htt_ring_id;
870         int ret;
871
872         skb = ath11k_htc_alloc_skb(ab, len);
873         if (!skb)
874                 return -ENOMEM;
875
876         memset(&params, 0, sizeof(params));
877         ath11k_hal_srng_get_params(ab, srng, &params);
878
879         ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
880                                             ring_type, &htt_ring_type,
881                                             &htt_ring_id);
882         if (ret)
883                 goto err_free;
884
885         skb_put(skb, len);
886         cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data;
887         cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,
888                                 HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG);
889         if (htt_ring_type == HTT_SW_TO_HW_RING ||
890             htt_ring_type == HTT_HW_TO_SW_RING)
891                 cmd->info0 |=
892                         FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
893                                    DP_SW2HW_MACID(mac_id));
894         else
895                 cmd->info0 |=
896                         FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
897                                    mac_id);
898         cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,
899                                  htt_ring_id);
900         cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,
901                                  !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
902         cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,
903                                  !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
904
905         cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,
906                                 rx_buf_size);
907         cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0;
908         cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1;
909         cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2;
910         cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;
911         cmd->rx_filter_tlv = tlv_filter->rx_filter;
912
913         ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
914         if (ret)
915                 goto err_free;
916
917         return 0;
918
919 err_free:
920         dev_kfree_skb_any(skb);
921
922         return ret;
923 }
924
925 int
926 ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type,
927                                    struct htt_ext_stats_cfg_params *cfg_params,
928                                    u64 cookie)
929 {
930         struct ath11k_base *ab = ar->ab;
931         struct ath11k_dp *dp = &ab->dp;
932         struct sk_buff *skb;
933         struct htt_ext_stats_cfg_cmd *cmd;
934         int len = sizeof(*cmd);
935         int ret;
936
937         skb = ath11k_htc_alloc_skb(ab, len);
938         if (!skb)
939                 return -ENOMEM;
940
941         skb_put(skb, len);
942
943         cmd = (struct htt_ext_stats_cfg_cmd *)skb->data;
944         memset(cmd, 0, sizeof(*cmd));
945         cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG;
946
947         cmd->hdr.pdev_mask = 1 << ar->pdev->pdev_id;
948
949         cmd->hdr.stats_type = type;
950         cmd->cfg_param0 = cfg_params->cfg0;
951         cmd->cfg_param1 = cfg_params->cfg1;
952         cmd->cfg_param2 = cfg_params->cfg2;
953         cmd->cfg_param3 = cfg_params->cfg3;
954         cmd->cookie_lsb = lower_32_bits(cookie);
955         cmd->cookie_msb = upper_32_bits(cookie);
956
957         ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
958         if (ret) {
959                 ath11k_warn(ab, "failed to send htt type stats request: %d",
960                             ret);
961                 dev_kfree_skb_any(skb);
962                 return ret;
963         }
964
965         return 0;
966 }
967
968 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
969 {
970         struct ath11k_pdev_dp *dp = &ar->dp;
971         struct htt_rx_ring_tlv_filter tlv_filter = {0};
972         int ret = 0, ring_id = 0;
973
974         ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
975
976         if (!reset) {
977                 tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;
978                 tlv_filter.pkt_filter_flags0 =
979                                         HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 |
980                                         HTT_RX_MON_MO_MGMT_FILTER_FLAGS0;
981                 tlv_filter.pkt_filter_flags1 =
982                                         HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 |
983                                         HTT_RX_MON_MO_MGMT_FILTER_FLAGS1;
984                 tlv_filter.pkt_filter_flags2 =
985                                         HTT_RX_MON_FP_CTRL_FILTER_FLASG2 |
986                                         HTT_RX_MON_MO_CTRL_FILTER_FLASG2;
987                 tlv_filter.pkt_filter_flags3 =
988                                         HTT_RX_MON_FP_CTRL_FILTER_FLASG3 |
989                                         HTT_RX_MON_MO_CTRL_FILTER_FLASG3 |
990                                         HTT_RX_MON_FP_DATA_FILTER_FLASG3 |
991                                         HTT_RX_MON_MO_DATA_FILTER_FLASG3;
992         }
993
994         ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
995                                                HAL_RXDMA_MONITOR_BUF,
996                                                DP_RXDMA_REFILL_RING_SIZE,
997                                                &tlv_filter);
998         if (ret)
999                 return ret;
1000
1001         ring_id = dp->rx_mon_status_refill_ring.refill_buf_ring.ring_id;
1002         if (!reset)
1003                 tlv_filter.rx_filter =
1004                                 HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;
1005         else
1006                 tlv_filter = ath11k_mac_mon_status_filter_default;
1007
1008         ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
1009                                                HAL_RXDMA_MONITOR_STATUS,
1010                                                DP_RXDMA_REFILL_RING_SIZE,
1011                                                &tlv_filter);
1012         return ret;
1013 }