1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
9 #include <linux/devcoredump.h>
10 #include <linux/kernel.h>
11 #include <linux/types.h>
12 #include <linux/utsname.h>
17 static const struct ath10k_mem_section qca6174_hw21_register_sections[] = {
273 static const struct ath10k_mem_section qca6174_hw30_register_sections[] = {
529 static const struct ath10k_mem_region qca6174_hw10_mem_regions[] = {
531 .type = ATH10K_MEM_REGION_TYPE_DRAM,
541 .type = ATH10K_MEM_REGION_TYPE_REG,
543 /* RTC_SOC_BASE_ADDRESS */
546 /* WLAN_MBOX_BASE_ADDRESS - RTC_SOC_BASE_ADDRESS */
556 .type = ATH10K_MEM_REGION_TYPE_REG,
558 /* STEREO_BASE_ADDRESS */
561 /* USB_BASE_ADDRESS - STEREO_BASE_ADDRESS */
562 .len = 0x60000 - 0x27000,
572 static const struct ath10k_mem_region qca6174_hw21_mem_regions[] = {
574 .type = ATH10K_MEM_REGION_TYPE_DRAM,
584 .type = ATH10K_MEM_REGION_TYPE_AXI,
594 .type = ATH10K_MEM_REGION_TYPE_REG,
596 .len = 0x80020 - 0x800,
599 .sections = qca6174_hw21_register_sections,
600 .size = ARRAY_SIZE(qca6174_hw21_register_sections),
605 static const struct ath10k_mem_region qca6174_hw30_mem_regions[] = {
607 .type = ATH10K_MEM_REGION_TYPE_DRAM,
617 .type = ATH10K_MEM_REGION_TYPE_AXI,
627 .type = ATH10K_MEM_REGION_TYPE_REG,
629 .len = 0x80020 - 0x800,
632 .sections = qca6174_hw30_register_sections,
633 .size = ARRAY_SIZE(qca6174_hw30_register_sections),
637 /* IRAM dump must be put last */
639 .type = ATH10K_MEM_REGION_TYPE_IRAM1,
649 .type = ATH10K_MEM_REGION_TYPE_IRAM2,
660 static const struct ath10k_mem_region qca988x_hw20_mem_regions[] = {
662 .type = ATH10K_MEM_REGION_TYPE_DRAM,
672 .type = ATH10K_MEM_REGION_TYPE_REG,
682 .type = ATH10K_MEM_REGION_TYPE_REG,
693 static const struct ath10k_mem_region qca99x0_hw20_mem_regions[] = {
695 .type = ATH10K_MEM_REGION_TYPE_DRAM,
705 .type = ATH10K_MEM_REGION_TYPE_REG,
715 .type = ATH10K_MEM_REGION_TYPE_IOSRAM,
725 .type = ATH10K_MEM_REGION_TYPE_IOREG,
735 .type = ATH10K_MEM_REGION_TYPE_IOREG,
745 .type = ATH10K_MEM_REGION_TYPE_IOREG,
755 .type = ATH10K_MEM_REGION_TYPE_IOREG,
765 .type = ATH10K_MEM_REGION_TYPE_IOREG,
776 static const struct ath10k_mem_region qca9984_hw10_mem_regions[] = {
778 .type = ATH10K_MEM_REGION_TYPE_DRAM,
788 .type = ATH10K_MEM_REGION_TYPE_REG,
798 .type = ATH10K_MEM_REGION_TYPE_IOSRAM,
808 .type = ATH10K_MEM_REGION_TYPE_IOREG,
818 .type = ATH10K_MEM_REGION_TYPE_IOREG,
828 .type = ATH10K_MEM_REGION_TYPE_IOREG,
838 .type = ATH10K_MEM_REGION_TYPE_IOREG,
848 .type = ATH10K_MEM_REGION_TYPE_IOREG,
859 static const struct ath10k_mem_section ipq4019_soc_reg_range[] = {
860 {0x080000, 0x080004},
861 {0x080020, 0x080024},
862 {0x080028, 0x080050},
863 {0x0800d4, 0x0800ec},
864 {0x08010c, 0x080118},
865 {0x080284, 0x080290},
866 {0x0802a8, 0x0802b8},
867 {0x0802dc, 0x08030c},
871 static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
873 .type = ATH10K_MEM_REGION_TYPE_DRAM,
883 .type = ATH10K_MEM_REGION_TYPE_REG,
893 .type = ATH10K_MEM_REGION_TYPE_REG,
903 .type = ATH10K_MEM_REGION_TYPE_IOREG,
913 .type = ATH10K_MEM_REGION_TYPE_IOREG,
923 .type = ATH10K_MEM_REGION_TYPE_IOREG,
933 .type = ATH10K_MEM_REGION_TYPE_IOREG,
943 .type = ATH10K_MEM_REGION_TYPE_REG,
945 .len = 0x083fff - 0x080000,
948 .sections = ipq4019_soc_reg_range,
949 .size = ARRAY_SIZE(ipq4019_soc_reg_range),
954 static const struct ath10k_mem_region wcn399x_hw10_mem_regions[] = {
956 /* MSA region start is not fixed, hence it is assigned at runtime */
957 .type = ATH10K_MEM_REGION_TYPE_MSA,
967 static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
969 .hw_id = QCA6174_HW_1_0_VERSION,
970 .hw_rev = ATH10K_HW_QCA6174,
972 .regions = qca6174_hw10_mem_regions,
973 .size = ARRAY_SIZE(qca6174_hw10_mem_regions),
977 .hw_id = QCA6174_HW_1_1_VERSION,
978 .hw_rev = ATH10K_HW_QCA6174,
980 .regions = qca6174_hw10_mem_regions,
981 .size = ARRAY_SIZE(qca6174_hw10_mem_regions),
985 .hw_id = QCA6174_HW_1_3_VERSION,
986 .hw_rev = ATH10K_HW_QCA6174,
988 .regions = qca6174_hw10_mem_regions,
989 .size = ARRAY_SIZE(qca6174_hw10_mem_regions),
993 .hw_id = QCA6174_HW_2_1_VERSION,
994 .hw_rev = ATH10K_HW_QCA6174,
996 .regions = qca6174_hw21_mem_regions,
997 .size = ARRAY_SIZE(qca6174_hw21_mem_regions),
1001 .hw_id = QCA6174_HW_3_0_VERSION,
1002 .hw_rev = ATH10K_HW_QCA6174,
1004 .regions = qca6174_hw30_mem_regions,
1005 .size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1009 .hw_id = QCA6174_HW_3_2_VERSION,
1010 .hw_rev = ATH10K_HW_QCA6174,
1012 .regions = qca6174_hw30_mem_regions,
1013 .size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1017 .hw_id = QCA9377_HW_1_1_DEV_VERSION,
1018 .hw_rev = ATH10K_HW_QCA9377,
1020 .regions = qca6174_hw30_mem_regions,
1021 .size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1025 .hw_id = QCA988X_HW_2_0_VERSION,
1026 .hw_rev = ATH10K_HW_QCA988X,
1028 .regions = qca988x_hw20_mem_regions,
1029 .size = ARRAY_SIZE(qca988x_hw20_mem_regions),
1033 .hw_id = QCA9984_HW_1_0_DEV_VERSION,
1034 .hw_rev = ATH10K_HW_QCA9984,
1036 .regions = qca9984_hw10_mem_regions,
1037 .size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1041 .hw_id = QCA9888_HW_2_0_DEV_VERSION,
1042 .hw_rev = ATH10K_HW_QCA9888,
1044 .regions = qca9984_hw10_mem_regions,
1045 .size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1049 .hw_id = QCA99X0_HW_2_0_DEV_VERSION,
1050 .hw_rev = ATH10K_HW_QCA99X0,
1052 .regions = qca99x0_hw20_mem_regions,
1053 .size = ARRAY_SIZE(qca99x0_hw20_mem_regions),
1057 .hw_id = QCA4019_HW_1_0_DEV_VERSION,
1058 .hw_rev = ATH10K_HW_QCA4019,
1060 .regions = qca4019_hw10_mem_regions,
1061 .size = ARRAY_SIZE(qca4019_hw10_mem_regions),
1065 .hw_id = WCN3990_HW_1_0_DEV_VERSION,
1066 .hw_rev = ATH10K_HW_WCN3990,
1068 .regions = wcn399x_hw10_mem_regions,
1069 .size = ARRAY_SIZE(wcn399x_hw10_mem_regions),
1074 static u32 ath10k_coredump_get_ramdump_size(struct ath10k *ar)
1076 const struct ath10k_hw_mem_layout *hw;
1077 const struct ath10k_mem_region *mem_region;
1081 hw = ath10k_coredump_get_mem_layout(ar);
1086 mem_region = &hw->region_table.regions[0];
1088 for (i = 0; i < hw->region_table.size; i++) {
1089 size += mem_region->len;
1093 /* reserve space for the headers */
1094 size += hw->region_table.size * sizeof(struct ath10k_dump_ram_data_hdr);
1096 /* make sure it is aligned 16 bytes for debug message print out */
1097 size = ALIGN(size, 16);
1102 const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k *ar)
1106 if (!test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1109 if (WARN_ON(ar->target_version == 0))
1112 for (i = 0; i < ARRAY_SIZE(hw_mem_layouts); i++) {
1113 if (ar->target_version == hw_mem_layouts[i].hw_id &&
1114 ar->hw_rev == hw_mem_layouts[i].hw_rev)
1115 return &hw_mem_layouts[i];
1120 EXPORT_SYMBOL(ath10k_coredump_get_mem_layout);
1122 struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar)
1124 struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1126 lockdep_assert_held(&ar->dump_mutex);
1128 if (ath10k_coredump_mask == 0)
1129 /* coredump disabled */
1132 guid_gen(&crash_data->guid);
1133 ktime_get_real_ts64(&crash_data->timestamp);
1137 EXPORT_SYMBOL(ath10k_coredump_new);
1139 static struct ath10k_dump_file_data *ath10k_coredump_build(struct ath10k *ar)
1141 struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1142 struct ath10k_ce_crash_hdr *ce_hdr;
1143 struct ath10k_dump_file_data *dump_data;
1144 struct ath10k_tlv_dump_data *dump_tlv;
1145 size_t hdr_len = sizeof(*dump_data);
1146 size_t len, sofar = 0;
1151 if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask))
1152 len += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1154 if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask))
1155 len += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1156 CE_COUNT * sizeof(ce_hdr->entries[0]);
1158 if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1159 len += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1163 /* This is going to get big when we start dumping FW RAM and such,
1164 * so go ahead and use vmalloc.
1170 mutex_lock(&ar->dump_mutex);
1172 dump_data = (struct ath10k_dump_file_data *)(buf);
1173 strlcpy(dump_data->df_magic, "ATH10K-FW-DUMP",
1174 sizeof(dump_data->df_magic));
1175 dump_data->len = cpu_to_le32(len);
1177 dump_data->version = cpu_to_le32(ATH10K_FW_CRASH_DUMP_VERSION);
1179 guid_copy(&dump_data->guid, &crash_data->guid);
1180 dump_data->chip_id = cpu_to_le32(ar->bus_param.chip_id);
1181 dump_data->bus_type = cpu_to_le32(0);
1182 dump_data->target_version = cpu_to_le32(ar->target_version);
1183 dump_data->fw_version_major = cpu_to_le32(ar->fw_version_major);
1184 dump_data->fw_version_minor = cpu_to_le32(ar->fw_version_minor);
1185 dump_data->fw_version_release = cpu_to_le32(ar->fw_version_release);
1186 dump_data->fw_version_build = cpu_to_le32(ar->fw_version_build);
1187 dump_data->phy_capability = cpu_to_le32(ar->phy_capability);
1188 dump_data->hw_min_tx_power = cpu_to_le32(ar->hw_min_tx_power);
1189 dump_data->hw_max_tx_power = cpu_to_le32(ar->hw_max_tx_power);
1190 dump_data->ht_cap_info = cpu_to_le32(ar->ht_cap_info);
1191 dump_data->vht_cap_info = cpu_to_le32(ar->vht_cap_info);
1192 dump_data->num_rf_chains = cpu_to_le32(ar->num_rf_chains);
1194 strlcpy(dump_data->fw_ver, ar->hw->wiphy->fw_version,
1195 sizeof(dump_data->fw_ver));
1197 dump_data->kernel_ver_code = 0;
1198 strlcpy(dump_data->kernel_ver, init_utsname()->release,
1199 sizeof(dump_data->kernel_ver));
1201 dump_data->tv_sec = cpu_to_le64(crash_data->timestamp.tv_sec);
1202 dump_data->tv_nsec = cpu_to_le64(crash_data->timestamp.tv_nsec);
1204 if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask)) {
1205 dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1206 dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_REGISTERS);
1207 dump_tlv->tlv_len = cpu_to_le32(sizeof(crash_data->registers));
1208 memcpy(dump_tlv->tlv_data, &crash_data->registers,
1209 sizeof(crash_data->registers));
1210 sofar += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1213 if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask)) {
1214 dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1215 dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_CE_DATA);
1216 dump_tlv->tlv_len = cpu_to_le32(struct_size(ce_hdr, entries,
1218 ce_hdr = (struct ath10k_ce_crash_hdr *)(dump_tlv->tlv_data);
1219 ce_hdr->ce_count = cpu_to_le32(CE_COUNT);
1220 memset(ce_hdr->reserved, 0, sizeof(ce_hdr->reserved));
1221 memcpy(ce_hdr->entries, crash_data->ce_crash_data,
1222 CE_COUNT * sizeof(ce_hdr->entries[0]));
1223 sofar += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1224 CE_COUNT * sizeof(ce_hdr->entries[0]);
1227 /* Gather ram dump */
1228 if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1229 dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1230 dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_RAM_DATA);
1231 dump_tlv->tlv_len = cpu_to_le32(crash_data->ramdump_buf_len);
1232 if (crash_data->ramdump_buf_len) {
1233 memcpy(dump_tlv->tlv_data, crash_data->ramdump_buf,
1234 crash_data->ramdump_buf_len);
1235 sofar += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1239 mutex_unlock(&ar->dump_mutex);
1244 int ath10k_coredump_submit(struct ath10k *ar)
1246 struct ath10k_dump_file_data *dump;
1248 if (ath10k_coredump_mask == 0)
1249 /* coredump disabled */
1252 dump = ath10k_coredump_build(ar);
1254 ath10k_warn(ar, "no crash dump data found for devcoredump");
1258 dev_coredumpv(ar->dev, dump, le32_to_cpu(dump->len), GFP_KERNEL);
1263 int ath10k_coredump_create(struct ath10k *ar)
1265 if (ath10k_coredump_mask == 0)
1266 /* coredump disabled */
1269 ar->coredump.fw_crash_data = vzalloc(sizeof(*ar->coredump.fw_crash_data));
1270 if (!ar->coredump.fw_crash_data)
1276 int ath10k_coredump_register(struct ath10k *ar)
1278 struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1280 if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1281 crash_data->ramdump_buf_len = ath10k_coredump_get_ramdump_size(ar);
1283 if (!crash_data->ramdump_buf_len)
1286 crash_data->ramdump_buf = vzalloc(crash_data->ramdump_buf_len);
1287 if (!crash_data->ramdump_buf)
1294 void ath10k_coredump_unregister(struct ath10k *ar)
1296 struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1298 vfree(crash_data->ramdump_buf);
1301 void ath10k_coredump_destroy(struct ath10k *ar)
1303 if (ar->coredump.fw_crash_data->ramdump_buf) {
1304 vfree(ar->coredump.fw_crash_data->ramdump_buf);
1305 ar->coredump.fw_crash_data->ramdump_buf = NULL;
1306 ar->coredump.fw_crash_data->ramdump_buf_len = 0;
1309 vfree(ar->coredump.fw_crash_data);
1310 ar->coredump.fw_crash_data = NULL;