drivers/net/wireless/ath/ath10k/core.c

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2005-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/firmware.h>
  10 #include <linux/of.h>
  11 #include <linux/property.h>
  12 #include <linux/dmi.h>
  13 #include <linux/ctype.h>
  14 #include <linux/pm_qos.h>
  15 #include <asm/byteorder.h>
  16
  17 #include "core.h"
  18 #include "mac.h"
  19 #include "htc.h"
  20 #include "hif.h"
  21 #include "wmi.h"
  22 #include "bmi.h"
  23 #include "debug.h"
  24 #include "htt.h"
  25 #include "testmode.h"
  26 #include "wmi-ops.h"
  27 #include "coredump.h"
  28
  29 unsigned int ath10k_debug_mask;
  30 EXPORT_SYMBOL(ath10k_debug_mask);
  31
  32 static unsigned int ath10k_cryptmode_param;
  33 static bool uart_print;
  34 static bool skip_otp;
  35 static bool rawmode;
  36 static bool fw_diag_log;
  37
  38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
  39                                      BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
  40
  41 /* FIXME: most of these should be readonly */
  42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  44 module_param(uart_print, bool, 0644);
  45 module_param(skip_otp, bool, 0644);
  46 module_param(rawmode, bool, 0644);
  47 module_param(fw_diag_log, bool, 0644);
  48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  49
  50 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  51 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
  57
  58 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  59         {
  60                 .id = QCA988X_HW_2_0_VERSION,
  61                 .dev_id = QCA988X_2_0_DEVICE_ID,
  62                 .bus = ATH10K_BUS_PCI,
  63                 .name = "qca988x hw2.0",
  64                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  65                 .uart_pin = 7,
  66                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  67                 .otp_exe_param = 0,
  68                 .channel_counters_freq_hz = 88000,
  69                 .max_probe_resp_desc_thres = 0,
  70                 .cal_data_len = 2116,
  71                 .fw = {
  72                         .dir = QCA988X_HW_2_0_FW_DIR,
  73                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  74                         .board_size = QCA988X_BOARD_DATA_SZ,
  75                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  76                 },
  77                 .hw_ops = &qca988x_ops,
  78                 .decap_align_bytes = 4,
  79                 .spectral_bin_discard = 0,
  80                 .spectral_bin_offset = 0,
  81                 .vht160_mcs_rx_highest = 0,
  82                 .vht160_mcs_tx_highest = 0,
  83                 .n_cipher_suites = 8,
  84                 .ast_skid_limit = 0x10,
  85                 .num_wds_entries = 0x20,
  86                 .target_64bit = false,
  87                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  88                 .shadow_reg_support = false,
  89                 .rri_on_ddr = false,
  90                 .hw_filter_reset_required = true,
  91                 .fw_diag_ce_download = false,
  92                 .tx_stats_over_pktlog = true,
  93         },
  94         {
  95                 .id = QCA988X_HW_2_0_VERSION,
  96                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
  97                 .name = "qca988x hw2.0 ubiquiti",
  98                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  99                 .uart_pin = 7,
 100                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 101                 .otp_exe_param = 0,
 102                 .channel_counters_freq_hz = 88000,
 103                 .max_probe_resp_desc_thres = 0,
 104                 .cal_data_len = 2116,
 105                 .fw = {
 106                         .dir = QCA988X_HW_2_0_FW_DIR,
 107                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 108                         .board_size = QCA988X_BOARD_DATA_SZ,
 109                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 110                 },
 111                 .hw_ops = &qca988x_ops,
 112                 .decap_align_bytes = 4,
 113                 .spectral_bin_discard = 0,
 114                 .spectral_bin_offset = 0,
 115                 .vht160_mcs_rx_highest = 0,
 116                 .vht160_mcs_tx_highest = 0,
 117                 .n_cipher_suites = 8,
 118                 .ast_skid_limit = 0x10,
 119                 .num_wds_entries = 0x20,
 120                 .target_64bit = false,
 121                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 122                 .per_ce_irq = false,
 123                 .shadow_reg_support = false,
 124                 .rri_on_ddr = false,
 125                 .hw_filter_reset_required = true,
 126                 .fw_diag_ce_download = false,
 127                 .tx_stats_over_pktlog = true,
 128         },
 129         {
 130                 .id = QCA9887_HW_1_0_VERSION,
 131                 .dev_id = QCA9887_1_0_DEVICE_ID,
 132                 .bus = ATH10K_BUS_PCI,
 133                 .name = "qca9887 hw1.0",
 134                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 135                 .uart_pin = 7,
 136                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 137                 .otp_exe_param = 0,
 138                 .channel_counters_freq_hz = 88000,
 139                 .max_probe_resp_desc_thres = 0,
 140                 .cal_data_len = 2116,
 141                 .fw = {
 142                         .dir = QCA9887_HW_1_0_FW_DIR,
 143                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 144                         .board_size = QCA9887_BOARD_DATA_SZ,
 145                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 146                 },
 147                 .hw_ops = &qca988x_ops,
 148                 .decap_align_bytes = 4,
 149                 .spectral_bin_discard = 0,
 150                 .spectral_bin_offset = 0,
 151                 .vht160_mcs_rx_highest = 0,
 152                 .vht160_mcs_tx_highest = 0,
 153                 .n_cipher_suites = 8,
 154                 .ast_skid_limit = 0x10,
 155                 .num_wds_entries = 0x20,
 156                 .target_64bit = false,
 157                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 158                 .per_ce_irq = false,
 159                 .shadow_reg_support = false,
 160                 .rri_on_ddr = false,
 161                 .hw_filter_reset_required = true,
 162                 .fw_diag_ce_download = false,
 163                 .tx_stats_over_pktlog = false,
 164         },
 165         {
 166                 .id = QCA6174_HW_3_2_VERSION,
 167                 .dev_id = QCA6174_3_2_DEVICE_ID,
 168                 .bus = ATH10K_BUS_SDIO,
 169                 .name = "qca6174 hw3.2 sdio",
 170                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 171                 .uart_pin = 19,
 172                 .otp_exe_param = 0,
 173                 .channel_counters_freq_hz = 88000,
 174                 .max_probe_resp_desc_thres = 0,
 175                 .cal_data_len = 0,
 176                 .fw = {
 177                         .dir = QCA6174_HW_3_0_FW_DIR,
 178                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 179                         .board_size = QCA6174_BOARD_DATA_SZ,
 180                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 181                 },
 182                 .hw_ops = &qca6174_sdio_ops,
 183                 .hw_clk = qca6174_clk,
 184                 .target_cpu_freq = 176000000,
 185                 .decap_align_bytes = 4,
 186                 .n_cipher_suites = 8,
 187                 .num_peers = 10,
 188                 .ast_skid_limit = 0x10,
 189                 .num_wds_entries = 0x20,
 190                 .uart_pin_workaround = true,
 191                 .tx_stats_over_pktlog = false,
 192                 .bmi_large_size_download = true,
 193         },
 194         {
 195                 .id = QCA6174_HW_2_1_VERSION,
 196                 .dev_id = QCA6164_2_1_DEVICE_ID,
 197                 .bus = ATH10K_BUS_PCI,
 198                 .name = "qca6164 hw2.1",
 199                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 200                 .uart_pin = 6,
 201                 .otp_exe_param = 0,
 202                 .channel_counters_freq_hz = 88000,
 203                 .max_probe_resp_desc_thres = 0,
 204                 .cal_data_len = 8124,
 205                 .fw = {
 206                         .dir = QCA6174_HW_2_1_FW_DIR,
 207                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 208                         .board_size = QCA6174_BOARD_DATA_SZ,
 209                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 210                 },
 211                 .hw_ops = &qca988x_ops,
 212                 .decap_align_bytes = 4,
 213                 .spectral_bin_discard = 0,
 214                 .spectral_bin_offset = 0,
 215                 .vht160_mcs_rx_highest = 0,
 216                 .vht160_mcs_tx_highest = 0,
 217                 .n_cipher_suites = 8,
 218                 .ast_skid_limit = 0x10,
 219                 .num_wds_entries = 0x20,
 220                 .target_64bit = false,
 221                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 222                 .per_ce_irq = false,
 223                 .shadow_reg_support = false,
 224                 .rri_on_ddr = false,
 225                 .hw_filter_reset_required = true,
 226                 .fw_diag_ce_download = false,
 227                 .tx_stats_over_pktlog = false,
 228         },
 229         {
 230                 .id = QCA6174_HW_2_1_VERSION,
 231                 .dev_id = QCA6174_2_1_DEVICE_ID,
 232                 .bus = ATH10K_BUS_PCI,
 233                 .name = "qca6174 hw2.1",
 234                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 235                 .uart_pin = 6,
 236                 .otp_exe_param = 0,
 237                 .channel_counters_freq_hz = 88000,
 238                 .max_probe_resp_desc_thres = 0,
 239                 .cal_data_len = 8124,
 240                 .fw = {
 241                         .dir = QCA6174_HW_2_1_FW_DIR,
 242                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 243                         .board_size = QCA6174_BOARD_DATA_SZ,
 244                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 245                 },
 246                 .hw_ops = &qca988x_ops,
 247                 .decap_align_bytes = 4,
 248                 .spectral_bin_discard = 0,
 249                 .spectral_bin_offset = 0,
 250                 .vht160_mcs_rx_highest = 0,
 251                 .vht160_mcs_tx_highest = 0,
 252                 .n_cipher_suites = 8,
 253                 .ast_skid_limit = 0x10,
 254                 .num_wds_entries = 0x20,
 255                 .target_64bit = false,
 256                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 257                 .per_ce_irq = false,
 258                 .shadow_reg_support = false,
 259                 .rri_on_ddr = false,
 260                 .hw_filter_reset_required = true,
 261                 .fw_diag_ce_download = false,
 262                 .tx_stats_over_pktlog = false,
 263         },
 264         {
 265                 .id = QCA6174_HW_3_0_VERSION,
 266                 .dev_id = QCA6174_2_1_DEVICE_ID,
 267                 .bus = ATH10K_BUS_PCI,
 268                 .name = "qca6174 hw3.0",
 269                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 270                 .uart_pin = 6,
 271                 .otp_exe_param = 0,
 272                 .channel_counters_freq_hz = 88000,
 273                 .max_probe_resp_desc_thres = 0,
 274                 .cal_data_len = 8124,
 275                 .fw = {
 276                         .dir = QCA6174_HW_3_0_FW_DIR,
 277                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 278                         .board_size = QCA6174_BOARD_DATA_SZ,
 279                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 280                 },
 281                 .hw_ops = &qca988x_ops,
 282                 .decap_align_bytes = 4,
 283                 .spectral_bin_discard = 0,
 284                 .spectral_bin_offset = 0,
 285                 .vht160_mcs_rx_highest = 0,
 286                 .vht160_mcs_tx_highest = 0,
 287                 .n_cipher_suites = 8,
 288                 .ast_skid_limit = 0x10,
 289                 .num_wds_entries = 0x20,
 290                 .target_64bit = false,
 291                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 292                 .per_ce_irq = false,
 293                 .shadow_reg_support = false,
 294                 .rri_on_ddr = false,
 295                 .hw_filter_reset_required = true,
 296                 .fw_diag_ce_download = false,
 297                 .tx_stats_over_pktlog = false,
 298         },
 299         {
 300                 .id = QCA6174_HW_3_2_VERSION,
 301                 .dev_id = QCA6174_2_1_DEVICE_ID,
 302                 .bus = ATH10K_BUS_PCI,
 303                 .name = "qca6174 hw3.2",
 304                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 305                 .uart_pin = 6,
 306                 .otp_exe_param = 0,
 307                 .channel_counters_freq_hz = 88000,
 308                 .max_probe_resp_desc_thres = 0,
 309                 .cal_data_len = 8124,
 310                 .fw = {
 311                         /* uses same binaries as hw3.0 */
 312                         .dir = QCA6174_HW_3_0_FW_DIR,
 313                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 314                         .board_size = QCA6174_BOARD_DATA_SZ,
 315                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 316                 },
 317                 .hw_ops = &qca6174_ops,
 318                 .hw_clk = qca6174_clk,
 319                 .target_cpu_freq = 176000000,
 320                 .decap_align_bytes = 4,
 321                 .spectral_bin_discard = 0,
 322                 .spectral_bin_offset = 0,
 323                 .vht160_mcs_rx_highest = 0,
 324                 .vht160_mcs_tx_highest = 0,
 325                 .n_cipher_suites = 8,
 326                 .ast_skid_limit = 0x10,
 327                 .num_wds_entries = 0x20,
 328                 .target_64bit = false,
 329                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 330                 .per_ce_irq = false,
 331                 .shadow_reg_support = false,
 332                 .rri_on_ddr = false,
 333                 .hw_filter_reset_required = true,
 334                 .fw_diag_ce_download = true,
 335                 .tx_stats_over_pktlog = false,
 336         },
 337         {
 338                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 339                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 340                 .bus = ATH10K_BUS_PCI,
 341                 .name = "qca99x0 hw2.0",
 342                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 343                 .uart_pin = 7,
 344                 .otp_exe_param = 0x00000700,
 345                 .continuous_frag_desc = true,
 346                 .cck_rate_map_rev2 = true,
 347                 .channel_counters_freq_hz = 150000,
 348                 .max_probe_resp_desc_thres = 24,
 349                 .tx_chain_mask = 0xf,
 350                 .rx_chain_mask = 0xf,
 351                 .max_spatial_stream = 4,
 352                 .cal_data_len = 12064,
 353                 .fw = {
 354                         .dir = QCA99X0_HW_2_0_FW_DIR,
 355                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 356                         .board_size = QCA99X0_BOARD_DATA_SZ,
 357                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 358                 },
 359                 .sw_decrypt_mcast_mgmt = true,
 360                 .hw_ops = &qca99x0_ops,
 361                 .decap_align_bytes = 1,
 362                 .spectral_bin_discard = 4,
 363                 .spectral_bin_offset = 0,
 364                 .vht160_mcs_rx_highest = 0,
 365                 .vht160_mcs_tx_highest = 0,
 366                 .n_cipher_suites = 11,
 367                 .ast_skid_limit = 0x10,
 368                 .num_wds_entries = 0x20,
 369                 .target_64bit = false,
 370                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 371                 .per_ce_irq = false,
 372                 .shadow_reg_support = false,
 373                 .rri_on_ddr = false,
 374                 .hw_filter_reset_required = true,
 375                 .fw_diag_ce_download = false,
 376                 .tx_stats_over_pktlog = false,
 377         },
 378         {
 379                 .id = QCA9984_HW_1_0_DEV_VERSION,
 380                 .dev_id = QCA9984_1_0_DEVICE_ID,
 381                 .bus = ATH10K_BUS_PCI,
 382                 .name = "qca9984/qca9994 hw1.0",
 383                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 384                 .uart_pin = 7,
 385                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 386                 .otp_exe_param = 0x00000700,
 387                 .continuous_frag_desc = true,
 388                 .cck_rate_map_rev2 = true,
 389                 .channel_counters_freq_hz = 150000,
 390                 .max_probe_resp_desc_thres = 24,
 391                 .tx_chain_mask = 0xf,
 392                 .rx_chain_mask = 0xf,
 393                 .max_spatial_stream = 4,
 394                 .cal_data_len = 12064,
 395                 .fw = {
 396                         .dir = QCA9984_HW_1_0_FW_DIR,
 397                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 398                         .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
 399                         .board_size = QCA99X0_BOARD_DATA_SZ,
 400                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 401                         .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
 402                 },
 403                 .sw_decrypt_mcast_mgmt = true,
 404                 .hw_ops = &qca99x0_ops,
 405                 .decap_align_bytes = 1,
 406                 .spectral_bin_discard = 12,
 407                 .spectral_bin_offset = 8,
 408
 409                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 410                  * or 2x2 160Mhz, long-guard-interval.
 411                  */
 412                 .vht160_mcs_rx_highest = 1560,
 413                 .vht160_mcs_tx_highest = 1560,
 414                 .n_cipher_suites = 11,
 415                 .ast_skid_limit = 0x10,
 416                 .num_wds_entries = 0x20,
 417                 .target_64bit = false,
 418                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 419                 .per_ce_irq = false,
 420                 .shadow_reg_support = false,
 421                 .rri_on_ddr = false,
 422                 .hw_filter_reset_required = true,
 423                 .fw_diag_ce_download = false,
 424                 .tx_stats_over_pktlog = false,
 425         },
 426         {
 427                 .id = QCA9888_HW_2_0_DEV_VERSION,
 428                 .dev_id = QCA9888_2_0_DEVICE_ID,
 429                 .bus = ATH10K_BUS_PCI,
 430                 .name = "qca9888 hw2.0",
 431                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 432                 .uart_pin = 7,
 433                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 434                 .otp_exe_param = 0x00000700,
 435                 .continuous_frag_desc = true,
 436                 .channel_counters_freq_hz = 150000,
 437                 .max_probe_resp_desc_thres = 24,
 438                 .tx_chain_mask = 3,
 439                 .rx_chain_mask = 3,
 440                 .max_spatial_stream = 2,
 441                 .cal_data_len = 12064,
 442                 .fw = {
 443                         .dir = QCA9888_HW_2_0_FW_DIR,
 444                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 445                         .board_size = QCA99X0_BOARD_DATA_SZ,
 446                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 447                 },
 448                 .sw_decrypt_mcast_mgmt = true,
 449                 .hw_ops = &qca99x0_ops,
 450                 .decap_align_bytes = 1,
 451                 .spectral_bin_discard = 12,
 452                 .spectral_bin_offset = 8,
 453
 454                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 455                  * 1x1 160Mhz, long-guard-interval.
 456                  */
 457                 .vht160_mcs_rx_highest = 780,
 458                 .vht160_mcs_tx_highest = 780,
 459                 .n_cipher_suites = 11,
 460                 .ast_skid_limit = 0x10,
 461                 .num_wds_entries = 0x20,
 462                 .target_64bit = false,
 463                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 464                 .per_ce_irq = false,
 465                 .shadow_reg_support = false,
 466                 .rri_on_ddr = false,
 467                 .hw_filter_reset_required = true,
 468                 .fw_diag_ce_download = false,
 469                 .tx_stats_over_pktlog = false,
 470         },
 471         {
 472                 .id = QCA9377_HW_1_0_DEV_VERSION,
 473                 .dev_id = QCA9377_1_0_DEVICE_ID,
 474                 .bus = ATH10K_BUS_PCI,
 475                 .name = "qca9377 hw1.0",
 476                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 477                 .uart_pin = 6,
 478                 .otp_exe_param = 0,
 479                 .channel_counters_freq_hz = 88000,
 480                 .max_probe_resp_desc_thres = 0,
 481                 .cal_data_len = 8124,
 482                 .fw = {
 483                         .dir = QCA9377_HW_1_0_FW_DIR,
 484                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 485                         .board_size = QCA9377_BOARD_DATA_SZ,
 486                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 487                 },
 488                 .hw_ops = &qca988x_ops,
 489                 .decap_align_bytes = 4,
 490                 .spectral_bin_discard = 0,
 491                 .spectral_bin_offset = 0,
 492                 .vht160_mcs_rx_highest = 0,
 493                 .vht160_mcs_tx_highest = 0,
 494                 .n_cipher_suites = 8,
 495                 .ast_skid_limit = 0x10,
 496                 .num_wds_entries = 0x20,
 497                 .target_64bit = false,
 498                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 499                 .per_ce_irq = false,
 500                 .shadow_reg_support = false,
 501                 .rri_on_ddr = false,
 502                 .hw_filter_reset_required = true,
 503                 .fw_diag_ce_download = false,
 504                 .tx_stats_over_pktlog = false,
 505         },
 506         {
 507                 .id = QCA9377_HW_1_1_DEV_VERSION,
 508                 .dev_id = QCA9377_1_0_DEVICE_ID,
 509                 .bus = ATH10K_BUS_PCI,
 510                 .name = "qca9377 hw1.1",
 511                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 512                 .uart_pin = 6,
 513                 .otp_exe_param = 0,
 514                 .channel_counters_freq_hz = 88000,
 515                 .max_probe_resp_desc_thres = 0,
 516                 .cal_data_len = 8124,
 517                 .fw = {
 518                         .dir = QCA9377_HW_1_0_FW_DIR,
 519                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 520                         .board_size = QCA9377_BOARD_DATA_SZ,
 521                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 522                 },
 523                 .hw_ops = &qca6174_ops,
 524                 .hw_clk = qca6174_clk,
 525                 .target_cpu_freq = 176000000,
 526                 .decap_align_bytes = 4,
 527                 .spectral_bin_discard = 0,
 528                 .spectral_bin_offset = 0,
 529                 .vht160_mcs_rx_highest = 0,
 530                 .vht160_mcs_tx_highest = 0,
 531                 .n_cipher_suites = 8,
 532                 .ast_skid_limit = 0x10,
 533                 .num_wds_entries = 0x20,
 534                 .target_64bit = false,
 535                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 536                 .per_ce_irq = false,
 537                 .shadow_reg_support = false,
 538                 .rri_on_ddr = false,
 539                 .hw_filter_reset_required = true,
 540                 .fw_diag_ce_download = true,
 541                 .tx_stats_over_pktlog = false,
 542         },
 543         {
 544                 .id = QCA9377_HW_1_1_DEV_VERSION,
 545                 .dev_id = QCA9377_1_0_DEVICE_ID,
 546                 .bus = ATH10K_BUS_SDIO,
 547                 .name = "qca9377 hw1.1 sdio",
 548                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 549                 .uart_pin = 19,
 550                 .otp_exe_param = 0,
 551                 .channel_counters_freq_hz = 88000,
 552                 .max_probe_resp_desc_thres = 0,
 553                 .cal_data_len = 8124,
 554                 .fw = {
 555                         .dir = QCA9377_HW_1_0_FW_DIR,
 556                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 557                         .board_size = QCA9377_BOARD_DATA_SZ,
 558                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 559                 },
 560                 .hw_ops = &qca6174_ops,
 561                 .hw_clk = qca6174_clk,
 562                 .target_cpu_freq = 176000000,
 563                 .decap_align_bytes = 4,
 564                 .n_cipher_suites = 8,
 565                 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
 566                 .ast_skid_limit = 0x10,
 567                 .num_wds_entries = 0x20,
 568                 .uart_pin_workaround = true,
 569         },
 570         {
 571                 .id = QCA4019_HW_1_0_DEV_VERSION,
 572                 .dev_id = 0,
 573                 .bus = ATH10K_BUS_AHB,
 574                 .name = "qca4019 hw1.0",
 575                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 576                 .uart_pin = 7,
 577                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 578                 .otp_exe_param = 0x0010000,
 579                 .continuous_frag_desc = true,
 580                 .cck_rate_map_rev2 = true,
 581                 .channel_counters_freq_hz = 125000,
 582                 .max_probe_resp_desc_thres = 24,
 583                 .tx_chain_mask = 0x3,
 584                 .rx_chain_mask = 0x3,
 585                 .max_spatial_stream = 2,
 586                 .cal_data_len = 12064,
 587                 .fw = {
 588                         .dir = QCA4019_HW_1_0_FW_DIR,
 589                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 590                         .board_size = QCA4019_BOARD_DATA_SZ,
 591                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 592                 },
 593                 .sw_decrypt_mcast_mgmt = true,
 594                 .hw_ops = &qca99x0_ops,
 595                 .decap_align_bytes = 1,
 596                 .spectral_bin_discard = 4,
 597                 .spectral_bin_offset = 0,
 598                 .vht160_mcs_rx_highest = 0,
 599                 .vht160_mcs_tx_highest = 0,
 600                 .n_cipher_suites = 11,
 601                 .ast_skid_limit = 0x10,
 602                 .num_wds_entries = 0x20,
 603                 .target_64bit = false,
 604                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 605                 .per_ce_irq = false,
 606                 .shadow_reg_support = false,
 607                 .rri_on_ddr = false,
 608                 .hw_filter_reset_required = true,
 609                 .fw_diag_ce_download = false,
 610                 .tx_stats_over_pktlog = false,
 611         },
 612         {
 613                 .id = WCN3990_HW_1_0_DEV_VERSION,
 614                 .dev_id = 0,
 615                 .bus = ATH10K_BUS_SNOC,
 616                 .name = "wcn3990 hw1.0",
 617                 .continuous_frag_desc = true,
 618                 .tx_chain_mask = 0x7,
 619                 .rx_chain_mask = 0x7,
 620                 .max_spatial_stream = 4,
 621                 .fw = {
 622                         .dir = WCN3990_HW_1_0_FW_DIR,
 623                 },
 624                 .sw_decrypt_mcast_mgmt = true,
 625                 .hw_ops = &wcn3990_ops,
 626                 .decap_align_bytes = 1,
 627                 .num_peers = TARGET_HL_TLV_NUM_PEERS,
 628                 .n_cipher_suites = 11,
 629                 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
 630                 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
 631                 .target_64bit = true,
 632                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 633                 .per_ce_irq = true,
 634                 .shadow_reg_support = true,
 635                 .rri_on_ddr = true,
 636                 .hw_filter_reset_required = false,
 637                 .fw_diag_ce_download = false,
 638                 .tx_stats_over_pktlog = false,
 639         },
 640 };
 641
 642 static const char *const ath10k_core_fw_feature_str[] = {
 643         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 644         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 645         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 646         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 647         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 648         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 649         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 650         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 651         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 652         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 653         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 654         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 655         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 656         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 657         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 658         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 659         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 660         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 661         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 662         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 663         [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
 664         [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
 665 };
 666
 667 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 668                                                    size_t buf_len,
 669                                                    enum ath10k_fw_features feat)
 670 {
 671         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 672         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 673                      ATH10K_FW_FEATURE_COUNT);
 674
 675         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 676             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 677                 return scnprintf(buf, buf_len, "bit%d", feat);
 678         }
 679
 680         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 681 }
 682
 683 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 684                                      char *buf,
 685                                      size_t buf_len)
 686 {
 687         size_t len = 0;
 688         int i;
 689
 690         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 691                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 692                         if (len > 0)
 693                                 len += scnprintf(buf + len, buf_len - len, ",");
 694
 695                         len += ath10k_core_get_fw_feature_str(buf + len,
 696                                                               buf_len - len,
 697                                                               i);
 698                 }
 699         }
 700 }
 701
 702 static void ath10k_send_suspend_complete(struct ath10k *ar)
 703 {
 704         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 705
 706         complete(&ar->target_suspend);
 707 }
 708
 709 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 710 {
 711         int ret;
 712         u32 param = 0;
 713
 714         ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 715         if (ret)
 716                 return ret;
 717
 718         ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 719         if (ret)
 720                 return ret;
 721
 722         ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
 723         if (ret)
 724                 return ret;
 725
 726         /* Data transfer is not initiated, when reduced Tx completion
 727          * is used for SDIO. disable it until fixed
 728          */
 729         param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 730
 731         /* Alternate credit size of 1544 as used by SDIO firmware is
 732          * not big enough for mac80211 / native wifi frames. disable it
 733          */
 734         param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 735
 736         if (mode == ATH10K_FIRMWARE_MODE_UTF)
 737                 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 738         else
 739                 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 740
 741         ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
 742         if (ret)
 743                 return ret;
 744
 745         return 0;
 746 }
 747
 748 static int ath10k_init_configure_target(struct ath10k *ar)
 749 {
 750         u32 param_host;
 751         int ret;
 752
 753         /* tell target which HTC version it is used*/
 754         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 755                                  HTC_PROTOCOL_VERSION);
 756         if (ret) {
 757                 ath10k_err(ar, "settings HTC version failed\n");
 758                 return ret;
 759         }
 760
 761         /* set the firmware mode to STA/IBSS/AP */
 762         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 763         if (ret) {
 764                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 765                 return ret;
 766         }
 767
 768         /* TODO following parameters need to be re-visited. */
 769         /* num_device */
 770         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 771         /* Firmware mode */
 772         /* FIXME: Why FW_MODE_AP ??.*/
 773         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 774         /* mac_addr_method */
 775         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 776         /* firmware_bridge */
 777         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 778         /* fwsubmode */
 779         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 780
 781         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 782         if (ret) {
 783                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 784                 return ret;
 785         }
 786
 787         /* We do all byte-swapping on the host */
 788         ret = ath10k_bmi_write32(ar, hi_be, 0);
 789         if (ret) {
 790                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 791                 return ret;
 792         }
 793
 794         /* FW descriptor/Data swap flags */
 795         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 796
 797         if (ret) {
 798                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 799                 return ret;
 800         }
 801
 802         /* Some devices have a special sanity check that verifies the PCI
 803          * Device ID is written to this host interest var. It is known to be
 804          * required to boot QCA6164.
 805          */
 806         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 807                                  ar->dev_id);
 808         if (ret) {
 809                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 810                 return ret;
 811         }
 812
 813         return 0;
 814 }
 815
 816 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 817                                                    const char *dir,
 818                                                    const char *file)
 819 {
 820         char filename[100];
 821         const struct firmware *fw;
 822         int ret;
 823
 824         if (file == NULL)
 825                 return ERR_PTR(-ENOENT);
 826
 827         if (dir == NULL)
 828                 dir = ".";
 829
 830         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 831         ret = firmware_request_nowarn(&fw, filename, ar->dev);
 832         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 833                    filename, ret);
 834
 835         if (ret)
 836                 return ERR_PTR(ret);
 837
 838         return fw;
 839 }
 840
 841 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 842                                       size_t data_len)
 843 {
 844         u32 board_data_size = ar->hw_params.fw.board_size;
 845         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 846         u32 board_ext_data_addr;
 847         int ret;
 848
 849         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 850         if (ret) {
 851                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 852                            ret);
 853                 return ret;
 854         }
 855
 856         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 857                    "boot push board extended data addr 0x%x\n",
 858                    board_ext_data_addr);
 859
 860         if (board_ext_data_addr == 0)
 861                 return 0;
 862
 863         if (data_len != (board_data_size + board_ext_data_size)) {
 864                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 865                            data_len, board_data_size, board_ext_data_size);
 866                 return -EINVAL;
 867         }
 868
 869         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 870                                       data + board_data_size,
 871                                       board_ext_data_size);
 872         if (ret) {
 873                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 874                 return ret;
 875         }
 876
 877         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 878                                  (board_ext_data_size << 16) | 1);
 879         if (ret) {
 880                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 881                            ret);
 882                 return ret;
 883         }
 884
 885         return 0;
 886 }
 887
 888 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 889 {
 890         u32 result, address;
 891         u8 board_id, chip_id;
 892         bool ext_bid_support;
 893         int ret, bmi_board_id_param;
 894
 895         address = ar->hw_params.patch_load_addr;
 896
 897         if (!ar->normal_mode_fw.fw_file.otp_data ||
 898             !ar->normal_mode_fw.fw_file.otp_len) {
 899                 ath10k_warn(ar,
 900                             "failed to retrieve board id because of invalid otp\n");
 901                 return -ENODATA;
 902         }
 903
 904         if (ar->id.bmi_ids_valid) {
 905                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 906                            "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
 907                            ar->id.bmi_board_id, ar->id.bmi_chip_id);
 908                 goto skip_otp_download;
 909         }
 910
 911         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 912                    "boot upload otp to 0x%x len %zd for board id\n",
 913                    address, ar->normal_mode_fw.fw_file.otp_len);
 914
 915         ret = ath10k_bmi_fast_download(ar, address,
 916                                        ar->normal_mode_fw.fw_file.otp_data,
 917                                        ar->normal_mode_fw.fw_file.otp_len);
 918         if (ret) {
 919                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 920                            ret);
 921                 return ret;
 922         }
 923
 924         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 925             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 926                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 927         else
 928                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 929
 930         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 931         if (ret) {
 932                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 933                            ret);
 934                 return ret;
 935         }
 936
 937         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 938         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 939         ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
 940
 941         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 942                    "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
 943                    result, board_id, chip_id, ext_bid_support);
 944
 945         ar->id.ext_bid_supported = ext_bid_support;
 946
 947         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 948             (board_id == 0)) {
 949                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 950                            "board id does not exist in otp, ignore it\n");
 951                 return -EOPNOTSUPP;
 952         }
 953
 954         ar->id.bmi_ids_valid = true;
 955         ar->id.bmi_board_id = board_id;
 956         ar->id.bmi_chip_id = chip_id;
 957
 958 skip_otp_download:
 959
 960         return 0;
 961 }
 962
 963 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
 964 {
 965         struct ath10k *ar = data;
 966         const char *bdf_ext;
 967         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
 968         u8 bdf_enabled;
 969         int i;
 970
 971         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
 972                 return;
 973
 974         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
 975                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 976                            "wrong smbios bdf ext type length (%d).\n",
 977                            hdr->length);
 978                 return;
 979         }
 980
 981         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
 982         if (!bdf_enabled) {
 983                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
 984                 return;
 985         }
 986
 987         /* Only one string exists (per spec) */
 988         bdf_ext = (char *)hdr + hdr->length;
 989
 990         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
 991                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 992                            "bdf variant magic does not match.\n");
 993                 return;
 994         }
 995
 996         for (i = 0; i < strlen(bdf_ext); i++) {
 997                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
 998                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 999                                    "bdf variant name contains non ascii chars.\n");
1000                         return;
1001                 }
1002         }
1003
1004         /* Copy extension name without magic suffix */
1005         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1006                     sizeof(ar->id.bdf_ext)) < 0) {
1007                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1008                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1009                             bdf_ext);
1010                 return;
1011         }
1012
1013         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1014                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1015                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1016 }
1017
1018 static int ath10k_core_check_smbios(struct ath10k *ar)
1019 {
1020         ar->id.bdf_ext[0] = '\0';
1021         dmi_walk(ath10k_core_check_bdfext, ar);
1022
1023         if (ar->id.bdf_ext[0] == '\0')
1024                 return -ENODATA;
1025
1026         return 0;
1027 }
1028
1029 static int ath10k_core_check_dt(struct ath10k *ar)
1030 {
1031         struct device_node *node;
1032         const char *variant = NULL;
1033
1034         node = ar->dev->of_node;
1035         if (!node)
1036                 return -ENOENT;
1037
1038         of_property_read_string(node, "qcom,ath10k-calibration-variant",
1039                                 &variant);
1040         if (!variant)
1041                 return -ENODATA;
1042
1043         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1044                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1045                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1046                             variant);
1047
1048         return 0;
1049 }
1050
1051 static int ath10k_download_fw(struct ath10k *ar)
1052 {
1053         u32 address, data_len;
1054         const void *data;
1055         int ret;
1056         struct pm_qos_request latency_qos;
1057
1058         address = ar->hw_params.patch_load_addr;
1059
1060         data = ar->running_fw->fw_file.firmware_data;
1061         data_len = ar->running_fw->fw_file.firmware_len;
1062
1063         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1064         if (ret) {
1065                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1066                            ret);
1067                 return ret;
1068         }
1069
1070         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1071                    "boot uploading firmware image %pK len %d\n",
1072                    data, data_len);
1073
1074         /* Check if device supports to download firmware via
1075          * diag copy engine. Downloading firmware via diag CE
1076          * greatly reduces the time to download firmware.
1077          */
1078         if (ar->hw_params.fw_diag_ce_download) {
1079                 ret = ath10k_hw_diag_fast_download(ar, address,
1080                                                    data, data_len);
1081                 if (ret == 0)
1082                         /* firmware upload via diag ce was successful */
1083                         return 0;
1084
1085                 ath10k_warn(ar,
1086                             "failed to upload firmware via diag ce, trying BMI: %d",
1087                             ret);
1088         }
1089
1090         memset(&latency_qos, 0, sizeof(latency_qos));
1091         cpu_latency_qos_add_request(&latency_qos, 0);
1092
1093         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1094
1095         cpu_latency_qos_remove_request(&latency_qos);
1096
1097         return ret;
1098 }
1099
1100 void ath10k_core_free_board_files(struct ath10k *ar)
1101 {
1102         if (!IS_ERR(ar->normal_mode_fw.board))
1103                 release_firmware(ar->normal_mode_fw.board);
1104
1105         if (!IS_ERR(ar->normal_mode_fw.ext_board))
1106                 release_firmware(ar->normal_mode_fw.ext_board);
1107
1108         ar->normal_mode_fw.board = NULL;
1109         ar->normal_mode_fw.board_data = NULL;
1110         ar->normal_mode_fw.board_len = 0;
1111         ar->normal_mode_fw.ext_board = NULL;
1112         ar->normal_mode_fw.ext_board_data = NULL;
1113         ar->normal_mode_fw.ext_board_len = 0;
1114 }
1115 EXPORT_SYMBOL(ath10k_core_free_board_files);
1116
1117 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1118 {
1119         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1120                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1121
1122         if (!IS_ERR(ar->cal_file))
1123                 release_firmware(ar->cal_file);
1124
1125         if (!IS_ERR(ar->pre_cal_file))
1126                 release_firmware(ar->pre_cal_file);
1127
1128         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1129
1130         ar->normal_mode_fw.fw_file.otp_data = NULL;
1131         ar->normal_mode_fw.fw_file.otp_len = 0;
1132
1133         ar->normal_mode_fw.fw_file.firmware = NULL;
1134         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1135         ar->normal_mode_fw.fw_file.firmware_len = 0;
1136
1137         ar->cal_file = NULL;
1138         ar->pre_cal_file = NULL;
1139 }
1140
1141 static int ath10k_fetch_cal_file(struct ath10k *ar)
1142 {
1143         char filename[100];
1144
1145         /* pre-cal-<bus>-<id>.bin */
1146         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1147                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1148
1149         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1150         if (!IS_ERR(ar->pre_cal_file))
1151                 goto success;
1152
1153         /* cal-<bus>-<id>.bin */
1154         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1155                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1156
1157         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1158         if (IS_ERR(ar->cal_file))
1159                 /* calibration file is optional, don't print any warnings */
1160                 return PTR_ERR(ar->cal_file);
1161 success:
1162         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1163                    ATH10K_FW_DIR, filename);
1164
1165         return 0;
1166 }
1167
1168 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1169 {
1170         const struct firmware *fw;
1171
1172         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1173                 if (!ar->hw_params.fw.board) {
1174                         ath10k_err(ar, "failed to find board file fw entry\n");
1175                         return -EINVAL;
1176                 }
1177
1178                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1179                                                                 ar->hw_params.fw.dir,
1180                                                                 ar->hw_params.fw.board);
1181                 if (IS_ERR(ar->normal_mode_fw.board))
1182                         return PTR_ERR(ar->normal_mode_fw.board);
1183
1184                 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1185                 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1186         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1187                 if (!ar->hw_params.fw.eboard) {
1188                         ath10k_err(ar, "failed to find eboard file fw entry\n");
1189                         return -EINVAL;
1190                 }
1191
1192                 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1193                                           ar->hw_params.fw.eboard);
1194                 ar->normal_mode_fw.ext_board = fw;
1195                 if (IS_ERR(ar->normal_mode_fw.ext_board))
1196                         return PTR_ERR(ar->normal_mode_fw.ext_board);
1197
1198                 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1199                 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1200         }
1201
1202         return 0;
1203 }
1204
1205 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1206                                          const void *buf, size_t buf_len,
1207                                          const char *boardname,
1208                                          int bd_ie_type)
1209 {
1210         const struct ath10k_fw_ie *hdr;
1211         bool name_match_found;
1212         int ret, board_ie_id;
1213         size_t board_ie_len;
1214         const void *board_ie_data;
1215
1216         name_match_found = false;
1217
1218         /* go through ATH10K_BD_IE_BOARD_ elements */
1219         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1220                 hdr = buf;
1221                 board_ie_id = le32_to_cpu(hdr->id);
1222                 board_ie_len = le32_to_cpu(hdr->len);
1223                 board_ie_data = hdr->data;
1224
1225                 buf_len -= sizeof(*hdr);
1226                 buf += sizeof(*hdr);
1227
1228                 if (buf_len < ALIGN(board_ie_len, 4)) {
1229                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1230                                    buf_len, ALIGN(board_ie_len, 4));
1231                         ret = -EINVAL;
1232                         goto out;
1233                 }
1234
1235                 switch (board_ie_id) {
1236                 case ATH10K_BD_IE_BOARD_NAME:
1237                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1238                                         board_ie_data, board_ie_len);
1239
1240                         if (board_ie_len != strlen(boardname))
1241                                 break;
1242
1243                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1244                         if (ret)
1245                                 break;
1246
1247                         name_match_found = true;
1248                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1249                                    "boot found match for name '%s'",
1250                                    boardname);
1251                         break;
1252                 case ATH10K_BD_IE_BOARD_DATA:
1253                         if (!name_match_found)
1254                                 /* no match found */
1255                                 break;
1256
1257                         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1258                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1259                                            "boot found board data for '%s'",
1260                                                 boardname);
1261
1262                                 ar->normal_mode_fw.board_data = board_ie_data;
1263                                 ar->normal_mode_fw.board_len = board_ie_len;
1264                         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1265                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1266                                            "boot found eboard data for '%s'",
1267                                                 boardname);
1268
1269                                 ar->normal_mode_fw.ext_board_data = board_ie_data;
1270                                 ar->normal_mode_fw.ext_board_len = board_ie_len;
1271                         }
1272
1273                         ret = 0;
1274                         goto out;
1275                 default:
1276                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1277                                     board_ie_id);
1278                         break;
1279                 }
1280
1281                 /* jump over the padding */
1282                 board_ie_len = ALIGN(board_ie_len, 4);
1283
1284                 buf_len -= board_ie_len;
1285                 buf += board_ie_len;
1286         }
1287
1288         /* no match found */
1289         ret = -ENOENT;
1290
1291 out:
1292         return ret;
1293 }
1294
1295 static int ath10k_core_search_bd(struct ath10k *ar,
1296                                  const char *boardname,
1297                                  const u8 *data,
1298                                  size_t len)
1299 {
1300         size_t ie_len;
1301         struct ath10k_fw_ie *hdr;
1302         int ret = -ENOENT, ie_id;
1303
1304         while (len > sizeof(struct ath10k_fw_ie)) {
1305                 hdr = (struct ath10k_fw_ie *)data;
1306                 ie_id = le32_to_cpu(hdr->id);
1307                 ie_len = le32_to_cpu(hdr->len);
1308
1309                 len -= sizeof(*hdr);
1310                 data = hdr->data;
1311
1312                 if (len < ALIGN(ie_len, 4)) {
1313                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1314                                    ie_id, ie_len, len);
1315                         return -EINVAL;
1316                 }
1317
1318                 switch (ie_id) {
1319                 case ATH10K_BD_IE_BOARD:
1320                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1321                                                             boardname,
1322                                                             ATH10K_BD_IE_BOARD);
1323                         if (ret == -ENOENT)
1324                                 /* no match found, continue */
1325                                 break;
1326
1327                         /* either found or error, so stop searching */
1328                         goto out;
1329                 case ATH10K_BD_IE_BOARD_EXT:
1330                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1331                                                             boardname,
1332                                                             ATH10K_BD_IE_BOARD_EXT);
1333                         if (ret == -ENOENT)
1334                                 /* no match found, continue */
1335                                 break;
1336
1337                         /* either found or error, so stop searching */
1338                         goto out;
1339                 }
1340
1341                 /* jump over the padding */
1342                 ie_len = ALIGN(ie_len, 4);
1343
1344                 len -= ie_len;
1345                 data += ie_len;
1346         }
1347
1348 out:
1349         /* return result of parse_bd_ie_board() or -ENOENT */
1350         return ret;
1351 }
1352
1353 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1354                                               const char *boardname,
1355                                               const char *fallback_boardname,
1356                                               const char *filename)
1357 {
1358         size_t len, magic_len;
1359         const u8 *data;
1360         int ret;
1361
1362         /* Skip if already fetched during board data download */
1363         if (!ar->normal_mode_fw.board)
1364                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1365                                                                 ar->hw_params.fw.dir,
1366                                                                 filename);
1367         if (IS_ERR(ar->normal_mode_fw.board))
1368                 return PTR_ERR(ar->normal_mode_fw.board);
1369
1370         data = ar->normal_mode_fw.board->data;
1371         len = ar->normal_mode_fw.board->size;
1372
1373         /* magic has extra null byte padded */
1374         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1375         if (len < magic_len) {
1376                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1377                            ar->hw_params.fw.dir, filename, len);
1378                 ret = -EINVAL;
1379                 goto err;
1380         }
1381
1382         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1383                 ath10k_err(ar, "found invalid board magic\n");
1384                 ret = -EINVAL;
1385                 goto err;
1386         }
1387
1388         /* magic is padded to 4 bytes */
1389         magic_len = ALIGN(magic_len, 4);
1390         if (len < magic_len) {
1391                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1392                            ar->hw_params.fw.dir, filename, len);
1393                 ret = -EINVAL;
1394                 goto err;
1395         }
1396
1397         data += magic_len;
1398         len -= magic_len;
1399
1400         /* attempt to find boardname in the IE list */
1401         ret = ath10k_core_search_bd(ar, boardname, data, len);
1402
1403         /* if we didn't find it and have a fallback name, try that */
1404         if (ret == -ENOENT && fallback_boardname)
1405                 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1406
1407         if (ret == -ENOENT) {
1408                 ath10k_err(ar,
1409                            "failed to fetch board data for %s from %s/%s\n",
1410                            boardname, ar->hw_params.fw.dir, filename);
1411                 ret = -ENODATA;
1412         }
1413
1414         if (ret)
1415                 goto err;
1416
1417         return 0;
1418
1419 err:
1420         ath10k_core_free_board_files(ar);
1421         return ret;
1422 }
1423
1424 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1425                                          size_t name_len, bool with_variant)
1426 {
1427         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1428         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1429
1430         if (with_variant && ar->id.bdf_ext[0] != '\0')
1431                 scnprintf(variant, sizeof(variant), ",variant=%s",
1432                           ar->id.bdf_ext);
1433
1434         if (ar->id.bmi_ids_valid) {
1435                 scnprintf(name, name_len,
1436                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1437                           ath10k_bus_str(ar->hif.bus),
1438                           ar->id.bmi_chip_id,
1439                           ar->id.bmi_board_id, variant);
1440                 goto out;
1441         }
1442
1443         if (ar->id.qmi_ids_valid) {
1444                 scnprintf(name, name_len,
1445                           "bus=%s,qmi-board-id=%x",
1446                           ath10k_bus_str(ar->hif.bus),
1447                           ar->id.qmi_board_id);
1448                 goto out;
1449         }
1450
1451         scnprintf(name, name_len,
1452                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1453                   ath10k_bus_str(ar->hif.bus),
1454                   ar->id.vendor, ar->id.device,
1455                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1456 out:
1457         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1458
1459         return 0;
1460 }
1461
1462 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1463                                           size_t name_len)
1464 {
1465         if (ar->id.bmi_ids_valid) {
1466                 scnprintf(name, name_len,
1467                           "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1468                           ath10k_bus_str(ar->hif.bus),
1469                           ar->id.bmi_chip_id,
1470                           ar->id.bmi_eboard_id);
1471
1472                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1473                 return 0;
1474         }
1475         /* Fallback if returned board id is zero */
1476         return -1;
1477 }
1478
1479 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1480 {
1481         char boardname[100], fallback_boardname[100];
1482         int ret;
1483
1484         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1485                 ret = ath10k_core_create_board_name(ar, boardname,
1486                                                     sizeof(boardname), true);
1487                 if (ret) {
1488                         ath10k_err(ar, "failed to create board name: %d", ret);
1489                         return ret;
1490                 }
1491
1492                 ret = ath10k_core_create_board_name(ar, fallback_boardname,
1493                                                     sizeof(boardname), false);
1494                 if (ret) {
1495                         ath10k_err(ar, "failed to create fallback board name: %d", ret);
1496                         return ret;
1497                 }
1498         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1499                 ret = ath10k_core_create_eboard_name(ar, boardname,
1500                                                      sizeof(boardname));
1501                 if (ret) {
1502                         ath10k_err(ar, "fallback to eboard.bin since board id 0");
1503                         goto fallback;
1504                 }
1505         }
1506
1507         ar->bd_api = 2;
1508         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1509                                                  fallback_boardname,
1510                                                  ATH10K_BOARD_API2_FILE);
1511         if (!ret)
1512                 goto success;
1513
1514 fallback:
1515         ar->bd_api = 1;
1516         ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1517         if (ret) {
1518                 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1519                            ar->hw_params.fw.dir);
1520                 return ret;
1521         }
1522
1523 success:
1524         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1525         return 0;
1526 }
1527 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1528
1529 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1530 {
1531         u32 result, address;
1532         u8 ext_board_id;
1533         int ret;
1534
1535         address = ar->hw_params.patch_load_addr;
1536
1537         if (!ar->normal_mode_fw.fw_file.otp_data ||
1538             !ar->normal_mode_fw.fw_file.otp_len) {
1539                 ath10k_warn(ar,
1540                             "failed to retrieve extended board id due to otp binary missing\n");
1541                 return -ENODATA;
1542         }
1543
1544         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1545                    "boot upload otp to 0x%x len %zd for ext board id\n",
1546                    address, ar->normal_mode_fw.fw_file.otp_len);
1547
1548         ret = ath10k_bmi_fast_download(ar, address,
1549                                        ar->normal_mode_fw.fw_file.otp_data,
1550                                        ar->normal_mode_fw.fw_file.otp_len);
1551         if (ret) {
1552                 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1553                            ret);
1554                 return ret;
1555         }
1556
1557         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1558         if (ret) {
1559                 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1560                            ret);
1561                 return ret;
1562         }
1563
1564         if (!result) {
1565                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1566                            "ext board id does not exist in otp, ignore it\n");
1567                 return -EOPNOTSUPP;
1568         }
1569
1570         ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1571
1572         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1573                    "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1574                    result, ext_board_id);
1575
1576         ar->id.bmi_eboard_id = ext_board_id;
1577
1578         return 0;
1579 }
1580
1581 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1582                                       size_t data_len)
1583 {
1584         u32 board_data_size = ar->hw_params.fw.board_size;
1585         u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1586         u32 board_address;
1587         u32 ext_board_address;
1588         int ret;
1589
1590         ret = ath10k_push_board_ext_data(ar, data, data_len);
1591         if (ret) {
1592                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1593                 goto exit;
1594         }
1595
1596         ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1597         if (ret) {
1598                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1599                 goto exit;
1600         }
1601
1602         ret = ath10k_bmi_write_memory(ar, board_address, data,
1603                                       min_t(u32, board_data_size,
1604                                             data_len));
1605         if (ret) {
1606                 ath10k_err(ar, "could not write board data (%d)\n", ret);
1607                 goto exit;
1608         }
1609
1610         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1611         if (ret) {
1612                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1613                 goto exit;
1614         }
1615
1616         if (!ar->id.ext_bid_supported)
1617                 goto exit;
1618
1619         /* Extended board data download */
1620         ret = ath10k_core_get_ext_board_id_from_otp(ar);
1621         if (ret == -EOPNOTSUPP) {
1622                 /* Not fetching ext_board_data if ext board id is 0 */
1623                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1624                 return 0;
1625         } else if (ret) {
1626                 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1627                 goto exit;
1628         }
1629
1630         ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1631         if (ret)
1632                 goto exit;
1633
1634         if (ar->normal_mode_fw.ext_board_data) {
1635                 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1636                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1637                            "boot writing ext board data to addr 0x%x",
1638                            ext_board_address);
1639                 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1640                                               ar->normal_mode_fw.ext_board_data,
1641                                               min_t(u32, eboard_data_size, data_len));
1642                 if (ret)
1643                         ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1644         }
1645
1646 exit:
1647         return ret;
1648 }
1649
1650 static int ath10k_download_and_run_otp(struct ath10k *ar)
1651 {
1652         u32 result, address = ar->hw_params.patch_load_addr;
1653         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1654         int ret;
1655
1656         ret = ath10k_download_board_data(ar,
1657                                          ar->running_fw->board_data,
1658                                          ar->running_fw->board_len);
1659         if (ret) {
1660                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1661                 return ret;
1662         }
1663
1664         /* OTP is optional */
1665
1666         if (!ar->running_fw->fw_file.otp_data ||
1667             !ar->running_fw->fw_file.otp_len) {
1668                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1669                             ar->running_fw->fw_file.otp_data,
1670                             ar->running_fw->fw_file.otp_len);
1671                 return 0;
1672         }
1673
1674         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1675                    address, ar->running_fw->fw_file.otp_len);
1676
1677         ret = ath10k_bmi_fast_download(ar, address,
1678                                        ar->running_fw->fw_file.otp_data,
1679                                        ar->running_fw->fw_file.otp_len);
1680         if (ret) {
1681                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1682                 return ret;
1683         }
1684
1685         /* As of now pre-cal is valid for 10_4 variants */
1686         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1687             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1688                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1689
1690         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1691         if (ret) {
1692                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1693                 return ret;
1694         }
1695
1696         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1697
1698         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1699                                    ar->running_fw->fw_file.fw_features)) &&
1700             result != 0) {
1701                 ath10k_err(ar, "otp calibration failed: %d", result);
1702                 return -EINVAL;
1703         }
1704
1705         return 0;
1706 }
1707
1708 static int ath10k_download_cal_file(struct ath10k *ar,
1709                                     const struct firmware *file)
1710 {
1711         int ret;
1712
1713         if (!file)
1714                 return -ENOENT;
1715
1716         if (IS_ERR(file))
1717                 return PTR_ERR(file);
1718
1719         ret = ath10k_download_board_data(ar, file->data, file->size);
1720         if (ret) {
1721                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1722                 return ret;
1723         }
1724
1725         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1726
1727         return 0;
1728 }
1729
1730 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1731 {
1732         struct device_node *node;
1733         int data_len;
1734         void *data;
1735         int ret;
1736
1737         node = ar->dev->of_node;
1738         if (!node)
1739                 /* Device Tree is optional, don't print any warnings if
1740                  * there's no node for ath10k.
1741                  */
1742                 return -ENOENT;
1743
1744         if (!of_get_property(node, dt_name, &data_len)) {
1745                 /* The calibration data node is optional */
1746                 return -ENOENT;
1747         }
1748
1749         if (data_len != ar->hw_params.cal_data_len) {
1750                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1751                             data_len);
1752                 ret = -EMSGSIZE;
1753                 goto out;
1754         }
1755
1756         data = kmalloc(data_len, GFP_KERNEL);
1757         if (!data) {
1758                 ret = -ENOMEM;
1759                 goto out;
1760         }
1761
1762         ret = of_property_read_u8_array(node, dt_name, data, data_len);
1763         if (ret) {
1764                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1765                             ret);
1766                 goto out_free;
1767         }
1768
1769         ret = ath10k_download_board_data(ar, data, data_len);
1770         if (ret) {
1771                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1772                             ret);
1773                 goto out_free;
1774         }
1775
1776         ret = 0;
1777
1778 out_free:
1779         kfree(data);
1780
1781 out:
1782         return ret;
1783 }
1784
1785 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1786 {
1787         size_t data_len;
1788         void *data = NULL;
1789         int ret;
1790
1791         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1792         if (ret) {
1793                 if (ret != -EOPNOTSUPP)
1794                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1795                                     ret);
1796                 goto out_free;
1797         }
1798
1799         ret = ath10k_download_board_data(ar, data, data_len);
1800         if (ret) {
1801                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1802                             ret);
1803                 goto out_free;
1804         }
1805
1806         ret = 0;
1807
1808 out_free:
1809         kfree(data);
1810
1811         return ret;
1812 }
1813
1814 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1815                                      struct ath10k_fw_file *fw_file)
1816 {
1817         size_t magic_len, len, ie_len;
1818         int ie_id, i, index, bit, ret;
1819         struct ath10k_fw_ie *hdr;
1820         const u8 *data;
1821         __le32 *timestamp, *version;
1822
1823         /* first fetch the firmware file (firmware-*.bin) */
1824         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1825                                                  name);
1826         if (IS_ERR(fw_file->firmware))
1827                 return PTR_ERR(fw_file->firmware);
1828
1829         data = fw_file->firmware->data;
1830         len = fw_file->firmware->size;
1831
1832         /* magic also includes the null byte, check that as well */
1833         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1834
1835         if (len < magic_len) {
1836                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1837                            ar->hw_params.fw.dir, name, len);
1838                 ret = -EINVAL;
1839                 goto err;
1840         }
1841
1842         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1843                 ath10k_err(ar, "invalid firmware magic\n");
1844                 ret = -EINVAL;
1845                 goto err;
1846         }
1847
1848         /* jump over the padding */
1849         magic_len = ALIGN(magic_len, 4);
1850
1851         len -= magic_len;
1852         data += magic_len;
1853
1854         /* loop elements */
1855         while (len > sizeof(struct ath10k_fw_ie)) {
1856                 hdr = (struct ath10k_fw_ie *)data;
1857
1858                 ie_id = le32_to_cpu(hdr->id);
1859                 ie_len = le32_to_cpu(hdr->len);
1860
1861                 len -= sizeof(*hdr);
1862                 data += sizeof(*hdr);
1863
1864                 if (len < ie_len) {
1865                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1866                                    ie_id, len, ie_len);
1867                         ret = -EINVAL;
1868                         goto err;
1869                 }
1870
1871                 switch (ie_id) {
1872                 case ATH10K_FW_IE_FW_VERSION:
1873                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1874                                 break;
1875
1876                         memcpy(fw_file->fw_version, data, ie_len);
1877                         fw_file->fw_version[ie_len] = '\0';
1878
1879                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1880                                    "found fw version %s\n",
1881                                     fw_file->fw_version);
1882                         break;
1883                 case ATH10K_FW_IE_TIMESTAMP:
1884                         if (ie_len != sizeof(u32))
1885                                 break;
1886
1887                         timestamp = (__le32 *)data;
1888
1889                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1890                                    le32_to_cpup(timestamp));
1891                         break;
1892                 case ATH10K_FW_IE_FEATURES:
1893                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1894                                    "found firmware features ie (%zd B)\n",
1895                                    ie_len);
1896
1897                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1898                                 index = i / 8;
1899                                 bit = i % 8;
1900
1901                                 if (index == ie_len)
1902                                         break;
1903
1904                                 if (data[index] & (1 << bit)) {
1905                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1906                                                    "Enabling feature bit: %i\n",
1907                                                    i);
1908                                         __set_bit(i, fw_file->fw_features);
1909                                 }
1910                         }
1911
1912                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1913                                         fw_file->fw_features,
1914                                         sizeof(fw_file->fw_features));
1915                         break;
1916                 case ATH10K_FW_IE_FW_IMAGE:
1917                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1918                                    "found fw image ie (%zd B)\n",
1919                                    ie_len);
1920
1921                         fw_file->firmware_data = data;
1922                         fw_file->firmware_len = ie_len;
1923
1924                         break;
1925                 case ATH10K_FW_IE_OTP_IMAGE:
1926                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1927                                    "found otp image ie (%zd B)\n",
1928                                    ie_len);
1929
1930                         fw_file->otp_data = data;
1931                         fw_file->otp_len = ie_len;
1932
1933                         break;
1934                 case ATH10K_FW_IE_WMI_OP_VERSION:
1935                         if (ie_len != sizeof(u32))
1936                                 break;
1937
1938                         version = (__le32 *)data;
1939
1940                         fw_file->wmi_op_version = le32_to_cpup(version);
1941
1942                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1943                                    fw_file->wmi_op_version);
1944                         break;
1945                 case ATH10K_FW_IE_HTT_OP_VERSION:
1946                         if (ie_len != sizeof(u32))
1947                                 break;
1948
1949                         version = (__le32 *)data;
1950
1951                         fw_file->htt_op_version = le32_to_cpup(version);
1952
1953                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1954                                    fw_file->htt_op_version);
1955                         break;
1956                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1957                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1958                                    "found fw code swap image ie (%zd B)\n",
1959                                    ie_len);
1960                         fw_file->codeswap_data = data;
1961                         fw_file->codeswap_len = ie_len;
1962                         break;
1963                 default:
1964                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1965                                     le32_to_cpu(hdr->id));
1966                         break;
1967                 }
1968
1969                 /* jump over the padding */
1970                 ie_len = ALIGN(ie_len, 4);
1971
1972                 len -= ie_len;
1973                 data += ie_len;
1974         }
1975
1976         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1977             (!fw_file->firmware_data || !fw_file->firmware_len)) {
1978                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1979                             ar->hw_params.fw.dir, name);
1980                 ret = -ENOMEDIUM;
1981                 goto err;
1982         }
1983
1984         return 0;
1985
1986 err:
1987         ath10k_core_free_firmware_files(ar);
1988         return ret;
1989 }
1990
1991 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1992                                     size_t fw_name_len, int fw_api)
1993 {
1994         switch (ar->hif.bus) {
1995         case ATH10K_BUS_SDIO:
1996         case ATH10K_BUS_USB:
1997                 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1998                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1999                           fw_api);
2000                 break;
2001         case ATH10K_BUS_PCI:
2002         case ATH10K_BUS_AHB:
2003         case ATH10K_BUS_SNOC:
2004                 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2005                           ATH10K_FW_FILE_BASE, fw_api);
2006                 break;
2007         }
2008 }
2009
2010 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2011 {
2012         int ret, i;
2013         char fw_name[100];
2014
2015         /* calibration file is optional, don't check for any errors */
2016         ath10k_fetch_cal_file(ar);
2017
2018         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2019                 ar->fw_api = i;
2020                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2021                            ar->fw_api);
2022
2023                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2024                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2025                                                        &ar->normal_mode_fw.fw_file);
2026                 if (!ret)
2027                         goto success;
2028         }
2029
2030         /* we end up here if we couldn't fetch any firmware */
2031
2032         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2033                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2034                    ret);
2035
2036         return ret;
2037
2038 success:
2039         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2040
2041         return 0;
2042 }
2043
2044 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2045 {
2046         int ret;
2047
2048         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2049         if (ret == 0) {
2050                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2051                 goto success;
2052         }
2053
2054         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2055                    "boot did not find a pre calibration file, try DT next: %d\n",
2056                    ret);
2057
2058         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2059         if (ret) {
2060                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2061                            "unable to load pre cal data from DT: %d\n", ret);
2062                 return ret;
2063         }
2064         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2065
2066 success:
2067         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2068                    ath10k_cal_mode_str(ar->cal_mode));
2069
2070         return 0;
2071 }
2072
2073 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2074 {
2075         int ret;
2076
2077         ret = ath10k_core_pre_cal_download(ar);
2078         if (ret) {
2079                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2080                            "failed to load pre cal data: %d\n", ret);
2081                 return ret;
2082         }
2083
2084         ret = ath10k_core_get_board_id_from_otp(ar);
2085         if (ret) {
2086                 ath10k_err(ar, "failed to get board id: %d\n", ret);
2087                 return ret;
2088         }
2089
2090         ret = ath10k_download_and_run_otp(ar);
2091         if (ret) {
2092                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2093                 return ret;
2094         }
2095
2096         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2097                    "pre cal configuration done successfully\n");
2098
2099         return 0;
2100 }
2101
2102 static int ath10k_download_cal_data(struct ath10k *ar)
2103 {
2104         int ret;
2105
2106         ret = ath10k_core_pre_cal_config(ar);
2107         if (ret == 0)
2108                 return 0;
2109
2110         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2111                    "pre cal download procedure failed, try cal file: %d\n",
2112                    ret);
2113
2114         ret = ath10k_download_cal_file(ar, ar->cal_file);
2115         if (ret == 0) {
2116                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2117                 goto done;
2118         }
2119
2120         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2121                    "boot did not find a calibration file, try DT next: %d\n",
2122                    ret);
2123
2124         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2125         if (ret == 0) {
2126                 ar->cal_mode = ATH10K_CAL_MODE_DT;
2127                 goto done;
2128         }
2129
2130         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2131                    "boot did not find DT entry, try target EEPROM next: %d\n",
2132                    ret);
2133
2134         ret = ath10k_download_cal_eeprom(ar);
2135         if (ret == 0) {
2136                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2137                 goto done;
2138         }
2139
2140         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2141                    "boot did not find target EEPROM entry, try OTP next: %d\n",
2142                    ret);
2143
2144         ret = ath10k_download_and_run_otp(ar);
2145         if (ret) {
2146                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2147                 return ret;
2148         }
2149
2150         ar->cal_mode = ATH10K_CAL_MODE_OTP;
2151
2152 done:
2153         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2154                    ath10k_cal_mode_str(ar->cal_mode));
2155         return 0;
2156 }
2157
2158 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2159 {
2160         struct device_node *node;
2161         u8 coex_support = 0;
2162         int ret;
2163
2164         node = ar->dev->of_node;
2165         if (!node)
2166                 goto out;
2167
2168         ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2169         if (ret) {
2170                 ar->coex_support = true;
2171                 goto out;
2172         }
2173
2174         if (coex_support) {
2175                 ar->coex_support = true;
2176         } else {
2177                 ar->coex_support = false;
2178                 ar->coex_gpio_pin = -1;
2179                 goto out;
2180         }
2181
2182         ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2183                                    &ar->coex_gpio_pin);
2184         if (ret)
2185                 ar->coex_gpio_pin = -1;
2186
2187 out:
2188         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2189                    ar->coex_support, ar->coex_gpio_pin);
2190 }
2191
2192 static int ath10k_init_uart(struct ath10k *ar)
2193 {
2194         int ret;
2195
2196         /*
2197          * Explicitly setting UART prints to zero as target turns it on
2198          * based on scratch registers.
2199          */
2200         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2201         if (ret) {
2202                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2203                 return ret;
2204         }
2205
2206         if (!uart_print) {
2207                 if (ar->hw_params.uart_pin_workaround) {
2208                         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2209                                                  ar->hw_params.uart_pin);
2210                         if (ret) {
2211                                 ath10k_warn(ar, "failed to set UART TX pin: %d",
2212                                             ret);
2213                                 return ret;
2214                         }
2215                 }
2216
2217                 return 0;
2218         }
2219
2220         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2221         if (ret) {
2222                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2223                 return ret;
2224         }
2225
2226         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2227         if (ret) {
2228                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2229                 return ret;
2230         }
2231
2232         /* Set the UART baud rate to 19200. */
2233         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2234         if (ret) {
2235                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2236                 return ret;
2237         }
2238
2239         ath10k_info(ar, "UART prints enabled\n");
2240         return 0;
2241 }
2242
2243 static int ath10k_init_hw_params(struct ath10k *ar)
2244 {
2245         const struct ath10k_hw_params *uninitialized_var(hw_params);
2246         int i;
2247
2248         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2249                 hw_params = &ath10k_hw_params_list[i];
2250
2251                 if (hw_params->bus == ar->hif.bus &&
2252                     hw_params->id == ar->target_version &&
2253                     hw_params->dev_id == ar->dev_id)
2254                         break;
2255         }
2256
2257         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2258                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2259                            ar->target_version);
2260                 return -EINVAL;
2261         }
2262
2263         ar->hw_params = *hw_params;
2264
2265         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2266                    ar->hw_params.name, ar->target_version);
2267
2268         return 0;
2269 }
2270
2271 static void ath10k_core_restart(struct work_struct *work)
2272 {
2273         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2274         int ret;
2275
2276         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2277
2278         /* Place a barrier to make sure the compiler doesn't reorder
2279          * CRASH_FLUSH and calling other functions.
2280          */
2281         barrier();
2282
2283         ieee80211_stop_queues(ar->hw);
2284         ath10k_drain_tx(ar);
2285         complete(&ar->scan.started);
2286         complete(&ar->scan.completed);
2287         complete(&ar->scan.on_channel);
2288         complete(&ar->offchan_tx_completed);
2289         complete(&ar->install_key_done);
2290         complete(&ar->vdev_setup_done);
2291         complete(&ar->vdev_delete_done);
2292         complete(&ar->thermal.wmi_sync);
2293         complete(&ar->bss_survey_done);
2294         wake_up(&ar->htt.empty_tx_wq);
2295         wake_up(&ar->wmi.tx_credits_wq);
2296         wake_up(&ar->peer_mapping_wq);
2297
2298         /* TODO: We can have one instance of cancelling coverage_class_work by
2299          * moving it to ath10k_halt(), so that both stop() and restart() would
2300          * call that but it takes conf_mutex() and if we call cancel_work_sync()
2301          * with conf_mutex it will deadlock.
2302          */
2303         cancel_work_sync(&ar->set_coverage_class_work);
2304
2305         mutex_lock(&ar->conf_mutex);
2306
2307         switch (ar->state) {
2308         case ATH10K_STATE_ON:
2309                 ar->state = ATH10K_STATE_RESTARTING;
2310                 ath10k_halt(ar);
2311                 ath10k_scan_finish(ar);
2312                 ieee80211_restart_hw(ar->hw);
2313                 break;
2314         case ATH10K_STATE_OFF:
2315                 /* this can happen if driver is being unloaded
2316                  * or if the crash happens during FW probing
2317                  */
2318                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2319                 break;
2320         case ATH10K_STATE_RESTARTING:
2321                 /* hw restart might be requested from multiple places */
2322                 break;
2323         case ATH10K_STATE_RESTARTED:
2324                 ar->state = ATH10K_STATE_WEDGED;
2325                 /* fall through */
2326         case ATH10K_STATE_WEDGED:
2327                 ath10k_warn(ar, "device is wedged, will not restart\n");
2328                 break;
2329         case ATH10K_STATE_UTF:
2330                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2331                 break;
2332         }
2333
2334         mutex_unlock(&ar->conf_mutex);
2335
2336         ret = ath10k_coredump_submit(ar);
2337         if (ret)
2338                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2339                             ret);
2340
2341         complete(&ar->driver_recovery);
2342 }
2343
2344 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2345 {
2346         struct ath10k *ar = container_of(work, struct ath10k,
2347                                          set_coverage_class_work);
2348
2349         if (ar->hw_params.hw_ops->set_coverage_class)
2350                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2351 }
2352
2353 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2354 {
2355         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2356         int max_num_peers;
2357
2358         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2359             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2360                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2361                 return -EINVAL;
2362         }
2363
2364         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2365                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2366                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2367                 return -EINVAL;
2368         }
2369
2370         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2371         switch (ath10k_cryptmode_param) {
2372         case ATH10K_CRYPT_MODE_HW:
2373                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2374                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2375                 break;
2376         case ATH10K_CRYPT_MODE_SW:
2377                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2378                               fw_file->fw_features)) {
2379                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2380                         return -EINVAL;
2381                 }
2382
2383                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2384                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2385                 break;
2386         default:
2387                 ath10k_info(ar, "invalid cryptmode: %d\n",
2388                             ath10k_cryptmode_param);
2389                 return -EINVAL;
2390         }
2391
2392         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2393         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2394
2395         if (rawmode) {
2396                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2397                               fw_file->fw_features)) {
2398                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
2399                         return -EINVAL;
2400                 }
2401                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2402         }
2403
2404         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2405                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2406
2407                 /* Workaround:
2408                  *
2409                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2410                  * and causes enormous performance issues (malformed frames,
2411                  * etc).
2412                  *
2413                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
2414                  * albeit a bit slower compared to regular operation.
2415                  */
2416                 ar->htt.max_num_amsdu = 1;
2417         }
2418
2419         /* Backwards compatibility for firmwares without
2420          * ATH10K_FW_IE_WMI_OP_VERSION.
2421          */
2422         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2423                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2424                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2425                                      fw_file->fw_features))
2426                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2427                         else
2428                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2429                 } else {
2430                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2431                 }
2432         }
2433
2434         switch (fw_file->wmi_op_version) {
2435         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2436                 max_num_peers = TARGET_NUM_PEERS;
2437                 ar->max_num_stations = TARGET_NUM_STATIONS;
2438                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2439                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2440                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2441                         WMI_STAT_PEER;
2442                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2443                 break;
2444         case ATH10K_FW_WMI_OP_VERSION_10_1:
2445         case ATH10K_FW_WMI_OP_VERSION_10_2:
2446         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2447                 if (ath10k_peer_stats_enabled(ar)) {
2448                         max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2449                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2450                 } else {
2451                         max_num_peers = TARGET_10X_NUM_PEERS;
2452                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2453                 }
2454                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2455                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2456                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2457                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2458                 break;
2459         case ATH10K_FW_WMI_OP_VERSION_TLV:
2460                 max_num_peers = TARGET_TLV_NUM_PEERS;
2461                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2462                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2463                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2464                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2465                         ar->htt.max_num_pending_tx =
2466                                 TARGET_TLV_NUM_MSDU_DESC_HL;
2467                 else
2468                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2469                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2470                 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2471                         WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2472                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2473                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2474                 break;
2475         case ATH10K_FW_WMI_OP_VERSION_10_4:
2476                 max_num_peers = TARGET_10_4_NUM_PEERS;
2477                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2478                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2479                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2480                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2481                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2482                                         WMI_10_4_STAT_PEER_EXTD |
2483                                         WMI_10_4_STAT_VDEV_EXTD;
2484                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2485                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2486
2487                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2488                              fw_file->fw_features))
2489                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2490                 else
2491                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2492                 break;
2493         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2494         case ATH10K_FW_WMI_OP_VERSION_MAX:
2495         default:
2496                 WARN_ON(1);
2497                 return -EINVAL;
2498         }
2499
2500         if (ar->hw_params.num_peers)
2501                 ar->max_num_peers = ar->hw_params.num_peers;
2502         else
2503                 ar->max_num_peers = max_num_peers;
2504
2505         /* Backwards compatibility for firmwares without
2506          * ATH10K_FW_IE_HTT_OP_VERSION.
2507          */
2508         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2509                 switch (fw_file->wmi_op_version) {
2510                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2511                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2512                         break;
2513                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2514                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2515                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2516                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2517                         break;
2518                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2519                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2520                         break;
2521                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2522                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2523                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2524                         ath10k_err(ar, "htt op version not found from fw meta data");
2525                         return -EINVAL;
2526                 }
2527         }
2528
2529         return 0;
2530 }
2531
2532 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2533 {
2534         int ret;
2535         int vdev_id;
2536         int vdev_type;
2537         int vdev_subtype;
2538         const u8 *vdev_addr;
2539
2540         vdev_id = 0;
2541         vdev_type = WMI_VDEV_TYPE_STA;
2542         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2543         vdev_addr = ar->mac_addr;
2544
2545         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2546                                      vdev_addr);
2547         if (ret) {
2548                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2549                 return ret;
2550         }
2551
2552         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2553         if (ret) {
2554                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2555                 return ret;
2556         }
2557
2558         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2559          * serialized properly implicitly.
2560          *
2561          * Moreover (most) WMI commands have no explicit acknowledges. It is
2562          * possible to infer it implicitly by poking firmware with echo
2563          * command - getting a reply means all preceding comments have been
2564          * (mostly) processed.
2565          *
2566          * In case of vdev create/delete this is sufficient.
2567          *
2568          * Without this it's possible to end up with a race when HTT Rx ring is
2569          * started before vdev create/delete hack is complete allowing a short
2570          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2571          */
2572         ret = ath10k_wmi_barrier(ar);
2573         if (ret) {
2574                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2575                 return ret;
2576         }
2577
2578         return 0;
2579 }
2580
2581 static int ath10k_core_compat_services(struct ath10k *ar)
2582 {
2583         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2584
2585         /* all 10.x firmware versions support thermal throttling but don't
2586          * advertise the support via service flags so we have to hardcode
2587          * it here
2588          */
2589         switch (fw_file->wmi_op_version) {
2590         case ATH10K_FW_WMI_OP_VERSION_10_1:
2591         case ATH10K_FW_WMI_OP_VERSION_10_2:
2592         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2593         case ATH10K_FW_WMI_OP_VERSION_10_4:
2594                 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2595                 break;
2596         default:
2597                 break;
2598         }
2599
2600         return 0;
2601 }
2602
2603 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2604                       const struct ath10k_fw_components *fw)
2605 {
2606         int status;
2607         u32 val;
2608
2609         lockdep_assert_held(&ar->conf_mutex);
2610
2611         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2612
2613         ar->running_fw = fw;
2614
2615         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2616                       ar->running_fw->fw_file.fw_features)) {
2617                 ath10k_bmi_start(ar);
2618
2619                 if (ath10k_init_configure_target(ar)) {
2620                         status = -EINVAL;
2621                         goto err;
2622                 }
2623
2624                 status = ath10k_download_cal_data(ar);
2625                 if (status)
2626                         goto err;
2627
2628                 /* Some of of qca988x solutions are having global reset issue
2629                  * during target initialization. Bypassing PLL setting before
2630                  * downloading firmware and letting the SoC run on REF_CLK is
2631                  * fixing the problem. Corresponding firmware change is also
2632                  * needed to set the clock source once the target is
2633                  * initialized.
2634                  */
2635                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2636                              ar->running_fw->fw_file.fw_features)) {
2637                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2638                         if (status) {
2639                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2640                                            status);
2641                                 goto err;
2642                         }
2643                 }
2644
2645                 status = ath10k_download_fw(ar);
2646                 if (status)
2647                         goto err;
2648
2649                 status = ath10k_init_uart(ar);
2650                 if (status)
2651                         goto err;
2652
2653                 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2654                         status = ath10k_init_sdio(ar, mode);
2655                         if (status) {
2656                                 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2657                                 goto err;
2658                         }
2659                 }
2660         }
2661
2662         ar->htc.htc_ops.target_send_suspend_complete =
2663                 ath10k_send_suspend_complete;
2664
2665         status = ath10k_htc_init(ar);
2666         if (status) {
2667                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2668                 goto err;
2669         }
2670
2671         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2672                       ar->running_fw->fw_file.fw_features)) {
2673                 status = ath10k_bmi_done(ar);
2674                 if (status)
2675                         goto err;
2676         }
2677
2678         status = ath10k_wmi_attach(ar);
2679         if (status) {
2680                 ath10k_err(ar, "WMI attach failed: %d\n", status);
2681                 goto err;
2682         }
2683
2684         status = ath10k_htt_init(ar);
2685         if (status) {
2686                 ath10k_err(ar, "failed to init htt: %d\n", status);
2687                 goto err_wmi_detach;
2688         }
2689
2690         status = ath10k_htt_tx_start(&ar->htt);
2691         if (status) {
2692                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2693                 goto err_wmi_detach;
2694         }
2695
2696         /* If firmware indicates Full Rx Reorder support it must be used in a
2697          * slightly different manner. Let HTT code know.
2698          */
2699         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2700                                                 ar->wmi.svc_map));
2701
2702         status = ath10k_htt_rx_alloc(&ar->htt);
2703         if (status) {
2704                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2705                 goto err_htt_tx_detach;
2706         }
2707
2708         status = ath10k_hif_start(ar);
2709         if (status) {
2710                 ath10k_err(ar, "could not start HIF: %d\n", status);
2711                 goto err_htt_rx_detach;
2712         }
2713
2714         status = ath10k_htc_wait_target(&ar->htc);
2715         if (status) {
2716                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2717                 goto err_hif_stop;
2718         }
2719
2720         status = ath10k_hif_swap_mailbox(ar);
2721         if (status) {
2722                 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2723                 goto err_hif_stop;
2724         }
2725
2726         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2727                 status = ath10k_htt_connect(&ar->htt);
2728                 if (status) {
2729                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
2730                         goto err_hif_stop;
2731                 }
2732         }
2733
2734         status = ath10k_wmi_connect(ar);
2735         if (status) {
2736                 ath10k_err(ar, "could not connect wmi: %d\n", status);
2737                 goto err_hif_stop;
2738         }
2739
2740         status = ath10k_htc_start(&ar->htc);
2741         if (status) {
2742                 ath10k_err(ar, "failed to start htc: %d\n", status);
2743                 goto err_hif_stop;
2744         }
2745
2746         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2747                 status = ath10k_wmi_wait_for_service_ready(ar);
2748                 if (status) {
2749                         ath10k_warn(ar, "wmi service ready event not received");
2750                         goto err_hif_stop;
2751                 }
2752         }
2753
2754         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2755                    ar->hw->wiphy->fw_version);
2756
2757         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2758             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2759                 val = 0;
2760                 if (ath10k_peer_stats_enabled(ar))
2761                         val = WMI_10_4_PEER_STATS;
2762
2763                 /* Enable vdev stats by default */
2764                 val |= WMI_10_4_VDEV_STATS;
2765
2766                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2767                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2768
2769                 ath10k_core_fetch_btcoex_dt(ar);
2770
2771                 /* 10.4 firmware supports BT-Coex without reloading firmware
2772                  * via pdev param. To support Bluetooth coexistence pdev param,
2773                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2774                  * enabled always.
2775                  *
2776                  * We can still enable BTCOEX if firmware has the support
2777                  * eventhough btceox_support value is
2778                  * ATH10K_DT_BTCOEX_NOT_FOUND
2779                  */
2780
2781                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2782                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2783                              ar->running_fw->fw_file.fw_features) &&
2784                     ar->coex_support)
2785                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
2786
2787                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2788                              ar->wmi.svc_map))
2789                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2790
2791                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2792                              ar->wmi.svc_map))
2793                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2794
2795                 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2796                              ar->wmi.svc_map))
2797                         val |= WMI_10_4_TX_DATA_ACK_RSSI;
2798
2799                 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2800                         val |= WMI_10_4_REPORT_AIRTIME;
2801
2802                 status = ath10k_mac_ext_resource_config(ar, val);
2803                 if (status) {
2804                         ath10k_err(ar,
2805                                    "failed to send ext resource cfg command : %d\n",
2806                                    status);
2807                         goto err_hif_stop;
2808                 }
2809         }
2810
2811         status = ath10k_wmi_cmd_init(ar);
2812         if (status) {
2813                 ath10k_err(ar, "could not send WMI init command (%d)\n",
2814                            status);
2815                 goto err_hif_stop;
2816         }
2817
2818         status = ath10k_wmi_wait_for_unified_ready(ar);
2819         if (status) {
2820                 ath10k_err(ar, "wmi unified ready event not received\n");
2821                 goto err_hif_stop;
2822         }
2823
2824         status = ath10k_core_compat_services(ar);
2825         if (status) {
2826                 ath10k_err(ar, "compat services failed: %d\n", status);
2827                 goto err_hif_stop;
2828         }
2829
2830         status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2831         if (status && status != -EOPNOTSUPP) {
2832                 ath10k_err(ar,
2833                            "failed to set base mac address: %d\n", status);
2834                 goto err_hif_stop;
2835         }
2836
2837         /* Some firmware revisions do not properly set up hardware rx filter
2838          * registers.
2839          *
2840          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2841          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2842          * any frames that matches MAC_PCU_RX_FILTER which is also
2843          * misconfigured to accept anything.
2844          *
2845          * The ADDR1 is programmed using internal firmware structure field and
2846          * can't be (easily/sanely) reached from the driver explicitly. It is
2847          * possible to implicitly make it correct by creating a dummy vdev and
2848          * then deleting it.
2849          */
2850         if (ar->hw_params.hw_filter_reset_required &&
2851             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2852                 status = ath10k_core_reset_rx_filter(ar);
2853                 if (status) {
2854                         ath10k_err(ar,
2855                                    "failed to reset rx filter: %d\n", status);
2856                         goto err_hif_stop;
2857                 }
2858         }
2859
2860         status = ath10k_htt_rx_ring_refill(ar);
2861         if (status) {
2862                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2863                 goto err_hif_stop;
2864         }
2865
2866         if (ar->max_num_vdevs >= 64)
2867                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2868         else
2869                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2870
2871         INIT_LIST_HEAD(&ar->arvifs);
2872
2873         /* we don't care about HTT in UTF mode */
2874         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2875                 status = ath10k_htt_setup(&ar->htt);
2876                 if (status) {
2877                         ath10k_err(ar, "failed to setup htt: %d\n", status);
2878                         goto err_hif_stop;
2879                 }
2880         }
2881
2882         status = ath10k_debug_start(ar);
2883         if (status)
2884                 goto err_hif_stop;
2885
2886         status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
2887         if (status && status != -EOPNOTSUPP) {
2888                 ath10k_warn(ar, "set target log mode failed: %d\n", status);
2889                 goto err_hif_stop;
2890         }
2891
2892         return 0;
2893
2894 err_hif_stop:
2895         ath10k_hif_stop(ar);
2896 err_htt_rx_detach:
2897         ath10k_htt_rx_free(&ar->htt);
2898 err_htt_tx_detach:
2899         ath10k_htt_tx_free(&ar->htt);
2900 err_wmi_detach:
2901         ath10k_wmi_detach(ar);
2902 err:
2903         return status;
2904 }
2905 EXPORT_SYMBOL(ath10k_core_start);
2906
2907 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2908 {
2909         int ret;
2910         unsigned long time_left;
2911
2912         reinit_completion(&ar->target_suspend);
2913
2914         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2915         if (ret) {
2916                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2917                 return ret;
2918         }
2919
2920         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2921
2922         if (!time_left) {
2923                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2924                 return -ETIMEDOUT;
2925         }
2926
2927         return 0;
2928 }
2929
2930 void ath10k_core_stop(struct ath10k *ar)
2931 {
2932         lockdep_assert_held(&ar->conf_mutex);
2933         ath10k_debug_stop(ar);
2934
2935         /* try to suspend target */
2936         if (ar->state != ATH10K_STATE_RESTARTING &&
2937             ar->state != ATH10K_STATE_UTF)
2938                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2939
2940         ath10k_hif_stop(ar);
2941         ath10k_htt_tx_stop(&ar->htt);
2942         ath10k_htt_rx_free(&ar->htt);
2943         ath10k_wmi_detach(ar);
2944
2945         ar->id.bmi_ids_valid = false;
2946 }
2947 EXPORT_SYMBOL(ath10k_core_stop);
2948
2949 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2950  * order to know what hw capabilities should be advertised to mac80211 it is
2951  * necessary to load the firmware (and tear it down immediately since start
2952  * hook will try to init it again) before registering
2953  */
2954 static int ath10k_core_probe_fw(struct ath10k *ar)
2955 {
2956         struct bmi_target_info target_info;
2957         int ret = 0;
2958
2959         ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
2960         if (ret) {
2961                 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2962                 return ret;
2963         }
2964
2965         switch (ar->hif.bus) {
2966         case ATH10K_BUS_SDIO:
2967                 memset(&target_info, 0, sizeof(target_info));
2968                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2969                 if (ret) {
2970                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2971                         goto err_power_down;
2972                 }
2973                 ar->target_version = target_info.version;
2974                 ar->hw->wiphy->hw_version = target_info.version;
2975                 break;
2976         case ATH10K_BUS_PCI:
2977         case ATH10K_BUS_AHB:
2978         case ATH10K_BUS_USB:
2979                 memset(&target_info, 0, sizeof(target_info));
2980                 ret = ath10k_bmi_get_target_info(ar, &target_info);
2981                 if (ret) {
2982                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2983                         goto err_power_down;
2984                 }
2985                 ar->target_version = target_info.version;
2986                 ar->hw->wiphy->hw_version = target_info.version;
2987                 break;
2988         case ATH10K_BUS_SNOC:
2989                 memset(&target_info, 0, sizeof(target_info));
2990                 ret = ath10k_hif_get_target_info(ar, &target_info);
2991                 if (ret) {
2992                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2993                         goto err_power_down;
2994                 }
2995                 ar->target_version = target_info.version;
2996                 ar->hw->wiphy->hw_version = target_info.version;
2997                 break;
2998         default:
2999                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3000         }
3001
3002         ret = ath10k_init_hw_params(ar);
3003         if (ret) {
3004                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3005                 goto err_power_down;
3006         }
3007
3008         ret = ath10k_core_fetch_firmware_files(ar);
3009         if (ret) {
3010                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3011                 goto err_power_down;
3012         }
3013
3014         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3015                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
3016         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3017                sizeof(ar->hw->wiphy->fw_version));
3018
3019         ath10k_debug_print_hwfw_info(ar);
3020
3021         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3022                       ar->normal_mode_fw.fw_file.fw_features)) {
3023                 ret = ath10k_core_pre_cal_download(ar);
3024                 if (ret) {
3025                         /* pre calibration data download is not necessary
3026                          * for all the chipsets. Ignore failures and continue.
3027                          */
3028                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
3029                                    "could not load pre cal data: %d\n", ret);
3030                 }
3031
3032                 ret = ath10k_core_get_board_id_from_otp(ar);
3033                 if (ret && ret != -EOPNOTSUPP) {
3034                         ath10k_err(ar, "failed to get board id from otp: %d\n",
3035                                    ret);
3036                         goto err_free_firmware_files;
3037                 }
3038
3039                 ret = ath10k_core_check_smbios(ar);
3040                 if (ret)
3041                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3042
3043                 ret = ath10k_core_check_dt(ar);
3044                 if (ret)
3045                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3046
3047                 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3048                 if (ret) {
3049                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3050                         goto err_free_firmware_files;
3051                 }
3052
3053                 ath10k_debug_print_board_info(ar);
3054         }
3055
3056         device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
3057
3058         ret = ath10k_core_init_firmware_features(ar);
3059         if (ret) {
3060                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3061                            ret);
3062                 goto err_free_firmware_files;
3063         }
3064
3065         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3066                       ar->normal_mode_fw.fw_file.fw_features)) {
3067                 ret = ath10k_swap_code_seg_init(ar,
3068                                                 &ar->normal_mode_fw.fw_file);
3069                 if (ret) {
3070                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3071                                    ret);
3072                         goto err_free_firmware_files;
3073                 }
3074         }
3075
3076         mutex_lock(&ar->conf_mutex);
3077
3078         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3079                                 &ar->normal_mode_fw);
3080         if (ret) {
3081                 ath10k_err(ar, "could not init core (%d)\n", ret);
3082                 goto err_unlock;
3083         }
3084
3085         ath10k_debug_print_boot_info(ar);
3086         ath10k_core_stop(ar);
3087
3088         mutex_unlock(&ar->conf_mutex);
3089
3090         ath10k_hif_power_down(ar);
3091         return 0;
3092
3093 err_unlock:
3094         mutex_unlock(&ar->conf_mutex);
3095
3096 err_free_firmware_files:
3097         ath10k_core_free_firmware_files(ar);
3098
3099 err_power_down:
3100         ath10k_hif_power_down(ar);
3101
3102         return ret;
3103 }
3104
3105 static void ath10k_core_register_work(struct work_struct *work)
3106 {
3107         struct ath10k *ar = container_of(work, struct ath10k, register_work);
3108         int status;
3109
3110         /* peer stats are enabled by default */
3111         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3112
3113         status = ath10k_core_probe_fw(ar);
3114         if (status) {
3115                 ath10k_err(ar, "could not probe fw (%d)\n", status);
3116                 goto err;
3117         }
3118
3119         status = ath10k_mac_register(ar);
3120         if (status) {
3121                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3122                 goto err_release_fw;
3123         }
3124
3125         status = ath10k_coredump_register(ar);
3126         if (status) {
3127                 ath10k_err(ar, "unable to register coredump\n");
3128                 goto err_unregister_mac;
3129         }
3130
3131         status = ath10k_debug_register(ar);
3132         if (status) {
3133                 ath10k_err(ar, "unable to initialize debugfs\n");
3134                 goto err_unregister_coredump;
3135         }
3136
3137         status = ath10k_spectral_create(ar);
3138         if (status) {
3139                 ath10k_err(ar, "failed to initialize spectral\n");
3140                 goto err_debug_destroy;
3141         }
3142
3143         status = ath10k_thermal_register(ar);
3144         if (status) {
3145                 ath10k_err(ar, "could not register thermal device: %d\n",
3146                            status);
3147                 goto err_spectral_destroy;
3148         }
3149
3150         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3151         return;
3152
3153 err_spectral_destroy:
3154         ath10k_spectral_destroy(ar);
3155 err_debug_destroy:
3156         ath10k_debug_destroy(ar);
3157 err_unregister_coredump:
3158         ath10k_coredump_unregister(ar);
3159 err_unregister_mac:
3160         ath10k_mac_unregister(ar);
3161 err_release_fw:
3162         ath10k_core_free_firmware_files(ar);
3163 err:
3164         /* TODO: It's probably a good idea to release device from the driver
3165          * but calling device_release_driver() here will cause a deadlock.
3166          */
3167         return;
3168 }
3169
3170 int ath10k_core_register(struct ath10k *ar,
3171                          const struct ath10k_bus_params *bus_params)
3172 {
3173         ar->bus_param = *bus_params;
3174
3175         queue_work(ar->workqueue, &ar->register_work);
3176
3177         return 0;
3178 }
3179 EXPORT_SYMBOL(ath10k_core_register);
3180
3181 void ath10k_core_unregister(struct ath10k *ar)
3182 {
3183         cancel_work_sync(&ar->register_work);
3184
3185         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3186                 return;
3187
3188         ath10k_thermal_unregister(ar);
3189         /* Stop spectral before unregistering from mac80211 to remove the
3190          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3191          * would be already be free'd recursively, leading to a double free.
3192          */
3193         ath10k_spectral_destroy(ar);
3194
3195         /* We must unregister from mac80211 before we stop HTC and HIF.
3196          * Otherwise we will fail to submit commands to FW and mac80211 will be
3197          * unhappy about callback failures.
3198          */
3199         ath10k_mac_unregister(ar);
3200
3201         ath10k_testmode_destroy(ar);
3202
3203         ath10k_core_free_firmware_files(ar);
3204         ath10k_core_free_board_files(ar);
3205
3206         ath10k_debug_unregister(ar);
3207 }
3208 EXPORT_SYMBOL(ath10k_core_unregister);
3209
3210 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3211                                   enum ath10k_bus bus,
3212                                   enum ath10k_hw_rev hw_rev,
3213                                   const struct ath10k_hif_ops *hif_ops)
3214 {
3215         struct ath10k *ar;
3216         int ret;
3217
3218         ar = ath10k_mac_create(priv_size);
3219         if (!ar)
3220                 return NULL;
3221
3222         ar->ath_common.priv = ar;
3223         ar->ath_common.hw = ar->hw;
3224         ar->dev = dev;
3225         ar->hw_rev = hw_rev;
3226         ar->hif.ops = hif_ops;
3227         ar->hif.bus = bus;
3228
3229         switch (hw_rev) {
3230         case ATH10K_HW_QCA988X:
3231         case ATH10K_HW_QCA9887:
3232                 ar->regs = &qca988x_regs;
3233                 ar->hw_ce_regs = &qcax_ce_regs;
3234                 ar->hw_values = &qca988x_values;
3235                 break;
3236         case ATH10K_HW_QCA6174:
3237         case ATH10K_HW_QCA9377:
3238                 ar->regs = &qca6174_regs;
3239                 ar->hw_ce_regs = &qcax_ce_regs;
3240                 ar->hw_values = &qca6174_values;
3241                 break;
3242         case ATH10K_HW_QCA99X0:
3243         case ATH10K_HW_QCA9984:
3244                 ar->regs = &qca99x0_regs;
3245                 ar->hw_ce_regs = &qcax_ce_regs;
3246                 ar->hw_values = &qca99x0_values;
3247                 break;
3248         case ATH10K_HW_QCA9888:
3249                 ar->regs = &qca99x0_regs;
3250                 ar->hw_ce_regs = &qcax_ce_regs;
3251                 ar->hw_values = &qca9888_values;
3252                 break;
3253         case ATH10K_HW_QCA4019:
3254                 ar->regs = &qca4019_regs;
3255                 ar->hw_ce_regs = &qcax_ce_regs;
3256                 ar->hw_values = &qca4019_values;
3257                 break;
3258         case ATH10K_HW_WCN3990:
3259                 ar->regs = &wcn3990_regs;
3260                 ar->hw_ce_regs = &wcn3990_ce_regs;
3261                 ar->hw_values = &wcn3990_values;
3262                 break;
3263         default:
3264                 ath10k_err(ar, "unsupported core hardware revision %d\n",
3265                            hw_rev);
3266                 ret = -ENOTSUPP;
3267                 goto err_free_mac;
3268         }
3269
3270         init_completion(&ar->scan.started);
3271         init_completion(&ar->scan.completed);
3272         init_completion(&ar->scan.on_channel);
3273         init_completion(&ar->target_suspend);
3274         init_completion(&ar->driver_recovery);
3275         init_completion(&ar->wow.wakeup_completed);
3276
3277         init_completion(&ar->install_key_done);
3278         init_completion(&ar->vdev_setup_done);
3279         init_completion(&ar->vdev_delete_done);
3280         init_completion(&ar->thermal.wmi_sync);
3281         init_completion(&ar->bss_survey_done);
3282         init_completion(&ar->peer_delete_done);
3283
3284         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3285
3286         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3287         if (!ar->workqueue)
3288                 goto err_free_mac;
3289
3290         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3291         if (!ar->workqueue_aux)
3292                 goto err_free_wq;
3293
3294         mutex_init(&ar->conf_mutex);
3295         mutex_init(&ar->dump_mutex);
3296         spin_lock_init(&ar->data_lock);
3297
3298         INIT_LIST_HEAD(&ar->peers);
3299         init_waitqueue_head(&ar->peer_mapping_wq);
3300         init_waitqueue_head(&ar->htt.empty_tx_wq);
3301         init_waitqueue_head(&ar->wmi.tx_credits_wq);
3302
3303         skb_queue_head_init(&ar->htt.rx_indication_head);
3304
3305         init_completion(&ar->offchan_tx_completed);
3306         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3307         skb_queue_head_init(&ar->offchan_tx_queue);
3308
3309         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3310         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3311
3312         INIT_WORK(&ar->register_work, ath10k_core_register_work);
3313         INIT_WORK(&ar->restart_work, ath10k_core_restart);
3314         INIT_WORK(&ar->set_coverage_class_work,
3315                   ath10k_core_set_coverage_class_work);
3316
3317         init_dummy_netdev(&ar->napi_dev);
3318
3319         ret = ath10k_coredump_create(ar);
3320         if (ret)
3321                 goto err_free_aux_wq;
3322
3323         ret = ath10k_debug_create(ar);
3324         if (ret)
3325                 goto err_free_coredump;
3326
3327         return ar;
3328
3329 err_free_coredump:
3330         ath10k_coredump_destroy(ar);
3331
3332 err_free_aux_wq:
3333         destroy_workqueue(ar->workqueue_aux);
3334 err_free_wq:
3335         destroy_workqueue(ar->workqueue);
3336
3337 err_free_mac:
3338         ath10k_mac_destroy(ar);
3339
3340         return NULL;
3341 }
3342 EXPORT_SYMBOL(ath10k_core_create);
3343
3344 void ath10k_core_destroy(struct ath10k *ar)
3345 {
3346         flush_workqueue(ar->workqueue);
3347         destroy_workqueue(ar->workqueue);
3348
3349         flush_workqueue(ar->workqueue_aux);
3350         destroy_workqueue(ar->workqueue_aux);
3351
3352         ath10k_debug_destroy(ar);
3353         ath10k_coredump_destroy(ar);
3354         ath10k_htt_tx_destroy(&ar->htt);
3355         ath10k_wmi_free_host_mem(ar);
3356         ath10k_mac_destroy(ar);
3357 }
3358 EXPORT_SYMBOL(ath10k_core_destroy);
3359
3360 MODULE_AUTHOR("Qualcomm Atheros");
3361 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3362 MODULE_LICENSE("Dual BSD/GPL");