drivers/net/wireless/ath/ath10k/core.c

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2005-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/firmware.h>
  10 #include <linux/of.h>
  11 #include <linux/property.h>
  12 #include <linux/dmi.h>
  13 #include <linux/ctype.h>
  14 #include <linux/pm_qos.h>
  15 #include <asm/byteorder.h>
  16
  17 #include "core.h"
  18 #include "mac.h"
  19 #include "htc.h"
  20 #include "hif.h"
  21 #include "wmi.h"
  22 #include "bmi.h"
  23 #include "debug.h"
  24 #include "htt.h"
  25 #include "testmode.h"
  26 #include "wmi-ops.h"
  27 #include "coredump.h"
  28
  29 unsigned int ath10k_debug_mask;
  30 EXPORT_SYMBOL(ath10k_debug_mask);
  31
  32 static unsigned int ath10k_cryptmode_param;
  33 static bool uart_print;
  34 static bool skip_otp;
  35 static bool rawmode;
  36 static bool fw_diag_log;
  37
  38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
  39                                      BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
  40
  41 /* FIXME: most of these should be readonly */
  42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  44 module_param(uart_print, bool, 0644);
  45 module_param(skip_otp, bool, 0644);
  46 module_param(rawmode, bool, 0644);
  47 module_param(fw_diag_log, bool, 0644);
  48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  49
  50 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  51 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
  57
  58 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  59         {
  60                 .id = QCA988X_HW_2_0_VERSION,
  61                 .dev_id = QCA988X_2_0_DEVICE_ID,
  62                 .bus = ATH10K_BUS_PCI,
  63                 .name = "qca988x hw2.0",
  64                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  65                 .uart_pin = 7,
  66                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  67                 .otp_exe_param = 0,
  68                 .channel_counters_freq_hz = 88000,
  69                 .max_probe_resp_desc_thres = 0,
  70                 .cal_data_len = 2116,
  71                 .fw = {
  72                         .dir = QCA988X_HW_2_0_FW_DIR,
  73                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  74                         .board_size = QCA988X_BOARD_DATA_SZ,
  75                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  76                 },
  77                 .hw_ops = &qca988x_ops,
  78                 .decap_align_bytes = 4,
  79                 .spectral_bin_discard = 0,
  80                 .spectral_bin_offset = 0,
  81                 .vht160_mcs_rx_highest = 0,
  82                 .vht160_mcs_tx_highest = 0,
  83                 .n_cipher_suites = 8,
  84                 .ast_skid_limit = 0x10,
  85                 .num_wds_entries = 0x20,
  86                 .target_64bit = false,
  87                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  88                 .shadow_reg_support = false,
  89                 .rri_on_ddr = false,
  90                 .hw_filter_reset_required = true,
  91                 .fw_diag_ce_download = false,
  92                 .tx_stats_over_pktlog = true,
  93         },
  94         {
  95                 .id = QCA988X_HW_2_0_VERSION,
  96                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
  97                 .name = "qca988x hw2.0 ubiquiti",
  98                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  99                 .uart_pin = 7,
 100                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 101                 .otp_exe_param = 0,
 102                 .channel_counters_freq_hz = 88000,
 103                 .max_probe_resp_desc_thres = 0,
 104                 .cal_data_len = 2116,
 105                 .fw = {
 106                         .dir = QCA988X_HW_2_0_FW_DIR,
 107                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 108                         .board_size = QCA988X_BOARD_DATA_SZ,
 109                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 110                 },
 111                 .hw_ops = &qca988x_ops,
 112                 .decap_align_bytes = 4,
 113                 .spectral_bin_discard = 0,
 114                 .spectral_bin_offset = 0,
 115                 .vht160_mcs_rx_highest = 0,
 116                 .vht160_mcs_tx_highest = 0,
 117                 .n_cipher_suites = 8,
 118                 .ast_skid_limit = 0x10,
 119                 .num_wds_entries = 0x20,
 120                 .target_64bit = false,
 121                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 122                 .shadow_reg_support = false,
 123                 .rri_on_ddr = false,
 124                 .hw_filter_reset_required = true,
 125                 .fw_diag_ce_download = false,
 126                 .tx_stats_over_pktlog = true,
 127         },
 128         {
 129                 .id = QCA9887_HW_1_0_VERSION,
 130                 .dev_id = QCA9887_1_0_DEVICE_ID,
 131                 .bus = ATH10K_BUS_PCI,
 132                 .name = "qca9887 hw1.0",
 133                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 134                 .uart_pin = 7,
 135                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 136                 .otp_exe_param = 0,
 137                 .channel_counters_freq_hz = 88000,
 138                 .max_probe_resp_desc_thres = 0,
 139                 .cal_data_len = 2116,
 140                 .fw = {
 141                         .dir = QCA9887_HW_1_0_FW_DIR,
 142                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 143                         .board_size = QCA9887_BOARD_DATA_SZ,
 144                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 145                 },
 146                 .hw_ops = &qca988x_ops,
 147                 .decap_align_bytes = 4,
 148                 .spectral_bin_discard = 0,
 149                 .spectral_bin_offset = 0,
 150                 .vht160_mcs_rx_highest = 0,
 151                 .vht160_mcs_tx_highest = 0,
 152                 .n_cipher_suites = 8,
 153                 .ast_skid_limit = 0x10,
 154                 .num_wds_entries = 0x20,
 155                 .target_64bit = false,
 156                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 157                 .shadow_reg_support = false,
 158                 .rri_on_ddr = false,
 159                 .hw_filter_reset_required = true,
 160                 .fw_diag_ce_download = false,
 161                 .tx_stats_over_pktlog = false,
 162         },
 163         {
 164                 .id = QCA6174_HW_3_2_VERSION,
 165                 .dev_id = QCA6174_3_2_DEVICE_ID,
 166                 .bus = ATH10K_BUS_SDIO,
 167                 .name = "qca6174 hw3.2 sdio",
 168                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 169                 .uart_pin = 19,
 170                 .otp_exe_param = 0,
 171                 .channel_counters_freq_hz = 88000,
 172                 .max_probe_resp_desc_thres = 0,
 173                 .cal_data_len = 0,
 174                 .fw = {
 175                         .dir = QCA6174_HW_3_0_FW_DIR,
 176                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 177                         .board_size = QCA6174_BOARD_DATA_SZ,
 178                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 179                 },
 180                 .hw_ops = &qca6174_sdio_ops,
 181                 .hw_clk = qca6174_clk,
 182                 .target_cpu_freq = 176000000,
 183                 .decap_align_bytes = 4,
 184                 .n_cipher_suites = 8,
 185                 .num_peers = 10,
 186                 .ast_skid_limit = 0x10,
 187                 .num_wds_entries = 0x20,
 188                 .uart_pin_workaround = true,
 189                 .tx_stats_over_pktlog = false,
 190                 .bmi_large_size_download = true,
 191                 .supports_peer_stats_info = true,
 192         },
 193         {
 194                 .id = QCA6174_HW_2_1_VERSION,
 195                 .dev_id = QCA6164_2_1_DEVICE_ID,
 196                 .bus = ATH10K_BUS_PCI,
 197                 .name = "qca6164 hw2.1",
 198                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 199                 .uart_pin = 6,
 200                 .otp_exe_param = 0,
 201                 .channel_counters_freq_hz = 88000,
 202                 .max_probe_resp_desc_thres = 0,
 203                 .cal_data_len = 8124,
 204                 .fw = {
 205                         .dir = QCA6174_HW_2_1_FW_DIR,
 206                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 207                         .board_size = QCA6174_BOARD_DATA_SZ,
 208                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 209                 },
 210                 .hw_ops = &qca988x_ops,
 211                 .decap_align_bytes = 4,
 212                 .spectral_bin_discard = 0,
 213                 .spectral_bin_offset = 0,
 214                 .vht160_mcs_rx_highest = 0,
 215                 .vht160_mcs_tx_highest = 0,
 216                 .n_cipher_suites = 8,
 217                 .ast_skid_limit = 0x10,
 218                 .num_wds_entries = 0x20,
 219                 .target_64bit = false,
 220                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 221                 .shadow_reg_support = false,
 222                 .rri_on_ddr = false,
 223                 .hw_filter_reset_required = true,
 224                 .fw_diag_ce_download = false,
 225                 .tx_stats_over_pktlog = false,
 226         },
 227         {
 228                 .id = QCA6174_HW_2_1_VERSION,
 229                 .dev_id = QCA6174_2_1_DEVICE_ID,
 230                 .bus = ATH10K_BUS_PCI,
 231                 .name = "qca6174 hw2.1",
 232                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 233                 .uart_pin = 6,
 234                 .otp_exe_param = 0,
 235                 .channel_counters_freq_hz = 88000,
 236                 .max_probe_resp_desc_thres = 0,
 237                 .cal_data_len = 8124,
 238                 .fw = {
 239                         .dir = QCA6174_HW_2_1_FW_DIR,
 240                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 241                         .board_size = QCA6174_BOARD_DATA_SZ,
 242                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 243                 },
 244                 .hw_ops = &qca988x_ops,
 245                 .decap_align_bytes = 4,
 246                 .spectral_bin_discard = 0,
 247                 .spectral_bin_offset = 0,
 248                 .vht160_mcs_rx_highest = 0,
 249                 .vht160_mcs_tx_highest = 0,
 250                 .n_cipher_suites = 8,
 251                 .ast_skid_limit = 0x10,
 252                 .num_wds_entries = 0x20,
 253                 .target_64bit = false,
 254                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 255                 .shadow_reg_support = false,
 256                 .rri_on_ddr = false,
 257                 .hw_filter_reset_required = true,
 258                 .fw_diag_ce_download = false,
 259                 .tx_stats_over_pktlog = false,
 260         },
 261         {
 262                 .id = QCA6174_HW_3_0_VERSION,
 263                 .dev_id = QCA6174_2_1_DEVICE_ID,
 264                 .bus = ATH10K_BUS_PCI,
 265                 .name = "qca6174 hw3.0",
 266                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 267                 .uart_pin = 6,
 268                 .otp_exe_param = 0,
 269                 .channel_counters_freq_hz = 88000,
 270                 .max_probe_resp_desc_thres = 0,
 271                 .cal_data_len = 8124,
 272                 .fw = {
 273                         .dir = QCA6174_HW_3_0_FW_DIR,
 274                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 275                         .board_size = QCA6174_BOARD_DATA_SZ,
 276                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 277                 },
 278                 .hw_ops = &qca988x_ops,
 279                 .decap_align_bytes = 4,
 280                 .spectral_bin_discard = 0,
 281                 .spectral_bin_offset = 0,
 282                 .vht160_mcs_rx_highest = 0,
 283                 .vht160_mcs_tx_highest = 0,
 284                 .n_cipher_suites = 8,
 285                 .ast_skid_limit = 0x10,
 286                 .num_wds_entries = 0x20,
 287                 .target_64bit = false,
 288                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 289                 .shadow_reg_support = false,
 290                 .rri_on_ddr = false,
 291                 .hw_filter_reset_required = true,
 292                 .fw_diag_ce_download = false,
 293                 .tx_stats_over_pktlog = false,
 294         },
 295         {
 296                 .id = QCA6174_HW_3_2_VERSION,
 297                 .dev_id = QCA6174_2_1_DEVICE_ID,
 298                 .bus = ATH10K_BUS_PCI,
 299                 .name = "qca6174 hw3.2",
 300                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 301                 .uart_pin = 6,
 302                 .otp_exe_param = 0,
 303                 .channel_counters_freq_hz = 88000,
 304                 .max_probe_resp_desc_thres = 0,
 305                 .cal_data_len = 8124,
 306                 .fw = {
 307                         /* uses same binaries as hw3.0 */
 308                         .dir = QCA6174_HW_3_0_FW_DIR,
 309                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 310                         .board_size = QCA6174_BOARD_DATA_SZ,
 311                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 312                 },
 313                 .hw_ops = &qca6174_ops,
 314                 .hw_clk = qca6174_clk,
 315                 .target_cpu_freq = 176000000,
 316                 .decap_align_bytes = 4,
 317                 .spectral_bin_discard = 0,
 318                 .spectral_bin_offset = 0,
 319                 .vht160_mcs_rx_highest = 0,
 320                 .vht160_mcs_tx_highest = 0,
 321                 .n_cipher_suites = 8,
 322                 .ast_skid_limit = 0x10,
 323                 .num_wds_entries = 0x20,
 324                 .target_64bit = false,
 325                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 326                 .shadow_reg_support = false,
 327                 .rri_on_ddr = false,
 328                 .hw_filter_reset_required = true,
 329                 .fw_diag_ce_download = true,
 330                 .tx_stats_over_pktlog = false,
 331                 .supports_peer_stats_info = true,
 332         },
 333         {
 334                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 335                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 336                 .bus = ATH10K_BUS_PCI,
 337                 .name = "qca99x0 hw2.0",
 338                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 339                 .uart_pin = 7,
 340                 .otp_exe_param = 0x00000700,
 341                 .continuous_frag_desc = true,
 342                 .cck_rate_map_rev2 = true,
 343                 .channel_counters_freq_hz = 150000,
 344                 .max_probe_resp_desc_thres = 24,
 345                 .tx_chain_mask = 0xf,
 346                 .rx_chain_mask = 0xf,
 347                 .max_spatial_stream = 4,
 348                 .cal_data_len = 12064,
 349                 .fw = {
 350                         .dir = QCA99X0_HW_2_0_FW_DIR,
 351                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 352                         .board_size = QCA99X0_BOARD_DATA_SZ,
 353                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 354                 },
 355                 .sw_decrypt_mcast_mgmt = true,
 356                 .hw_ops = &qca99x0_ops,
 357                 .decap_align_bytes = 1,
 358                 .spectral_bin_discard = 4,
 359                 .spectral_bin_offset = 0,
 360                 .vht160_mcs_rx_highest = 0,
 361                 .vht160_mcs_tx_highest = 0,
 362                 .n_cipher_suites = 11,
 363                 .ast_skid_limit = 0x10,
 364                 .num_wds_entries = 0x20,
 365                 .target_64bit = false,
 366                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 367                 .shadow_reg_support = false,
 368                 .rri_on_ddr = false,
 369                 .hw_filter_reset_required = true,
 370                 .fw_diag_ce_download = false,
 371                 .tx_stats_over_pktlog = false,
 372         },
 373         {
 374                 .id = QCA9984_HW_1_0_DEV_VERSION,
 375                 .dev_id = QCA9984_1_0_DEVICE_ID,
 376                 .bus = ATH10K_BUS_PCI,
 377                 .name = "qca9984/qca9994 hw1.0",
 378                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 379                 .uart_pin = 7,
 380                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 381                 .otp_exe_param = 0x00000700,
 382                 .continuous_frag_desc = true,
 383                 .cck_rate_map_rev2 = true,
 384                 .channel_counters_freq_hz = 150000,
 385                 .max_probe_resp_desc_thres = 24,
 386                 .tx_chain_mask = 0xf,
 387                 .rx_chain_mask = 0xf,
 388                 .max_spatial_stream = 4,
 389                 .cal_data_len = 12064,
 390                 .fw = {
 391                         .dir = QCA9984_HW_1_0_FW_DIR,
 392                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 393                         .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
 394                         .board_size = QCA99X0_BOARD_DATA_SZ,
 395                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 396                         .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
 397                 },
 398                 .sw_decrypt_mcast_mgmt = true,
 399                 .hw_ops = &qca99x0_ops,
 400                 .decap_align_bytes = 1,
 401                 .spectral_bin_discard = 12,
 402                 .spectral_bin_offset = 8,
 403
 404                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 405                  * or 2x2 160Mhz, long-guard-interval.
 406                  */
 407                 .vht160_mcs_rx_highest = 1560,
 408                 .vht160_mcs_tx_highest = 1560,
 409                 .n_cipher_suites = 11,
 410                 .ast_skid_limit = 0x10,
 411                 .num_wds_entries = 0x20,
 412                 .target_64bit = false,
 413                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 414                 .shadow_reg_support = false,
 415                 .rri_on_ddr = false,
 416                 .hw_filter_reset_required = true,
 417                 .fw_diag_ce_download = false,
 418                 .tx_stats_over_pktlog = false,
 419         },
 420         {
 421                 .id = QCA9888_HW_2_0_DEV_VERSION,
 422                 .dev_id = QCA9888_2_0_DEVICE_ID,
 423                 .bus = ATH10K_BUS_PCI,
 424                 .name = "qca9888 hw2.0",
 425                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 426                 .uart_pin = 7,
 427                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 428                 .otp_exe_param = 0x00000700,
 429                 .continuous_frag_desc = true,
 430                 .channel_counters_freq_hz = 150000,
 431                 .max_probe_resp_desc_thres = 24,
 432                 .tx_chain_mask = 3,
 433                 .rx_chain_mask = 3,
 434                 .max_spatial_stream = 2,
 435                 .cal_data_len = 12064,
 436                 .fw = {
 437                         .dir = QCA9888_HW_2_0_FW_DIR,
 438                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 439                         .board_size = QCA99X0_BOARD_DATA_SZ,
 440                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 441                 },
 442                 .sw_decrypt_mcast_mgmt = true,
 443                 .hw_ops = &qca99x0_ops,
 444                 .decap_align_bytes = 1,
 445                 .spectral_bin_discard = 12,
 446                 .spectral_bin_offset = 8,
 447
 448                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 449                  * 1x1 160Mhz, long-guard-interval.
 450                  */
 451                 .vht160_mcs_rx_highest = 780,
 452                 .vht160_mcs_tx_highest = 780,
 453                 .n_cipher_suites = 11,
 454                 .ast_skid_limit = 0x10,
 455                 .num_wds_entries = 0x20,
 456                 .target_64bit = false,
 457                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 458                 .shadow_reg_support = false,
 459                 .rri_on_ddr = false,
 460                 .hw_filter_reset_required = true,
 461                 .fw_diag_ce_download = false,
 462                 .tx_stats_over_pktlog = false,
 463         },
 464         {
 465                 .id = QCA9377_HW_1_0_DEV_VERSION,
 466                 .dev_id = QCA9377_1_0_DEVICE_ID,
 467                 .bus = ATH10K_BUS_PCI,
 468                 .name = "qca9377 hw1.0",
 469                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 470                 .uart_pin = 6,
 471                 .otp_exe_param = 0,
 472                 .channel_counters_freq_hz = 88000,
 473                 .max_probe_resp_desc_thres = 0,
 474                 .cal_data_len = 8124,
 475                 .fw = {
 476                         .dir = QCA9377_HW_1_0_FW_DIR,
 477                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 478                         .board_size = QCA9377_BOARD_DATA_SZ,
 479                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 480                 },
 481                 .hw_ops = &qca988x_ops,
 482                 .decap_align_bytes = 4,
 483                 .spectral_bin_discard = 0,
 484                 .spectral_bin_offset = 0,
 485                 .vht160_mcs_rx_highest = 0,
 486                 .vht160_mcs_tx_highest = 0,
 487                 .n_cipher_suites = 8,
 488                 .ast_skid_limit = 0x10,
 489                 .num_wds_entries = 0x20,
 490                 .target_64bit = false,
 491                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 492                 .shadow_reg_support = false,
 493                 .rri_on_ddr = false,
 494                 .hw_filter_reset_required = true,
 495                 .fw_diag_ce_download = false,
 496                 .tx_stats_over_pktlog = false,
 497         },
 498         {
 499                 .id = QCA9377_HW_1_1_DEV_VERSION,
 500                 .dev_id = QCA9377_1_0_DEVICE_ID,
 501                 .bus = ATH10K_BUS_PCI,
 502                 .name = "qca9377 hw1.1",
 503                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 504                 .uart_pin = 6,
 505                 .otp_exe_param = 0,
 506                 .channel_counters_freq_hz = 88000,
 507                 .max_probe_resp_desc_thres = 0,
 508                 .cal_data_len = 8124,
 509                 .fw = {
 510                         .dir = QCA9377_HW_1_0_FW_DIR,
 511                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 512                         .board_size = QCA9377_BOARD_DATA_SZ,
 513                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 514                 },
 515                 .hw_ops = &qca6174_ops,
 516                 .hw_clk = qca6174_clk,
 517                 .target_cpu_freq = 176000000,
 518                 .decap_align_bytes = 4,
 519                 .spectral_bin_discard = 0,
 520                 .spectral_bin_offset = 0,
 521                 .vht160_mcs_rx_highest = 0,
 522                 .vht160_mcs_tx_highest = 0,
 523                 .n_cipher_suites = 8,
 524                 .ast_skid_limit = 0x10,
 525                 .num_wds_entries = 0x20,
 526                 .target_64bit = false,
 527                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 528                 .shadow_reg_support = false,
 529                 .rri_on_ddr = false,
 530                 .hw_filter_reset_required = true,
 531                 .fw_diag_ce_download = true,
 532                 .tx_stats_over_pktlog = false,
 533         },
 534         {
 535                 .id = QCA9377_HW_1_1_DEV_VERSION,
 536                 .dev_id = QCA9377_1_0_DEVICE_ID,
 537                 .bus = ATH10K_BUS_SDIO,
 538                 .name = "qca9377 hw1.1 sdio",
 539                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 540                 .uart_pin = 19,
 541                 .otp_exe_param = 0,
 542                 .channel_counters_freq_hz = 88000,
 543                 .max_probe_resp_desc_thres = 0,
 544                 .cal_data_len = 8124,
 545                 .fw = {
 546                         .dir = QCA9377_HW_1_0_FW_DIR,
 547                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 548                         .board_size = QCA9377_BOARD_DATA_SZ,
 549                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 550                 },
 551                 .hw_ops = &qca6174_ops,
 552                 .hw_clk = qca6174_clk,
 553                 .target_cpu_freq = 176000000,
 554                 .decap_align_bytes = 4,
 555                 .n_cipher_suites = 8,
 556                 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
 557                 .ast_skid_limit = 0x10,
 558                 .num_wds_entries = 0x20,
 559                 .uart_pin_workaround = true,
 560         },
 561         {
 562                 .id = QCA4019_HW_1_0_DEV_VERSION,
 563                 .dev_id = 0,
 564                 .bus = ATH10K_BUS_AHB,
 565                 .name = "qca4019 hw1.0",
 566                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 567                 .uart_pin = 7,
 568                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 569                 .otp_exe_param = 0x0010000,
 570                 .continuous_frag_desc = true,
 571                 .cck_rate_map_rev2 = true,
 572                 .channel_counters_freq_hz = 125000,
 573                 .max_probe_resp_desc_thres = 24,
 574                 .tx_chain_mask = 0x3,
 575                 .rx_chain_mask = 0x3,
 576                 .max_spatial_stream = 2,
 577                 .cal_data_len = 12064,
 578                 .fw = {
 579                         .dir = QCA4019_HW_1_0_FW_DIR,
 580                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 581                         .board_size = QCA4019_BOARD_DATA_SZ,
 582                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 583                 },
 584                 .sw_decrypt_mcast_mgmt = true,
 585                 .hw_ops = &qca99x0_ops,
 586                 .decap_align_bytes = 1,
 587                 .spectral_bin_discard = 4,
 588                 .spectral_bin_offset = 0,
 589                 .vht160_mcs_rx_highest = 0,
 590                 .vht160_mcs_tx_highest = 0,
 591                 .n_cipher_suites = 11,
 592                 .ast_skid_limit = 0x10,
 593                 .num_wds_entries = 0x20,
 594                 .target_64bit = false,
 595                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 596                 .shadow_reg_support = false,
 597                 .rri_on_ddr = false,
 598                 .hw_filter_reset_required = true,
 599                 .fw_diag_ce_download = false,
 600                 .tx_stats_over_pktlog = false,
 601         },
 602         {
 603                 .id = WCN3990_HW_1_0_DEV_VERSION,
 604                 .dev_id = 0,
 605                 .bus = ATH10K_BUS_SNOC,
 606                 .name = "wcn3990 hw1.0",
 607                 .continuous_frag_desc = true,
 608                 .tx_chain_mask = 0x7,
 609                 .rx_chain_mask = 0x7,
 610                 .max_spatial_stream = 4,
 611                 .fw = {
 612                         .dir = WCN3990_HW_1_0_FW_DIR,
 613                 },
 614                 .sw_decrypt_mcast_mgmt = true,
 615                 .hw_ops = &wcn3990_ops,
 616                 .decap_align_bytes = 1,
 617                 .num_peers = TARGET_HL_TLV_NUM_PEERS,
 618                 .n_cipher_suites = 11,
 619                 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
 620                 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
 621                 .target_64bit = true,
 622                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 623                 .shadow_reg_support = true,
 624                 .rri_on_ddr = true,
 625                 .hw_filter_reset_required = false,
 626                 .fw_diag_ce_download = false,
 627                 .tx_stats_over_pktlog = false,
 628         },
 629 };
 630
 631 static const char *const ath10k_core_fw_feature_str[] = {
 632         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 633         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 634         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 635         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 636         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 637         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 638         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 639         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 640         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 641         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 642         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 643         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 644         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 645         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 646         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 647         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 648         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 649         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 650         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 651         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 652         [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
 653         [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
 654         [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
 655 };
 656
 657 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 658                                                    size_t buf_len,
 659                                                    enum ath10k_fw_features feat)
 660 {
 661         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 662         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 663                      ATH10K_FW_FEATURE_COUNT);
 664
 665         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 666             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 667                 return scnprintf(buf, buf_len, "bit%d", feat);
 668         }
 669
 670         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 671 }
 672
 673 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 674                                      char *buf,
 675                                      size_t buf_len)
 676 {
 677         size_t len = 0;
 678         int i;
 679
 680         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 681                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 682                         if (len > 0)
 683                                 len += scnprintf(buf + len, buf_len - len, ",");
 684
 685                         len += ath10k_core_get_fw_feature_str(buf + len,
 686                                                               buf_len - len,
 687                                                               i);
 688                 }
 689         }
 690 }
 691
 692 static void ath10k_send_suspend_complete(struct ath10k *ar)
 693 {
 694         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 695
 696         complete(&ar->target_suspend);
 697 }
 698
 699 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 700 {
 701         int ret;
 702         u32 param = 0;
 703
 704         ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 705         if (ret)
 706                 return ret;
 707
 708         ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 709         if (ret)
 710                 return ret;
 711
 712         ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
 713         if (ret)
 714                 return ret;
 715
 716         param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 717
 718         if (mode == ATH10K_FIRMWARE_MODE_NORMAL)
 719                 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 720         else
 721                 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 722
 723         if (mode == ATH10K_FIRMWARE_MODE_UTF)
 724                 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 725         else
 726                 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 727
 728         ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
 729         if (ret)
 730                 return ret;
 731
 732         ret = ath10k_bmi_read32(ar, hi_option_flag2, &param);
 733         if (ret)
 734                 return ret;
 735
 736         param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
 737
 738         ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
 739         if (ret)
 740                 return ret;
 741
 742         return 0;
 743 }
 744
 745 static int ath10k_init_configure_target(struct ath10k *ar)
 746 {
 747         u32 param_host;
 748         int ret;
 749
 750         /* tell target which HTC version it is used*/
 751         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 752                                  HTC_PROTOCOL_VERSION);
 753         if (ret) {
 754                 ath10k_err(ar, "settings HTC version failed\n");
 755                 return ret;
 756         }
 757
 758         /* set the firmware mode to STA/IBSS/AP */
 759         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 760         if (ret) {
 761                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 762                 return ret;
 763         }
 764
 765         /* TODO following parameters need to be re-visited. */
 766         /* num_device */
 767         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 768         /* Firmware mode */
 769         /* FIXME: Why FW_MODE_AP ??.*/
 770         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 771         /* mac_addr_method */
 772         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 773         /* firmware_bridge */
 774         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 775         /* fwsubmode */
 776         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 777
 778         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 779         if (ret) {
 780                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 781                 return ret;
 782         }
 783
 784         /* We do all byte-swapping on the host */
 785         ret = ath10k_bmi_write32(ar, hi_be, 0);
 786         if (ret) {
 787                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 788                 return ret;
 789         }
 790
 791         /* FW descriptor/Data swap flags */
 792         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 793
 794         if (ret) {
 795                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 796                 return ret;
 797         }
 798
 799         /* Some devices have a special sanity check that verifies the PCI
 800          * Device ID is written to this host interest var. It is known to be
 801          * required to boot QCA6164.
 802          */
 803         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 804                                  ar->dev_id);
 805         if (ret) {
 806                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 807                 return ret;
 808         }
 809
 810         return 0;
 811 }
 812
 813 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 814                                                    const char *dir,
 815                                                    const char *file)
 816 {
 817         char filename[100];
 818         const struct firmware *fw;
 819         int ret;
 820
 821         if (file == NULL)
 822                 return ERR_PTR(-ENOENT);
 823
 824         if (dir == NULL)
 825                 dir = ".";
 826
 827         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 828         ret = firmware_request_nowarn(&fw, filename, ar->dev);
 829         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 830                    filename, ret);
 831
 832         if (ret)
 833                 return ERR_PTR(ret);
 834
 835         return fw;
 836 }
 837
 838 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 839                                       size_t data_len)
 840 {
 841         u32 board_data_size = ar->hw_params.fw.board_size;
 842         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 843         u32 board_ext_data_addr;
 844         int ret;
 845
 846         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 847         if (ret) {
 848                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 849                            ret);
 850                 return ret;
 851         }
 852
 853         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 854                    "boot push board extended data addr 0x%x\n",
 855                    board_ext_data_addr);
 856
 857         if (board_ext_data_addr == 0)
 858                 return 0;
 859
 860         if (data_len != (board_data_size + board_ext_data_size)) {
 861                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 862                            data_len, board_data_size, board_ext_data_size);
 863                 return -EINVAL;
 864         }
 865
 866         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 867                                       data + board_data_size,
 868                                       board_ext_data_size);
 869         if (ret) {
 870                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 871                 return ret;
 872         }
 873
 874         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 875                                  (board_ext_data_size << 16) | 1);
 876         if (ret) {
 877                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 878                            ret);
 879                 return ret;
 880         }
 881
 882         return 0;
 883 }
 884
 885 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 886 {
 887         u32 result, address;
 888         u8 board_id, chip_id;
 889         bool ext_bid_support;
 890         int ret, bmi_board_id_param;
 891
 892         address = ar->hw_params.patch_load_addr;
 893
 894         if (!ar->normal_mode_fw.fw_file.otp_data ||
 895             !ar->normal_mode_fw.fw_file.otp_len) {
 896                 ath10k_warn(ar,
 897                             "failed to retrieve board id because of invalid otp\n");
 898                 return -ENODATA;
 899         }
 900
 901         if (ar->id.bmi_ids_valid) {
 902                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 903                            "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
 904                            ar->id.bmi_board_id, ar->id.bmi_chip_id);
 905                 goto skip_otp_download;
 906         }
 907
 908         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 909                    "boot upload otp to 0x%x len %zd for board id\n",
 910                    address, ar->normal_mode_fw.fw_file.otp_len);
 911
 912         ret = ath10k_bmi_fast_download(ar, address,
 913                                        ar->normal_mode_fw.fw_file.otp_data,
 914                                        ar->normal_mode_fw.fw_file.otp_len);
 915         if (ret) {
 916                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 917                            ret);
 918                 return ret;
 919         }
 920
 921         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 922             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 923                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 924         else
 925                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 926
 927         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 928         if (ret) {
 929                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 930                            ret);
 931                 return ret;
 932         }
 933
 934         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 935         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 936         ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
 937
 938         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 939                    "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
 940                    result, board_id, chip_id, ext_bid_support);
 941
 942         ar->id.ext_bid_supported = ext_bid_support;
 943
 944         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 945             (board_id == 0)) {
 946                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 947                            "board id does not exist in otp, ignore it\n");
 948                 return -EOPNOTSUPP;
 949         }
 950
 951         ar->id.bmi_ids_valid = true;
 952         ar->id.bmi_board_id = board_id;
 953         ar->id.bmi_chip_id = chip_id;
 954
 955 skip_otp_download:
 956
 957         return 0;
 958 }
 959
 960 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
 961 {
 962         struct ath10k *ar = data;
 963         const char *bdf_ext;
 964         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
 965         u8 bdf_enabled;
 966         int i;
 967
 968         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
 969                 return;
 970
 971         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
 972                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 973                            "wrong smbios bdf ext type length (%d).\n",
 974                            hdr->length);
 975                 return;
 976         }
 977
 978         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
 979         if (!bdf_enabled) {
 980                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
 981                 return;
 982         }
 983
 984         /* Only one string exists (per spec) */
 985         bdf_ext = (char *)hdr + hdr->length;
 986
 987         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
 988                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 989                            "bdf variant magic does not match.\n");
 990                 return;
 991         }
 992
 993         for (i = 0; i < strlen(bdf_ext); i++) {
 994                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
 995                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 996                                    "bdf variant name contains non ascii chars.\n");
 997                         return;
 998                 }
 999         }
1000
1001         /* Copy extension name without magic suffix */
1002         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1003                     sizeof(ar->id.bdf_ext)) < 0) {
1004                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1005                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1006                             bdf_ext);
1007                 return;
1008         }
1009
1010         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1011                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1012                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1013 }
1014
1015 static int ath10k_core_check_smbios(struct ath10k *ar)
1016 {
1017         ar->id.bdf_ext[0] = '\0';
1018         dmi_walk(ath10k_core_check_bdfext, ar);
1019
1020         if (ar->id.bdf_ext[0] == '\0')
1021                 return -ENODATA;
1022
1023         return 0;
1024 }
1025
1026 int ath10k_core_check_dt(struct ath10k *ar)
1027 {
1028         struct device_node *node;
1029         const char *variant = NULL;
1030
1031         node = ar->dev->of_node;
1032         if (!node)
1033                 return -ENOENT;
1034
1035         of_property_read_string(node, "qcom,ath10k-calibration-variant",
1036                                 &variant);
1037         if (!variant)
1038                 return -ENODATA;
1039
1040         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1041                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1042                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1043                             variant);
1044
1045         return 0;
1046 }
1047 EXPORT_SYMBOL(ath10k_core_check_dt);
1048
1049 static int ath10k_download_fw(struct ath10k *ar)
1050 {
1051         u32 address, data_len;
1052         const void *data;
1053         int ret;
1054         struct pm_qos_request latency_qos;
1055
1056         address = ar->hw_params.patch_load_addr;
1057
1058         data = ar->running_fw->fw_file.firmware_data;
1059         data_len = ar->running_fw->fw_file.firmware_len;
1060
1061         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1062         if (ret) {
1063                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1064                            ret);
1065                 return ret;
1066         }
1067
1068         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1069                    "boot uploading firmware image %pK len %d\n",
1070                    data, data_len);
1071
1072         /* Check if device supports to download firmware via
1073          * diag copy engine. Downloading firmware via diag CE
1074          * greatly reduces the time to download firmware.
1075          */
1076         if (ar->hw_params.fw_diag_ce_download) {
1077                 ret = ath10k_hw_diag_fast_download(ar, address,
1078                                                    data, data_len);
1079                 if (ret == 0)
1080                         /* firmware upload via diag ce was successful */
1081                         return 0;
1082
1083                 ath10k_warn(ar,
1084                             "failed to upload firmware via diag ce, trying BMI: %d",
1085                             ret);
1086         }
1087
1088         memset(&latency_qos, 0, sizeof(latency_qos));
1089         cpu_latency_qos_add_request(&latency_qos, 0);
1090
1091         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1092
1093         cpu_latency_qos_remove_request(&latency_qos);
1094
1095         return ret;
1096 }
1097
1098 void ath10k_core_free_board_files(struct ath10k *ar)
1099 {
1100         if (!IS_ERR(ar->normal_mode_fw.board))
1101                 release_firmware(ar->normal_mode_fw.board);
1102
1103         if (!IS_ERR(ar->normal_mode_fw.ext_board))
1104                 release_firmware(ar->normal_mode_fw.ext_board);
1105
1106         ar->normal_mode_fw.board = NULL;
1107         ar->normal_mode_fw.board_data = NULL;
1108         ar->normal_mode_fw.board_len = 0;
1109         ar->normal_mode_fw.ext_board = NULL;
1110         ar->normal_mode_fw.ext_board_data = NULL;
1111         ar->normal_mode_fw.ext_board_len = 0;
1112 }
1113 EXPORT_SYMBOL(ath10k_core_free_board_files);
1114
1115 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1116 {
1117         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1118                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1119
1120         if (!IS_ERR(ar->cal_file))
1121                 release_firmware(ar->cal_file);
1122
1123         if (!IS_ERR(ar->pre_cal_file))
1124                 release_firmware(ar->pre_cal_file);
1125
1126         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1127
1128         ar->normal_mode_fw.fw_file.otp_data = NULL;
1129         ar->normal_mode_fw.fw_file.otp_len = 0;
1130
1131         ar->normal_mode_fw.fw_file.firmware = NULL;
1132         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1133         ar->normal_mode_fw.fw_file.firmware_len = 0;
1134
1135         ar->cal_file = NULL;
1136         ar->pre_cal_file = NULL;
1137 }
1138
1139 static int ath10k_fetch_cal_file(struct ath10k *ar)
1140 {
1141         char filename[100];
1142
1143         /* pre-cal-<bus>-<id>.bin */
1144         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1145                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1146
1147         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1148         if (!IS_ERR(ar->pre_cal_file))
1149                 goto success;
1150
1151         /* cal-<bus>-<id>.bin */
1152         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1153                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1154
1155         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1156         if (IS_ERR(ar->cal_file))
1157                 /* calibration file is optional, don't print any warnings */
1158                 return PTR_ERR(ar->cal_file);
1159 success:
1160         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1161                    ATH10K_FW_DIR, filename);
1162
1163         return 0;
1164 }
1165
1166 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1167 {
1168         const struct firmware *fw;
1169
1170         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1171                 if (!ar->hw_params.fw.board) {
1172                         ath10k_err(ar, "failed to find board file fw entry\n");
1173                         return -EINVAL;
1174                 }
1175
1176                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1177                                                                 ar->hw_params.fw.dir,
1178                                                                 ar->hw_params.fw.board);
1179                 if (IS_ERR(ar->normal_mode_fw.board))
1180                         return PTR_ERR(ar->normal_mode_fw.board);
1181
1182                 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1183                 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1184         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1185                 if (!ar->hw_params.fw.eboard) {
1186                         ath10k_err(ar, "failed to find eboard file fw entry\n");
1187                         return -EINVAL;
1188                 }
1189
1190                 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1191                                           ar->hw_params.fw.eboard);
1192                 ar->normal_mode_fw.ext_board = fw;
1193                 if (IS_ERR(ar->normal_mode_fw.ext_board))
1194                         return PTR_ERR(ar->normal_mode_fw.ext_board);
1195
1196                 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1197                 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1198         }
1199
1200         return 0;
1201 }
1202
1203 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1204                                          const void *buf, size_t buf_len,
1205                                          const char *boardname,
1206                                          int bd_ie_type)
1207 {
1208         const struct ath10k_fw_ie *hdr;
1209         bool name_match_found;
1210         int ret, board_ie_id;
1211         size_t board_ie_len;
1212         const void *board_ie_data;
1213
1214         name_match_found = false;
1215
1216         /* go through ATH10K_BD_IE_BOARD_ elements */
1217         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1218                 hdr = buf;
1219                 board_ie_id = le32_to_cpu(hdr->id);
1220                 board_ie_len = le32_to_cpu(hdr->len);
1221                 board_ie_data = hdr->data;
1222
1223                 buf_len -= sizeof(*hdr);
1224                 buf += sizeof(*hdr);
1225
1226                 if (buf_len < ALIGN(board_ie_len, 4)) {
1227                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1228                                    buf_len, ALIGN(board_ie_len, 4));
1229                         ret = -EINVAL;
1230                         goto out;
1231                 }
1232
1233                 switch (board_ie_id) {
1234                 case ATH10K_BD_IE_BOARD_NAME:
1235                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1236                                         board_ie_data, board_ie_len);
1237
1238                         if (board_ie_len != strlen(boardname))
1239                                 break;
1240
1241                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1242                         if (ret)
1243                                 break;
1244
1245                         name_match_found = true;
1246                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1247                                    "boot found match for name '%s'",
1248                                    boardname);
1249                         break;
1250                 case ATH10K_BD_IE_BOARD_DATA:
1251                         if (!name_match_found)
1252                                 /* no match found */
1253                                 break;
1254
1255                         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1256                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1257                                            "boot found board data for '%s'",
1258                                                 boardname);
1259
1260                                 ar->normal_mode_fw.board_data = board_ie_data;
1261                                 ar->normal_mode_fw.board_len = board_ie_len;
1262                         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1263                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1264                                            "boot found eboard data for '%s'",
1265                                                 boardname);
1266
1267                                 ar->normal_mode_fw.ext_board_data = board_ie_data;
1268                                 ar->normal_mode_fw.ext_board_len = board_ie_len;
1269                         }
1270
1271                         ret = 0;
1272                         goto out;
1273                 default:
1274                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1275                                     board_ie_id);
1276                         break;
1277                 }
1278
1279                 /* jump over the padding */
1280                 board_ie_len = ALIGN(board_ie_len, 4);
1281
1282                 buf_len -= board_ie_len;
1283                 buf += board_ie_len;
1284         }
1285
1286         /* no match found */
1287         ret = -ENOENT;
1288
1289 out:
1290         return ret;
1291 }
1292
1293 static int ath10k_core_search_bd(struct ath10k *ar,
1294                                  const char *boardname,
1295                                  const u8 *data,
1296                                  size_t len)
1297 {
1298         size_t ie_len;
1299         struct ath10k_fw_ie *hdr;
1300         int ret = -ENOENT, ie_id;
1301
1302         while (len > sizeof(struct ath10k_fw_ie)) {
1303                 hdr = (struct ath10k_fw_ie *)data;
1304                 ie_id = le32_to_cpu(hdr->id);
1305                 ie_len = le32_to_cpu(hdr->len);
1306
1307                 len -= sizeof(*hdr);
1308                 data = hdr->data;
1309
1310                 if (len < ALIGN(ie_len, 4)) {
1311                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1312                                    ie_id, ie_len, len);
1313                         return -EINVAL;
1314                 }
1315
1316                 switch (ie_id) {
1317                 case ATH10K_BD_IE_BOARD:
1318                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1319                                                             boardname,
1320                                                             ATH10K_BD_IE_BOARD);
1321                         if (ret == -ENOENT)
1322                                 /* no match found, continue */
1323                                 break;
1324
1325                         /* either found or error, so stop searching */
1326                         goto out;
1327                 case ATH10K_BD_IE_BOARD_EXT:
1328                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1329                                                             boardname,
1330                                                             ATH10K_BD_IE_BOARD_EXT);
1331                         if (ret == -ENOENT)
1332                                 /* no match found, continue */
1333                                 break;
1334
1335                         /* either found or error, so stop searching */
1336                         goto out;
1337                 }
1338
1339                 /* jump over the padding */
1340                 ie_len = ALIGN(ie_len, 4);
1341
1342                 len -= ie_len;
1343                 data += ie_len;
1344         }
1345
1346 out:
1347         /* return result of parse_bd_ie_board() or -ENOENT */
1348         return ret;
1349 }
1350
1351 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1352                                               const char *boardname,
1353                                               const char *fallback_boardname1,
1354                                               const char *fallback_boardname2,
1355                                               const char *filename)
1356 {
1357         size_t len, magic_len;
1358         const u8 *data;
1359         int ret;
1360
1361         /* Skip if already fetched during board data download */
1362         if (!ar->normal_mode_fw.board)
1363                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1364                                                                 ar->hw_params.fw.dir,
1365                                                                 filename);
1366         if (IS_ERR(ar->normal_mode_fw.board))
1367                 return PTR_ERR(ar->normal_mode_fw.board);
1368
1369         data = ar->normal_mode_fw.board->data;
1370         len = ar->normal_mode_fw.board->size;
1371
1372         /* magic has extra null byte padded */
1373         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1374         if (len < magic_len) {
1375                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1376                            ar->hw_params.fw.dir, filename, len);
1377                 ret = -EINVAL;
1378                 goto err;
1379         }
1380
1381         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1382                 ath10k_err(ar, "found invalid board magic\n");
1383                 ret = -EINVAL;
1384                 goto err;
1385         }
1386
1387         /* magic is padded to 4 bytes */
1388         magic_len = ALIGN(magic_len, 4);
1389         if (len < magic_len) {
1390                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1391                            ar->hw_params.fw.dir, filename, len);
1392                 ret = -EINVAL;
1393                 goto err;
1394         }
1395
1396         data += magic_len;
1397         len -= magic_len;
1398
1399         /* attempt to find boardname in the IE list */
1400         ret = ath10k_core_search_bd(ar, boardname, data, len);
1401
1402         /* if we didn't find it and have a fallback name, try that */
1403         if (ret == -ENOENT && fallback_boardname1)
1404                 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1405
1406         if (ret == -ENOENT && fallback_boardname2)
1407                 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1408
1409         if (ret == -ENOENT) {
1410                 ath10k_err(ar,
1411                            "failed to fetch board data for %s from %s/%s\n",
1412                            boardname, ar->hw_params.fw.dir, filename);
1413                 ret = -ENODATA;
1414         }
1415
1416         if (ret)
1417                 goto err;
1418
1419         return 0;
1420
1421 err:
1422         ath10k_core_free_board_files(ar);
1423         return ret;
1424 }
1425
1426 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1427                                          size_t name_len, bool with_variant,
1428                                          bool with_chip_id)
1429 {
1430         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1431         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1432
1433         if (with_variant && ar->id.bdf_ext[0] != '\0')
1434                 scnprintf(variant, sizeof(variant), ",variant=%s",
1435                           ar->id.bdf_ext);
1436
1437         if (ar->id.bmi_ids_valid) {
1438                 scnprintf(name, name_len,
1439                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1440                           ath10k_bus_str(ar->hif.bus),
1441                           ar->id.bmi_chip_id,
1442                           ar->id.bmi_board_id, variant);
1443                 goto out;
1444         }
1445
1446         if (ar->id.qmi_ids_valid) {
1447                 if (with_chip_id)
1448                         scnprintf(name, name_len,
1449                                   "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1450                                   ath10k_bus_str(ar->hif.bus),
1451                                   ar->id.qmi_board_id, ar->id.qmi_chip_id,
1452                                   variant);
1453                 else
1454                         scnprintf(name, name_len,
1455                                   "bus=%s,qmi-board-id=%x",
1456                                   ath10k_bus_str(ar->hif.bus),
1457                                   ar->id.qmi_board_id);
1458                 goto out;
1459         }
1460
1461         scnprintf(name, name_len,
1462                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1463                   ath10k_bus_str(ar->hif.bus),
1464                   ar->id.vendor, ar->id.device,
1465                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1466 out:
1467         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1468
1469         return 0;
1470 }
1471
1472 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1473                                           size_t name_len)
1474 {
1475         if (ar->id.bmi_ids_valid) {
1476                 scnprintf(name, name_len,
1477                           "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1478                           ath10k_bus_str(ar->hif.bus),
1479                           ar->id.bmi_chip_id,
1480                           ar->id.bmi_eboard_id);
1481
1482                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1483                 return 0;
1484         }
1485         /* Fallback if returned board id is zero */
1486         return -1;
1487 }
1488
1489 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1490 {
1491         char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1492         int ret;
1493
1494         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1495                 /* With variant and chip id */
1496                 ret = ath10k_core_create_board_name(ar, boardname,
1497                                                     sizeof(boardname), true,
1498                                                     true);
1499                 if (ret) {
1500                         ath10k_err(ar, "failed to create board name: %d", ret);
1501                         return ret;
1502                 }
1503
1504                 /* Without variant and only chip-id */
1505                 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1506                                                     sizeof(boardname), false,
1507                                                     true);
1508                 if (ret) {
1509                         ath10k_err(ar, "failed to create 1st fallback board name: %d",
1510                                    ret);
1511                         return ret;
1512                 }
1513
1514                 /* Without variant and without chip-id */
1515                 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1516                                                     sizeof(boardname), false,
1517                                                     false);
1518                 if (ret) {
1519                         ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1520                                    ret);
1521                         return ret;
1522                 }
1523         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1524                 ret = ath10k_core_create_eboard_name(ar, boardname,
1525                                                      sizeof(boardname));
1526                 if (ret) {
1527                         ath10k_err(ar, "fallback to eboard.bin since board id 0");
1528                         goto fallback;
1529                 }
1530         }
1531
1532         ar->bd_api = 2;
1533         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1534                                                  fallback_boardname1,
1535                                                  fallback_boardname2,
1536                                                  ATH10K_BOARD_API2_FILE);
1537         if (!ret)
1538                 goto success;
1539
1540 fallback:
1541         ar->bd_api = 1;
1542         ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1543         if (ret) {
1544                 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1545                            ar->hw_params.fw.dir);
1546                 return ret;
1547         }
1548
1549 success:
1550         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1551         return 0;
1552 }
1553 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1554
1555 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1556 {
1557         u32 result, address;
1558         u8 ext_board_id;
1559         int ret;
1560
1561         address = ar->hw_params.patch_load_addr;
1562
1563         if (!ar->normal_mode_fw.fw_file.otp_data ||
1564             !ar->normal_mode_fw.fw_file.otp_len) {
1565                 ath10k_warn(ar,
1566                             "failed to retrieve extended board id due to otp binary missing\n");
1567                 return -ENODATA;
1568         }
1569
1570         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1571                    "boot upload otp to 0x%x len %zd for ext board id\n",
1572                    address, ar->normal_mode_fw.fw_file.otp_len);
1573
1574         ret = ath10k_bmi_fast_download(ar, address,
1575                                        ar->normal_mode_fw.fw_file.otp_data,
1576                                        ar->normal_mode_fw.fw_file.otp_len);
1577         if (ret) {
1578                 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1579                            ret);
1580                 return ret;
1581         }
1582
1583         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1584         if (ret) {
1585                 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1586                            ret);
1587                 return ret;
1588         }
1589
1590         if (!result) {
1591                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1592                            "ext board id does not exist in otp, ignore it\n");
1593                 return -EOPNOTSUPP;
1594         }
1595
1596         ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1597
1598         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1599                    "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1600                    result, ext_board_id);
1601
1602         ar->id.bmi_eboard_id = ext_board_id;
1603
1604         return 0;
1605 }
1606
1607 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1608                                       size_t data_len)
1609 {
1610         u32 board_data_size = ar->hw_params.fw.board_size;
1611         u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1612         u32 board_address;
1613         u32 ext_board_address;
1614         int ret;
1615
1616         ret = ath10k_push_board_ext_data(ar, data, data_len);
1617         if (ret) {
1618                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1619                 goto exit;
1620         }
1621
1622         ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1623         if (ret) {
1624                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1625                 goto exit;
1626         }
1627
1628         ret = ath10k_bmi_write_memory(ar, board_address, data,
1629                                       min_t(u32, board_data_size,
1630                                             data_len));
1631         if (ret) {
1632                 ath10k_err(ar, "could not write board data (%d)\n", ret);
1633                 goto exit;
1634         }
1635
1636         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1637         if (ret) {
1638                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1639                 goto exit;
1640         }
1641
1642         if (!ar->id.ext_bid_supported)
1643                 goto exit;
1644
1645         /* Extended board data download */
1646         ret = ath10k_core_get_ext_board_id_from_otp(ar);
1647         if (ret == -EOPNOTSUPP) {
1648                 /* Not fetching ext_board_data if ext board id is 0 */
1649                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1650                 return 0;
1651         } else if (ret) {
1652                 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1653                 goto exit;
1654         }
1655
1656         ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1657         if (ret)
1658                 goto exit;
1659
1660         if (ar->normal_mode_fw.ext_board_data) {
1661                 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1662                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1663                            "boot writing ext board data to addr 0x%x",
1664                            ext_board_address);
1665                 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1666                                               ar->normal_mode_fw.ext_board_data,
1667                                               min_t(u32, eboard_data_size, data_len));
1668                 if (ret)
1669                         ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1670         }
1671
1672 exit:
1673         return ret;
1674 }
1675
1676 static int ath10k_download_and_run_otp(struct ath10k *ar)
1677 {
1678         u32 result, address = ar->hw_params.patch_load_addr;
1679         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1680         int ret;
1681
1682         ret = ath10k_download_board_data(ar,
1683                                          ar->running_fw->board_data,
1684                                          ar->running_fw->board_len);
1685         if (ret) {
1686                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1687                 return ret;
1688         }
1689
1690         /* OTP is optional */
1691
1692         if (!ar->running_fw->fw_file.otp_data ||
1693             !ar->running_fw->fw_file.otp_len) {
1694                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1695                             ar->running_fw->fw_file.otp_data,
1696                             ar->running_fw->fw_file.otp_len);
1697                 return 0;
1698         }
1699
1700         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1701                    address, ar->running_fw->fw_file.otp_len);
1702
1703         ret = ath10k_bmi_fast_download(ar, address,
1704                                        ar->running_fw->fw_file.otp_data,
1705                                        ar->running_fw->fw_file.otp_len);
1706         if (ret) {
1707                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1708                 return ret;
1709         }
1710
1711         /* As of now pre-cal is valid for 10_4 variants */
1712         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1713             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1714                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1715
1716         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1717         if (ret) {
1718                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1719                 return ret;
1720         }
1721
1722         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1723
1724         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1725                                    ar->running_fw->fw_file.fw_features)) &&
1726             result != 0) {
1727                 ath10k_err(ar, "otp calibration failed: %d", result);
1728                 return -EINVAL;
1729         }
1730
1731         return 0;
1732 }
1733
1734 static int ath10k_download_cal_file(struct ath10k *ar,
1735                                     const struct firmware *file)
1736 {
1737         int ret;
1738
1739         if (!file)
1740                 return -ENOENT;
1741
1742         if (IS_ERR(file))
1743                 return PTR_ERR(file);
1744
1745         ret = ath10k_download_board_data(ar, file->data, file->size);
1746         if (ret) {
1747                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1748                 return ret;
1749         }
1750
1751         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1752
1753         return 0;
1754 }
1755
1756 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1757 {
1758         struct device_node *node;
1759         int data_len;
1760         void *data;
1761         int ret;
1762
1763         node = ar->dev->of_node;
1764         if (!node)
1765                 /* Device Tree is optional, don't print any warnings if
1766                  * there's no node for ath10k.
1767                  */
1768                 return -ENOENT;
1769
1770         if (!of_get_property(node, dt_name, &data_len)) {
1771                 /* The calibration data node is optional */
1772                 return -ENOENT;
1773         }
1774
1775         if (data_len != ar->hw_params.cal_data_len) {
1776                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1777                             data_len);
1778                 ret = -EMSGSIZE;
1779                 goto out;
1780         }
1781
1782         data = kmalloc(data_len, GFP_KERNEL);
1783         if (!data) {
1784                 ret = -ENOMEM;
1785                 goto out;
1786         }
1787
1788         ret = of_property_read_u8_array(node, dt_name, data, data_len);
1789         if (ret) {
1790                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1791                             ret);
1792                 goto out_free;
1793         }
1794
1795         ret = ath10k_download_board_data(ar, data, data_len);
1796         if (ret) {
1797                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1798                             ret);
1799                 goto out_free;
1800         }
1801
1802         ret = 0;
1803
1804 out_free:
1805         kfree(data);
1806
1807 out:
1808         return ret;
1809 }
1810
1811 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1812 {
1813         size_t data_len;
1814         void *data = NULL;
1815         int ret;
1816
1817         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1818         if (ret) {
1819                 if (ret != -EOPNOTSUPP)
1820                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1821                                     ret);
1822                 goto out_free;
1823         }
1824
1825         ret = ath10k_download_board_data(ar, data, data_len);
1826         if (ret) {
1827                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1828                             ret);
1829                 goto out_free;
1830         }
1831
1832         ret = 0;
1833
1834 out_free:
1835         kfree(data);
1836
1837         return ret;
1838 }
1839
1840 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1841                                      struct ath10k_fw_file *fw_file)
1842 {
1843         size_t magic_len, len, ie_len;
1844         int ie_id, i, index, bit, ret;
1845         struct ath10k_fw_ie *hdr;
1846         const u8 *data;
1847         __le32 *timestamp, *version;
1848
1849         /* first fetch the firmware file (firmware-*.bin) */
1850         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1851                                                  name);
1852         if (IS_ERR(fw_file->firmware))
1853                 return PTR_ERR(fw_file->firmware);
1854
1855         data = fw_file->firmware->data;
1856         len = fw_file->firmware->size;
1857
1858         /* magic also includes the null byte, check that as well */
1859         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1860
1861         if (len < magic_len) {
1862                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1863                            ar->hw_params.fw.dir, name, len);
1864                 ret = -EINVAL;
1865                 goto err;
1866         }
1867
1868         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1869                 ath10k_err(ar, "invalid firmware magic\n");
1870                 ret = -EINVAL;
1871                 goto err;
1872         }
1873
1874         /* jump over the padding */
1875         magic_len = ALIGN(magic_len, 4);
1876
1877         len -= magic_len;
1878         data += magic_len;
1879
1880         /* loop elements */
1881         while (len > sizeof(struct ath10k_fw_ie)) {
1882                 hdr = (struct ath10k_fw_ie *)data;
1883
1884                 ie_id = le32_to_cpu(hdr->id);
1885                 ie_len = le32_to_cpu(hdr->len);
1886
1887                 len -= sizeof(*hdr);
1888                 data += sizeof(*hdr);
1889
1890                 if (len < ie_len) {
1891                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1892                                    ie_id, len, ie_len);
1893                         ret = -EINVAL;
1894                         goto err;
1895                 }
1896
1897                 switch (ie_id) {
1898                 case ATH10K_FW_IE_FW_VERSION:
1899                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1900                                 break;
1901
1902                         memcpy(fw_file->fw_version, data, ie_len);
1903                         fw_file->fw_version[ie_len] = '\0';
1904
1905                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1906                                    "found fw version %s\n",
1907                                     fw_file->fw_version);
1908                         break;
1909                 case ATH10K_FW_IE_TIMESTAMP:
1910                         if (ie_len != sizeof(u32))
1911                                 break;
1912
1913                         timestamp = (__le32 *)data;
1914
1915                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1916                                    le32_to_cpup(timestamp));
1917                         break;
1918                 case ATH10K_FW_IE_FEATURES:
1919                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1920                                    "found firmware features ie (%zd B)\n",
1921                                    ie_len);
1922
1923                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1924                                 index = i / 8;
1925                                 bit = i % 8;
1926
1927                                 if (index == ie_len)
1928                                         break;
1929
1930                                 if (data[index] & (1 << bit)) {
1931                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1932                                                    "Enabling feature bit: %i\n",
1933                                                    i);
1934                                         __set_bit(i, fw_file->fw_features);
1935                                 }
1936                         }
1937
1938                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1939                                         fw_file->fw_features,
1940                                         sizeof(fw_file->fw_features));
1941                         break;
1942                 case ATH10K_FW_IE_FW_IMAGE:
1943                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1944                                    "found fw image ie (%zd B)\n",
1945                                    ie_len);
1946
1947                         fw_file->firmware_data = data;
1948                         fw_file->firmware_len = ie_len;
1949
1950                         break;
1951                 case ATH10K_FW_IE_OTP_IMAGE:
1952                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1953                                    "found otp image ie (%zd B)\n",
1954                                    ie_len);
1955
1956                         fw_file->otp_data = data;
1957                         fw_file->otp_len = ie_len;
1958
1959                         break;
1960                 case ATH10K_FW_IE_WMI_OP_VERSION:
1961                         if (ie_len != sizeof(u32))
1962                                 break;
1963
1964                         version = (__le32 *)data;
1965
1966                         fw_file->wmi_op_version = le32_to_cpup(version);
1967
1968                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1969                                    fw_file->wmi_op_version);
1970                         break;
1971                 case ATH10K_FW_IE_HTT_OP_VERSION:
1972                         if (ie_len != sizeof(u32))
1973                                 break;
1974
1975                         version = (__le32 *)data;
1976
1977                         fw_file->htt_op_version = le32_to_cpup(version);
1978
1979                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1980                                    fw_file->htt_op_version);
1981                         break;
1982                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1983                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1984                                    "found fw code swap image ie (%zd B)\n",
1985                                    ie_len);
1986                         fw_file->codeswap_data = data;
1987                         fw_file->codeswap_len = ie_len;
1988                         break;
1989                 default:
1990                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1991                                     le32_to_cpu(hdr->id));
1992                         break;
1993                 }
1994
1995                 /* jump over the padding */
1996                 ie_len = ALIGN(ie_len, 4);
1997
1998                 len -= ie_len;
1999                 data += ie_len;
2000         }
2001
2002         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2003             (!fw_file->firmware_data || !fw_file->firmware_len)) {
2004                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2005                             ar->hw_params.fw.dir, name);
2006                 ret = -ENOMEDIUM;
2007                 goto err;
2008         }
2009
2010         return 0;
2011
2012 err:
2013         ath10k_core_free_firmware_files(ar);
2014         return ret;
2015 }
2016
2017 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2018                                     size_t fw_name_len, int fw_api)
2019 {
2020         switch (ar->hif.bus) {
2021         case ATH10K_BUS_SDIO:
2022         case ATH10K_BUS_USB:
2023                 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2024                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2025                           fw_api);
2026                 break;
2027         case ATH10K_BUS_PCI:
2028         case ATH10K_BUS_AHB:
2029         case ATH10K_BUS_SNOC:
2030                 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2031                           ATH10K_FW_FILE_BASE, fw_api);
2032                 break;
2033         }
2034 }
2035
2036 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2037 {
2038         int ret, i;
2039         char fw_name[100];
2040
2041         /* calibration file is optional, don't check for any errors */
2042         ath10k_fetch_cal_file(ar);
2043
2044         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2045                 ar->fw_api = i;
2046                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2047                            ar->fw_api);
2048
2049                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2050                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2051                                                        &ar->normal_mode_fw.fw_file);
2052                 if (!ret)
2053                         goto success;
2054         }
2055
2056         /* we end up here if we couldn't fetch any firmware */
2057
2058         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2059                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2060                    ret);
2061
2062         return ret;
2063
2064 success:
2065         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2066
2067         return 0;
2068 }
2069
2070 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2071 {
2072         int ret;
2073
2074         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2075         if (ret == 0) {
2076                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2077                 goto success;
2078         }
2079
2080         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2081                    "boot did not find a pre calibration file, try DT next: %d\n",
2082                    ret);
2083
2084         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2085         if (ret) {
2086                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2087                            "unable to load pre cal data from DT: %d\n", ret);
2088                 return ret;
2089         }
2090         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2091
2092 success:
2093         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2094                    ath10k_cal_mode_str(ar->cal_mode));
2095
2096         return 0;
2097 }
2098
2099 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2100 {
2101         int ret;
2102
2103         ret = ath10k_core_pre_cal_download(ar);
2104         if (ret) {
2105                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2106                            "failed to load pre cal data: %d\n", ret);
2107                 return ret;
2108         }
2109
2110         ret = ath10k_core_get_board_id_from_otp(ar);
2111         if (ret) {
2112                 ath10k_err(ar, "failed to get board id: %d\n", ret);
2113                 return ret;
2114         }
2115
2116         ret = ath10k_download_and_run_otp(ar);
2117         if (ret) {
2118                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2119                 return ret;
2120         }
2121
2122         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2123                    "pre cal configuration done successfully\n");
2124
2125         return 0;
2126 }
2127
2128 static int ath10k_download_cal_data(struct ath10k *ar)
2129 {
2130         int ret;
2131
2132         ret = ath10k_core_pre_cal_config(ar);
2133         if (ret == 0)
2134                 return 0;
2135
2136         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2137                    "pre cal download procedure failed, try cal file: %d\n",
2138                    ret);
2139
2140         ret = ath10k_download_cal_file(ar, ar->cal_file);
2141         if (ret == 0) {
2142                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2143                 goto done;
2144         }
2145
2146         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2147                    "boot did not find a calibration file, try DT next: %d\n",
2148                    ret);
2149
2150         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2151         if (ret == 0) {
2152                 ar->cal_mode = ATH10K_CAL_MODE_DT;
2153                 goto done;
2154         }
2155
2156         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2157                    "boot did not find DT entry, try target EEPROM next: %d\n",
2158                    ret);
2159
2160         ret = ath10k_download_cal_eeprom(ar);
2161         if (ret == 0) {
2162                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2163                 goto done;
2164         }
2165
2166         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2167                    "boot did not find target EEPROM entry, try OTP next: %d\n",
2168                    ret);
2169
2170         ret = ath10k_download_and_run_otp(ar);
2171         if (ret) {
2172                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2173                 return ret;
2174         }
2175
2176         ar->cal_mode = ATH10K_CAL_MODE_OTP;
2177
2178 done:
2179         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2180                    ath10k_cal_mode_str(ar->cal_mode));
2181         return 0;
2182 }
2183
2184 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2185 {
2186         struct device_node *node;
2187         u8 coex_support = 0;
2188         int ret;
2189
2190         node = ar->dev->of_node;
2191         if (!node)
2192                 goto out;
2193
2194         ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2195         if (ret) {
2196                 ar->coex_support = true;
2197                 goto out;
2198         }
2199
2200         if (coex_support) {
2201                 ar->coex_support = true;
2202         } else {
2203                 ar->coex_support = false;
2204                 ar->coex_gpio_pin = -1;
2205                 goto out;
2206         }
2207
2208         ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2209                                    &ar->coex_gpio_pin);
2210         if (ret)
2211                 ar->coex_gpio_pin = -1;
2212
2213 out:
2214         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2215                    ar->coex_support, ar->coex_gpio_pin);
2216 }
2217
2218 static int ath10k_init_uart(struct ath10k *ar)
2219 {
2220         int ret;
2221
2222         /*
2223          * Explicitly setting UART prints to zero as target turns it on
2224          * based on scratch registers.
2225          */
2226         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2227         if (ret) {
2228                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2229                 return ret;
2230         }
2231
2232         if (!uart_print) {
2233                 if (ar->hw_params.uart_pin_workaround) {
2234                         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2235                                                  ar->hw_params.uart_pin);
2236                         if (ret) {
2237                                 ath10k_warn(ar, "failed to set UART TX pin: %d",
2238                                             ret);
2239                                 return ret;
2240                         }
2241                 }
2242
2243                 return 0;
2244         }
2245
2246         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2247         if (ret) {
2248                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2249                 return ret;
2250         }
2251
2252         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2253         if (ret) {
2254                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2255                 return ret;
2256         }
2257
2258         /* Set the UART baud rate to 19200. */
2259         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2260         if (ret) {
2261                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2262                 return ret;
2263         }
2264
2265         ath10k_info(ar, "UART prints enabled\n");
2266         return 0;
2267 }
2268
2269 static int ath10k_init_hw_params(struct ath10k *ar)
2270 {
2271         const struct ath10k_hw_params *hw_params;
2272         int i;
2273
2274         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2275                 hw_params = &ath10k_hw_params_list[i];
2276
2277                 if (hw_params->bus == ar->hif.bus &&
2278                     hw_params->id == ar->target_version &&
2279                     hw_params->dev_id == ar->dev_id)
2280                         break;
2281         }
2282
2283         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2284                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2285                            ar->target_version);
2286                 return -EINVAL;
2287         }
2288
2289         ar->hw_params = *hw_params;
2290
2291         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2292                    ar->hw_params.name, ar->target_version);
2293
2294         return 0;
2295 }
2296
2297 void ath10k_core_start_recovery(struct ath10k *ar)
2298 {
2299         if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) {
2300                 ath10k_warn(ar, "already restarting\n");
2301                 return;
2302         }
2303
2304         queue_work(ar->workqueue, &ar->restart_work);
2305 }
2306 EXPORT_SYMBOL(ath10k_core_start_recovery);
2307
2308 static void ath10k_core_restart(struct work_struct *work)
2309 {
2310         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2311         int ret;
2312
2313         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2314
2315         /* Place a barrier to make sure the compiler doesn't reorder
2316          * CRASH_FLUSH and calling other functions.
2317          */
2318         barrier();
2319
2320         ieee80211_stop_queues(ar->hw);
2321         ath10k_drain_tx(ar);
2322         complete(&ar->scan.started);
2323         complete(&ar->scan.completed);
2324         complete(&ar->scan.on_channel);
2325         complete(&ar->offchan_tx_completed);
2326         complete(&ar->install_key_done);
2327         complete(&ar->vdev_setup_done);
2328         complete(&ar->vdev_delete_done);
2329         complete(&ar->thermal.wmi_sync);
2330         complete(&ar->bss_survey_done);
2331         wake_up(&ar->htt.empty_tx_wq);
2332         wake_up(&ar->wmi.tx_credits_wq);
2333         wake_up(&ar->peer_mapping_wq);
2334
2335         /* TODO: We can have one instance of cancelling coverage_class_work by
2336          * moving it to ath10k_halt(), so that both stop() and restart() would
2337          * call that but it takes conf_mutex() and if we call cancel_work_sync()
2338          * with conf_mutex it will deadlock.
2339          */
2340         cancel_work_sync(&ar->set_coverage_class_work);
2341
2342         mutex_lock(&ar->conf_mutex);
2343
2344         switch (ar->state) {
2345         case ATH10K_STATE_ON:
2346                 ar->state = ATH10K_STATE_RESTARTING;
2347                 ath10k_halt(ar);
2348                 ath10k_scan_finish(ar);
2349                 ieee80211_restart_hw(ar->hw);
2350                 break;
2351         case ATH10K_STATE_OFF:
2352                 /* this can happen if driver is being unloaded
2353                  * or if the crash happens during FW probing
2354                  */
2355                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2356                 break;
2357         case ATH10K_STATE_RESTARTING:
2358                 /* hw restart might be requested from multiple places */
2359                 break;
2360         case ATH10K_STATE_RESTARTED:
2361                 ar->state = ATH10K_STATE_WEDGED;
2362                 fallthrough;
2363         case ATH10K_STATE_WEDGED:
2364                 ath10k_warn(ar, "device is wedged, will not restart\n");
2365                 break;
2366         case ATH10K_STATE_UTF:
2367                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2368                 break;
2369         }
2370
2371         mutex_unlock(&ar->conf_mutex);
2372
2373         ret = ath10k_coredump_submit(ar);
2374         if (ret)
2375                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2376                             ret);
2377
2378         complete(&ar->driver_recovery);
2379 }
2380
2381 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2382 {
2383         struct ath10k *ar = container_of(work, struct ath10k,
2384                                          set_coverage_class_work);
2385
2386         if (ar->hw_params.hw_ops->set_coverage_class)
2387                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2388 }
2389
2390 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2391 {
2392         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2393         int max_num_peers;
2394
2395         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2396             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2397                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2398                 return -EINVAL;
2399         }
2400
2401         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2402                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2403                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2404                 return -EINVAL;
2405         }
2406
2407         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2408         switch (ath10k_cryptmode_param) {
2409         case ATH10K_CRYPT_MODE_HW:
2410                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2411                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2412                 break;
2413         case ATH10K_CRYPT_MODE_SW:
2414                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2415                               fw_file->fw_features)) {
2416                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2417                         return -EINVAL;
2418                 }
2419
2420                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2421                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2422                 break;
2423         default:
2424                 ath10k_info(ar, "invalid cryptmode: %d\n",
2425                             ath10k_cryptmode_param);
2426                 return -EINVAL;
2427         }
2428
2429         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2430         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2431
2432         if (rawmode) {
2433                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2434                               fw_file->fw_features)) {
2435                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
2436                         return -EINVAL;
2437                 }
2438                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2439         }
2440
2441         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2442                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2443
2444                 /* Workaround:
2445                  *
2446                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2447                  * and causes enormous performance issues (malformed frames,
2448                  * etc).
2449                  *
2450                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
2451                  * albeit a bit slower compared to regular operation.
2452                  */
2453                 ar->htt.max_num_amsdu = 1;
2454         }
2455
2456         /* Backwards compatibility for firmwares without
2457          * ATH10K_FW_IE_WMI_OP_VERSION.
2458          */
2459         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2460                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2461                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2462                                      fw_file->fw_features))
2463                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2464                         else
2465                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2466                 } else {
2467                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2468                 }
2469         }
2470
2471         switch (fw_file->wmi_op_version) {
2472         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2473                 max_num_peers = TARGET_NUM_PEERS;
2474                 ar->max_num_stations = TARGET_NUM_STATIONS;
2475                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2476                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2477                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2478                         WMI_STAT_PEER;
2479                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2480                 break;
2481         case ATH10K_FW_WMI_OP_VERSION_10_1:
2482         case ATH10K_FW_WMI_OP_VERSION_10_2:
2483         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2484                 if (ath10k_peer_stats_enabled(ar)) {
2485                         max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2486                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2487                 } else {
2488                         max_num_peers = TARGET_10X_NUM_PEERS;
2489                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2490                 }
2491                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2492                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2493                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2494                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2495                 break;
2496         case ATH10K_FW_WMI_OP_VERSION_TLV:
2497                 max_num_peers = TARGET_TLV_NUM_PEERS;
2498                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2499                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2500                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2501                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2502                         ar->htt.max_num_pending_tx =
2503                                 TARGET_TLV_NUM_MSDU_DESC_HL;
2504                 else
2505                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2506                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2507                 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2508                         WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2509                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2510                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2511                 break;
2512         case ATH10K_FW_WMI_OP_VERSION_10_4:
2513                 max_num_peers = TARGET_10_4_NUM_PEERS;
2514                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2515                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2516                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2517                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2518                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2519                                         WMI_10_4_STAT_PEER_EXTD |
2520                                         WMI_10_4_STAT_VDEV_EXTD;
2521                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2522                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2523
2524                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2525                              fw_file->fw_features))
2526                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2527                 else
2528                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2529                 break;
2530         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2531         case ATH10K_FW_WMI_OP_VERSION_MAX:
2532         default:
2533                 WARN_ON(1);
2534                 return -EINVAL;
2535         }
2536
2537         if (ar->hw_params.num_peers)
2538                 ar->max_num_peers = ar->hw_params.num_peers;
2539         else
2540                 ar->max_num_peers = max_num_peers;
2541
2542         /* Backwards compatibility for firmwares without
2543          * ATH10K_FW_IE_HTT_OP_VERSION.
2544          */
2545         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2546                 switch (fw_file->wmi_op_version) {
2547                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2548                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2549                         break;
2550                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2551                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2552                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2553                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2554                         break;
2555                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2556                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2557                         break;
2558                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2559                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2560                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2561                         ath10k_err(ar, "htt op version not found from fw meta data");
2562                         return -EINVAL;
2563                 }
2564         }
2565
2566         return 0;
2567 }
2568
2569 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2570 {
2571         int ret;
2572         int vdev_id;
2573         int vdev_type;
2574         int vdev_subtype;
2575         const u8 *vdev_addr;
2576
2577         vdev_id = 0;
2578         vdev_type = WMI_VDEV_TYPE_STA;
2579         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2580         vdev_addr = ar->mac_addr;
2581
2582         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2583                                      vdev_addr);
2584         if (ret) {
2585                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2586                 return ret;
2587         }
2588
2589         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2590         if (ret) {
2591                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2592                 return ret;
2593         }
2594
2595         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2596          * serialized properly implicitly.
2597          *
2598          * Moreover (most) WMI commands have no explicit acknowledges. It is
2599          * possible to infer it implicitly by poking firmware with echo
2600          * command - getting a reply means all preceding comments have been
2601          * (mostly) processed.
2602          *
2603          * In case of vdev create/delete this is sufficient.
2604          *
2605          * Without this it's possible to end up with a race when HTT Rx ring is
2606          * started before vdev create/delete hack is complete allowing a short
2607          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2608          */
2609         ret = ath10k_wmi_barrier(ar);
2610         if (ret) {
2611                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2612                 return ret;
2613         }
2614
2615         return 0;
2616 }
2617
2618 static int ath10k_core_compat_services(struct ath10k *ar)
2619 {
2620         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2621
2622         /* all 10.x firmware versions support thermal throttling but don't
2623          * advertise the support via service flags so we have to hardcode
2624          * it here
2625          */
2626         switch (fw_file->wmi_op_version) {
2627         case ATH10K_FW_WMI_OP_VERSION_10_1:
2628         case ATH10K_FW_WMI_OP_VERSION_10_2:
2629         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2630         case ATH10K_FW_WMI_OP_VERSION_10_4:
2631                 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2632                 break;
2633         default:
2634                 break;
2635         }
2636
2637         return 0;
2638 }
2639
2640 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2641
2642 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2643 {
2644         const struct ath10k_hw_mem_layout *hw_mem;
2645         const struct ath10k_mem_region *tmp, *mem_region = NULL;
2646         dma_addr_t paddr;
2647         void *vaddr = NULL;
2648         u8 num_read_itr;
2649         int i, ret;
2650         u32 len, remaining_len;
2651
2652         hw_mem = ath10k_coredump_get_mem_layout(ar);
2653         if (!hw_mem)
2654                 return -ENOMEM;
2655
2656         for (i = 0; i < hw_mem->region_table.size; i++) {
2657                 tmp = &hw_mem->region_table.regions[i];
2658                 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
2659                         mem_region = tmp;
2660                         break;
2661                 }
2662         }
2663
2664         if (!mem_region)
2665                 return -ENOMEM;
2666
2667         for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2668                 if (ar->wmi.mem_chunks[i].req_id ==
2669                     WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
2670                         vaddr = ar->wmi.mem_chunks[i].vaddr;
2671                         len = ar->wmi.mem_chunks[i].len;
2672                         break;
2673                 }
2674         }
2675
2676         if (!vaddr || !len) {
2677                 ath10k_warn(ar, "No allocated memory for IRAM back up");
2678                 return -ENOMEM;
2679         }
2680
2681         len = (len < mem_region->len) ? len : mem_region->len;
2682         paddr = mem_region->start;
2683         num_read_itr = len / TGT_IRAM_READ_PER_ITR;
2684         remaining_len = len % TGT_IRAM_READ_PER_ITR;
2685         for (i = 0; i < num_read_itr; i++) {
2686                 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
2687                                            TGT_IRAM_READ_PER_ITR);
2688                 if (ret) {
2689                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2690                                     ret);
2691                         return ret;
2692                 }
2693
2694                 paddr += TGT_IRAM_READ_PER_ITR;
2695                 vaddr += TGT_IRAM_READ_PER_ITR;
2696         }
2697
2698         if (remaining_len) {
2699                 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
2700                 if (ret) {
2701                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2702                                     ret);
2703                         return ret;
2704                 }
2705         }
2706
2707         ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
2708
2709         return 0;
2710 }
2711
2712 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2713                       const struct ath10k_fw_components *fw)
2714 {
2715         int status;
2716         u32 val;
2717
2718         lockdep_assert_held(&ar->conf_mutex);
2719
2720         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2721
2722         ar->running_fw = fw;
2723
2724         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2725                       ar->running_fw->fw_file.fw_features)) {
2726                 ath10k_bmi_start(ar);
2727
2728                 /* Enable hardware clock to speed up firmware download */
2729                 if (ar->hw_params.hw_ops->enable_pll_clk) {
2730                         status = ar->hw_params.hw_ops->enable_pll_clk(ar);
2731                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
2732                                    status);
2733                 }
2734
2735                 if (ath10k_init_configure_target(ar)) {
2736                         status = -EINVAL;
2737                         goto err;
2738                 }
2739
2740                 status = ath10k_download_cal_data(ar);
2741                 if (status)
2742                         goto err;
2743
2744                 /* Some of qca988x solutions are having global reset issue
2745                  * during target initialization. Bypassing PLL setting before
2746                  * downloading firmware and letting the SoC run on REF_CLK is
2747                  * fixing the problem. Corresponding firmware change is also
2748                  * needed to set the clock source once the target is
2749                  * initialized.
2750                  */
2751                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2752                              ar->running_fw->fw_file.fw_features)) {
2753                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2754                         if (status) {
2755                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2756                                            status);
2757                                 goto err;
2758                         }
2759                 }
2760
2761                 status = ath10k_download_fw(ar);
2762                 if (status)
2763                         goto err;
2764
2765                 status = ath10k_init_uart(ar);
2766                 if (status)
2767                         goto err;
2768
2769                 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2770                         status = ath10k_init_sdio(ar, mode);
2771                         if (status) {
2772                                 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2773                                 goto err;
2774                         }
2775                 }
2776         }
2777
2778         ar->htc.htc_ops.target_send_suspend_complete =
2779                 ath10k_send_suspend_complete;
2780
2781         status = ath10k_htc_init(ar);
2782         if (status) {
2783                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2784                 goto err;
2785         }
2786
2787         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2788                       ar->running_fw->fw_file.fw_features)) {
2789                 status = ath10k_bmi_done(ar);
2790                 if (status)
2791                         goto err;
2792         }
2793
2794         status = ath10k_wmi_attach(ar);
2795         if (status) {
2796                 ath10k_err(ar, "WMI attach failed: %d\n", status);
2797                 goto err;
2798         }
2799
2800         status = ath10k_htt_init(ar);
2801         if (status) {
2802                 ath10k_err(ar, "failed to init htt: %d\n", status);
2803                 goto err_wmi_detach;
2804         }
2805
2806         status = ath10k_htt_tx_start(&ar->htt);
2807         if (status) {
2808                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2809                 goto err_wmi_detach;
2810         }
2811
2812         /* If firmware indicates Full Rx Reorder support it must be used in a
2813          * slightly different manner. Let HTT code know.
2814          */
2815         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2816                                                 ar->wmi.svc_map));
2817
2818         status = ath10k_htt_rx_alloc(&ar->htt);
2819         if (status) {
2820                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2821                 goto err_htt_tx_detach;
2822         }
2823
2824         status = ath10k_hif_start(ar);
2825         if (status) {
2826                 ath10k_err(ar, "could not start HIF: %d\n", status);
2827                 goto err_htt_rx_detach;
2828         }
2829
2830         status = ath10k_htc_wait_target(&ar->htc);
2831         if (status) {
2832                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2833                 goto err_hif_stop;
2834         }
2835
2836         status = ath10k_hif_start_post(ar);
2837         if (status) {
2838                 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2839                 goto err_hif_stop;
2840         }
2841
2842         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2843                 status = ath10k_htt_connect(&ar->htt);
2844                 if (status) {
2845                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
2846                         goto err_hif_stop;
2847                 }
2848         }
2849
2850         status = ath10k_wmi_connect(ar);
2851         if (status) {
2852                 ath10k_err(ar, "could not connect wmi: %d\n", status);
2853                 goto err_hif_stop;
2854         }
2855
2856         status = ath10k_htc_start(&ar->htc);
2857         if (status) {
2858                 ath10k_err(ar, "failed to start htc: %d\n", status);
2859                 goto err_hif_stop;
2860         }
2861
2862         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2863                 status = ath10k_wmi_wait_for_service_ready(ar);
2864                 if (status) {
2865                         ath10k_warn(ar, "wmi service ready event not received");
2866                         goto err_hif_stop;
2867                 }
2868         }
2869
2870         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2871                    ar->hw->wiphy->fw_version);
2872
2873         if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
2874                      ar->running_fw->fw_file.fw_features)) {
2875                 status = ath10k_core_copy_target_iram(ar);
2876                 if (status) {
2877                         ath10k_warn(ar, "failed to copy target iram contents: %d",
2878                                     status);
2879                         goto err_hif_stop;
2880                 }
2881         }
2882
2883         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2884             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2885                 val = 0;
2886                 if (ath10k_peer_stats_enabled(ar))
2887                         val = WMI_10_4_PEER_STATS;
2888
2889                 /* Enable vdev stats by default */
2890                 val |= WMI_10_4_VDEV_STATS;
2891
2892                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2893                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2894
2895                 ath10k_core_fetch_btcoex_dt(ar);
2896
2897                 /* 10.4 firmware supports BT-Coex without reloading firmware
2898                  * via pdev param. To support Bluetooth coexistence pdev param,
2899                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2900                  * enabled always.
2901                  *
2902                  * We can still enable BTCOEX if firmware has the support
2903                  * eventhough btceox_support value is
2904                  * ATH10K_DT_BTCOEX_NOT_FOUND
2905                  */
2906
2907                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2908                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2909                              ar->running_fw->fw_file.fw_features) &&
2910                     ar->coex_support)
2911                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
2912
2913                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2914                              ar->wmi.svc_map))
2915                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2916
2917                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2918                              ar->wmi.svc_map))
2919                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2920
2921                 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2922                              ar->wmi.svc_map))
2923                         val |= WMI_10_4_TX_DATA_ACK_RSSI;
2924
2925                 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2926                         val |= WMI_10_4_REPORT_AIRTIME;
2927
2928                 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
2929                              ar->wmi.svc_map))
2930                         val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
2931
2932                 status = ath10k_mac_ext_resource_config(ar, val);
2933                 if (status) {
2934                         ath10k_err(ar,
2935                                    "failed to send ext resource cfg command : %d\n",
2936                                    status);
2937                         goto err_hif_stop;
2938                 }
2939         }
2940
2941         status = ath10k_wmi_cmd_init(ar);
2942         if (status) {
2943                 ath10k_err(ar, "could not send WMI init command (%d)\n",
2944                            status);
2945                 goto err_hif_stop;
2946         }
2947
2948         status = ath10k_wmi_wait_for_unified_ready(ar);
2949         if (status) {
2950                 ath10k_err(ar, "wmi unified ready event not received\n");
2951                 goto err_hif_stop;
2952         }
2953
2954         status = ath10k_core_compat_services(ar);
2955         if (status) {
2956                 ath10k_err(ar, "compat services failed: %d\n", status);
2957                 goto err_hif_stop;
2958         }
2959
2960         status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2961         if (status && status != -EOPNOTSUPP) {
2962                 ath10k_err(ar,
2963                            "failed to set base mac address: %d\n", status);
2964                 goto err_hif_stop;
2965         }
2966
2967         /* Some firmware revisions do not properly set up hardware rx filter
2968          * registers.
2969          *
2970          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2971          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2972          * any frames that matches MAC_PCU_RX_FILTER which is also
2973          * misconfigured to accept anything.
2974          *
2975          * The ADDR1 is programmed using internal firmware structure field and
2976          * can't be (easily/sanely) reached from the driver explicitly. It is
2977          * possible to implicitly make it correct by creating a dummy vdev and
2978          * then deleting it.
2979          */
2980         if (ar->hw_params.hw_filter_reset_required &&
2981             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2982                 status = ath10k_core_reset_rx_filter(ar);
2983                 if (status) {
2984                         ath10k_err(ar,
2985                                    "failed to reset rx filter: %d\n", status);
2986                         goto err_hif_stop;
2987                 }
2988         }
2989
2990         status = ath10k_htt_rx_ring_refill(ar);
2991         if (status) {
2992                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2993                 goto err_hif_stop;
2994         }
2995
2996         if (ar->max_num_vdevs >= 64)
2997                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2998         else
2999                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3000
3001         INIT_LIST_HEAD(&ar->arvifs);
3002
3003         /* we don't care about HTT in UTF mode */
3004         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3005                 status = ath10k_htt_setup(&ar->htt);
3006                 if (status) {
3007                         ath10k_err(ar, "failed to setup htt: %d\n", status);
3008                         goto err_hif_stop;
3009                 }
3010         }
3011
3012         status = ath10k_debug_start(ar);
3013         if (status)
3014                 goto err_hif_stop;
3015
3016         status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3017         if (status && status != -EOPNOTSUPP) {
3018                 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3019                 goto err_hif_stop;
3020         }
3021
3022         return 0;
3023
3024 err_hif_stop:
3025         ath10k_hif_stop(ar);
3026 err_htt_rx_detach:
3027         ath10k_htt_rx_free(&ar->htt);
3028 err_htt_tx_detach:
3029         ath10k_htt_tx_free(&ar->htt);
3030 err_wmi_detach:
3031         ath10k_wmi_detach(ar);
3032 err:
3033         return status;
3034 }
3035 EXPORT_SYMBOL(ath10k_core_start);
3036
3037 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3038 {
3039         int ret;
3040         unsigned long time_left;
3041
3042         reinit_completion(&ar->target_suspend);
3043
3044         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3045         if (ret) {
3046                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3047                 return ret;
3048         }
3049
3050         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3051
3052         if (!time_left) {
3053                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3054                 return -ETIMEDOUT;
3055         }
3056
3057         return 0;
3058 }
3059
3060 void ath10k_core_stop(struct ath10k *ar)
3061 {
3062         lockdep_assert_held(&ar->conf_mutex);
3063         ath10k_debug_stop(ar);
3064
3065         /* try to suspend target */
3066         if (ar->state != ATH10K_STATE_RESTARTING &&
3067             ar->state != ATH10K_STATE_UTF)
3068                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3069
3070         ath10k_hif_stop(ar);
3071         ath10k_htt_tx_stop(&ar->htt);
3072         ath10k_htt_rx_free(&ar->htt);
3073         ath10k_wmi_detach(ar);
3074
3075         ar->id.bmi_ids_valid = false;
3076 }
3077 EXPORT_SYMBOL(ath10k_core_stop);
3078
3079 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3080  * order to know what hw capabilities should be advertised to mac80211 it is
3081  * necessary to load the firmware (and tear it down immediately since start
3082  * hook will try to init it again) before registering
3083  */
3084 static int ath10k_core_probe_fw(struct ath10k *ar)
3085 {
3086         struct bmi_target_info target_info;
3087         int ret = 0;
3088
3089         ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3090         if (ret) {
3091                 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3092                 return ret;
3093         }
3094
3095         switch (ar->hif.bus) {
3096         case ATH10K_BUS_SDIO:
3097                 memset(&target_info, 0, sizeof(target_info));
3098                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3099                 if (ret) {
3100                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3101                         goto err_power_down;
3102                 }
3103                 ar->target_version = target_info.version;
3104                 ar->hw->wiphy->hw_version = target_info.version;
3105                 break;
3106         case ATH10K_BUS_PCI:
3107         case ATH10K_BUS_AHB:
3108         case ATH10K_BUS_USB:
3109                 memset(&target_info, 0, sizeof(target_info));
3110                 ret = ath10k_bmi_get_target_info(ar, &target_info);
3111                 if (ret) {
3112                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3113                         goto err_power_down;
3114                 }
3115                 ar->target_version = target_info.version;
3116                 ar->hw->wiphy->hw_version = target_info.version;
3117                 break;
3118         case ATH10K_BUS_SNOC:
3119                 memset(&target_info, 0, sizeof(target_info));
3120                 ret = ath10k_hif_get_target_info(ar, &target_info);
3121                 if (ret) {
3122                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3123                         goto err_power_down;
3124                 }
3125                 ar->target_version = target_info.version;
3126                 ar->hw->wiphy->hw_version = target_info.version;
3127                 break;
3128         default:
3129                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3130         }
3131
3132         ret = ath10k_init_hw_params(ar);
3133         if (ret) {
3134                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3135                 goto err_power_down;
3136         }
3137
3138         ret = ath10k_core_fetch_firmware_files(ar);
3139         if (ret) {
3140                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3141                 goto err_power_down;
3142         }
3143
3144         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3145                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
3146         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3147                sizeof(ar->hw->wiphy->fw_version));
3148
3149         ath10k_debug_print_hwfw_info(ar);
3150
3151         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3152                       ar->normal_mode_fw.fw_file.fw_features)) {
3153                 ret = ath10k_core_pre_cal_download(ar);
3154                 if (ret) {
3155                         /* pre calibration data download is not necessary
3156                          * for all the chipsets. Ignore failures and continue.
3157                          */
3158                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
3159                                    "could not load pre cal data: %d\n", ret);
3160                 }
3161
3162                 ret = ath10k_core_get_board_id_from_otp(ar);
3163                 if (ret && ret != -EOPNOTSUPP) {
3164                         ath10k_err(ar, "failed to get board id from otp: %d\n",
3165                                    ret);
3166                         goto err_free_firmware_files;
3167                 }
3168
3169                 ret = ath10k_core_check_smbios(ar);
3170                 if (ret)
3171                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3172
3173                 ret = ath10k_core_check_dt(ar);
3174                 if (ret)
3175                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3176
3177                 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3178                 if (ret) {
3179                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3180                         goto err_free_firmware_files;
3181                 }
3182
3183                 ath10k_debug_print_board_info(ar);
3184         }
3185
3186         device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
3187
3188         ret = ath10k_core_init_firmware_features(ar);
3189         if (ret) {
3190                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3191                            ret);
3192                 goto err_free_firmware_files;
3193         }
3194
3195         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3196                       ar->normal_mode_fw.fw_file.fw_features)) {
3197                 ret = ath10k_swap_code_seg_init(ar,
3198                                                 &ar->normal_mode_fw.fw_file);
3199                 if (ret) {
3200                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3201                                    ret);
3202                         goto err_free_firmware_files;
3203                 }
3204         }
3205
3206         mutex_lock(&ar->conf_mutex);
3207
3208         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3209                                 &ar->normal_mode_fw);
3210         if (ret) {
3211                 ath10k_err(ar, "could not init core (%d)\n", ret);
3212                 goto err_unlock;
3213         }
3214
3215         ath10k_debug_print_boot_info(ar);
3216         ath10k_core_stop(ar);
3217
3218         mutex_unlock(&ar->conf_mutex);
3219
3220         ath10k_hif_power_down(ar);
3221         return 0;
3222
3223 err_unlock:
3224         mutex_unlock(&ar->conf_mutex);
3225
3226 err_free_firmware_files:
3227         ath10k_core_free_firmware_files(ar);
3228
3229 err_power_down:
3230         ath10k_hif_power_down(ar);
3231
3232         return ret;
3233 }
3234
3235 static void ath10k_core_register_work(struct work_struct *work)
3236 {
3237         struct ath10k *ar = container_of(work, struct ath10k, register_work);
3238         int status;
3239
3240         /* peer stats are enabled by default */
3241         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3242
3243         status = ath10k_core_probe_fw(ar);
3244         if (status) {
3245                 ath10k_err(ar, "could not probe fw (%d)\n", status);
3246                 goto err;
3247         }
3248
3249         status = ath10k_mac_register(ar);
3250         if (status) {
3251                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3252                 goto err_release_fw;
3253         }
3254
3255         status = ath10k_coredump_register(ar);
3256         if (status) {
3257                 ath10k_err(ar, "unable to register coredump\n");
3258                 goto err_unregister_mac;
3259         }
3260
3261         status = ath10k_debug_register(ar);
3262         if (status) {
3263                 ath10k_err(ar, "unable to initialize debugfs\n");
3264                 goto err_unregister_coredump;
3265         }
3266
3267         status = ath10k_spectral_create(ar);
3268         if (status) {
3269                 ath10k_err(ar, "failed to initialize spectral\n");
3270                 goto err_debug_destroy;
3271         }
3272
3273         status = ath10k_thermal_register(ar);
3274         if (status) {
3275                 ath10k_err(ar, "could not register thermal device: %d\n",
3276                            status);
3277                 goto err_spectral_destroy;
3278         }
3279
3280         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3281         return;
3282
3283 err_spectral_destroy:
3284         ath10k_spectral_destroy(ar);
3285 err_debug_destroy:
3286         ath10k_debug_destroy(ar);
3287 err_unregister_coredump:
3288         ath10k_coredump_unregister(ar);
3289 err_unregister_mac:
3290         ath10k_mac_unregister(ar);
3291 err_release_fw:
3292         ath10k_core_free_firmware_files(ar);
3293 err:
3294         /* TODO: It's probably a good idea to release device from the driver
3295          * but calling device_release_driver() here will cause a deadlock.
3296          */
3297         return;
3298 }
3299
3300 int ath10k_core_register(struct ath10k *ar,
3301                          const struct ath10k_bus_params *bus_params)
3302 {
3303         ar->bus_param = *bus_params;
3304
3305         queue_work(ar->workqueue, &ar->register_work);
3306
3307         return 0;
3308 }
3309 EXPORT_SYMBOL(ath10k_core_register);
3310
3311 void ath10k_core_unregister(struct ath10k *ar)
3312 {
3313         cancel_work_sync(&ar->register_work);
3314
3315         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3316                 return;
3317
3318         ath10k_thermal_unregister(ar);
3319         /* Stop spectral before unregistering from mac80211 to remove the
3320          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3321          * would be already be free'd recursively, leading to a double free.
3322          */
3323         ath10k_spectral_destroy(ar);
3324
3325         /* We must unregister from mac80211 before we stop HTC and HIF.
3326          * Otherwise we will fail to submit commands to FW and mac80211 will be
3327          * unhappy about callback failures.
3328          */
3329         ath10k_mac_unregister(ar);
3330
3331         ath10k_testmode_destroy(ar);
3332
3333         ath10k_core_free_firmware_files(ar);
3334         ath10k_core_free_board_files(ar);
3335
3336         ath10k_debug_unregister(ar);
3337 }
3338 EXPORT_SYMBOL(ath10k_core_unregister);
3339
3340 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3341                                   enum ath10k_bus bus,
3342                                   enum ath10k_hw_rev hw_rev,
3343                                   const struct ath10k_hif_ops *hif_ops)
3344 {
3345         struct ath10k *ar;
3346         int ret;
3347
3348         ar = ath10k_mac_create(priv_size);
3349         if (!ar)
3350                 return NULL;
3351
3352         ar->ath_common.priv = ar;
3353         ar->ath_common.hw = ar->hw;
3354         ar->dev = dev;
3355         ar->hw_rev = hw_rev;
3356         ar->hif.ops = hif_ops;
3357         ar->hif.bus = bus;
3358
3359         switch (hw_rev) {
3360         case ATH10K_HW_QCA988X:
3361         case ATH10K_HW_QCA9887:
3362                 ar->regs = &qca988x_regs;
3363                 ar->hw_ce_regs = &qcax_ce_regs;
3364                 ar->hw_values = &qca988x_values;
3365                 break;
3366         case ATH10K_HW_QCA6174:
3367         case ATH10K_HW_QCA9377:
3368                 ar->regs = &qca6174_regs;
3369                 ar->hw_ce_regs = &qcax_ce_regs;
3370                 ar->hw_values = &qca6174_values;
3371                 break;
3372         case ATH10K_HW_QCA99X0:
3373         case ATH10K_HW_QCA9984:
3374                 ar->regs = &qca99x0_regs;
3375                 ar->hw_ce_regs = &qcax_ce_regs;
3376                 ar->hw_values = &qca99x0_values;
3377                 break;
3378         case ATH10K_HW_QCA9888:
3379                 ar->regs = &qca99x0_regs;
3380                 ar->hw_ce_regs = &qcax_ce_regs;
3381                 ar->hw_values = &qca9888_values;
3382                 break;
3383         case ATH10K_HW_QCA4019:
3384                 ar->regs = &qca4019_regs;
3385                 ar->hw_ce_regs = &qcax_ce_regs;
3386                 ar->hw_values = &qca4019_values;
3387                 break;
3388         case ATH10K_HW_WCN3990:
3389                 ar->regs = &wcn3990_regs;
3390                 ar->hw_ce_regs = &wcn3990_ce_regs;
3391                 ar->hw_values = &wcn3990_values;
3392                 break;
3393         default:
3394                 ath10k_err(ar, "unsupported core hardware revision %d\n",
3395                            hw_rev);
3396                 ret = -ENOTSUPP;
3397                 goto err_free_mac;
3398         }
3399
3400         init_completion(&ar->scan.started);
3401         init_completion(&ar->scan.completed);
3402         init_completion(&ar->scan.on_channel);
3403         init_completion(&ar->target_suspend);
3404         init_completion(&ar->driver_recovery);
3405         init_completion(&ar->wow.wakeup_completed);
3406
3407         init_completion(&ar->install_key_done);
3408         init_completion(&ar->vdev_setup_done);
3409         init_completion(&ar->vdev_delete_done);
3410         init_completion(&ar->thermal.wmi_sync);
3411         init_completion(&ar->bss_survey_done);
3412         init_completion(&ar->peer_delete_done);
3413         init_completion(&ar->peer_stats_info_complete);
3414
3415         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3416
3417         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3418         if (!ar->workqueue)
3419                 goto err_free_mac;
3420
3421         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3422         if (!ar->workqueue_aux)
3423                 goto err_free_wq;
3424
3425         ar->workqueue_tx_complete =
3426                 create_singlethread_workqueue("ath10k_tx_complete_wq");
3427         if (!ar->workqueue_tx_complete)
3428                 goto err_free_aux_wq;
3429
3430         mutex_init(&ar->conf_mutex);
3431         mutex_init(&ar->dump_mutex);
3432         spin_lock_init(&ar->data_lock);
3433
3434         INIT_LIST_HEAD(&ar->peers);
3435         init_waitqueue_head(&ar->peer_mapping_wq);
3436         init_waitqueue_head(&ar->htt.empty_tx_wq);
3437         init_waitqueue_head(&ar->wmi.tx_credits_wq);
3438
3439         skb_queue_head_init(&ar->htt.rx_indication_head);
3440
3441         init_completion(&ar->offchan_tx_completed);
3442         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3443         skb_queue_head_init(&ar->offchan_tx_queue);
3444
3445         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3446         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3447
3448         INIT_WORK(&ar->register_work, ath10k_core_register_work);
3449         INIT_WORK(&ar->restart_work, ath10k_core_restart);
3450         INIT_WORK(&ar->set_coverage_class_work,
3451                   ath10k_core_set_coverage_class_work);
3452
3453         init_dummy_netdev(&ar->napi_dev);
3454
3455         ret = ath10k_coredump_create(ar);
3456         if (ret)
3457                 goto err_free_tx_complete;
3458
3459         ret = ath10k_debug_create(ar);
3460         if (ret)
3461                 goto err_free_coredump;
3462
3463         return ar;
3464
3465 err_free_coredump:
3466         ath10k_coredump_destroy(ar);
3467 err_free_tx_complete:
3468         destroy_workqueue(ar->workqueue_tx_complete);
3469 err_free_aux_wq:
3470         destroy_workqueue(ar->workqueue_aux);
3471 err_free_wq:
3472         destroy_workqueue(ar->workqueue);
3473 err_free_mac:
3474         ath10k_mac_destroy(ar);
3475
3476         return NULL;
3477 }
3478 EXPORT_SYMBOL(ath10k_core_create);
3479
3480 void ath10k_core_destroy(struct ath10k *ar)
3481 {
3482         flush_workqueue(ar->workqueue);
3483         destroy_workqueue(ar->workqueue);
3484
3485         flush_workqueue(ar->workqueue_aux);
3486         destroy_workqueue(ar->workqueue_aux);
3487
3488         flush_workqueue(ar->workqueue_tx_complete);
3489         destroy_workqueue(ar->workqueue_tx_complete);
3490
3491         ath10k_debug_destroy(ar);
3492         ath10k_coredump_destroy(ar);
3493         ath10k_htt_tx_destroy(&ar->htt);
3494         ath10k_wmi_free_host_mem(ar);
3495         ath10k_mac_destroy(ar);
3496 }
3497 EXPORT_SYMBOL(ath10k_core_destroy);
3498
3499 MODULE_AUTHOR("Qualcomm Atheros");
3500 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3501 MODULE_LICENSE("Dual BSD/GPL");