1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
8 #include <linux/module.h>
9 #include <linux/firmware.h>
11 #include <linux/property.h>
12 #include <linux/dmi.h>
13 #include <linux/ctype.h>
14 #include <asm/byteorder.h>
28 unsigned int ath10k_debug_mask;
29 static unsigned int ath10k_cryptmode_param;
30 static bool uart_print;
34 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
35 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
37 /* FIXME: most of these should be readonly */
38 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
39 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
40 module_param(uart_print, bool, 0644);
41 module_param(skip_otp, bool, 0644);
42 module_param(rawmode, bool, 0644);
43 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
45 MODULE_PARM_DESC(debug_mask, "Debugging mask");
46 MODULE_PARM_DESC(uart_print, "Uart target debugging");
47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
50 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
52 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
54 .id = QCA988X_HW_2_0_VERSION,
55 .dev_id = QCA988X_2_0_DEVICE_ID,
56 .bus = ATH10K_BUS_PCI,
57 .name = "qca988x hw2.0",
58 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
60 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
62 .channel_counters_freq_hz = 88000,
63 .max_probe_resp_desc_thres = 0,
66 .dir = QCA988X_HW_2_0_FW_DIR,
67 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
68 .board_size = QCA988X_BOARD_DATA_SZ,
69 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
71 .hw_ops = &qca988x_ops,
72 .decap_align_bytes = 4,
73 .spectral_bin_discard = 0,
74 .spectral_bin_offset = 0,
75 .vht160_mcs_rx_highest = 0,
76 .vht160_mcs_tx_highest = 0,
78 .ast_skid_limit = 0x10,
79 .num_wds_entries = 0x20,
80 .target_64bit = false,
81 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
82 .shadow_reg_support = false,
84 .hw_filter_reset_required = true,
85 .fw_diag_ce_download = false,
88 .id = QCA988X_HW_2_0_VERSION,
89 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
90 .name = "qca988x hw2.0 ubiquiti",
91 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
93 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
95 .channel_counters_freq_hz = 88000,
96 .max_probe_resp_desc_thres = 0,
99 .dir = QCA988X_HW_2_0_FW_DIR,
100 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
101 .board_size = QCA988X_BOARD_DATA_SZ,
102 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
104 .hw_ops = &qca988x_ops,
105 .decap_align_bytes = 4,
106 .spectral_bin_discard = 0,
107 .spectral_bin_offset = 0,
108 .vht160_mcs_rx_highest = 0,
109 .vht160_mcs_tx_highest = 0,
110 .n_cipher_suites = 8,
111 .ast_skid_limit = 0x10,
112 .num_wds_entries = 0x20,
113 .target_64bit = false,
114 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
116 .shadow_reg_support = false,
118 .hw_filter_reset_required = true,
119 .fw_diag_ce_download = false,
122 .id = QCA9887_HW_1_0_VERSION,
123 .dev_id = QCA9887_1_0_DEVICE_ID,
124 .bus = ATH10K_BUS_PCI,
125 .name = "qca9887 hw1.0",
126 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
128 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
130 .channel_counters_freq_hz = 88000,
131 .max_probe_resp_desc_thres = 0,
132 .cal_data_len = 2116,
134 .dir = QCA9887_HW_1_0_FW_DIR,
135 .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
136 .board_size = QCA9887_BOARD_DATA_SZ,
137 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
139 .hw_ops = &qca988x_ops,
140 .decap_align_bytes = 4,
141 .spectral_bin_discard = 0,
142 .spectral_bin_offset = 0,
143 .vht160_mcs_rx_highest = 0,
144 .vht160_mcs_tx_highest = 0,
145 .n_cipher_suites = 8,
146 .ast_skid_limit = 0x10,
147 .num_wds_entries = 0x20,
148 .target_64bit = false,
149 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
151 .shadow_reg_support = false,
153 .hw_filter_reset_required = true,
154 .fw_diag_ce_download = false,
157 .id = QCA6174_HW_2_1_VERSION,
158 .dev_id = QCA6164_2_1_DEVICE_ID,
159 .bus = ATH10K_BUS_PCI,
160 .name = "qca6164 hw2.1",
161 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
164 .channel_counters_freq_hz = 88000,
165 .max_probe_resp_desc_thres = 0,
166 .cal_data_len = 8124,
168 .dir = QCA6174_HW_2_1_FW_DIR,
169 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
170 .board_size = QCA6174_BOARD_DATA_SZ,
171 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
173 .hw_ops = &qca988x_ops,
174 .decap_align_bytes = 4,
175 .spectral_bin_discard = 0,
176 .spectral_bin_offset = 0,
177 .vht160_mcs_rx_highest = 0,
178 .vht160_mcs_tx_highest = 0,
179 .n_cipher_suites = 8,
180 .ast_skid_limit = 0x10,
181 .num_wds_entries = 0x20,
182 .target_64bit = false,
183 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
185 .shadow_reg_support = false,
187 .hw_filter_reset_required = true,
188 .fw_diag_ce_download = false,
191 .id = QCA6174_HW_2_1_VERSION,
192 .dev_id = QCA6174_2_1_DEVICE_ID,
193 .bus = ATH10K_BUS_PCI,
194 .name = "qca6174 hw2.1",
195 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
198 .channel_counters_freq_hz = 88000,
199 .max_probe_resp_desc_thres = 0,
200 .cal_data_len = 8124,
202 .dir = QCA6174_HW_2_1_FW_DIR,
203 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
204 .board_size = QCA6174_BOARD_DATA_SZ,
205 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
207 .hw_ops = &qca988x_ops,
208 .decap_align_bytes = 4,
209 .spectral_bin_discard = 0,
210 .spectral_bin_offset = 0,
211 .vht160_mcs_rx_highest = 0,
212 .vht160_mcs_tx_highest = 0,
213 .n_cipher_suites = 8,
214 .ast_skid_limit = 0x10,
215 .num_wds_entries = 0x20,
216 .target_64bit = false,
217 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
219 .shadow_reg_support = false,
221 .hw_filter_reset_required = true,
222 .fw_diag_ce_download = false,
225 .id = QCA6174_HW_3_0_VERSION,
226 .dev_id = QCA6174_2_1_DEVICE_ID,
227 .bus = ATH10K_BUS_PCI,
228 .name = "qca6174 hw3.0",
229 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
232 .channel_counters_freq_hz = 88000,
233 .max_probe_resp_desc_thres = 0,
234 .cal_data_len = 8124,
236 .dir = QCA6174_HW_3_0_FW_DIR,
237 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
238 .board_size = QCA6174_BOARD_DATA_SZ,
239 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
241 .hw_ops = &qca988x_ops,
242 .decap_align_bytes = 4,
243 .spectral_bin_discard = 0,
244 .spectral_bin_offset = 0,
245 .vht160_mcs_rx_highest = 0,
246 .vht160_mcs_tx_highest = 0,
247 .n_cipher_suites = 8,
248 .ast_skid_limit = 0x10,
249 .num_wds_entries = 0x20,
250 .target_64bit = false,
251 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
253 .shadow_reg_support = false,
255 .hw_filter_reset_required = true,
256 .fw_diag_ce_download = false,
259 .id = QCA6174_HW_3_2_VERSION,
260 .dev_id = QCA6174_2_1_DEVICE_ID,
261 .bus = ATH10K_BUS_PCI,
262 .name = "qca6174 hw3.2",
263 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
266 .channel_counters_freq_hz = 88000,
267 .max_probe_resp_desc_thres = 0,
268 .cal_data_len = 8124,
270 /* uses same binaries as hw3.0 */
271 .dir = QCA6174_HW_3_0_FW_DIR,
272 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
273 .board_size = QCA6174_BOARD_DATA_SZ,
274 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
276 .hw_ops = &qca6174_ops,
277 .hw_clk = qca6174_clk,
278 .target_cpu_freq = 176000000,
279 .decap_align_bytes = 4,
280 .spectral_bin_discard = 0,
281 .spectral_bin_offset = 0,
282 .vht160_mcs_rx_highest = 0,
283 .vht160_mcs_tx_highest = 0,
284 .n_cipher_suites = 8,
285 .ast_skid_limit = 0x10,
286 .num_wds_entries = 0x20,
287 .target_64bit = false,
288 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
290 .shadow_reg_support = false,
292 .hw_filter_reset_required = true,
293 .fw_diag_ce_download = true,
296 .id = QCA99X0_HW_2_0_DEV_VERSION,
297 .dev_id = QCA99X0_2_0_DEVICE_ID,
298 .bus = ATH10K_BUS_PCI,
299 .name = "qca99x0 hw2.0",
300 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
302 .otp_exe_param = 0x00000700,
303 .continuous_frag_desc = true,
304 .cck_rate_map_rev2 = true,
305 .channel_counters_freq_hz = 150000,
306 .max_probe_resp_desc_thres = 24,
307 .tx_chain_mask = 0xf,
308 .rx_chain_mask = 0xf,
309 .max_spatial_stream = 4,
310 .cal_data_len = 12064,
312 .dir = QCA99X0_HW_2_0_FW_DIR,
313 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
314 .board_size = QCA99X0_BOARD_DATA_SZ,
315 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
317 .sw_decrypt_mcast_mgmt = true,
318 .hw_ops = &qca99x0_ops,
319 .decap_align_bytes = 1,
320 .spectral_bin_discard = 4,
321 .spectral_bin_offset = 0,
322 .vht160_mcs_rx_highest = 0,
323 .vht160_mcs_tx_highest = 0,
324 .n_cipher_suites = 11,
325 .ast_skid_limit = 0x10,
326 .num_wds_entries = 0x20,
327 .target_64bit = false,
328 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
330 .shadow_reg_support = false,
332 .hw_filter_reset_required = true,
333 .fw_diag_ce_download = false,
336 .id = QCA9984_HW_1_0_DEV_VERSION,
337 .dev_id = QCA9984_1_0_DEVICE_ID,
338 .bus = ATH10K_BUS_PCI,
339 .name = "qca9984/qca9994 hw1.0",
340 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
342 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
343 .otp_exe_param = 0x00000700,
344 .continuous_frag_desc = true,
345 .cck_rate_map_rev2 = true,
346 .channel_counters_freq_hz = 150000,
347 .max_probe_resp_desc_thres = 24,
348 .tx_chain_mask = 0xf,
349 .rx_chain_mask = 0xf,
350 .max_spatial_stream = 4,
351 .cal_data_len = 12064,
353 .dir = QCA9984_HW_1_0_FW_DIR,
354 .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
355 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
356 .board_size = QCA99X0_BOARD_DATA_SZ,
357 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
358 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
360 .sw_decrypt_mcast_mgmt = true,
361 .hw_ops = &qca99x0_ops,
362 .decap_align_bytes = 1,
363 .spectral_bin_discard = 12,
364 .spectral_bin_offset = 8,
366 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
367 * or 2x2 160Mhz, long-guard-interval.
369 .vht160_mcs_rx_highest = 1560,
370 .vht160_mcs_tx_highest = 1560,
371 .n_cipher_suites = 11,
372 .ast_skid_limit = 0x10,
373 .num_wds_entries = 0x20,
374 .target_64bit = false,
375 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
377 .shadow_reg_support = false,
379 .hw_filter_reset_required = true,
380 .fw_diag_ce_download = false,
383 .id = QCA9888_HW_2_0_DEV_VERSION,
384 .dev_id = QCA9888_2_0_DEVICE_ID,
385 .bus = ATH10K_BUS_PCI,
386 .name = "qca9888 hw2.0",
387 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
389 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
390 .otp_exe_param = 0x00000700,
391 .continuous_frag_desc = true,
392 .channel_counters_freq_hz = 150000,
393 .max_probe_resp_desc_thres = 24,
396 .max_spatial_stream = 2,
397 .cal_data_len = 12064,
399 .dir = QCA9888_HW_2_0_FW_DIR,
400 .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
401 .board_size = QCA99X0_BOARD_DATA_SZ,
402 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
404 .sw_decrypt_mcast_mgmt = true,
405 .hw_ops = &qca99x0_ops,
406 .decap_align_bytes = 1,
407 .spectral_bin_discard = 12,
408 .spectral_bin_offset = 8,
410 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
411 * 1x1 160Mhz, long-guard-interval.
413 .vht160_mcs_rx_highest = 780,
414 .vht160_mcs_tx_highest = 780,
415 .n_cipher_suites = 11,
416 .ast_skid_limit = 0x10,
417 .num_wds_entries = 0x20,
418 .target_64bit = false,
419 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
421 .shadow_reg_support = false,
423 .hw_filter_reset_required = true,
424 .fw_diag_ce_download = false,
427 .id = QCA9377_HW_1_0_DEV_VERSION,
428 .dev_id = QCA9377_1_0_DEVICE_ID,
429 .bus = ATH10K_BUS_PCI,
430 .name = "qca9377 hw1.0",
431 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
434 .channel_counters_freq_hz = 88000,
435 .max_probe_resp_desc_thres = 0,
436 .cal_data_len = 8124,
438 .dir = QCA9377_HW_1_0_FW_DIR,
439 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
440 .board_size = QCA9377_BOARD_DATA_SZ,
441 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
443 .hw_ops = &qca988x_ops,
444 .decap_align_bytes = 4,
445 .spectral_bin_discard = 0,
446 .spectral_bin_offset = 0,
447 .vht160_mcs_rx_highest = 0,
448 .vht160_mcs_tx_highest = 0,
449 .n_cipher_suites = 8,
450 .ast_skid_limit = 0x10,
451 .num_wds_entries = 0x20,
452 .target_64bit = false,
453 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
455 .shadow_reg_support = false,
457 .hw_filter_reset_required = true,
458 .fw_diag_ce_download = false,
461 .id = QCA9377_HW_1_1_DEV_VERSION,
462 .dev_id = QCA9377_1_0_DEVICE_ID,
463 .bus = ATH10K_BUS_PCI,
464 .name = "qca9377 hw1.1",
465 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
468 .channel_counters_freq_hz = 88000,
469 .max_probe_resp_desc_thres = 0,
470 .cal_data_len = 8124,
472 .dir = QCA9377_HW_1_0_FW_DIR,
473 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
474 .board_size = QCA9377_BOARD_DATA_SZ,
475 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
477 .hw_ops = &qca6174_ops,
478 .hw_clk = qca6174_clk,
479 .target_cpu_freq = 176000000,
480 .decap_align_bytes = 4,
481 .spectral_bin_discard = 0,
482 .spectral_bin_offset = 0,
483 .vht160_mcs_rx_highest = 0,
484 .vht160_mcs_tx_highest = 0,
485 .n_cipher_suites = 8,
486 .ast_skid_limit = 0x10,
487 .num_wds_entries = 0x20,
488 .target_64bit = false,
489 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
491 .shadow_reg_support = false,
493 .hw_filter_reset_required = true,
494 .fw_diag_ce_download = true,
497 .id = QCA4019_HW_1_0_DEV_VERSION,
499 .bus = ATH10K_BUS_AHB,
500 .name = "qca4019 hw1.0",
501 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
503 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
504 .otp_exe_param = 0x0010000,
505 .continuous_frag_desc = true,
506 .cck_rate_map_rev2 = true,
507 .channel_counters_freq_hz = 125000,
508 .max_probe_resp_desc_thres = 24,
509 .tx_chain_mask = 0x3,
510 .rx_chain_mask = 0x3,
511 .max_spatial_stream = 2,
512 .cal_data_len = 12064,
514 .dir = QCA4019_HW_1_0_FW_DIR,
515 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
516 .board_size = QCA4019_BOARD_DATA_SZ,
517 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
519 .sw_decrypt_mcast_mgmt = true,
520 .hw_ops = &qca99x0_ops,
521 .decap_align_bytes = 1,
522 .spectral_bin_discard = 4,
523 .spectral_bin_offset = 0,
524 .vht160_mcs_rx_highest = 0,
525 .vht160_mcs_tx_highest = 0,
526 .n_cipher_suites = 11,
527 .ast_skid_limit = 0x10,
528 .num_wds_entries = 0x20,
529 .target_64bit = false,
530 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
532 .shadow_reg_support = false,
534 .hw_filter_reset_required = true,
535 .fw_diag_ce_download = false,
538 .id = WCN3990_HW_1_0_DEV_VERSION,
540 .bus = ATH10K_BUS_SNOC,
541 .name = "wcn3990 hw1.0",
542 .continuous_frag_desc = true,
543 .tx_chain_mask = 0x7,
544 .rx_chain_mask = 0x7,
545 .max_spatial_stream = 4,
547 .dir = WCN3990_HW_1_0_FW_DIR,
549 .sw_decrypt_mcast_mgmt = true,
550 .hw_ops = &wcn3990_ops,
551 .decap_align_bytes = 1,
552 .num_peers = TARGET_HL_TLV_NUM_PEERS,
553 .n_cipher_suites = 11,
554 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
555 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
556 .target_64bit = true,
557 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
559 .shadow_reg_support = true,
561 .hw_filter_reset_required = false,
562 .fw_diag_ce_download = false,
566 static const char *const ath10k_core_fw_feature_str[] = {
567 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
568 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
569 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
570 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
571 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
572 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
573 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
574 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
575 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
576 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
577 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
578 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
579 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
580 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
581 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
582 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
583 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
584 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
585 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
586 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
587 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
590 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
592 enum ath10k_fw_features feat)
594 /* make sure that ath10k_core_fw_feature_str[] gets updated */
595 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
596 ATH10K_FW_FEATURE_COUNT);
598 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
599 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
600 return scnprintf(buf, buf_len, "bit%d", feat);
603 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
606 void ath10k_core_get_fw_features_str(struct ath10k *ar,
613 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
614 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
616 len += scnprintf(buf + len, buf_len - len, ",");
618 len += ath10k_core_get_fw_feature_str(buf + len,
625 static void ath10k_send_suspend_complete(struct ath10k *ar)
627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
629 complete(&ar->target_suspend);
632 static void ath10k_init_sdio(struct ath10k *ar)
636 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
637 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
638 ath10k_bmi_read32(ar, hi_acs_flags, ¶m);
640 /* Data transfer is not initiated, when reduced Tx completion
641 * is used for SDIO. disable it until fixed
643 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
645 /* Alternate credit size of 1544 as used by SDIO firmware is
646 * not big enough for mac80211 / native wifi frames. disable it
648 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
649 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
650 ath10k_bmi_write32(ar, hi_acs_flags, param);
652 /* Explicitly set fwlog prints to zero as target may turn it on
653 * based on scratch registers.
655 ath10k_bmi_read32(ar, hi_option_flag, ¶m);
656 param |= HI_OPTION_DISABLE_DBGLOG;
657 ath10k_bmi_write32(ar, hi_option_flag, param);
660 static int ath10k_init_configure_target(struct ath10k *ar)
665 /* tell target which HTC version it is used*/
666 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
667 HTC_PROTOCOL_VERSION);
669 ath10k_err(ar, "settings HTC version failed\n");
673 /* set the firmware mode to STA/IBSS/AP */
674 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
676 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
680 /* TODO following parameters need to be re-visited. */
682 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
684 /* FIXME: Why FW_MODE_AP ??.*/
685 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
686 /* mac_addr_method */
687 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
688 /* firmware_bridge */
689 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
691 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
693 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
695 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
699 /* We do all byte-swapping on the host */
700 ret = ath10k_bmi_write32(ar, hi_be, 0);
702 ath10k_err(ar, "setting host CPU BE mode failed\n");
706 /* FW descriptor/Data swap flags */
707 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
710 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
714 /* Some devices have a special sanity check that verifies the PCI
715 * Device ID is written to this host interest var. It is known to be
716 * required to boot QCA6164.
718 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
721 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
728 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
733 const struct firmware *fw;
737 return ERR_PTR(-ENOENT);
742 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
743 ret = firmware_request_nowarn(&fw, filename, ar->dev);
744 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
753 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
756 u32 board_data_size = ar->hw_params.fw.board_size;
757 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
758 u32 board_ext_data_addr;
761 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
763 ath10k_err(ar, "could not read board ext data addr (%d)\n",
768 ath10k_dbg(ar, ATH10K_DBG_BOOT,
769 "boot push board extended data addr 0x%x\n",
770 board_ext_data_addr);
772 if (board_ext_data_addr == 0)
775 if (data_len != (board_data_size + board_ext_data_size)) {
776 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
777 data_len, board_data_size, board_ext_data_size);
781 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
782 data + board_data_size,
783 board_ext_data_size);
785 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
789 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
790 (board_ext_data_size << 16) | 1);
792 ath10k_err(ar, "could not write board ext data bit (%d)\n",
800 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
803 u8 board_id, chip_id;
804 bool ext_bid_support;
805 int ret, bmi_board_id_param;
807 address = ar->hw_params.patch_load_addr;
809 if (!ar->normal_mode_fw.fw_file.otp_data ||
810 !ar->normal_mode_fw.fw_file.otp_len) {
812 "failed to retrieve board id because of invalid otp\n");
816 ath10k_dbg(ar, ATH10K_DBG_BOOT,
817 "boot upload otp to 0x%x len %zd for board id\n",
818 address, ar->normal_mode_fw.fw_file.otp_len);
820 ret = ath10k_bmi_fast_download(ar, address,
821 ar->normal_mode_fw.fw_file.otp_data,
822 ar->normal_mode_fw.fw_file.otp_len);
824 ath10k_err(ar, "could not write otp for board id check: %d\n",
829 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
830 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
831 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
833 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
835 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
837 ath10k_err(ar, "could not execute otp for board id check: %d\n",
842 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
843 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
844 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
846 ath10k_dbg(ar, ATH10K_DBG_BOOT,
847 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
848 result, board_id, chip_id, ext_bid_support);
850 ar->id.ext_bid_supported = ext_bid_support;
852 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
854 ath10k_dbg(ar, ATH10K_DBG_BOOT,
855 "board id does not exist in otp, ignore it\n");
859 ar->id.bmi_ids_valid = true;
860 ar->id.bmi_board_id = board_id;
861 ar->id.bmi_chip_id = chip_id;
866 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
868 struct ath10k *ar = data;
870 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
874 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
877 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
878 ath10k_dbg(ar, ATH10K_DBG_BOOT,
879 "wrong smbios bdf ext type length (%d).\n",
884 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
886 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
890 /* Only one string exists (per spec) */
891 bdf_ext = (char *)hdr + hdr->length;
893 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
894 ath10k_dbg(ar, ATH10K_DBG_BOOT,
895 "bdf variant magic does not match.\n");
899 for (i = 0; i < strlen(bdf_ext); i++) {
900 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
901 ath10k_dbg(ar, ATH10K_DBG_BOOT,
902 "bdf variant name contains non ascii chars.\n");
907 /* Copy extension name without magic suffix */
908 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
909 sizeof(ar->id.bdf_ext)) < 0) {
910 ath10k_dbg(ar, ATH10K_DBG_BOOT,
911 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
916 ath10k_dbg(ar, ATH10K_DBG_BOOT,
917 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
918 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
921 static int ath10k_core_check_smbios(struct ath10k *ar)
923 ar->id.bdf_ext[0] = '\0';
924 dmi_walk(ath10k_core_check_bdfext, ar);
926 if (ar->id.bdf_ext[0] == '\0')
932 static int ath10k_core_check_dt(struct ath10k *ar)
934 struct device_node *node;
935 const char *variant = NULL;
937 node = ar->dev->of_node;
941 of_property_read_string(node, "qcom,ath10k-calibration-variant",
946 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
947 ath10k_dbg(ar, ATH10K_DBG_BOOT,
948 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
954 static int ath10k_download_fw(struct ath10k *ar)
956 u32 address, data_len;
960 address = ar->hw_params.patch_load_addr;
962 data = ar->running_fw->fw_file.firmware_data;
963 data_len = ar->running_fw->fw_file.firmware_len;
965 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
967 ath10k_err(ar, "failed to configure fw code swap: %d\n",
972 ath10k_dbg(ar, ATH10K_DBG_BOOT,
973 "boot uploading firmware image %pK len %d\n",
976 /* Check if device supports to download firmware via
977 * diag copy engine. Downloading firmware via diag CE
978 * greatly reduces the time to download firmware.
980 if (ar->hw_params.fw_diag_ce_download) {
981 ret = ath10k_hw_diag_fast_download(ar, address,
984 /* firmware upload via diag ce was successful */
988 "failed to upload firmware via diag ce, trying BMI: %d",
992 return ath10k_bmi_fast_download(ar, address,
996 void ath10k_core_free_board_files(struct ath10k *ar)
998 if (!IS_ERR(ar->normal_mode_fw.board))
999 release_firmware(ar->normal_mode_fw.board);
1001 if (!IS_ERR(ar->normal_mode_fw.ext_board))
1002 release_firmware(ar->normal_mode_fw.ext_board);
1004 ar->normal_mode_fw.board = NULL;
1005 ar->normal_mode_fw.board_data = NULL;
1006 ar->normal_mode_fw.board_len = 0;
1007 ar->normal_mode_fw.ext_board = NULL;
1008 ar->normal_mode_fw.ext_board_data = NULL;
1009 ar->normal_mode_fw.ext_board_len = 0;
1011 EXPORT_SYMBOL(ath10k_core_free_board_files);
1013 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1015 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1016 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1018 if (!IS_ERR(ar->cal_file))
1019 release_firmware(ar->cal_file);
1021 if (!IS_ERR(ar->pre_cal_file))
1022 release_firmware(ar->pre_cal_file);
1024 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1026 ar->normal_mode_fw.fw_file.otp_data = NULL;
1027 ar->normal_mode_fw.fw_file.otp_len = 0;
1029 ar->normal_mode_fw.fw_file.firmware = NULL;
1030 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1031 ar->normal_mode_fw.fw_file.firmware_len = 0;
1033 ar->cal_file = NULL;
1034 ar->pre_cal_file = NULL;
1037 static int ath10k_fetch_cal_file(struct ath10k *ar)
1041 /* pre-cal-<bus>-<id>.bin */
1042 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1043 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1045 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1046 if (!IS_ERR(ar->pre_cal_file))
1049 /* cal-<bus>-<id>.bin */
1050 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1051 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1053 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1054 if (IS_ERR(ar->cal_file))
1055 /* calibration file is optional, don't print any warnings */
1056 return PTR_ERR(ar->cal_file);
1058 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1059 ATH10K_FW_DIR, filename);
1064 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1066 const struct firmware *fw;
1068 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1069 if (!ar->hw_params.fw.board) {
1070 ath10k_err(ar, "failed to find board file fw entry\n");
1074 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1075 ar->hw_params.fw.dir,
1076 ar->hw_params.fw.board);
1077 if (IS_ERR(ar->normal_mode_fw.board))
1078 return PTR_ERR(ar->normal_mode_fw.board);
1080 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1081 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1082 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1083 if (!ar->hw_params.fw.eboard) {
1084 ath10k_err(ar, "failed to find eboard file fw entry\n");
1088 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1089 ar->hw_params.fw.eboard);
1090 ar->normal_mode_fw.ext_board = fw;
1091 if (IS_ERR(ar->normal_mode_fw.ext_board))
1092 return PTR_ERR(ar->normal_mode_fw.ext_board);
1094 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1095 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1101 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1102 const void *buf, size_t buf_len,
1103 const char *boardname,
1106 const struct ath10k_fw_ie *hdr;
1107 bool name_match_found;
1108 int ret, board_ie_id;
1109 size_t board_ie_len;
1110 const void *board_ie_data;
1112 name_match_found = false;
1114 /* go through ATH10K_BD_IE_BOARD_ elements */
1115 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1117 board_ie_id = le32_to_cpu(hdr->id);
1118 board_ie_len = le32_to_cpu(hdr->len);
1119 board_ie_data = hdr->data;
1121 buf_len -= sizeof(*hdr);
1122 buf += sizeof(*hdr);
1124 if (buf_len < ALIGN(board_ie_len, 4)) {
1125 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1126 buf_len, ALIGN(board_ie_len, 4));
1131 switch (board_ie_id) {
1132 case ATH10K_BD_IE_BOARD_NAME:
1133 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1134 board_ie_data, board_ie_len);
1136 if (board_ie_len != strlen(boardname))
1139 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1143 name_match_found = true;
1144 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1145 "boot found match for name '%s'",
1148 case ATH10K_BD_IE_BOARD_DATA:
1149 if (!name_match_found)
1150 /* no match found */
1153 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1154 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1155 "boot found board data for '%s'",
1158 ar->normal_mode_fw.board_data = board_ie_data;
1159 ar->normal_mode_fw.board_len = board_ie_len;
1160 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1161 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1162 "boot found eboard data for '%s'",
1165 ar->normal_mode_fw.ext_board_data = board_ie_data;
1166 ar->normal_mode_fw.ext_board_len = board_ie_len;
1172 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1177 /* jump over the padding */
1178 board_ie_len = ALIGN(board_ie_len, 4);
1180 buf_len -= board_ie_len;
1181 buf += board_ie_len;
1184 /* no match found */
1191 static int ath10k_core_search_bd(struct ath10k *ar,
1192 const char *boardname,
1197 struct ath10k_fw_ie *hdr;
1198 int ret = -ENOENT, ie_id;
1200 while (len > sizeof(struct ath10k_fw_ie)) {
1201 hdr = (struct ath10k_fw_ie *)data;
1202 ie_id = le32_to_cpu(hdr->id);
1203 ie_len = le32_to_cpu(hdr->len);
1205 len -= sizeof(*hdr);
1208 if (len < ALIGN(ie_len, 4)) {
1209 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1210 ie_id, ie_len, len);
1215 case ATH10K_BD_IE_BOARD:
1216 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1218 ATH10K_BD_IE_BOARD);
1220 /* no match found, continue */
1223 /* either found or error, so stop searching */
1225 case ATH10K_BD_IE_BOARD_EXT:
1226 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1228 ATH10K_BD_IE_BOARD_EXT);
1230 /* no match found, continue */
1233 /* either found or error, so stop searching */
1237 /* jump over the padding */
1238 ie_len = ALIGN(ie_len, 4);
1245 /* return result of parse_bd_ie_board() or -ENOENT */
1249 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1250 const char *boardname,
1251 const char *fallback_boardname,
1252 const char *filename)
1254 size_t len, magic_len;
1258 /* Skip if already fetched during board data download */
1259 if (!ar->normal_mode_fw.board)
1260 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1261 ar->hw_params.fw.dir,
1263 if (IS_ERR(ar->normal_mode_fw.board))
1264 return PTR_ERR(ar->normal_mode_fw.board);
1266 data = ar->normal_mode_fw.board->data;
1267 len = ar->normal_mode_fw.board->size;
1269 /* magic has extra null byte padded */
1270 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1271 if (len < magic_len) {
1272 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1273 ar->hw_params.fw.dir, filename, len);
1278 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1279 ath10k_err(ar, "found invalid board magic\n");
1284 /* magic is padded to 4 bytes */
1285 magic_len = ALIGN(magic_len, 4);
1286 if (len < magic_len) {
1287 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1288 ar->hw_params.fw.dir, filename, len);
1296 /* attempt to find boardname in the IE list */
1297 ret = ath10k_core_search_bd(ar, boardname, data, len);
1299 /* if we didn't find it and have a fallback name, try that */
1300 if (ret == -ENOENT && fallback_boardname)
1301 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1303 if (ret == -ENOENT) {
1305 "failed to fetch board data for %s from %s/%s\n",
1306 boardname, ar->hw_params.fw.dir, filename);
1316 ath10k_core_free_board_files(ar);
1320 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1321 size_t name_len, bool with_variant)
1323 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1324 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1326 if (with_variant && ar->id.bdf_ext[0] != '\0')
1327 scnprintf(variant, sizeof(variant), ",variant=%s",
1330 if (ar->id.bmi_ids_valid) {
1331 scnprintf(name, name_len,
1332 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1333 ath10k_bus_str(ar->hif.bus),
1335 ar->id.bmi_board_id, variant);
1339 if (ar->id.qmi_ids_valid) {
1340 scnprintf(name, name_len,
1341 "bus=%s,qmi-board-id=%x",
1342 ath10k_bus_str(ar->hif.bus),
1343 ar->id.qmi_board_id);
1347 scnprintf(name, name_len,
1348 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1349 ath10k_bus_str(ar->hif.bus),
1350 ar->id.vendor, ar->id.device,
1351 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1353 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1358 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1361 if (ar->id.bmi_ids_valid) {
1362 scnprintf(name, name_len,
1363 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1364 ath10k_bus_str(ar->hif.bus),
1366 ar->id.bmi_eboard_id);
1368 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1371 /* Fallback if returned board id is zero */
1375 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1377 char boardname[100], fallback_boardname[100];
1380 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1381 ret = ath10k_core_create_board_name(ar, boardname,
1382 sizeof(boardname), true);
1384 ath10k_err(ar, "failed to create board name: %d", ret);
1388 ret = ath10k_core_create_board_name(ar, fallback_boardname,
1389 sizeof(boardname), false);
1391 ath10k_err(ar, "failed to create fallback board name: %d", ret);
1394 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1395 ret = ath10k_core_create_eboard_name(ar, boardname,
1398 ath10k_err(ar, "fallback to eboard.bin since board id 0");
1404 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1406 ATH10K_BOARD_API2_FILE);
1412 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1414 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1415 ar->hw_params.fw.dir);
1420 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1423 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1425 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1427 u32 result, address;
1431 address = ar->hw_params.patch_load_addr;
1433 if (!ar->normal_mode_fw.fw_file.otp_data ||
1434 !ar->normal_mode_fw.fw_file.otp_len) {
1436 "failed to retrieve extended board id due to otp binary missing\n");
1440 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1441 "boot upload otp to 0x%x len %zd for ext board id\n",
1442 address, ar->normal_mode_fw.fw_file.otp_len);
1444 ret = ath10k_bmi_fast_download(ar, address,
1445 ar->normal_mode_fw.fw_file.otp_data,
1446 ar->normal_mode_fw.fw_file.otp_len);
1448 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1453 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1455 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1461 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1462 "ext board id does not exist in otp, ignore it\n");
1466 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1468 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1469 "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1470 result, ext_board_id);
1472 ar->id.bmi_eboard_id = ext_board_id;
1477 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1480 u32 board_data_size = ar->hw_params.fw.board_size;
1481 u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1483 u32 ext_board_address;
1486 ret = ath10k_push_board_ext_data(ar, data, data_len);
1488 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1492 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1494 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1498 ret = ath10k_bmi_write_memory(ar, board_address, data,
1499 min_t(u32, board_data_size,
1502 ath10k_err(ar, "could not write board data (%d)\n", ret);
1506 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1508 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1512 if (!ar->id.ext_bid_supported)
1515 /* Extended board data download */
1516 ret = ath10k_core_get_ext_board_id_from_otp(ar);
1517 if (ret == -EOPNOTSUPP) {
1518 /* Not fetching ext_board_data if ext board id is 0 */
1519 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1522 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1526 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1530 if (ar->normal_mode_fw.ext_board_data) {
1531 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1532 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1533 "boot writing ext board data to addr 0x%x",
1535 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1536 ar->normal_mode_fw.ext_board_data,
1537 min_t(u32, eboard_data_size, data_len));
1539 ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1546 static int ath10k_download_and_run_otp(struct ath10k *ar)
1548 u32 result, address = ar->hw_params.patch_load_addr;
1549 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1552 ret = ath10k_download_board_data(ar,
1553 ar->running_fw->board_data,
1554 ar->running_fw->board_len);
1556 ath10k_err(ar, "failed to download board data: %d\n", ret);
1560 /* OTP is optional */
1562 if (!ar->running_fw->fw_file.otp_data ||
1563 !ar->running_fw->fw_file.otp_len) {
1564 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1565 ar->running_fw->fw_file.otp_data,
1566 ar->running_fw->fw_file.otp_len);
1570 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1571 address, ar->running_fw->fw_file.otp_len);
1573 ret = ath10k_bmi_fast_download(ar, address,
1574 ar->running_fw->fw_file.otp_data,
1575 ar->running_fw->fw_file.otp_len);
1577 ath10k_err(ar, "could not write otp (%d)\n", ret);
1581 /* As of now pre-cal is valid for 10_4 variants */
1582 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1583 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1584 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1586 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1588 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1592 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1594 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1595 ar->running_fw->fw_file.fw_features)) &&
1597 ath10k_err(ar, "otp calibration failed: %d", result);
1604 static int ath10k_download_cal_file(struct ath10k *ar,
1605 const struct firmware *file)
1613 return PTR_ERR(file);
1615 ret = ath10k_download_board_data(ar, file->data, file->size);
1617 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1621 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1626 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1628 struct device_node *node;
1633 node = ar->dev->of_node;
1635 /* Device Tree is optional, don't print any warnings if
1636 * there's no node for ath10k.
1640 if (!of_get_property(node, dt_name, &data_len)) {
1641 /* The calibration data node is optional */
1645 if (data_len != ar->hw_params.cal_data_len) {
1646 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1652 data = kmalloc(data_len, GFP_KERNEL);
1658 ret = of_property_read_u8_array(node, dt_name, data, data_len);
1660 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1665 ret = ath10k_download_board_data(ar, data, data_len);
1667 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1681 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1687 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1689 if (ret != -EOPNOTSUPP)
1690 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1695 ret = ath10k_download_board_data(ar, data, data_len);
1697 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1710 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1711 struct ath10k_fw_file *fw_file)
1713 size_t magic_len, len, ie_len;
1714 int ie_id, i, index, bit, ret;
1715 struct ath10k_fw_ie *hdr;
1717 __le32 *timestamp, *version;
1719 /* first fetch the firmware file (firmware-*.bin) */
1720 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1722 if (IS_ERR(fw_file->firmware))
1723 return PTR_ERR(fw_file->firmware);
1725 data = fw_file->firmware->data;
1726 len = fw_file->firmware->size;
1728 /* magic also includes the null byte, check that as well */
1729 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1731 if (len < magic_len) {
1732 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1733 ar->hw_params.fw.dir, name, len);
1738 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1739 ath10k_err(ar, "invalid firmware magic\n");
1744 /* jump over the padding */
1745 magic_len = ALIGN(magic_len, 4);
1751 while (len > sizeof(struct ath10k_fw_ie)) {
1752 hdr = (struct ath10k_fw_ie *)data;
1754 ie_id = le32_to_cpu(hdr->id);
1755 ie_len = le32_to_cpu(hdr->len);
1757 len -= sizeof(*hdr);
1758 data += sizeof(*hdr);
1761 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1762 ie_id, len, ie_len);
1768 case ATH10K_FW_IE_FW_VERSION:
1769 if (ie_len > sizeof(fw_file->fw_version) - 1)
1772 memcpy(fw_file->fw_version, data, ie_len);
1773 fw_file->fw_version[ie_len] = '\0';
1775 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1776 "found fw version %s\n",
1777 fw_file->fw_version);
1779 case ATH10K_FW_IE_TIMESTAMP:
1780 if (ie_len != sizeof(u32))
1783 timestamp = (__le32 *)data;
1785 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1786 le32_to_cpup(timestamp));
1788 case ATH10K_FW_IE_FEATURES:
1789 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1790 "found firmware features ie (%zd B)\n",
1793 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1797 if (index == ie_len)
1800 if (data[index] & (1 << bit)) {
1801 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1802 "Enabling feature bit: %i\n",
1804 __set_bit(i, fw_file->fw_features);
1808 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1809 fw_file->fw_features,
1810 sizeof(fw_file->fw_features));
1812 case ATH10K_FW_IE_FW_IMAGE:
1813 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1814 "found fw image ie (%zd B)\n",
1817 fw_file->firmware_data = data;
1818 fw_file->firmware_len = ie_len;
1821 case ATH10K_FW_IE_OTP_IMAGE:
1822 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1823 "found otp image ie (%zd B)\n",
1826 fw_file->otp_data = data;
1827 fw_file->otp_len = ie_len;
1830 case ATH10K_FW_IE_WMI_OP_VERSION:
1831 if (ie_len != sizeof(u32))
1834 version = (__le32 *)data;
1836 fw_file->wmi_op_version = le32_to_cpup(version);
1838 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1839 fw_file->wmi_op_version);
1841 case ATH10K_FW_IE_HTT_OP_VERSION:
1842 if (ie_len != sizeof(u32))
1845 version = (__le32 *)data;
1847 fw_file->htt_op_version = le32_to_cpup(version);
1849 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1850 fw_file->htt_op_version);
1852 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1853 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1854 "found fw code swap image ie (%zd B)\n",
1856 fw_file->codeswap_data = data;
1857 fw_file->codeswap_len = ie_len;
1860 ath10k_warn(ar, "Unknown FW IE: %u\n",
1861 le32_to_cpu(hdr->id));
1865 /* jump over the padding */
1866 ie_len = ALIGN(ie_len, 4);
1872 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1873 (!fw_file->firmware_data || !fw_file->firmware_len)) {
1874 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1875 ar->hw_params.fw.dir, name);
1883 ath10k_core_free_firmware_files(ar);
1887 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1888 size_t fw_name_len, int fw_api)
1890 switch (ar->hif.bus) {
1891 case ATH10K_BUS_SDIO:
1892 case ATH10K_BUS_USB:
1893 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1894 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1897 case ATH10K_BUS_PCI:
1898 case ATH10K_BUS_AHB:
1899 case ATH10K_BUS_SNOC:
1900 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
1901 ATH10K_FW_FILE_BASE, fw_api);
1906 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1911 /* calibration file is optional, don't check for any errors */
1912 ath10k_fetch_cal_file(ar);
1914 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1916 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1919 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1920 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1921 &ar->normal_mode_fw.fw_file);
1926 /* we end up here if we couldn't fetch any firmware */
1928 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1929 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1935 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1940 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1944 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1946 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1950 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1951 "boot did not find a pre calibration file, try DT next: %d\n",
1954 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1956 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1957 "unable to load pre cal data from DT: %d\n", ret);
1960 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1963 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1964 ath10k_cal_mode_str(ar->cal_mode));
1969 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1973 ret = ath10k_core_pre_cal_download(ar);
1975 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1976 "failed to load pre cal data: %d\n", ret);
1980 ret = ath10k_core_get_board_id_from_otp(ar);
1982 ath10k_err(ar, "failed to get board id: %d\n", ret);
1986 ret = ath10k_download_and_run_otp(ar);
1988 ath10k_err(ar, "failed to run otp: %d\n", ret);
1992 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1993 "pre cal configuration done successfully\n");
1998 static int ath10k_download_cal_data(struct ath10k *ar)
2002 ret = ath10k_core_pre_cal_config(ar);
2006 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2007 "pre cal download procedure failed, try cal file: %d\n",
2010 ret = ath10k_download_cal_file(ar, ar->cal_file);
2012 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2016 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2017 "boot did not find a calibration file, try DT next: %d\n",
2020 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2022 ar->cal_mode = ATH10K_CAL_MODE_DT;
2026 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2027 "boot did not find DT entry, try target EEPROM next: %d\n",
2030 ret = ath10k_download_cal_eeprom(ar);
2032 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2036 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2037 "boot did not find target EEPROM entry, try OTP next: %d\n",
2040 ret = ath10k_download_and_run_otp(ar);
2042 ath10k_err(ar, "failed to run otp: %d\n", ret);
2046 ar->cal_mode = ATH10K_CAL_MODE_OTP;
2049 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2050 ath10k_cal_mode_str(ar->cal_mode));
2054 static int ath10k_init_uart(struct ath10k *ar)
2059 * Explicitly setting UART prints to zero as target turns it on
2060 * based on scratch registers.
2062 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2064 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2071 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2073 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2077 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2079 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2083 /* Set the UART baud rate to 19200. */
2084 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2086 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2090 ath10k_info(ar, "UART prints enabled\n");
2094 static int ath10k_init_hw_params(struct ath10k *ar)
2096 const struct ath10k_hw_params *uninitialized_var(hw_params);
2099 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2100 hw_params = &ath10k_hw_params_list[i];
2102 if (hw_params->bus == ar->hif.bus &&
2103 hw_params->id == ar->target_version &&
2104 hw_params->dev_id == ar->dev_id)
2108 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2109 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2110 ar->target_version);
2114 ar->hw_params = *hw_params;
2116 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2117 ar->hw_params.name, ar->target_version);
2122 static void ath10k_core_restart(struct work_struct *work)
2124 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2127 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2129 /* Place a barrier to make sure the compiler doesn't reorder
2130 * CRASH_FLUSH and calling other functions.
2134 ieee80211_stop_queues(ar->hw);
2135 ath10k_drain_tx(ar);
2136 complete(&ar->scan.started);
2137 complete(&ar->scan.completed);
2138 complete(&ar->scan.on_channel);
2139 complete(&ar->offchan_tx_completed);
2140 complete(&ar->install_key_done);
2141 complete(&ar->vdev_setup_done);
2142 complete(&ar->thermal.wmi_sync);
2143 complete(&ar->bss_survey_done);
2144 wake_up(&ar->htt.empty_tx_wq);
2145 wake_up(&ar->wmi.tx_credits_wq);
2146 wake_up(&ar->peer_mapping_wq);
2148 /* TODO: We can have one instance of cancelling coverage_class_work by
2149 * moving it to ath10k_halt(), so that both stop() and restart() would
2150 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2151 * with conf_mutex it will deadlock.
2153 cancel_work_sync(&ar->set_coverage_class_work);
2155 mutex_lock(&ar->conf_mutex);
2157 switch (ar->state) {
2158 case ATH10K_STATE_ON:
2159 ar->state = ATH10K_STATE_RESTARTING;
2161 ath10k_scan_finish(ar);
2162 ieee80211_restart_hw(ar->hw);
2164 case ATH10K_STATE_OFF:
2165 /* this can happen if driver is being unloaded
2166 * or if the crash happens during FW probing
2168 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2170 case ATH10K_STATE_RESTARTING:
2171 /* hw restart might be requested from multiple places */
2173 case ATH10K_STATE_RESTARTED:
2174 ar->state = ATH10K_STATE_WEDGED;
2176 case ATH10K_STATE_WEDGED:
2177 ath10k_warn(ar, "device is wedged, will not restart\n");
2179 case ATH10K_STATE_UTF:
2180 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2184 mutex_unlock(&ar->conf_mutex);
2186 ret = ath10k_coredump_submit(ar);
2188 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2191 complete(&ar->driver_recovery);
2194 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2196 struct ath10k *ar = container_of(work, struct ath10k,
2197 set_coverage_class_work);
2199 if (ar->hw_params.hw_ops->set_coverage_class)
2200 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2203 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2205 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2208 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2209 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2210 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2214 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2215 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2216 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2220 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2221 switch (ath10k_cryptmode_param) {
2222 case ATH10K_CRYPT_MODE_HW:
2223 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2224 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2226 case ATH10K_CRYPT_MODE_SW:
2227 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2228 fw_file->fw_features)) {
2229 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2233 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2234 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2237 ath10k_info(ar, "invalid cryptmode: %d\n",
2238 ath10k_cryptmode_param);
2242 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2243 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2246 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2247 fw_file->fw_features)) {
2248 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2251 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2254 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2255 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2259 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2260 * and causes enormous performance issues (malformed frames,
2263 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2264 * albeit a bit slower compared to regular operation.
2266 ar->htt.max_num_amsdu = 1;
2269 /* Backwards compatibility for firmwares without
2270 * ATH10K_FW_IE_WMI_OP_VERSION.
2272 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2273 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2274 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2275 fw_file->fw_features))
2276 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2278 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2280 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2284 switch (fw_file->wmi_op_version) {
2285 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2286 max_num_peers = TARGET_NUM_PEERS;
2287 ar->max_num_stations = TARGET_NUM_STATIONS;
2288 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2289 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2290 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2292 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2294 case ATH10K_FW_WMI_OP_VERSION_10_1:
2295 case ATH10K_FW_WMI_OP_VERSION_10_2:
2296 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2297 if (ath10k_peer_stats_enabled(ar)) {
2298 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2299 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2301 max_num_peers = TARGET_10X_NUM_PEERS;
2302 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2304 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2305 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2306 ar->fw_stats_req_mask = WMI_STAT_PEER;
2307 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2309 case ATH10K_FW_WMI_OP_VERSION_TLV:
2310 max_num_peers = TARGET_TLV_NUM_PEERS;
2311 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2312 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2313 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2314 if (ar->hif.bus == ATH10K_BUS_SDIO)
2315 ar->htt.max_num_pending_tx =
2316 TARGET_TLV_NUM_MSDU_DESC_HL;
2318 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2319 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2320 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2321 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2322 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2323 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2325 case ATH10K_FW_WMI_OP_VERSION_10_4:
2326 max_num_peers = TARGET_10_4_NUM_PEERS;
2327 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2328 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2329 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2330 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2331 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2332 WMI_10_4_STAT_PEER_EXTD |
2333 WMI_10_4_STAT_VDEV_EXTD;
2334 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2335 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2337 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2338 fw_file->fw_features))
2339 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2341 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2343 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2344 case ATH10K_FW_WMI_OP_VERSION_MAX:
2350 if (ar->hw_params.num_peers)
2351 ar->max_num_peers = ar->hw_params.num_peers;
2353 ar->max_num_peers = max_num_peers;
2355 /* Backwards compatibility for firmwares without
2356 * ATH10K_FW_IE_HTT_OP_VERSION.
2358 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2359 switch (fw_file->wmi_op_version) {
2360 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2361 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2363 case ATH10K_FW_WMI_OP_VERSION_10_1:
2364 case ATH10K_FW_WMI_OP_VERSION_10_2:
2365 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2366 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2368 case ATH10K_FW_WMI_OP_VERSION_TLV:
2369 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2371 case ATH10K_FW_WMI_OP_VERSION_10_4:
2372 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2373 case ATH10K_FW_WMI_OP_VERSION_MAX:
2374 ath10k_err(ar, "htt op version not found from fw meta data");
2382 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2388 const u8 *vdev_addr;
2391 vdev_type = WMI_VDEV_TYPE_STA;
2392 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2393 vdev_addr = ar->mac_addr;
2395 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2398 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2402 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2404 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2408 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2409 * serialized properly implicitly.
2411 * Moreover (most) WMI commands have no explicit acknowledges. It is
2412 * possible to infer it implicitly by poking firmware with echo
2413 * command - getting a reply means all preceding comments have been
2414 * (mostly) processed.
2416 * In case of vdev create/delete this is sufficient.
2418 * Without this it's possible to end up with a race when HTT Rx ring is
2419 * started before vdev create/delete hack is complete allowing a short
2420 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2422 ret = ath10k_wmi_barrier(ar);
2424 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2431 static int ath10k_core_compat_services(struct ath10k *ar)
2433 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2435 /* all 10.x firmware versions support thermal throttling but don't
2436 * advertise the support via service flags so we have to hardcode
2439 switch (fw_file->wmi_op_version) {
2440 case ATH10K_FW_WMI_OP_VERSION_10_1:
2441 case ATH10K_FW_WMI_OP_VERSION_10_2:
2442 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2443 case ATH10K_FW_WMI_OP_VERSION_10_4:
2444 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2453 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2454 const struct ath10k_fw_components *fw)
2459 lockdep_assert_held(&ar->conf_mutex);
2461 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2463 ar->running_fw = fw;
2465 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2466 ar->running_fw->fw_file.fw_features)) {
2467 ath10k_bmi_start(ar);
2469 if (ath10k_init_configure_target(ar)) {
2474 status = ath10k_download_cal_data(ar);
2478 /* Some of of qca988x solutions are having global reset issue
2479 * during target initialization. Bypassing PLL setting before
2480 * downloading firmware and letting the SoC run on REF_CLK is
2481 * fixing the problem. Corresponding firmware change is also
2482 * needed to set the clock source once the target is
2485 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2486 ar->running_fw->fw_file.fw_features)) {
2487 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2489 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2495 status = ath10k_download_fw(ar);
2499 status = ath10k_init_uart(ar);
2503 if (ar->hif.bus == ATH10K_BUS_SDIO)
2504 ath10k_init_sdio(ar);
2507 ar->htc.htc_ops.target_send_suspend_complete =
2508 ath10k_send_suspend_complete;
2510 status = ath10k_htc_init(ar);
2512 ath10k_err(ar, "could not init HTC (%d)\n", status);
2516 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2517 ar->running_fw->fw_file.fw_features)) {
2518 status = ath10k_bmi_done(ar);
2523 status = ath10k_wmi_attach(ar);
2525 ath10k_err(ar, "WMI attach failed: %d\n", status);
2529 status = ath10k_htt_init(ar);
2531 ath10k_err(ar, "failed to init htt: %d\n", status);
2532 goto err_wmi_detach;
2535 status = ath10k_htt_tx_start(&ar->htt);
2537 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2538 goto err_wmi_detach;
2541 /* If firmware indicates Full Rx Reorder support it must be used in a
2542 * slightly different manner. Let HTT code know.
2544 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2547 status = ath10k_htt_rx_alloc(&ar->htt);
2549 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2550 goto err_htt_tx_detach;
2553 status = ath10k_hif_start(ar);
2555 ath10k_err(ar, "could not start HIF: %d\n", status);
2556 goto err_htt_rx_detach;
2559 status = ath10k_htc_wait_target(&ar->htc);
2561 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2565 status = ath10k_hif_swap_mailbox(ar);
2567 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2571 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2572 status = ath10k_htt_connect(&ar->htt);
2574 ath10k_err(ar, "failed to connect htt (%d)\n", status);
2579 status = ath10k_wmi_connect(ar);
2581 ath10k_err(ar, "could not connect wmi: %d\n", status);
2585 status = ath10k_htc_start(&ar->htc);
2587 ath10k_err(ar, "failed to start htc: %d\n", status);
2591 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2592 status = ath10k_wmi_wait_for_service_ready(ar);
2594 ath10k_warn(ar, "wmi service ready event not received");
2599 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2600 ar->hw->wiphy->fw_version);
2602 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2603 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2605 if (ath10k_peer_stats_enabled(ar))
2606 val = WMI_10_4_PEER_STATS;
2608 /* Enable vdev stats by default */
2609 val |= WMI_10_4_VDEV_STATS;
2611 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2612 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2614 /* 10.4 firmware supports BT-Coex without reloading firmware
2615 * via pdev param. To support Bluetooth coexistence pdev param,
2616 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2619 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2620 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2621 ar->running_fw->fw_file.fw_features))
2622 val |= WMI_10_4_COEX_GPIO_SUPPORT;
2624 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2626 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2628 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2630 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2632 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2634 val |= WMI_10_4_TX_DATA_ACK_RSSI;
2636 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2637 val |= WMI_10_4_REPORT_AIRTIME;
2639 status = ath10k_mac_ext_resource_config(ar, val);
2642 "failed to send ext resource cfg command : %d\n",
2648 status = ath10k_wmi_cmd_init(ar);
2650 ath10k_err(ar, "could not send WMI init command (%d)\n",
2655 status = ath10k_wmi_wait_for_unified_ready(ar);
2657 ath10k_err(ar, "wmi unified ready event not received\n");
2661 status = ath10k_core_compat_services(ar);
2663 ath10k_err(ar, "compat services failed: %d\n", status);
2667 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2668 if (status && status != -EOPNOTSUPP) {
2670 "failed to set base mac address: %d\n", status);
2674 /* Some firmware revisions do not properly set up hardware rx filter
2677 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2678 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2679 * any frames that matches MAC_PCU_RX_FILTER which is also
2680 * misconfigured to accept anything.
2682 * The ADDR1 is programmed using internal firmware structure field and
2683 * can't be (easily/sanely) reached from the driver explicitly. It is
2684 * possible to implicitly make it correct by creating a dummy vdev and
2687 if (ar->hw_params.hw_filter_reset_required &&
2688 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2689 status = ath10k_core_reset_rx_filter(ar);
2692 "failed to reset rx filter: %d\n", status);
2697 status = ath10k_htt_rx_ring_refill(ar);
2699 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2703 if (ar->max_num_vdevs >= 64)
2704 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2706 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2708 INIT_LIST_HEAD(&ar->arvifs);
2710 /* we don't care about HTT in UTF mode */
2711 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2712 status = ath10k_htt_setup(&ar->htt);
2714 ath10k_err(ar, "failed to setup htt: %d\n", status);
2719 status = ath10k_debug_start(ar);
2726 ath10k_hif_stop(ar);
2728 ath10k_htt_rx_free(&ar->htt);
2730 ath10k_htt_tx_free(&ar->htt);
2732 ath10k_wmi_detach(ar);
2736 EXPORT_SYMBOL(ath10k_core_start);
2738 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2741 unsigned long time_left;
2743 reinit_completion(&ar->target_suspend);
2745 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2747 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2751 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2754 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2761 void ath10k_core_stop(struct ath10k *ar)
2763 lockdep_assert_held(&ar->conf_mutex);
2764 ath10k_debug_stop(ar);
2766 /* try to suspend target */
2767 if (ar->state != ATH10K_STATE_RESTARTING &&
2768 ar->state != ATH10K_STATE_UTF)
2769 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2771 ath10k_hif_stop(ar);
2772 ath10k_htt_tx_stop(&ar->htt);
2773 ath10k_htt_rx_free(&ar->htt);
2774 ath10k_wmi_detach(ar);
2776 EXPORT_SYMBOL(ath10k_core_stop);
2778 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2779 * order to know what hw capabilities should be advertised to mac80211 it is
2780 * necessary to load the firmware (and tear it down immediately since start
2781 * hook will try to init it again) before registering
2783 static int ath10k_core_probe_fw(struct ath10k *ar)
2785 struct bmi_target_info target_info;
2788 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
2790 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2794 switch (ar->hif.bus) {
2795 case ATH10K_BUS_SDIO:
2796 memset(&target_info, 0, sizeof(target_info));
2797 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2799 ath10k_err(ar, "could not get target info (%d)\n", ret);
2800 goto err_power_down;
2802 ar->target_version = target_info.version;
2803 ar->hw->wiphy->hw_version = target_info.version;
2805 case ATH10K_BUS_PCI:
2806 case ATH10K_BUS_AHB:
2807 case ATH10K_BUS_USB:
2808 memset(&target_info, 0, sizeof(target_info));
2809 ret = ath10k_bmi_get_target_info(ar, &target_info);
2811 ath10k_err(ar, "could not get target info (%d)\n", ret);
2812 goto err_power_down;
2814 ar->target_version = target_info.version;
2815 ar->hw->wiphy->hw_version = target_info.version;
2817 case ATH10K_BUS_SNOC:
2818 memset(&target_info, 0, sizeof(target_info));
2819 ret = ath10k_hif_get_target_info(ar, &target_info);
2821 ath10k_err(ar, "could not get target info (%d)\n", ret);
2822 goto err_power_down;
2824 ar->target_version = target_info.version;
2825 ar->hw->wiphy->hw_version = target_info.version;
2828 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2831 ret = ath10k_init_hw_params(ar);
2833 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2834 goto err_power_down;
2837 ret = ath10k_core_fetch_firmware_files(ar);
2839 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2840 goto err_power_down;
2843 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2844 sizeof(ar->normal_mode_fw.fw_file.fw_version));
2845 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2846 sizeof(ar->hw->wiphy->fw_version));
2848 ath10k_debug_print_hwfw_info(ar);
2850 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2851 ar->normal_mode_fw.fw_file.fw_features)) {
2852 ret = ath10k_core_pre_cal_download(ar);
2854 /* pre calibration data download is not necessary
2855 * for all the chipsets. Ignore failures and continue.
2857 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2858 "could not load pre cal data: %d\n", ret);
2861 ret = ath10k_core_get_board_id_from_otp(ar);
2862 if (ret && ret != -EOPNOTSUPP) {
2863 ath10k_err(ar, "failed to get board id from otp: %d\n",
2865 goto err_free_firmware_files;
2868 ret = ath10k_core_check_smbios(ar);
2870 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
2872 ret = ath10k_core_check_dt(ar);
2874 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
2876 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
2878 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2879 goto err_free_firmware_files;
2882 ath10k_debug_print_board_info(ar);
2885 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
2887 ret = ath10k_core_init_firmware_features(ar);
2889 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2891 goto err_free_firmware_files;
2894 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2895 ar->normal_mode_fw.fw_file.fw_features)) {
2896 ret = ath10k_swap_code_seg_init(ar,
2897 &ar->normal_mode_fw.fw_file);
2899 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2901 goto err_free_firmware_files;
2905 mutex_lock(&ar->conf_mutex);
2907 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2908 &ar->normal_mode_fw);
2910 ath10k_err(ar, "could not init core (%d)\n", ret);
2914 ath10k_debug_print_boot_info(ar);
2915 ath10k_core_stop(ar);
2917 mutex_unlock(&ar->conf_mutex);
2919 ath10k_hif_power_down(ar);
2923 mutex_unlock(&ar->conf_mutex);
2925 err_free_firmware_files:
2926 ath10k_core_free_firmware_files(ar);
2929 ath10k_hif_power_down(ar);
2934 static void ath10k_core_register_work(struct work_struct *work)
2936 struct ath10k *ar = container_of(work, struct ath10k, register_work);
2939 /* peer stats are enabled by default */
2940 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2942 status = ath10k_core_probe_fw(ar);
2944 ath10k_err(ar, "could not probe fw (%d)\n", status);
2948 status = ath10k_mac_register(ar);
2950 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2951 goto err_release_fw;
2954 status = ath10k_coredump_register(ar);
2956 ath10k_err(ar, "unable to register coredump\n");
2957 goto err_unregister_mac;
2960 status = ath10k_debug_register(ar);
2962 ath10k_err(ar, "unable to initialize debugfs\n");
2963 goto err_unregister_coredump;
2966 status = ath10k_spectral_create(ar);
2968 ath10k_err(ar, "failed to initialize spectral\n");
2969 goto err_debug_destroy;
2972 status = ath10k_thermal_register(ar);
2974 ath10k_err(ar, "could not register thermal device: %d\n",
2976 goto err_spectral_destroy;
2979 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2982 err_spectral_destroy:
2983 ath10k_spectral_destroy(ar);
2985 ath10k_debug_destroy(ar);
2986 err_unregister_coredump:
2987 ath10k_coredump_unregister(ar);
2989 ath10k_mac_unregister(ar);
2991 ath10k_core_free_firmware_files(ar);
2993 /* TODO: It's probably a good idea to release device from the driver
2994 * but calling device_release_driver() here will cause a deadlock.
2999 int ath10k_core_register(struct ath10k *ar,
3000 const struct ath10k_bus_params *bus_params)
3002 ar->bus_param = *bus_params;
3004 queue_work(ar->workqueue, &ar->register_work);
3008 EXPORT_SYMBOL(ath10k_core_register);
3010 void ath10k_core_unregister(struct ath10k *ar)
3012 cancel_work_sync(&ar->register_work);
3014 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3017 ath10k_thermal_unregister(ar);
3018 /* Stop spectral before unregistering from mac80211 to remove the
3019 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3020 * would be already be free'd recursively, leading to a double free.
3022 ath10k_spectral_destroy(ar);
3024 /* We must unregister from mac80211 before we stop HTC and HIF.
3025 * Otherwise we will fail to submit commands to FW and mac80211 will be
3026 * unhappy about callback failures.
3028 ath10k_mac_unregister(ar);
3030 ath10k_testmode_destroy(ar);
3032 ath10k_core_free_firmware_files(ar);
3033 ath10k_core_free_board_files(ar);
3035 ath10k_debug_unregister(ar);
3037 EXPORT_SYMBOL(ath10k_core_unregister);
3039 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3040 enum ath10k_bus bus,
3041 enum ath10k_hw_rev hw_rev,
3042 const struct ath10k_hif_ops *hif_ops)
3047 ar = ath10k_mac_create(priv_size);
3051 ar->ath_common.priv = ar;
3052 ar->ath_common.hw = ar->hw;
3054 ar->hw_rev = hw_rev;
3055 ar->hif.ops = hif_ops;
3059 case ATH10K_HW_QCA988X:
3060 case ATH10K_HW_QCA9887:
3061 ar->regs = &qca988x_regs;
3062 ar->hw_ce_regs = &qcax_ce_regs;
3063 ar->hw_values = &qca988x_values;
3065 case ATH10K_HW_QCA6174:
3066 case ATH10K_HW_QCA9377:
3067 ar->regs = &qca6174_regs;
3068 ar->hw_ce_regs = &qcax_ce_regs;
3069 ar->hw_values = &qca6174_values;
3071 case ATH10K_HW_QCA99X0:
3072 case ATH10K_HW_QCA9984:
3073 ar->regs = &qca99x0_regs;
3074 ar->hw_ce_regs = &qcax_ce_regs;
3075 ar->hw_values = &qca99x0_values;
3077 case ATH10K_HW_QCA9888:
3078 ar->regs = &qca99x0_regs;
3079 ar->hw_ce_regs = &qcax_ce_regs;
3080 ar->hw_values = &qca9888_values;
3082 case ATH10K_HW_QCA4019:
3083 ar->regs = &qca4019_regs;
3084 ar->hw_ce_regs = &qcax_ce_regs;
3085 ar->hw_values = &qca4019_values;
3087 case ATH10K_HW_WCN3990:
3088 ar->regs = &wcn3990_regs;
3089 ar->hw_ce_regs = &wcn3990_ce_regs;
3090 ar->hw_values = &wcn3990_values;
3093 ath10k_err(ar, "unsupported core hardware revision %d\n",
3099 init_completion(&ar->scan.started);
3100 init_completion(&ar->scan.completed);
3101 init_completion(&ar->scan.on_channel);
3102 init_completion(&ar->target_suspend);
3103 init_completion(&ar->driver_recovery);
3104 init_completion(&ar->wow.wakeup_completed);
3106 init_completion(&ar->install_key_done);
3107 init_completion(&ar->vdev_setup_done);
3108 init_completion(&ar->thermal.wmi_sync);
3109 init_completion(&ar->bss_survey_done);
3111 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3113 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3117 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3118 if (!ar->workqueue_aux)
3121 mutex_init(&ar->conf_mutex);
3122 spin_lock_init(&ar->data_lock);
3124 INIT_LIST_HEAD(&ar->peers);
3125 init_waitqueue_head(&ar->peer_mapping_wq);
3126 init_waitqueue_head(&ar->htt.empty_tx_wq);
3127 init_waitqueue_head(&ar->wmi.tx_credits_wq);
3129 init_completion(&ar->offchan_tx_completed);
3130 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3131 skb_queue_head_init(&ar->offchan_tx_queue);
3133 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3134 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3136 INIT_WORK(&ar->register_work, ath10k_core_register_work);
3137 INIT_WORK(&ar->restart_work, ath10k_core_restart);
3138 INIT_WORK(&ar->set_coverage_class_work,
3139 ath10k_core_set_coverage_class_work);
3141 init_dummy_netdev(&ar->napi_dev);
3143 ret = ath10k_coredump_create(ar);
3145 goto err_free_aux_wq;
3147 ret = ath10k_debug_create(ar);
3149 goto err_free_coredump;
3154 ath10k_coredump_destroy(ar);
3157 destroy_workqueue(ar->workqueue_aux);
3159 destroy_workqueue(ar->workqueue);
3162 ath10k_mac_destroy(ar);
3166 EXPORT_SYMBOL(ath10k_core_create);
3168 void ath10k_core_destroy(struct ath10k *ar)
3170 flush_workqueue(ar->workqueue);
3171 destroy_workqueue(ar->workqueue);
3173 flush_workqueue(ar->workqueue_aux);
3174 destroy_workqueue(ar->workqueue_aux);
3176 ath10k_debug_destroy(ar);
3177 ath10k_coredump_destroy(ar);
3178 ath10k_htt_tx_destroy(&ar->htt);
3179 ath10k_wmi_free_host_mem(ar);
3180 ath10k_mac_destroy(ar);
3182 EXPORT_SYMBOL(ath10k_core_destroy);
3184 MODULE_AUTHOR("Qualcomm Atheros");
3185 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3186 MODULE_LICENSE("Dual BSD/GPL");