drivers/net/wireless/ath/ath10k/core.c

   1 /*
   2  * Copyright (c) 2005-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/firmware.h>
  20 #include <linux/of.h>
  21 #include <linux/dmi.h>
  22 #include <linux/ctype.h>
  23 #include <asm/byteorder.h>
  24
  25 #include "core.h"
  26 #include "mac.h"
  27 #include "htc.h"
  28 #include "hif.h"
  29 #include "wmi.h"
  30 #include "bmi.h"
  31 #include "debug.h"
  32 #include "htt.h"
  33 #include "testmode.h"
  34 #include "wmi-ops.h"
  35 #include "coredump.h"
  36
  37 unsigned int ath10k_debug_mask;
  38 static unsigned int ath10k_cryptmode_param;
  39 static bool uart_print;
  40 static bool skip_otp;
  41 static bool rawmode;
  42
  43 /* Enable ATH10K_FW_CRASH_DUMP_REGISTERS and ATH10K_FW_CRASH_DUMP_CE_DATA
  44  * by default.
  45  */
  46 unsigned long ath10k_coredump_mask = 0x3;
  47
  48 /* FIXME: most of these should be readonly */
  49 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  50 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  51 module_param(uart_print, bool, 0644);
  52 module_param(skip_otp, bool, 0644);
  53 module_param(rawmode, bool, 0644);
  54 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  55
  56 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  57 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  58 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  59 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  60 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  61 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  62
  63 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  64         {
  65                 .id = QCA988X_HW_2_0_VERSION,
  66                 .dev_id = QCA988X_2_0_DEVICE_ID,
  67                 .name = "qca988x hw2.0",
  68                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  69                 .uart_pin = 7,
  70                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  71                 .otp_exe_param = 0,
  72                 .channel_counters_freq_hz = 88000,
  73                 .max_probe_resp_desc_thres = 0,
  74                 .cal_data_len = 2116,
  75                 .fw = {
  76                         .dir = QCA988X_HW_2_0_FW_DIR,
  77                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  78                         .board_size = QCA988X_BOARD_DATA_SZ,
  79                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  80                 },
  81                 .hw_ops = &qca988x_ops,
  82                 .decap_align_bytes = 4,
  83                 .spectral_bin_discard = 0,
  84                 .vht160_mcs_rx_highest = 0,
  85                 .vht160_mcs_tx_highest = 0,
  86                 .n_cipher_suites = 8,
  87                 .num_peers = TARGET_TLV_NUM_PEERS,
  88                 .ast_skid_limit = 0x10,
  89                 .num_wds_entries = 0x20,
  90                 .target_64bit = false,
  91                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  92         },
  93         {
  94                 .id = QCA988X_HW_2_0_VERSION,
  95                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
  96                 .name = "qca988x hw2.0 ubiquiti",
  97                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  98                 .uart_pin = 7,
  99                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 100                 .otp_exe_param = 0,
 101                 .channel_counters_freq_hz = 88000,
 102                 .max_probe_resp_desc_thres = 0,
 103                 .cal_data_len = 2116,
 104                 .fw = {
 105                         .dir = QCA988X_HW_2_0_FW_DIR,
 106                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 107                         .board_size = QCA988X_BOARD_DATA_SZ,
 108                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 109                 },
 110                 .hw_ops = &qca988x_ops,
 111                 .decap_align_bytes = 4,
 112                 .spectral_bin_discard = 0,
 113                 .vht160_mcs_rx_highest = 0,
 114                 .vht160_mcs_tx_highest = 0,
 115                 .n_cipher_suites = 8,
 116                 .num_peers = TARGET_TLV_NUM_PEERS,
 117                 .ast_skid_limit = 0x10,
 118                 .num_wds_entries = 0x20,
 119                 .target_64bit = false,
 120                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 121         },
 122         {
 123                 .id = QCA9887_HW_1_0_VERSION,
 124                 .dev_id = QCA9887_1_0_DEVICE_ID,
 125                 .name = "qca9887 hw1.0",
 126                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 127                 .uart_pin = 7,
 128                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 129                 .otp_exe_param = 0,
 130                 .channel_counters_freq_hz = 88000,
 131                 .max_probe_resp_desc_thres = 0,
 132                 .cal_data_len = 2116,
 133                 .fw = {
 134                         .dir = QCA9887_HW_1_0_FW_DIR,
 135                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 136                         .board_size = QCA9887_BOARD_DATA_SZ,
 137                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 138                 },
 139                 .hw_ops = &qca988x_ops,
 140                 .decap_align_bytes = 4,
 141                 .spectral_bin_discard = 0,
 142                 .vht160_mcs_rx_highest = 0,
 143                 .vht160_mcs_tx_highest = 0,
 144                 .n_cipher_suites = 8,
 145                 .num_peers = TARGET_TLV_NUM_PEERS,
 146                 .ast_skid_limit = 0x10,
 147                 .num_wds_entries = 0x20,
 148                 .target_64bit = false,
 149                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 150         },
 151         {
 152                 .id = QCA6174_HW_2_1_VERSION,
 153                 .dev_id = QCA6164_2_1_DEVICE_ID,
 154                 .name = "qca6164 hw2.1",
 155                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 156                 .uart_pin = 6,
 157                 .otp_exe_param = 0,
 158                 .channel_counters_freq_hz = 88000,
 159                 .max_probe_resp_desc_thres = 0,
 160                 .cal_data_len = 8124,
 161                 .fw = {
 162                         .dir = QCA6174_HW_2_1_FW_DIR,
 163                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 164                         .board_size = QCA6174_BOARD_DATA_SZ,
 165                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 166                 },
 167                 .hw_ops = &qca988x_ops,
 168                 .decap_align_bytes = 4,
 169                 .spectral_bin_discard = 0,
 170                 .vht160_mcs_rx_highest = 0,
 171                 .vht160_mcs_tx_highest = 0,
 172                 .n_cipher_suites = 8,
 173                 .num_peers = TARGET_TLV_NUM_PEERS,
 174                 .ast_skid_limit = 0x10,
 175                 .num_wds_entries = 0x20,
 176                 .target_64bit = false,
 177                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 178         },
 179         {
 180                 .id = QCA6174_HW_2_1_VERSION,
 181                 .dev_id = QCA6174_2_1_DEVICE_ID,
 182                 .name = "qca6174 hw2.1",
 183                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 184                 .uart_pin = 6,
 185                 .otp_exe_param = 0,
 186                 .channel_counters_freq_hz = 88000,
 187                 .max_probe_resp_desc_thres = 0,
 188                 .cal_data_len = 8124,
 189                 .fw = {
 190                         .dir = QCA6174_HW_2_1_FW_DIR,
 191                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 192                         .board_size = QCA6174_BOARD_DATA_SZ,
 193                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 194                 },
 195                 .hw_ops = &qca988x_ops,
 196                 .decap_align_bytes = 4,
 197                 .spectral_bin_discard = 0,
 198                 .vht160_mcs_rx_highest = 0,
 199                 .vht160_mcs_tx_highest = 0,
 200                 .n_cipher_suites = 8,
 201                 .num_peers = TARGET_TLV_NUM_PEERS,
 202                 .ast_skid_limit = 0x10,
 203                 .num_wds_entries = 0x20,
 204                 .target_64bit = false,
 205                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 206         },
 207         {
 208                 .id = QCA6174_HW_3_0_VERSION,
 209                 .dev_id = QCA6174_2_1_DEVICE_ID,
 210                 .name = "qca6174 hw3.0",
 211                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 212                 .uart_pin = 6,
 213                 .otp_exe_param = 0,
 214                 .channel_counters_freq_hz = 88000,
 215                 .max_probe_resp_desc_thres = 0,
 216                 .cal_data_len = 8124,
 217                 .fw = {
 218                         .dir = QCA6174_HW_3_0_FW_DIR,
 219                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 220                         .board_size = QCA6174_BOARD_DATA_SZ,
 221                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 222                 },
 223                 .hw_ops = &qca988x_ops,
 224                 .decap_align_bytes = 4,
 225                 .spectral_bin_discard = 0,
 226                 .vht160_mcs_rx_highest = 0,
 227                 .vht160_mcs_tx_highest = 0,
 228                 .n_cipher_suites = 8,
 229                 .num_peers = TARGET_TLV_NUM_PEERS,
 230                 .ast_skid_limit = 0x10,
 231                 .num_wds_entries = 0x20,
 232                 .target_64bit = false,
 233                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 234         },
 235         {
 236                 .id = QCA6174_HW_3_2_VERSION,
 237                 .dev_id = QCA6174_2_1_DEVICE_ID,
 238                 .name = "qca6174 hw3.2",
 239                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 240                 .uart_pin = 6,
 241                 .otp_exe_param = 0,
 242                 .channel_counters_freq_hz = 88000,
 243                 .max_probe_resp_desc_thres = 0,
 244                 .cal_data_len = 8124,
 245                 .fw = {
 246                         /* uses same binaries as hw3.0 */
 247                         .dir = QCA6174_HW_3_0_FW_DIR,
 248                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 249                         .board_size = QCA6174_BOARD_DATA_SZ,
 250                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 251                 },
 252                 .hw_ops = &qca6174_ops,
 253                 .hw_clk = qca6174_clk,
 254                 .target_cpu_freq = 176000000,
 255                 .decap_align_bytes = 4,
 256                 .spectral_bin_discard = 0,
 257                 .vht160_mcs_rx_highest = 0,
 258                 .vht160_mcs_tx_highest = 0,
 259                 .n_cipher_suites = 8,
 260                 .num_peers = TARGET_TLV_NUM_PEERS,
 261                 .ast_skid_limit = 0x10,
 262                 .num_wds_entries = 0x20,
 263                 .target_64bit = false,
 264                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 265         },
 266         {
 267                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 268                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 269                 .name = "qca99x0 hw2.0",
 270                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 271                 .uart_pin = 7,
 272                 .otp_exe_param = 0x00000700,
 273                 .continuous_frag_desc = true,
 274                 .cck_rate_map_rev2 = true,
 275                 .channel_counters_freq_hz = 150000,
 276                 .max_probe_resp_desc_thres = 24,
 277                 .tx_chain_mask = 0xf,
 278                 .rx_chain_mask = 0xf,
 279                 .max_spatial_stream = 4,
 280                 .cal_data_len = 12064,
 281                 .fw = {
 282                         .dir = QCA99X0_HW_2_0_FW_DIR,
 283                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 284                         .board_size = QCA99X0_BOARD_DATA_SZ,
 285                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 286                 },
 287                 .sw_decrypt_mcast_mgmt = true,
 288                 .hw_ops = &qca99x0_ops,
 289                 .decap_align_bytes = 1,
 290                 .spectral_bin_discard = 4,
 291                 .vht160_mcs_rx_highest = 0,
 292                 .vht160_mcs_tx_highest = 0,
 293                 .n_cipher_suites = 11,
 294                 .num_peers = TARGET_TLV_NUM_PEERS,
 295                 .ast_skid_limit = 0x10,
 296                 .num_wds_entries = 0x20,
 297                 .target_64bit = false,
 298                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 299         },
 300         {
 301                 .id = QCA9984_HW_1_0_DEV_VERSION,
 302                 .dev_id = QCA9984_1_0_DEVICE_ID,
 303                 .name = "qca9984/qca9994 hw1.0",
 304                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 305                 .uart_pin = 7,
 306                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 307                 .otp_exe_param = 0x00000700,
 308                 .continuous_frag_desc = true,
 309                 .cck_rate_map_rev2 = true,
 310                 .channel_counters_freq_hz = 150000,
 311                 .max_probe_resp_desc_thres = 24,
 312                 .tx_chain_mask = 0xf,
 313                 .rx_chain_mask = 0xf,
 314                 .max_spatial_stream = 4,
 315                 .cal_data_len = 12064,
 316                 .fw = {
 317                         .dir = QCA9984_HW_1_0_FW_DIR,
 318                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 319                         .board_size = QCA99X0_BOARD_DATA_SZ,
 320                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 321                 },
 322                 .sw_decrypt_mcast_mgmt = true,
 323                 .hw_ops = &qca99x0_ops,
 324                 .decap_align_bytes = 1,
 325                 .spectral_bin_discard = 12,
 326
 327                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 328                  * or 2x2 160Mhz, long-guard-interval.
 329                  */
 330                 .vht160_mcs_rx_highest = 1560,
 331                 .vht160_mcs_tx_highest = 1560,
 332                 .n_cipher_suites = 11,
 333                 .num_peers = TARGET_TLV_NUM_PEERS,
 334                 .ast_skid_limit = 0x10,
 335                 .num_wds_entries = 0x20,
 336                 .target_64bit = false,
 337                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 338         },
 339         {
 340                 .id = QCA9888_HW_2_0_DEV_VERSION,
 341                 .dev_id = QCA9888_2_0_DEVICE_ID,
 342                 .name = "qca9888 hw2.0",
 343                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 344                 .uart_pin = 7,
 345                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 346                 .otp_exe_param = 0x00000700,
 347                 .continuous_frag_desc = true,
 348                 .channel_counters_freq_hz = 150000,
 349                 .max_probe_resp_desc_thres = 24,
 350                 .tx_chain_mask = 3,
 351                 .rx_chain_mask = 3,
 352                 .max_spatial_stream = 2,
 353                 .cal_data_len = 12064,
 354                 .fw = {
 355                         .dir = QCA9888_HW_2_0_FW_DIR,
 356                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 357                         .board_size = QCA99X0_BOARD_DATA_SZ,
 358                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 359                 },
 360                 .sw_decrypt_mcast_mgmt = true,
 361                 .hw_ops = &qca99x0_ops,
 362                 .decap_align_bytes = 1,
 363                 .spectral_bin_discard = 12,
 364
 365                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 366                  * 1x1 160Mhz, long-guard-interval.
 367                  */
 368                 .vht160_mcs_rx_highest = 780,
 369                 .vht160_mcs_tx_highest = 780,
 370                 .n_cipher_suites = 11,
 371                 .num_peers = TARGET_TLV_NUM_PEERS,
 372                 .ast_skid_limit = 0x10,
 373                 .num_wds_entries = 0x20,
 374                 .target_64bit = false,
 375                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 376         },
 377         {
 378                 .id = QCA9377_HW_1_0_DEV_VERSION,
 379                 .dev_id = QCA9377_1_0_DEVICE_ID,
 380                 .name = "qca9377 hw1.0",
 381                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 382                 .uart_pin = 6,
 383                 .otp_exe_param = 0,
 384                 .channel_counters_freq_hz = 88000,
 385                 .max_probe_resp_desc_thres = 0,
 386                 .cal_data_len = 8124,
 387                 .fw = {
 388                         .dir = QCA9377_HW_1_0_FW_DIR,
 389                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 390                         .board_size = QCA9377_BOARD_DATA_SZ,
 391                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 392                 },
 393                 .hw_ops = &qca988x_ops,
 394                 .decap_align_bytes = 4,
 395                 .spectral_bin_discard = 0,
 396                 .vht160_mcs_rx_highest = 0,
 397                 .vht160_mcs_tx_highest = 0,
 398                 .n_cipher_suites = 8,
 399                 .num_peers = TARGET_TLV_NUM_PEERS,
 400                 .ast_skid_limit = 0x10,
 401                 .num_wds_entries = 0x20,
 402                 .target_64bit = false,
 403                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 404         },
 405         {
 406                 .id = QCA9377_HW_1_1_DEV_VERSION,
 407                 .dev_id = QCA9377_1_0_DEVICE_ID,
 408                 .name = "qca9377 hw1.1",
 409                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 410                 .uart_pin = 6,
 411                 .otp_exe_param = 0,
 412                 .channel_counters_freq_hz = 88000,
 413                 .max_probe_resp_desc_thres = 0,
 414                 .cal_data_len = 8124,
 415                 .fw = {
 416                         .dir = QCA9377_HW_1_0_FW_DIR,
 417                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 418                         .board_size = QCA9377_BOARD_DATA_SZ,
 419                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 420                 },
 421                 .hw_ops = &qca6174_ops,
 422                 .hw_clk = qca6174_clk,
 423                 .target_cpu_freq = 176000000,
 424                 .decap_align_bytes = 4,
 425                 .spectral_bin_discard = 0,
 426                 .vht160_mcs_rx_highest = 0,
 427                 .vht160_mcs_tx_highest = 0,
 428                 .n_cipher_suites = 8,
 429                 .num_peers = TARGET_TLV_NUM_PEERS,
 430                 .ast_skid_limit = 0x10,
 431                 .num_wds_entries = 0x20,
 432                 .target_64bit = false,
 433                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 434         },
 435         {
 436                 .id = QCA4019_HW_1_0_DEV_VERSION,
 437                 .dev_id = 0,
 438                 .name = "qca4019 hw1.0",
 439                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 440                 .uart_pin = 7,
 441                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 442                 .otp_exe_param = 0x0010000,
 443                 .continuous_frag_desc = true,
 444                 .cck_rate_map_rev2 = true,
 445                 .channel_counters_freq_hz = 125000,
 446                 .max_probe_resp_desc_thres = 24,
 447                 .tx_chain_mask = 0x3,
 448                 .rx_chain_mask = 0x3,
 449                 .max_spatial_stream = 2,
 450                 .cal_data_len = 12064,
 451                 .fw = {
 452                         .dir = QCA4019_HW_1_0_FW_DIR,
 453                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 454                         .board_size = QCA4019_BOARD_DATA_SZ,
 455                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 456                 },
 457                 .sw_decrypt_mcast_mgmt = true,
 458                 .hw_ops = &qca99x0_ops,
 459                 .decap_align_bytes = 1,
 460                 .spectral_bin_discard = 4,
 461                 .vht160_mcs_rx_highest = 0,
 462                 .vht160_mcs_tx_highest = 0,
 463                 .n_cipher_suites = 11,
 464                 .num_peers = TARGET_TLV_NUM_PEERS,
 465                 .ast_skid_limit = 0x10,
 466                 .num_wds_entries = 0x20,
 467                 .target_64bit = false,
 468                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 469         },
 470         {
 471                 .id = WCN3990_HW_1_0_DEV_VERSION,
 472                 .dev_id = 0,
 473                 .name = "wcn3990 hw1.0",
 474                 .continuous_frag_desc = true,
 475                 .tx_chain_mask = 0x7,
 476                 .rx_chain_mask = 0x7,
 477                 .max_spatial_stream = 4,
 478                 .fw = {
 479                         .dir = WCN3990_HW_1_0_FW_DIR,
 480                 },
 481                 .sw_decrypt_mcast_mgmt = true,
 482                 .hw_ops = &wcn3990_ops,
 483                 .decap_align_bytes = 1,
 484                 .num_peers = TARGET_HL_10_TLV_NUM_PEERS,
 485                 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,
 486                 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,
 487                 .target_64bit = true,
 488                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 489         },
 490 };
 491
 492 static const char *const ath10k_core_fw_feature_str[] = {
 493         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 494         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 495         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 496         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 497         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 498         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 499         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 500         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 501         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 502         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 503         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 504         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 505         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 506         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 507         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 508         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 509         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 510         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 511         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 512         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 513 };
 514
 515 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 516                                                    size_t buf_len,
 517                                                    enum ath10k_fw_features feat)
 518 {
 519         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 520         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 521                      ATH10K_FW_FEATURE_COUNT);
 522
 523         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 524             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 525                 return scnprintf(buf, buf_len, "bit%d", feat);
 526         }
 527
 528         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 529 }
 530
 531 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 532                                      char *buf,
 533                                      size_t buf_len)
 534 {
 535         size_t len = 0;
 536         int i;
 537
 538         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 539                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 540                         if (len > 0)
 541                                 len += scnprintf(buf + len, buf_len - len, ",");
 542
 543                         len += ath10k_core_get_fw_feature_str(buf + len,
 544                                                               buf_len - len,
 545                                                               i);
 546                 }
 547         }
 548 }
 549
 550 static void ath10k_send_suspend_complete(struct ath10k *ar)
 551 {
 552         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 553
 554         complete(&ar->target_suspend);
 555 }
 556
 557 static void ath10k_init_sdio(struct ath10k *ar)
 558 {
 559         u32 param = 0;
 560
 561         ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 562         ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 563         ath10k_bmi_read32(ar, hi_acs_flags, &param);
 564
 565         param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET |
 566                   HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET |
 567                   HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE);
 568
 569         ath10k_bmi_write32(ar, hi_acs_flags, param);
 570 }
 571
 572 static int ath10k_init_configure_target(struct ath10k *ar)
 573 {
 574         u32 param_host;
 575         int ret;
 576
 577         /* tell target which HTC version it is used*/
 578         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 579                                  HTC_PROTOCOL_VERSION);
 580         if (ret) {
 581                 ath10k_err(ar, "settings HTC version failed\n");
 582                 return ret;
 583         }
 584
 585         /* set the firmware mode to STA/IBSS/AP */
 586         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 587         if (ret) {
 588                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 589                 return ret;
 590         }
 591
 592         /* TODO following parameters need to be re-visited. */
 593         /* num_device */
 594         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 595         /* Firmware mode */
 596         /* FIXME: Why FW_MODE_AP ??.*/
 597         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 598         /* mac_addr_method */
 599         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 600         /* firmware_bridge */
 601         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 602         /* fwsubmode */
 603         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 604
 605         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 606         if (ret) {
 607                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 608                 return ret;
 609         }
 610
 611         /* We do all byte-swapping on the host */
 612         ret = ath10k_bmi_write32(ar, hi_be, 0);
 613         if (ret) {
 614                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 615                 return ret;
 616         }
 617
 618         /* FW descriptor/Data swap flags */
 619         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 620
 621         if (ret) {
 622                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 623                 return ret;
 624         }
 625
 626         /* Some devices have a special sanity check that verifies the PCI
 627          * Device ID is written to this host interest var. It is known to be
 628          * required to boot QCA6164.
 629          */
 630         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 631                                  ar->dev_id);
 632         if (ret) {
 633                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 634                 return ret;
 635         }
 636
 637         return 0;
 638 }
 639
 640 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 641                                                    const char *dir,
 642                                                    const char *file)
 643 {
 644         char filename[100];
 645         const struct firmware *fw;
 646         int ret;
 647
 648         if (file == NULL)
 649                 return ERR_PTR(-ENOENT);
 650
 651         if (dir == NULL)
 652                 dir = ".";
 653
 654         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 655         ret = request_firmware(&fw, filename, ar->dev);
 656         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 657                    filename, ret);
 658
 659         if (ret)
 660                 return ERR_PTR(ret);
 661
 662         return fw;
 663 }
 664
 665 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 666                                       size_t data_len)
 667 {
 668         u32 board_data_size = ar->hw_params.fw.board_size;
 669         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 670         u32 board_ext_data_addr;
 671         int ret;
 672
 673         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 674         if (ret) {
 675                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 676                            ret);
 677                 return ret;
 678         }
 679
 680         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 681                    "boot push board extended data addr 0x%x\n",
 682                    board_ext_data_addr);
 683
 684         if (board_ext_data_addr == 0)
 685                 return 0;
 686
 687         if (data_len != (board_data_size + board_ext_data_size)) {
 688                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 689                            data_len, board_data_size, board_ext_data_size);
 690                 return -EINVAL;
 691         }
 692
 693         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 694                                       data + board_data_size,
 695                                       board_ext_data_size);
 696         if (ret) {
 697                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 698                 return ret;
 699         }
 700
 701         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 702                                  (board_ext_data_size << 16) | 1);
 703         if (ret) {
 704                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 705                            ret);
 706                 return ret;
 707         }
 708
 709         return 0;
 710 }
 711
 712 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
 713                                       size_t data_len)
 714 {
 715         u32 board_data_size = ar->hw_params.fw.board_size;
 716         u32 address;
 717         int ret;
 718
 719         ret = ath10k_push_board_ext_data(ar, data, data_len);
 720         if (ret) {
 721                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
 722                 goto exit;
 723         }
 724
 725         ret = ath10k_bmi_read32(ar, hi_board_data, &address);
 726         if (ret) {
 727                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
 728                 goto exit;
 729         }
 730
 731         ret = ath10k_bmi_write_memory(ar, address, data,
 732                                       min_t(u32, board_data_size,
 733                                             data_len));
 734         if (ret) {
 735                 ath10k_err(ar, "could not write board data (%d)\n", ret);
 736                 goto exit;
 737         }
 738
 739         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
 740         if (ret) {
 741                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
 742                 goto exit;
 743         }
 744
 745 exit:
 746         return ret;
 747 }
 748
 749 static int ath10k_download_cal_file(struct ath10k *ar,
 750                                     const struct firmware *file)
 751 {
 752         int ret;
 753
 754         if (!file)
 755                 return -ENOENT;
 756
 757         if (IS_ERR(file))
 758                 return PTR_ERR(file);
 759
 760         ret = ath10k_download_board_data(ar, file->data, file->size);
 761         if (ret) {
 762                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
 763                 return ret;
 764         }
 765
 766         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
 767
 768         return 0;
 769 }
 770
 771 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
 772 {
 773         struct device_node *node;
 774         int data_len;
 775         void *data;
 776         int ret;
 777
 778         node = ar->dev->of_node;
 779         if (!node)
 780                 /* Device Tree is optional, don't print any warnings if
 781                  * there's no node for ath10k.
 782                  */
 783                 return -ENOENT;
 784
 785         if (!of_get_property(node, dt_name, &data_len)) {
 786                 /* The calibration data node is optional */
 787                 return -ENOENT;
 788         }
 789
 790         if (data_len != ar->hw_params.cal_data_len) {
 791                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
 792                             data_len);
 793                 ret = -EMSGSIZE;
 794                 goto out;
 795         }
 796
 797         data = kmalloc(data_len, GFP_KERNEL);
 798         if (!data) {
 799                 ret = -ENOMEM;
 800                 goto out;
 801         }
 802
 803         ret = of_property_read_u8_array(node, dt_name, data, data_len);
 804         if (ret) {
 805                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
 806                             ret);
 807                 goto out_free;
 808         }
 809
 810         ret = ath10k_download_board_data(ar, data, data_len);
 811         if (ret) {
 812                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
 813                             ret);
 814                 goto out_free;
 815         }
 816
 817         ret = 0;
 818
 819 out_free:
 820         kfree(data);
 821
 822 out:
 823         return ret;
 824 }
 825
 826 static int ath10k_download_cal_eeprom(struct ath10k *ar)
 827 {
 828         size_t data_len;
 829         void *data = NULL;
 830         int ret;
 831
 832         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
 833         if (ret) {
 834                 if (ret != -EOPNOTSUPP)
 835                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
 836                                     ret);
 837                 goto out_free;
 838         }
 839
 840         ret = ath10k_download_board_data(ar, data, data_len);
 841         if (ret) {
 842                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
 843                             ret);
 844                 goto out_free;
 845         }
 846
 847         ret = 0;
 848
 849 out_free:
 850         kfree(data);
 851
 852         return ret;
 853 }
 854
 855 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 856 {
 857         u32 result, address;
 858         u8 board_id, chip_id;
 859         int ret, bmi_board_id_param;
 860
 861         address = ar->hw_params.patch_load_addr;
 862
 863         if (!ar->normal_mode_fw.fw_file.otp_data ||
 864             !ar->normal_mode_fw.fw_file.otp_len) {
 865                 ath10k_warn(ar,
 866                             "failed to retrieve board id because of invalid otp\n");
 867                 return -ENODATA;
 868         }
 869
 870         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 871                    "boot upload otp to 0x%x len %zd for board id\n",
 872                    address, ar->normal_mode_fw.fw_file.otp_len);
 873
 874         ret = ath10k_bmi_fast_download(ar, address,
 875                                        ar->normal_mode_fw.fw_file.otp_data,
 876                                        ar->normal_mode_fw.fw_file.otp_len);
 877         if (ret) {
 878                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 879                            ret);
 880                 return ret;
 881         }
 882
 883         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 884             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 885                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 886         else
 887                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 888
 889         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 890         if (ret) {
 891                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 892                            ret);
 893                 return ret;
 894         }
 895
 896         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 897         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 898
 899         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 900                    "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
 901                    result, board_id, chip_id);
 902
 903         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 904             (board_id == 0)) {
 905                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 906                            "board id does not exist in otp, ignore it\n");
 907                 return -EOPNOTSUPP;
 908         }
 909
 910         ar->id.bmi_ids_valid = true;
 911         ar->id.bmi_board_id = board_id;
 912         ar->id.bmi_chip_id = chip_id;
 913
 914         return 0;
 915 }
 916
 917 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
 918 {
 919         struct ath10k *ar = data;
 920         const char *bdf_ext;
 921         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
 922         u8 bdf_enabled;
 923         int i;
 924
 925         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
 926                 return;
 927
 928         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
 929                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 930                            "wrong smbios bdf ext type length (%d).\n",
 931                            hdr->length);
 932                 return;
 933         }
 934
 935         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
 936         if (!bdf_enabled) {
 937                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
 938                 return;
 939         }
 940
 941         /* Only one string exists (per spec) */
 942         bdf_ext = (char *)hdr + hdr->length;
 943
 944         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
 945                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 946                            "bdf variant magic does not match.\n");
 947                 return;
 948         }
 949
 950         for (i = 0; i < strlen(bdf_ext); i++) {
 951                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
 952                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 953                                    "bdf variant name contains non ascii chars.\n");
 954                         return;
 955                 }
 956         }
 957
 958         /* Copy extension name without magic suffix */
 959         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
 960                     sizeof(ar->id.bdf_ext)) < 0) {
 961                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 962                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
 963                             bdf_ext);
 964                 return;
 965         }
 966
 967         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 968                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
 969                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
 970 }
 971
 972 static int ath10k_core_check_smbios(struct ath10k *ar)
 973 {
 974         ar->id.bdf_ext[0] = '\0';
 975         dmi_walk(ath10k_core_check_bdfext, ar);
 976
 977         if (ar->id.bdf_ext[0] == '\0')
 978                 return -ENODATA;
 979
 980         return 0;
 981 }
 982
 983 static int ath10k_core_check_dt(struct ath10k *ar)
 984 {
 985         struct device_node *node;
 986         const char *variant = NULL;
 987
 988         node = ar->dev->of_node;
 989         if (!node)
 990                 return -ENOENT;
 991
 992         of_property_read_string(node, "qcom,ath10k-calibration-variant",
 993                                 &variant);
 994         if (!variant)
 995                 return -ENODATA;
 996
 997         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
 998                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 999                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1000                             variant);
1001
1002         return 0;
1003 }
1004
1005 static int ath10k_download_and_run_otp(struct ath10k *ar)
1006 {
1007         u32 result, address = ar->hw_params.patch_load_addr;
1008         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1009         int ret;
1010
1011         ret = ath10k_download_board_data(ar,
1012                                          ar->running_fw->board_data,
1013                                          ar->running_fw->board_len);
1014         if (ret) {
1015                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1016                 return ret;
1017         }
1018
1019         /* OTP is optional */
1020
1021         if (!ar->running_fw->fw_file.otp_data ||
1022             !ar->running_fw->fw_file.otp_len) {
1023                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1024                             ar->running_fw->fw_file.otp_data,
1025                             ar->running_fw->fw_file.otp_len);
1026                 return 0;
1027         }
1028
1029         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1030                    address, ar->running_fw->fw_file.otp_len);
1031
1032         ret = ath10k_bmi_fast_download(ar, address,
1033                                        ar->running_fw->fw_file.otp_data,
1034                                        ar->running_fw->fw_file.otp_len);
1035         if (ret) {
1036                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1037                 return ret;
1038         }
1039
1040         /* As of now pre-cal is valid for 10_4 variants */
1041         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1042             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1043                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1044
1045         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1046         if (ret) {
1047                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1048                 return ret;
1049         }
1050
1051         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1052
1053         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1054                                    ar->running_fw->fw_file.fw_features)) &&
1055             result != 0) {
1056                 ath10k_err(ar, "otp calibration failed: %d", result);
1057                 return -EINVAL;
1058         }
1059
1060         return 0;
1061 }
1062
1063 static int ath10k_download_fw(struct ath10k *ar)
1064 {
1065         u32 address, data_len;
1066         const void *data;
1067         int ret;
1068
1069         address = ar->hw_params.patch_load_addr;
1070
1071         data = ar->running_fw->fw_file.firmware_data;
1072         data_len = ar->running_fw->fw_file.firmware_len;
1073
1074         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1075         if (ret) {
1076                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1077                            ret);
1078                 return ret;
1079         }
1080
1081         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1082                    "boot uploading firmware image %pK len %d\n",
1083                    data, data_len);
1084
1085         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1086         if (ret) {
1087                 ath10k_err(ar, "failed to download firmware: %d\n",
1088                            ret);
1089                 return ret;
1090         }
1091
1092         return ret;
1093 }
1094
1095 static void ath10k_core_free_board_files(struct ath10k *ar)
1096 {
1097         if (!IS_ERR(ar->normal_mode_fw.board))
1098                 release_firmware(ar->normal_mode_fw.board);
1099
1100         ar->normal_mode_fw.board = NULL;
1101         ar->normal_mode_fw.board_data = NULL;
1102         ar->normal_mode_fw.board_len = 0;
1103 }
1104
1105 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1106 {
1107         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1108                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1109
1110         if (!IS_ERR(ar->cal_file))
1111                 release_firmware(ar->cal_file);
1112
1113         if (!IS_ERR(ar->pre_cal_file))
1114                 release_firmware(ar->pre_cal_file);
1115
1116         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1117
1118         ar->normal_mode_fw.fw_file.otp_data = NULL;
1119         ar->normal_mode_fw.fw_file.otp_len = 0;
1120
1121         ar->normal_mode_fw.fw_file.firmware = NULL;
1122         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1123         ar->normal_mode_fw.fw_file.firmware_len = 0;
1124
1125         ar->cal_file = NULL;
1126         ar->pre_cal_file = NULL;
1127 }
1128
1129 static int ath10k_fetch_cal_file(struct ath10k *ar)
1130 {
1131         char filename[100];
1132
1133         /* pre-cal-<bus>-<id>.bin */
1134         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1135                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1136
1137         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1138         if (!IS_ERR(ar->pre_cal_file))
1139                 goto success;
1140
1141         /* cal-<bus>-<id>.bin */
1142         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1143                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1144
1145         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1146         if (IS_ERR(ar->cal_file))
1147                 /* calibration file is optional, don't print any warnings */
1148                 return PTR_ERR(ar->cal_file);
1149 success:
1150         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1151                    ATH10K_FW_DIR, filename);
1152
1153         return 0;
1154 }
1155
1156 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
1157 {
1158         if (!ar->hw_params.fw.board) {
1159                 ath10k_err(ar, "failed to find board file fw entry\n");
1160                 return -EINVAL;
1161         }
1162
1163         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1164                                                         ar->hw_params.fw.dir,
1165                                                         ar->hw_params.fw.board);
1166         if (IS_ERR(ar->normal_mode_fw.board))
1167                 return PTR_ERR(ar->normal_mode_fw.board);
1168
1169         ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1170         ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1171
1172         return 0;
1173 }
1174
1175 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1176                                          const void *buf, size_t buf_len,
1177                                          const char *boardname)
1178 {
1179         const struct ath10k_fw_ie *hdr;
1180         bool name_match_found;
1181         int ret, board_ie_id;
1182         size_t board_ie_len;
1183         const void *board_ie_data;
1184
1185         name_match_found = false;
1186
1187         /* go through ATH10K_BD_IE_BOARD_ elements */
1188         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1189                 hdr = buf;
1190                 board_ie_id = le32_to_cpu(hdr->id);
1191                 board_ie_len = le32_to_cpu(hdr->len);
1192                 board_ie_data = hdr->data;
1193
1194                 buf_len -= sizeof(*hdr);
1195                 buf += sizeof(*hdr);
1196
1197                 if (buf_len < ALIGN(board_ie_len, 4)) {
1198                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1199                                    buf_len, ALIGN(board_ie_len, 4));
1200                         ret = -EINVAL;
1201                         goto out;
1202                 }
1203
1204                 switch (board_ie_id) {
1205                 case ATH10K_BD_IE_BOARD_NAME:
1206                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1207                                         board_ie_data, board_ie_len);
1208
1209                         if (board_ie_len != strlen(boardname))
1210                                 break;
1211
1212                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1213                         if (ret)
1214                                 break;
1215
1216                         name_match_found = true;
1217                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1218                                    "boot found match for name '%s'",
1219                                    boardname);
1220                         break;
1221                 case ATH10K_BD_IE_BOARD_DATA:
1222                         if (!name_match_found)
1223                                 /* no match found */
1224                                 break;
1225
1226                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1227                                    "boot found board data for '%s'",
1228                                    boardname);
1229
1230                         ar->normal_mode_fw.board_data = board_ie_data;
1231                         ar->normal_mode_fw.board_len = board_ie_len;
1232
1233                         ret = 0;
1234                         goto out;
1235                 default:
1236                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1237                                     board_ie_id);
1238                         break;
1239                 }
1240
1241                 /* jump over the padding */
1242                 board_ie_len = ALIGN(board_ie_len, 4);
1243
1244                 buf_len -= board_ie_len;
1245                 buf += board_ie_len;
1246         }
1247
1248         /* no match found */
1249         ret = -ENOENT;
1250
1251 out:
1252         return ret;
1253 }
1254
1255 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1256                                               const char *boardname,
1257                                               const char *filename)
1258 {
1259         size_t len, magic_len, ie_len;
1260         struct ath10k_fw_ie *hdr;
1261         const u8 *data;
1262         int ret, ie_id;
1263
1264         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1265                                                         ar->hw_params.fw.dir,
1266                                                         filename);
1267         if (IS_ERR(ar->normal_mode_fw.board))
1268                 return PTR_ERR(ar->normal_mode_fw.board);
1269
1270         data = ar->normal_mode_fw.board->data;
1271         len = ar->normal_mode_fw.board->size;
1272
1273         /* magic has extra null byte padded */
1274         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1275         if (len < magic_len) {
1276                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1277                            ar->hw_params.fw.dir, filename, len);
1278                 ret = -EINVAL;
1279                 goto err;
1280         }
1281
1282         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1283                 ath10k_err(ar, "found invalid board magic\n");
1284                 ret = -EINVAL;
1285                 goto err;
1286         }
1287
1288         /* magic is padded to 4 bytes */
1289         magic_len = ALIGN(magic_len, 4);
1290         if (len < magic_len) {
1291                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1292                            ar->hw_params.fw.dir, filename, len);
1293                 ret = -EINVAL;
1294                 goto err;
1295         }
1296
1297         data += magic_len;
1298         len -= magic_len;
1299
1300         while (len > sizeof(struct ath10k_fw_ie)) {
1301                 hdr = (struct ath10k_fw_ie *)data;
1302                 ie_id = le32_to_cpu(hdr->id);
1303                 ie_len = le32_to_cpu(hdr->len);
1304
1305                 len -= sizeof(*hdr);
1306                 data = hdr->data;
1307
1308                 /* jump over the padding */
1309                 ie_len = ALIGN(ie_len, 4);
1310
1311                 if (len < ie_len) {
1312                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1313                                    ie_id, ie_len, len);
1314                         ret = -EINVAL;
1315                         goto err;
1316                 }
1317
1318                 switch (ie_id) {
1319                 case ATH10K_BD_IE_BOARD:
1320                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1321                                                             boardname);
1322                         if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') {
1323                                 /* try default bdf if variant was not found */
1324                                 char *s, *v = ",variant=";
1325                                 char boardname2[100];
1326
1327                                 strlcpy(boardname2, boardname,
1328                                         sizeof(boardname2));
1329
1330                                 s = strstr(boardname2, v);
1331                                 if (s)
1332                                         *s = '\0';  /* strip ",variant=%s" */
1333
1334                                 ret = ath10k_core_parse_bd_ie_board(ar, data,
1335                                                                     ie_len,
1336                                                                     boardname2);
1337                         }
1338
1339                         if (ret == -ENOENT)
1340                                 /* no match found, continue */
1341                                 break;
1342                         else if (ret)
1343                                 /* there was an error, bail out */
1344                                 goto err;
1345
1346                         /* board data found */
1347                         goto out;
1348                 }
1349
1350                 len -= ie_len;
1351                 data += ie_len;
1352         }
1353
1354 out:
1355         if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1356                 ath10k_err(ar,
1357                            "failed to fetch board data for %s from %s/%s\n",
1358                            boardname, ar->hw_params.fw.dir, filename);
1359                 ret = -ENODATA;
1360                 goto err;
1361         }
1362
1363         return 0;
1364
1365 err:
1366         ath10k_core_free_board_files(ar);
1367         return ret;
1368 }
1369
1370 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1371                                          size_t name_len)
1372 {
1373         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1374         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1375
1376         if (ar->id.bdf_ext[0] != '\0')
1377                 scnprintf(variant, sizeof(variant), ",variant=%s",
1378                           ar->id.bdf_ext);
1379
1380         if (ar->id.bmi_ids_valid) {
1381                 scnprintf(name, name_len,
1382                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1383                           ath10k_bus_str(ar->hif.bus),
1384                           ar->id.bmi_chip_id,
1385                           ar->id.bmi_board_id, variant);
1386                 goto out;
1387         }
1388
1389         scnprintf(name, name_len,
1390                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1391                   ath10k_bus_str(ar->hif.bus),
1392                   ar->id.vendor, ar->id.device,
1393                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1394 out:
1395         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1396
1397         return 0;
1398 }
1399
1400 static int ath10k_core_fetch_board_file(struct ath10k *ar)
1401 {
1402         char boardname[100];
1403         int ret;
1404
1405         ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1406         if (ret) {
1407                 ath10k_err(ar, "failed to create board name: %d", ret);
1408                 return ret;
1409         }
1410
1411         ar->bd_api = 2;
1412         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1413                                                  ATH10K_BOARD_API2_FILE);
1414         if (!ret)
1415                 goto success;
1416
1417         ar->bd_api = 1;
1418         ret = ath10k_core_fetch_board_data_api_1(ar);
1419         if (ret) {
1420                 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1421                            ar->hw_params.fw.dir);
1422                 return ret;
1423         }
1424
1425 success:
1426         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1427         return 0;
1428 }
1429
1430 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1431                                      struct ath10k_fw_file *fw_file)
1432 {
1433         size_t magic_len, len, ie_len;
1434         int ie_id, i, index, bit, ret;
1435         struct ath10k_fw_ie *hdr;
1436         const u8 *data;
1437         __le32 *timestamp, *version;
1438
1439         /* first fetch the firmware file (firmware-*.bin) */
1440         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1441                                                  name);
1442         if (IS_ERR(fw_file->firmware))
1443                 return PTR_ERR(fw_file->firmware);
1444
1445         data = fw_file->firmware->data;
1446         len = fw_file->firmware->size;
1447
1448         /* magic also includes the null byte, check that as well */
1449         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1450
1451         if (len < magic_len) {
1452                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1453                            ar->hw_params.fw.dir, name, len);
1454                 ret = -EINVAL;
1455                 goto err;
1456         }
1457
1458         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1459                 ath10k_err(ar, "invalid firmware magic\n");
1460                 ret = -EINVAL;
1461                 goto err;
1462         }
1463
1464         /* jump over the padding */
1465         magic_len = ALIGN(magic_len, 4);
1466
1467         len -= magic_len;
1468         data += magic_len;
1469
1470         /* loop elements */
1471         while (len > sizeof(struct ath10k_fw_ie)) {
1472                 hdr = (struct ath10k_fw_ie *)data;
1473
1474                 ie_id = le32_to_cpu(hdr->id);
1475                 ie_len = le32_to_cpu(hdr->len);
1476
1477                 len -= sizeof(*hdr);
1478                 data += sizeof(*hdr);
1479
1480                 /* jump over the padding */
1481                 ie_len = ALIGN(ie_len, 4);
1482
1483                 if (len < ie_len) {
1484                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1485                                    ie_id, len, ie_len);
1486                         ret = -EINVAL;
1487                         goto err;
1488                 }
1489
1490                 switch (ie_id) {
1491                 case ATH10K_FW_IE_FW_VERSION:
1492                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1493                                 break;
1494
1495                         memcpy(fw_file->fw_version, data, ie_len);
1496                         fw_file->fw_version[ie_len] = '\0';
1497
1498                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1499                                    "found fw version %s\n",
1500                                     fw_file->fw_version);
1501                         break;
1502                 case ATH10K_FW_IE_TIMESTAMP:
1503                         if (ie_len != sizeof(u32))
1504                                 break;
1505
1506                         timestamp = (__le32 *)data;
1507
1508                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1509                                    le32_to_cpup(timestamp));
1510                         break;
1511                 case ATH10K_FW_IE_FEATURES:
1512                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1513                                    "found firmware features ie (%zd B)\n",
1514                                    ie_len);
1515
1516                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1517                                 index = i / 8;
1518                                 bit = i % 8;
1519
1520                                 if (index == ie_len)
1521                                         break;
1522
1523                                 if (data[index] & (1 << bit)) {
1524                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1525                                                    "Enabling feature bit: %i\n",
1526                                                    i);
1527                                         __set_bit(i, fw_file->fw_features);
1528                                 }
1529                         }
1530
1531                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1532                                         fw_file->fw_features,
1533                                         sizeof(fw_file->fw_features));
1534                         break;
1535                 case ATH10K_FW_IE_FW_IMAGE:
1536                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1537                                    "found fw image ie (%zd B)\n",
1538                                    ie_len);
1539
1540                         fw_file->firmware_data = data;
1541                         fw_file->firmware_len = ie_len;
1542
1543                         break;
1544                 case ATH10K_FW_IE_OTP_IMAGE:
1545                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1546                                    "found otp image ie (%zd B)\n",
1547                                    ie_len);
1548
1549                         fw_file->otp_data = data;
1550                         fw_file->otp_len = ie_len;
1551
1552                         break;
1553                 case ATH10K_FW_IE_WMI_OP_VERSION:
1554                         if (ie_len != sizeof(u32))
1555                                 break;
1556
1557                         version = (__le32 *)data;
1558
1559                         fw_file->wmi_op_version = le32_to_cpup(version);
1560
1561                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1562                                    fw_file->wmi_op_version);
1563                         break;
1564                 case ATH10K_FW_IE_HTT_OP_VERSION:
1565                         if (ie_len != sizeof(u32))
1566                                 break;
1567
1568                         version = (__le32 *)data;
1569
1570                         fw_file->htt_op_version = le32_to_cpup(version);
1571
1572                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1573                                    fw_file->htt_op_version);
1574                         break;
1575                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1576                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1577                                    "found fw code swap image ie (%zd B)\n",
1578                                    ie_len);
1579                         fw_file->codeswap_data = data;
1580                         fw_file->codeswap_len = ie_len;
1581                         break;
1582                 default:
1583                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1584                                     le32_to_cpu(hdr->id));
1585                         break;
1586                 }
1587
1588                 len -= ie_len;
1589                 data += ie_len;
1590         }
1591
1592         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1593             (!fw_file->firmware_data || !fw_file->firmware_len)) {
1594                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1595                             ar->hw_params.fw.dir, name);
1596                 ret = -ENOMEDIUM;
1597                 goto err;
1598         }
1599
1600         return 0;
1601
1602 err:
1603         ath10k_core_free_firmware_files(ar);
1604         return ret;
1605 }
1606
1607 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1608                                     size_t fw_name_len, int fw_api)
1609 {
1610         switch (ar->hif.bus) {
1611         case ATH10K_BUS_SDIO:
1612         case ATH10K_BUS_USB:
1613                 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1614                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1615                           fw_api);
1616                 break;
1617         case ATH10K_BUS_PCI:
1618         case ATH10K_BUS_AHB:
1619         case ATH10K_BUS_SNOC:
1620                 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
1621                           ATH10K_FW_FILE_BASE, fw_api);
1622                 break;
1623         }
1624 }
1625
1626 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1627 {
1628         int ret, i;
1629         char fw_name[100];
1630
1631         /* calibration file is optional, don't check for any errors */
1632         ath10k_fetch_cal_file(ar);
1633
1634         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1635                 ar->fw_api = i;
1636                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1637                            ar->fw_api);
1638
1639                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1640                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1641                                                        &ar->normal_mode_fw.fw_file);
1642                 if (!ret)
1643                         goto success;
1644         }
1645
1646         /* we end up here if we couldn't fetch any firmware */
1647
1648         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1649                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1650                    ret);
1651
1652         return ret;
1653
1654 success:
1655         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1656
1657         return 0;
1658 }
1659
1660 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1661 {
1662         int ret;
1663
1664         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1665         if (ret == 0) {
1666                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1667                 goto success;
1668         }
1669
1670         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1671                    "boot did not find a pre calibration file, try DT next: %d\n",
1672                    ret);
1673
1674         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1675         if (ret) {
1676                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1677                            "unable to load pre cal data from DT: %d\n", ret);
1678                 return ret;
1679         }
1680         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1681
1682 success:
1683         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1684                    ath10k_cal_mode_str(ar->cal_mode));
1685
1686         return 0;
1687 }
1688
1689 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1690 {
1691         int ret;
1692
1693         ret = ath10k_core_pre_cal_download(ar);
1694         if (ret) {
1695                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1696                            "failed to load pre cal data: %d\n", ret);
1697                 return ret;
1698         }
1699
1700         ret = ath10k_core_get_board_id_from_otp(ar);
1701         if (ret) {
1702                 ath10k_err(ar, "failed to get board id: %d\n", ret);
1703                 return ret;
1704         }
1705
1706         ret = ath10k_download_and_run_otp(ar);
1707         if (ret) {
1708                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1709                 return ret;
1710         }
1711
1712         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1713                    "pre cal configuration done successfully\n");
1714
1715         return 0;
1716 }
1717
1718 static int ath10k_download_cal_data(struct ath10k *ar)
1719 {
1720         int ret;
1721
1722         ret = ath10k_core_pre_cal_config(ar);
1723         if (ret == 0)
1724                 return 0;
1725
1726         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1727                    "pre cal download procedure failed, try cal file: %d\n",
1728                    ret);
1729
1730         ret = ath10k_download_cal_file(ar, ar->cal_file);
1731         if (ret == 0) {
1732                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1733                 goto done;
1734         }
1735
1736         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1737                    "boot did not find a calibration file, try DT next: %d\n",
1738                    ret);
1739
1740         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1741         if (ret == 0) {
1742                 ar->cal_mode = ATH10K_CAL_MODE_DT;
1743                 goto done;
1744         }
1745
1746         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1747                    "boot did not find DT entry, try target EEPROM next: %d\n",
1748                    ret);
1749
1750         ret = ath10k_download_cal_eeprom(ar);
1751         if (ret == 0) {
1752                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1753                 goto done;
1754         }
1755
1756         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1757                    "boot did not find target EEPROM entry, try OTP next: %d\n",
1758                    ret);
1759
1760         ret = ath10k_download_and_run_otp(ar);
1761         if (ret) {
1762                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1763                 return ret;
1764         }
1765
1766         ar->cal_mode = ATH10K_CAL_MODE_OTP;
1767
1768 done:
1769         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1770                    ath10k_cal_mode_str(ar->cal_mode));
1771         return 0;
1772 }
1773
1774 static int ath10k_init_uart(struct ath10k *ar)
1775 {
1776         int ret;
1777
1778         /*
1779          * Explicitly setting UART prints to zero as target turns it on
1780          * based on scratch registers.
1781          */
1782         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1783         if (ret) {
1784                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1785                 return ret;
1786         }
1787
1788         if (!uart_print)
1789                 return 0;
1790
1791         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1792         if (ret) {
1793                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1794                 return ret;
1795         }
1796
1797         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1798         if (ret) {
1799                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1800                 return ret;
1801         }
1802
1803         /* Set the UART baud rate to 19200. */
1804         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1805         if (ret) {
1806                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1807                 return ret;
1808         }
1809
1810         ath10k_info(ar, "UART prints enabled\n");
1811         return 0;
1812 }
1813
1814 static int ath10k_init_hw_params(struct ath10k *ar)
1815 {
1816         const struct ath10k_hw_params *uninitialized_var(hw_params);
1817         int i;
1818
1819         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1820                 hw_params = &ath10k_hw_params_list[i];
1821
1822                 if (hw_params->id == ar->target_version &&
1823                     hw_params->dev_id == ar->dev_id)
1824                         break;
1825         }
1826
1827         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1828                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1829                            ar->target_version);
1830                 return -EINVAL;
1831         }
1832
1833         ar->hw_params = *hw_params;
1834
1835         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1836                    ar->hw_params.name, ar->target_version);
1837
1838         return 0;
1839 }
1840
1841 static void ath10k_core_restart(struct work_struct *work)
1842 {
1843         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1844         int ret;
1845
1846         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1847
1848         /* Place a barrier to make sure the compiler doesn't reorder
1849          * CRASH_FLUSH and calling other functions.
1850          */
1851         barrier();
1852
1853         ieee80211_stop_queues(ar->hw);
1854         ath10k_drain_tx(ar);
1855         complete(&ar->scan.started);
1856         complete(&ar->scan.completed);
1857         complete(&ar->scan.on_channel);
1858         complete(&ar->offchan_tx_completed);
1859         complete(&ar->install_key_done);
1860         complete(&ar->vdev_setup_done);
1861         complete(&ar->thermal.wmi_sync);
1862         complete(&ar->bss_survey_done);
1863         wake_up(&ar->htt.empty_tx_wq);
1864         wake_up(&ar->wmi.tx_credits_wq);
1865         wake_up(&ar->peer_mapping_wq);
1866
1867         /* TODO: We can have one instance of cancelling coverage_class_work by
1868          * moving it to ath10k_halt(), so that both stop() and restart() would
1869          * call that but it takes conf_mutex() and if we call cancel_work_sync()
1870          * with conf_mutex it will deadlock.
1871          */
1872         cancel_work_sync(&ar->set_coverage_class_work);
1873
1874         mutex_lock(&ar->conf_mutex);
1875
1876         switch (ar->state) {
1877         case ATH10K_STATE_ON:
1878                 ar->state = ATH10K_STATE_RESTARTING;
1879                 ath10k_halt(ar);
1880                 ath10k_scan_finish(ar);
1881                 ieee80211_restart_hw(ar->hw);
1882                 break;
1883         case ATH10K_STATE_OFF:
1884                 /* this can happen if driver is being unloaded
1885                  * or if the crash happens during FW probing
1886                  */
1887                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1888                 break;
1889         case ATH10K_STATE_RESTARTING:
1890                 /* hw restart might be requested from multiple places */
1891                 break;
1892         case ATH10K_STATE_RESTARTED:
1893                 ar->state = ATH10K_STATE_WEDGED;
1894                 /* fall through */
1895         case ATH10K_STATE_WEDGED:
1896                 ath10k_warn(ar, "device is wedged, will not restart\n");
1897                 break;
1898         case ATH10K_STATE_UTF:
1899                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1900                 break;
1901         }
1902
1903         mutex_unlock(&ar->conf_mutex);
1904
1905         ret = ath10k_coredump_submit(ar);
1906         if (ret)
1907                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
1908                             ret);
1909 }
1910
1911 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
1912 {
1913         struct ath10k *ar = container_of(work, struct ath10k,
1914                                          set_coverage_class_work);
1915
1916         if (ar->hw_params.hw_ops->set_coverage_class)
1917                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
1918 }
1919
1920 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1921 {
1922         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1923
1924         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1925             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1926                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1927                 return -EINVAL;
1928         }
1929
1930         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1931                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1932                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1933                 return -EINVAL;
1934         }
1935
1936         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1937         switch (ath10k_cryptmode_param) {
1938         case ATH10K_CRYPT_MODE_HW:
1939                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1940                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1941                 break;
1942         case ATH10K_CRYPT_MODE_SW:
1943                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1944                               fw_file->fw_features)) {
1945                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1946                         return -EINVAL;
1947                 }
1948
1949                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1950                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1951                 break;
1952         default:
1953                 ath10k_info(ar, "invalid cryptmode: %d\n",
1954                             ath10k_cryptmode_param);
1955                 return -EINVAL;
1956         }
1957
1958         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1959         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1960
1961         if (rawmode) {
1962                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1963                               fw_file->fw_features)) {
1964                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
1965                         return -EINVAL;
1966                 }
1967                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1968         }
1969
1970         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1971                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1972
1973                 /* Workaround:
1974                  *
1975                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1976                  * and causes enormous performance issues (malformed frames,
1977                  * etc).
1978                  *
1979                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
1980                  * albeit a bit slower compared to regular operation.
1981                  */
1982                 ar->htt.max_num_amsdu = 1;
1983         }
1984
1985         /* Backwards compatibility for firmwares without
1986          * ATH10K_FW_IE_WMI_OP_VERSION.
1987          */
1988         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1989                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1990                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1991                                      fw_file->fw_features))
1992                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1993                         else
1994                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1995                 } else {
1996                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1997                 }
1998         }
1999
2000         switch (fw_file->wmi_op_version) {
2001         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2002                 ar->max_num_peers = TARGET_NUM_PEERS;
2003                 ar->max_num_stations = TARGET_NUM_STATIONS;
2004                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2005                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2006                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2007                         WMI_STAT_PEER;
2008                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2009                 break;
2010         case ATH10K_FW_WMI_OP_VERSION_10_1:
2011         case ATH10K_FW_WMI_OP_VERSION_10_2:
2012         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2013                 if (ath10k_peer_stats_enabled(ar)) {
2014                         ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2015                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2016                 } else {
2017                         ar->max_num_peers = TARGET_10X_NUM_PEERS;
2018                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2019                 }
2020                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2021                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2022                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2023                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2024                 break;
2025         case ATH10K_FW_WMI_OP_VERSION_TLV:
2026                 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
2027                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2028                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2029                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2030                 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2031                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2032                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2033                         WMI_STAT_PEER;
2034                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2035                 break;
2036         case ATH10K_FW_WMI_OP_VERSION_10_4:
2037                 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
2038                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2039                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2040                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2041                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2042                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2043                                         WMI_10_4_STAT_PEER_EXTD;
2044                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2045                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2046
2047                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2048                              fw_file->fw_features))
2049                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2050                 else
2051                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2052                 break;
2053         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2054         case ATH10K_FW_WMI_OP_VERSION_MAX:
2055                 WARN_ON(1);
2056                 return -EINVAL;
2057         }
2058
2059         /* Backwards compatibility for firmwares without
2060          * ATH10K_FW_IE_HTT_OP_VERSION.
2061          */
2062         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2063                 switch (fw_file->wmi_op_version) {
2064                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2065                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2066                         break;
2067                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2068                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2069                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2070                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2071                         break;
2072                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2073                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2074                         break;
2075                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2076                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2077                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2078                         ath10k_err(ar, "htt op version not found from fw meta data");
2079                         return -EINVAL;
2080                 }
2081         }
2082
2083         return 0;
2084 }
2085
2086 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2087 {
2088         int ret;
2089         int vdev_id;
2090         int vdev_type;
2091         int vdev_subtype;
2092         const u8 *vdev_addr;
2093
2094         vdev_id = 0;
2095         vdev_type = WMI_VDEV_TYPE_STA;
2096         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2097         vdev_addr = ar->mac_addr;
2098
2099         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2100                                      vdev_addr);
2101         if (ret) {
2102                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2103                 return ret;
2104         }
2105
2106         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2107         if (ret) {
2108                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2109                 return ret;
2110         }
2111
2112         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2113          * serialized properly implicitly.
2114          *
2115          * Moreover (most) WMI commands have no explicit acknowledges. It is
2116          * possible to infer it implicitly by poking firmware with echo
2117          * command - getting a reply means all preceding comments have been
2118          * (mostly) processed.
2119          *
2120          * In case of vdev create/delete this is sufficient.
2121          *
2122          * Without this it's possible to end up with a race when HTT Rx ring is
2123          * started before vdev create/delete hack is complete allowing a short
2124          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2125          */
2126         ret = ath10k_wmi_barrier(ar);
2127         if (ret) {
2128                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2129                 return ret;
2130         }
2131
2132         return 0;
2133 }
2134
2135 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2136                       const struct ath10k_fw_components *fw)
2137 {
2138         int status;
2139         u32 val;
2140
2141         lockdep_assert_held(&ar->conf_mutex);
2142
2143         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2144
2145         ar->running_fw = fw;
2146
2147         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2148                       ar->running_fw->fw_file.fw_features)) {
2149                 ath10k_bmi_start(ar);
2150
2151                 if (ath10k_init_configure_target(ar)) {
2152                         status = -EINVAL;
2153                         goto err;
2154                 }
2155
2156                 status = ath10k_download_cal_data(ar);
2157                 if (status)
2158                         goto err;
2159
2160                 /* Some of of qca988x solutions are having global reset issue
2161                  * during target initialization. Bypassing PLL setting before
2162                  * downloading firmware and letting the SoC run on REF_CLK is
2163                  * fixing the problem. Corresponding firmware change is also
2164                  * needed to set the clock source once the target is
2165                  * initialized.
2166                  */
2167                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2168                              ar->running_fw->fw_file.fw_features)) {
2169                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2170                         if (status) {
2171                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2172                                            status);
2173                                 goto err;
2174                         }
2175                 }
2176
2177                 status = ath10k_download_fw(ar);
2178                 if (status)
2179                         goto err;
2180
2181                 status = ath10k_init_uart(ar);
2182                 if (status)
2183                         goto err;
2184
2185                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2186                         ath10k_init_sdio(ar);
2187         }
2188
2189         ar->htc.htc_ops.target_send_suspend_complete =
2190                 ath10k_send_suspend_complete;
2191
2192         status = ath10k_htc_init(ar);
2193         if (status) {
2194                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2195                 goto err;
2196         }
2197
2198         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2199                       ar->running_fw->fw_file.fw_features)) {
2200                 status = ath10k_bmi_done(ar);
2201                 if (status)
2202                         goto err;
2203         }
2204
2205         status = ath10k_wmi_attach(ar);
2206         if (status) {
2207                 ath10k_err(ar, "WMI attach failed: %d\n", status);
2208                 goto err;
2209         }
2210
2211         status = ath10k_htt_init(ar);
2212         if (status) {
2213                 ath10k_err(ar, "failed to init htt: %d\n", status);
2214                 goto err_wmi_detach;
2215         }
2216
2217         status = ath10k_htt_tx_start(&ar->htt);
2218         if (status) {
2219                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2220                 goto err_wmi_detach;
2221         }
2222
2223         /* If firmware indicates Full Rx Reorder support it must be used in a
2224          * slightly different manner. Let HTT code know.
2225          */
2226         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2227                                                 ar->wmi.svc_map));
2228
2229         status = ath10k_htt_rx_alloc(&ar->htt);
2230         if (status) {
2231                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2232                 goto err_htt_tx_detach;
2233         }
2234
2235         status = ath10k_hif_start(ar);
2236         if (status) {
2237                 ath10k_err(ar, "could not start HIF: %d\n", status);
2238                 goto err_htt_rx_detach;
2239         }
2240
2241         status = ath10k_htc_wait_target(&ar->htc);
2242         if (status) {
2243                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2244                 goto err_hif_stop;
2245         }
2246
2247         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2248                 status = ath10k_htt_connect(&ar->htt);
2249                 if (status) {
2250                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
2251                         goto err_hif_stop;
2252                 }
2253         }
2254
2255         status = ath10k_wmi_connect(ar);
2256         if (status) {
2257                 ath10k_err(ar, "could not connect wmi: %d\n", status);
2258                 goto err_hif_stop;
2259         }
2260
2261         status = ath10k_htc_start(&ar->htc);
2262         if (status) {
2263                 ath10k_err(ar, "failed to start htc: %d\n", status);
2264                 goto err_hif_stop;
2265         }
2266
2267         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2268                 status = ath10k_wmi_wait_for_service_ready(ar);
2269                 if (status) {
2270                         ath10k_warn(ar, "wmi service ready event not received");
2271                         goto err_hif_stop;
2272                 }
2273         }
2274
2275         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2276                    ar->hw->wiphy->fw_version);
2277
2278         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2279             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2280                 val = 0;
2281                 if (ath10k_peer_stats_enabled(ar))
2282                         val = WMI_10_4_PEER_STATS;
2283
2284                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2285                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2286
2287                 /* 10.4 firmware supports BT-Coex without reloading firmware
2288                  * via pdev param. To support Bluetooth coexistence pdev param,
2289                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2290                  * enabled always.
2291                  */
2292                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2293                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2294                              ar->running_fw->fw_file.fw_features))
2295                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
2296
2297                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2298                              ar->wmi.svc_map))
2299                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2300
2301                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2302                              ar->wmi.svc_map))
2303                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2304
2305                 status = ath10k_mac_ext_resource_config(ar, val);
2306                 if (status) {
2307                         ath10k_err(ar,
2308                                    "failed to send ext resource cfg command : %d\n",
2309                                    status);
2310                         goto err_hif_stop;
2311                 }
2312         }
2313
2314         status = ath10k_wmi_cmd_init(ar);
2315         if (status) {
2316                 ath10k_err(ar, "could not send WMI init command (%d)\n",
2317                            status);
2318                 goto err_hif_stop;
2319         }
2320
2321         status = ath10k_wmi_wait_for_unified_ready(ar);
2322         if (status) {
2323                 ath10k_err(ar, "wmi unified ready event not received\n");
2324                 goto err_hif_stop;
2325         }
2326
2327         /* Some firmware revisions do not properly set up hardware rx filter
2328          * registers.
2329          *
2330          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2331          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2332          * any frames that matches MAC_PCU_RX_FILTER which is also
2333          * misconfigured to accept anything.
2334          *
2335          * The ADDR1 is programmed using internal firmware structure field and
2336          * can't be (easily/sanely) reached from the driver explicitly. It is
2337          * possible to implicitly make it correct by creating a dummy vdev and
2338          * then deleting it.
2339          */
2340         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2341                 status = ath10k_core_reset_rx_filter(ar);
2342                 if (status) {
2343                         ath10k_err(ar,
2344                                    "failed to reset rx filter: %d\n", status);
2345                         goto err_hif_stop;
2346                 }
2347         }
2348
2349         status = ath10k_htt_rx_ring_refill(ar);
2350         if (status) {
2351                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2352                 goto err_hif_stop;
2353         }
2354
2355         if (ar->max_num_vdevs >= 64)
2356                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2357         else
2358                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2359
2360         INIT_LIST_HEAD(&ar->arvifs);
2361
2362         /* we don't care about HTT in UTF mode */
2363         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2364                 status = ath10k_htt_setup(&ar->htt);
2365                 if (status) {
2366                         ath10k_err(ar, "failed to setup htt: %d\n", status);
2367                         goto err_hif_stop;
2368                 }
2369         }
2370
2371         status = ath10k_debug_start(ar);
2372         if (status)
2373                 goto err_hif_stop;
2374
2375         return 0;
2376
2377 err_hif_stop:
2378         ath10k_hif_stop(ar);
2379 err_htt_rx_detach:
2380         ath10k_htt_rx_free(&ar->htt);
2381 err_htt_tx_detach:
2382         ath10k_htt_tx_free(&ar->htt);
2383 err_wmi_detach:
2384         ath10k_wmi_detach(ar);
2385 err:
2386         return status;
2387 }
2388 EXPORT_SYMBOL(ath10k_core_start);
2389
2390 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2391 {
2392         int ret;
2393         unsigned long time_left;
2394
2395         reinit_completion(&ar->target_suspend);
2396
2397         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2398         if (ret) {
2399                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2400                 return ret;
2401         }
2402
2403         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2404
2405         if (!time_left) {
2406                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2407                 return -ETIMEDOUT;
2408         }
2409
2410         return 0;
2411 }
2412
2413 void ath10k_core_stop(struct ath10k *ar)
2414 {
2415         lockdep_assert_held(&ar->conf_mutex);
2416         ath10k_debug_stop(ar);
2417
2418         /* try to suspend target */
2419         if (ar->state != ATH10K_STATE_RESTARTING &&
2420             ar->state != ATH10K_STATE_UTF)
2421                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2422
2423         ath10k_hif_stop(ar);
2424         ath10k_htt_tx_stop(&ar->htt);
2425         ath10k_htt_rx_free(&ar->htt);
2426         ath10k_wmi_detach(ar);
2427 }
2428 EXPORT_SYMBOL(ath10k_core_stop);
2429
2430 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2431  * order to know what hw capabilities should be advertised to mac80211 it is
2432  * necessary to load the firmware (and tear it down immediately since start
2433  * hook will try to init it again) before registering
2434  */
2435 static int ath10k_core_probe_fw(struct ath10k *ar)
2436 {
2437         struct bmi_target_info target_info;
2438         int ret = 0;
2439
2440         ret = ath10k_hif_power_up(ar);
2441         if (ret) {
2442                 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2443                 return ret;
2444         }
2445
2446         switch (ar->hif.bus) {
2447         case ATH10K_BUS_SDIO:
2448                 memset(&target_info, 0, sizeof(target_info));
2449                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2450                 if (ret) {
2451                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2452                         goto err_power_down;
2453                 }
2454                 ar->target_version = target_info.version;
2455                 ar->hw->wiphy->hw_version = target_info.version;
2456                 break;
2457         case ATH10K_BUS_PCI:
2458         case ATH10K_BUS_AHB:
2459         case ATH10K_BUS_USB:
2460                 memset(&target_info, 0, sizeof(target_info));
2461                 ret = ath10k_bmi_get_target_info(ar, &target_info);
2462                 if (ret) {
2463                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2464                         goto err_power_down;
2465                 }
2466                 ar->target_version = target_info.version;
2467                 ar->hw->wiphy->hw_version = target_info.version;
2468                 break;
2469         case ATH10K_BUS_SNOC:
2470                 break;
2471         default:
2472                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2473         }
2474
2475         ret = ath10k_init_hw_params(ar);
2476         if (ret) {
2477                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2478                 goto err_power_down;
2479         }
2480
2481         ret = ath10k_core_fetch_firmware_files(ar);
2482         if (ret) {
2483                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2484                 goto err_power_down;
2485         }
2486
2487         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2488                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
2489         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2490                sizeof(ar->hw->wiphy->fw_version));
2491
2492         ath10k_debug_print_hwfw_info(ar);
2493
2494         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2495                       ar->normal_mode_fw.fw_file.fw_features)) {
2496                 ret = ath10k_core_pre_cal_download(ar);
2497                 if (ret) {
2498                         /* pre calibration data download is not necessary
2499                          * for all the chipsets. Ignore failures and continue.
2500                          */
2501                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2502                                    "could not load pre cal data: %d\n", ret);
2503                 }
2504
2505                 ret = ath10k_core_get_board_id_from_otp(ar);
2506                 if (ret && ret != -EOPNOTSUPP) {
2507                         ath10k_err(ar, "failed to get board id from otp: %d\n",
2508                                    ret);
2509                         goto err_free_firmware_files;
2510                 }
2511
2512                 ret = ath10k_core_check_smbios(ar);
2513                 if (ret)
2514                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
2515
2516                 ret = ath10k_core_check_dt(ar);
2517                 if (ret)
2518                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
2519
2520                 ret = ath10k_core_fetch_board_file(ar);
2521                 if (ret) {
2522                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2523                         goto err_free_firmware_files;
2524                 }
2525
2526                 ath10k_debug_print_board_info(ar);
2527         }
2528
2529         ret = ath10k_core_init_firmware_features(ar);
2530         if (ret) {
2531                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2532                            ret);
2533                 goto err_free_firmware_files;
2534         }
2535
2536         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2537                       ar->normal_mode_fw.fw_file.fw_features)) {
2538                 ret = ath10k_swap_code_seg_init(ar,
2539                                                 &ar->normal_mode_fw.fw_file);
2540                 if (ret) {
2541                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2542                                    ret);
2543                         goto err_free_firmware_files;
2544                 }
2545         }
2546
2547         mutex_lock(&ar->conf_mutex);
2548
2549         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2550                                 &ar->normal_mode_fw);
2551         if (ret) {
2552                 ath10k_err(ar, "could not init core (%d)\n", ret);
2553                 goto err_unlock;
2554         }
2555
2556         ath10k_debug_print_boot_info(ar);
2557         ath10k_core_stop(ar);
2558
2559         mutex_unlock(&ar->conf_mutex);
2560
2561         ath10k_hif_power_down(ar);
2562         return 0;
2563
2564 err_unlock:
2565         mutex_unlock(&ar->conf_mutex);
2566
2567 err_free_firmware_files:
2568         ath10k_core_free_firmware_files(ar);
2569
2570 err_power_down:
2571         ath10k_hif_power_down(ar);
2572
2573         return ret;
2574 }
2575
2576 static void ath10k_core_register_work(struct work_struct *work)
2577 {
2578         struct ath10k *ar = container_of(work, struct ath10k, register_work);
2579         int status;
2580
2581         /* peer stats are enabled by default */
2582         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2583
2584         status = ath10k_core_probe_fw(ar);
2585         if (status) {
2586                 ath10k_err(ar, "could not probe fw (%d)\n", status);
2587                 goto err;
2588         }
2589
2590         status = ath10k_mac_register(ar);
2591         if (status) {
2592                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2593                 goto err_release_fw;
2594         }
2595
2596         status = ath10k_coredump_register(ar);
2597         if (status) {
2598                 ath10k_err(ar, "unable to register coredump\n");
2599                 goto err_unregister_mac;
2600         }
2601
2602         status = ath10k_debug_register(ar);
2603         if (status) {
2604                 ath10k_err(ar, "unable to initialize debugfs\n");
2605                 goto err_unregister_coredump;
2606         }
2607
2608         status = ath10k_spectral_create(ar);
2609         if (status) {
2610                 ath10k_err(ar, "failed to initialize spectral\n");
2611                 goto err_debug_destroy;
2612         }
2613
2614         status = ath10k_thermal_register(ar);
2615         if (status) {
2616                 ath10k_err(ar, "could not register thermal device: %d\n",
2617                            status);
2618                 goto err_spectral_destroy;
2619         }
2620
2621         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2622         return;
2623
2624 err_spectral_destroy:
2625         ath10k_spectral_destroy(ar);
2626 err_debug_destroy:
2627         ath10k_debug_destroy(ar);
2628 err_unregister_coredump:
2629         ath10k_coredump_unregister(ar);
2630 err_unregister_mac:
2631         ath10k_mac_unregister(ar);
2632 err_release_fw:
2633         ath10k_core_free_firmware_files(ar);
2634 err:
2635         /* TODO: It's probably a good idea to release device from the driver
2636          * but calling device_release_driver() here will cause a deadlock.
2637          */
2638         return;
2639 }
2640
2641 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2642 {
2643         ar->chip_id = chip_id;
2644         queue_work(ar->workqueue, &ar->register_work);
2645
2646         return 0;
2647 }
2648 EXPORT_SYMBOL(ath10k_core_register);
2649
2650 void ath10k_core_unregister(struct ath10k *ar)
2651 {
2652         cancel_work_sync(&ar->register_work);
2653
2654         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2655                 return;
2656
2657         ath10k_thermal_unregister(ar);
2658         /* Stop spectral before unregistering from mac80211 to remove the
2659          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2660          * would be already be free'd recursively, leading to a double free.
2661          */
2662         ath10k_spectral_destroy(ar);
2663
2664         /* We must unregister from mac80211 before we stop HTC and HIF.
2665          * Otherwise we will fail to submit commands to FW and mac80211 will be
2666          * unhappy about callback failures.
2667          */
2668         ath10k_mac_unregister(ar);
2669
2670         ath10k_testmode_destroy(ar);
2671
2672         ath10k_core_free_firmware_files(ar);
2673         ath10k_core_free_board_files(ar);
2674
2675         ath10k_debug_unregister(ar);
2676 }
2677 EXPORT_SYMBOL(ath10k_core_unregister);
2678
2679 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2680                                   enum ath10k_bus bus,
2681                                   enum ath10k_hw_rev hw_rev,
2682                                   const struct ath10k_hif_ops *hif_ops)
2683 {
2684         struct ath10k *ar;
2685         int ret;
2686
2687         ar = ath10k_mac_create(priv_size);
2688         if (!ar)
2689                 return NULL;
2690
2691         ar->ath_common.priv = ar;
2692         ar->ath_common.hw = ar->hw;
2693         ar->dev = dev;
2694         ar->hw_rev = hw_rev;
2695         ar->hif.ops = hif_ops;
2696         ar->hif.bus = bus;
2697
2698         switch (hw_rev) {
2699         case ATH10K_HW_QCA988X:
2700         case ATH10K_HW_QCA9887:
2701                 ar->regs = &qca988x_regs;
2702                 ar->hw_ce_regs = &qcax_ce_regs;
2703                 ar->hw_values = &qca988x_values;
2704                 break;
2705         case ATH10K_HW_QCA6174:
2706         case ATH10K_HW_QCA9377:
2707                 ar->regs = &qca6174_regs;
2708                 ar->hw_ce_regs = &qcax_ce_regs;
2709                 ar->hw_values = &qca6174_values;
2710                 break;
2711         case ATH10K_HW_QCA99X0:
2712         case ATH10K_HW_QCA9984:
2713                 ar->regs = &qca99x0_regs;
2714                 ar->hw_ce_regs = &qcax_ce_regs;
2715                 ar->hw_values = &qca99x0_values;
2716                 break;
2717         case ATH10K_HW_QCA9888:
2718                 ar->regs = &qca99x0_regs;
2719                 ar->hw_ce_regs = &qcax_ce_regs;
2720                 ar->hw_values = &qca9888_values;
2721                 break;
2722         case ATH10K_HW_QCA4019:
2723                 ar->regs = &qca4019_regs;
2724                 ar->hw_ce_regs = &qcax_ce_regs;
2725                 ar->hw_values = &qca4019_values;
2726                 break;
2727         case ATH10K_HW_WCN3990:
2728                 ar->regs = &wcn3990_regs;
2729                 ar->hw_ce_regs = &wcn3990_ce_regs;
2730                 ar->hw_values = &wcn3990_values;
2731                 break;
2732         default:
2733                 ath10k_err(ar, "unsupported core hardware revision %d\n",
2734                            hw_rev);
2735                 ret = -ENOTSUPP;
2736                 goto err_free_mac;
2737         }
2738
2739         init_completion(&ar->scan.started);
2740         init_completion(&ar->scan.completed);
2741         init_completion(&ar->scan.on_channel);
2742         init_completion(&ar->target_suspend);
2743         init_completion(&ar->wow.wakeup_completed);
2744
2745         init_completion(&ar->install_key_done);
2746         init_completion(&ar->vdev_setup_done);
2747         init_completion(&ar->thermal.wmi_sync);
2748         init_completion(&ar->bss_survey_done);
2749
2750         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2751
2752         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2753         if (!ar->workqueue)
2754                 goto err_free_mac;
2755
2756         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2757         if (!ar->workqueue_aux)
2758                 goto err_free_wq;
2759
2760         mutex_init(&ar->conf_mutex);
2761         spin_lock_init(&ar->data_lock);
2762         spin_lock_init(&ar->txqs_lock);
2763
2764         INIT_LIST_HEAD(&ar->txqs);
2765         INIT_LIST_HEAD(&ar->peers);
2766         init_waitqueue_head(&ar->peer_mapping_wq);
2767         init_waitqueue_head(&ar->htt.empty_tx_wq);
2768         init_waitqueue_head(&ar->wmi.tx_credits_wq);
2769
2770         init_completion(&ar->offchan_tx_completed);
2771         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2772         skb_queue_head_init(&ar->offchan_tx_queue);
2773
2774         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2775         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2776
2777         INIT_WORK(&ar->register_work, ath10k_core_register_work);
2778         INIT_WORK(&ar->restart_work, ath10k_core_restart);
2779         INIT_WORK(&ar->set_coverage_class_work,
2780                   ath10k_core_set_coverage_class_work);
2781
2782         init_dummy_netdev(&ar->napi_dev);
2783
2784         ret = ath10k_coredump_create(ar);
2785         if (ret)
2786                 goto err_free_aux_wq;
2787
2788         ret = ath10k_debug_create(ar);
2789         if (ret)
2790                 goto err_free_coredump;
2791
2792         return ar;
2793
2794 err_free_coredump:
2795         ath10k_coredump_destroy(ar);
2796
2797 err_free_aux_wq:
2798         destroy_workqueue(ar->workqueue_aux);
2799 err_free_wq:
2800         destroy_workqueue(ar->workqueue);
2801
2802 err_free_mac:
2803         ath10k_mac_destroy(ar);
2804
2805         return NULL;
2806 }
2807 EXPORT_SYMBOL(ath10k_core_create);
2808
2809 void ath10k_core_destroy(struct ath10k *ar)
2810 {
2811         flush_workqueue(ar->workqueue);
2812         destroy_workqueue(ar->workqueue);
2813
2814         flush_workqueue(ar->workqueue_aux);
2815         destroy_workqueue(ar->workqueue_aux);
2816
2817         ath10k_debug_destroy(ar);
2818         ath10k_coredump_destroy(ar);
2819         ath10k_htt_tx_destroy(&ar->htt);
2820         ath10k_wmi_free_host_mem(ar);
2821         ath10k_mac_destroy(ar);
2822 }
2823 EXPORT_SYMBOL(ath10k_core_destroy);
2824
2825 MODULE_AUTHOR("Qualcomm Atheros");
2826 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2827 MODULE_LICENSE("Dual BSD/GPL");