r8152: move the initialization to reset_resume function
[linux-2.6-microblaze.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
30
31 /* Information for net-next */
32 #define NETNEXT_VERSION         "08"
33
34 /* Information for net */
35 #define NET_VERSION             "9"
36
37 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
41
42 #define R8152_PHY_ID            32
43
44 #define PLA_IDR                 0xc000
45 #define PLA_RCR                 0xc010
46 #define PLA_RMS                 0xc016
47 #define PLA_RXFIFO_CTRL0        0xc0a0
48 #define PLA_RXFIFO_CTRL1        0xc0a4
49 #define PLA_RXFIFO_CTRL2        0xc0a8
50 #define PLA_DMY_REG0            0xc0b0
51 #define PLA_FMC                 0xc0b4
52 #define PLA_CFG_WOL             0xc0b6
53 #define PLA_TEREDO_CFG          0xc0bc
54 #define PLA_MAR                 0xcd00
55 #define PLA_BACKUP              0xd000
56 #define PAL_BDC_CR              0xd1a0
57 #define PLA_TEREDO_TIMER        0xd2cc
58 #define PLA_REALWOW_TIMER       0xd2e8
59 #define PLA_LEDSEL              0xdd90
60 #define PLA_LED_FEATURE         0xdd92
61 #define PLA_PHYAR               0xde00
62 #define PLA_BOOT_CTRL           0xe004
63 #define PLA_GPHY_INTR_IMR       0xe022
64 #define PLA_EEE_CR              0xe040
65 #define PLA_EEEP_CR             0xe080
66 #define PLA_MAC_PWR_CTRL        0xe0c0
67 #define PLA_MAC_PWR_CTRL2       0xe0ca
68 #define PLA_MAC_PWR_CTRL3       0xe0cc
69 #define PLA_MAC_PWR_CTRL4       0xe0ce
70 #define PLA_WDT6_CTRL           0xe428
71 #define PLA_TCR0                0xe610
72 #define PLA_TCR1                0xe612
73 #define PLA_MTPS                0xe615
74 #define PLA_TXFIFO_CTRL         0xe618
75 #define PLA_RSTTALLY            0xe800
76 #define PLA_CR                  0xe813
77 #define PLA_CRWECR              0xe81c
78 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5             0xe822
81 #define PLA_PHY_PWR             0xe84c
82 #define PLA_OOB_CTRL            0xe84f
83 #define PLA_CPCR                0xe854
84 #define PLA_MISC_0              0xe858
85 #define PLA_MISC_1              0xe85a
86 #define PLA_OCP_GPHY_BASE       0xe86c
87 #define PLA_TALLYCNT            0xe890
88 #define PLA_SFF_STS_7           0xe8de
89 #define PLA_PHYSTATUS           0xe908
90 #define PLA_BP_BA               0xfc26
91 #define PLA_BP_0                0xfc28
92 #define PLA_BP_1                0xfc2a
93 #define PLA_BP_2                0xfc2c
94 #define PLA_BP_3                0xfc2e
95 #define PLA_BP_4                0xfc30
96 #define PLA_BP_5                0xfc32
97 #define PLA_BP_6                0xfc34
98 #define PLA_BP_7                0xfc36
99 #define PLA_BP_EN               0xfc38
100
101 #define USB_USB2PHY             0xb41e
102 #define USB_SSPHYLINK2          0xb428
103 #define USB_U2P3_CTRL           0xb460
104 #define USB_CSR_DUMMY1          0xb464
105 #define USB_CSR_DUMMY2          0xb466
106 #define USB_DEV_STAT            0xb808
107 #define USB_CONNECT_TIMER       0xcbf8
108 #define USB_BURST_SIZE          0xcfc0
109 #define USB_USB_CTRL            0xd406
110 #define USB_PHY_CTRL            0xd408
111 #define USB_TX_AGG              0xd40a
112 #define USB_RX_BUF_TH           0xd40c
113 #define USB_USB_TIMER           0xd428
114 #define USB_RX_EARLY_TIMEOUT    0xd42c
115 #define USB_RX_EARLY_SIZE       0xd42e
116 #define USB_PM_CTRL_STATUS      0xd432
117 #define USB_TX_DMA              0xd434
118 #define USB_TOLERANCE           0xd490
119 #define USB_LPM_CTRL            0xd41a
120 #define USB_BMU_RESET           0xd4b0
121 #define USB_UPS_CTRL            0xd800
122 #define USB_MISC_0              0xd81a
123 #define USB_POWER_CUT           0xd80a
124 #define USB_AFE_CTRL2           0xd824
125 #define USB_WDT11_CTRL          0xe43c
126 #define USB_BP_BA               0xfc26
127 #define USB_BP_0                0xfc28
128 #define USB_BP_1                0xfc2a
129 #define USB_BP_2                0xfc2c
130 #define USB_BP_3                0xfc2e
131 #define USB_BP_4                0xfc30
132 #define USB_BP_5                0xfc32
133 #define USB_BP_6                0xfc34
134 #define USB_BP_7                0xfc36
135 #define USB_BP_EN               0xfc38
136
137 /* OCP Registers */
138 #define OCP_ALDPS_CONFIG        0x2010
139 #define OCP_EEE_CONFIG1         0x2080
140 #define OCP_EEE_CONFIG2         0x2092
141 #define OCP_EEE_CONFIG3         0x2094
142 #define OCP_BASE_MII            0xa400
143 #define OCP_EEE_AR              0xa41a
144 #define OCP_EEE_DATA            0xa41c
145 #define OCP_PHY_STATUS          0xa420
146 #define OCP_POWER_CFG           0xa430
147 #define OCP_EEE_CFG             0xa432
148 #define OCP_SRAM_ADDR           0xa436
149 #define OCP_SRAM_DATA           0xa438
150 #define OCP_DOWN_SPEED          0xa442
151 #define OCP_EEE_ABLE            0xa5c4
152 #define OCP_EEE_ADV             0xa5d0
153 #define OCP_EEE_LPABLE          0xa5d2
154 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
155 #define OCP_ADC_CFG             0xbc06
156
157 /* SRAM Register */
158 #define SRAM_LPF_CFG            0x8012
159 #define SRAM_10M_AMP1           0x8080
160 #define SRAM_10M_AMP2           0x8082
161 #define SRAM_IMPEDANCE          0x8084
162
163 /* PLA_RCR */
164 #define RCR_AAP                 0x00000001
165 #define RCR_APM                 0x00000002
166 #define RCR_AM                  0x00000004
167 #define RCR_AB                  0x00000008
168 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL      0x00080002
172 #define RXFIFO_THR1_OOB         0x01800003
173
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL        0x00000060
176 #define RXFIFO_THR2_HIGH        0x00000038
177 #define RXFIFO_THR2_OOB         0x0000004a
178 #define RXFIFO_THR2_NORMAL      0x00a0
179
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL        0x00000078
182 #define RXFIFO_THR3_HIGH        0x00000048
183 #define RXFIFO_THR3_OOB         0x0000005a
184 #define RXFIFO_THR3_NORMAL      0x0110
185
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL       0x00400008
188 #define TXFIFO_THR_NORMAL2      0x01000008
189
190 /* PLA_DMY_REG0 */
191 #define ECM_ALDPS               0x0002
192
193 /* PLA_FMC */
194 #define FMC_FCR_MCU_EN          0x0001
195
196 /* PLA_EEEP_CR */
197 #define EEEP_CR_EEEP_TX         0x0002
198
199 /* PLA_WDT6_CTRL */
200 #define WDT6_SET_MODE           0x0010
201
202 /* PLA_TCR0 */
203 #define TCR0_TX_EMPTY           0x0800
204 #define TCR0_AUTO_FIFO          0x0080
205
206 /* PLA_TCR1 */
207 #define VERSION_MASK            0x7cf0
208
209 /* PLA_MTPS */
210 #define MTPS_JUMBO              (12 * 1024 / 64)
211 #define MTPS_DEFAULT            (6 * 1024 / 64)
212
213 /* PLA_RSTTALLY */
214 #define TALLY_RESET             0x0001
215
216 /* PLA_CR */
217 #define CR_RST                  0x10
218 #define CR_RE                   0x08
219 #define CR_TE                   0x04
220
221 /* PLA_CRWECR */
222 #define CRWECR_NORAML           0x00
223 #define CRWECR_CONFIG           0xc0
224
225 /* PLA_OOB_CTRL */
226 #define NOW_IS_OOB              0x80
227 #define TXFIFO_EMPTY            0x20
228 #define RXFIFO_EMPTY            0x10
229 #define LINK_LIST_READY         0x02
230 #define DIS_MCU_CLROOB          0x01
231 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
232
233 /* PLA_MISC_1 */
234 #define RXDY_GATED_EN           0x0008
235
236 /* PLA_SFF_STS_7 */
237 #define RE_INIT_LL              0x8000
238 #define MCU_BORW_EN             0x4000
239
240 /* PLA_CPCR */
241 #define CPCR_RX_VLAN            0x0040
242
243 /* PLA_CFG_WOL */
244 #define MAGIC_EN                0x0001
245
246 /* PLA_TEREDO_CFG */
247 #define TEREDO_SEL              0x8000
248 #define TEREDO_WAKE_MASK        0x7f00
249 #define TEREDO_RS_EVENT_MASK    0x00fe
250 #define OOB_TEREDO_EN           0x0001
251
252 /* PAL_BDC_CR */
253 #define ALDPS_PROXY_MODE        0x0001
254
255 /* PLA_CONFIG34 */
256 #define LINK_ON_WAKE_EN         0x0010
257 #define LINK_OFF_WAKE_EN        0x0008
258
259 /* PLA_CONFIG5 */
260 #define BWF_EN                  0x0040
261 #define MWF_EN                  0x0020
262 #define UWF_EN                  0x0010
263 #define LAN_WAKE_EN             0x0002
264
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK           0x0700
267
268 /* PLA_PHY_PWR */
269 #define TX_10M_IDLE_EN          0x0080
270 #define PFM_PWM_SWITCH          0x0040
271
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN         0x00004000
274 #define MCU_CLK_RATIO           0x07010f07
275 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO       0x0f87
277
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO         0x8007
280
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN      0x0100
283 #define SUSPEND_SPDWN_EN        0x0004
284 #define U1U2_SPDWN_EN           0x0002
285 #define L1_SPDWN_EN             0x0001
286
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN        0x1000
289 #define RXDV_SPDWN_EN           0x0800
290 #define TX10MIDLE_EN            0x0100
291 #define TP100_SPDWN_EN          0x0020
292 #define TP500_SPDWN_EN          0x0010
293 #define TP1000_SPDWN_EN         0x0008
294 #define EEE_SPDWN_EN            0x0001
295
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK            0x0001
298 #define SPEED_DOWN_MSK          0x0002
299 #define SPDWN_RXDV_MSK          0x0004
300 #define SPDWN_LINKCHG_MSK       0x0008
301
302 /* PLA_PHYAR */
303 #define PHYAR_FLAG              0x80000000
304
305 /* PLA_EEE_CR */
306 #define EEE_RX_EN               0x0001
307 #define EEE_TX_EN               0x0002
308
309 /* PLA_BOOT_CTRL */
310 #define AUTOLOAD_DONE           0x0002
311
312 /* USB_USB2PHY */
313 #define USB2PHY_SUSPEND         0x0001
314 #define USB2PHY_L1              0x0002
315
316 /* USB_SSPHYLINK2 */
317 #define pwd_dn_scale_mask       0x3ffe
318 #define pwd_dn_scale(x)         ((x) << 1)
319
320 /* USB_CSR_DUMMY1 */
321 #define DYNAMIC_BURST           0x0001
322
323 /* USB_CSR_DUMMY2 */
324 #define EP4_FULL_FC             0x0001
325
326 /* USB_DEV_STAT */
327 #define STAT_SPEED_MASK         0x0006
328 #define STAT_SPEED_HIGH         0x0000
329 #define STAT_SPEED_FULL         0x0002
330
331 /* USB_TX_AGG */
332 #define TX_AGG_MAX_THRESHOLD    0x03
333
334 /* USB_RX_BUF_TH */
335 #define RX_THR_SUPPER           0x0c350180
336 #define RX_THR_HIGH             0x7a120180
337 #define RX_THR_SLOW             0xffff0180
338
339 /* USB_TX_DMA */
340 #define TEST_MODE_DISABLE       0x00000001
341 #define TX_SIZE_ADJUST1         0x00000100
342
343 /* USB_BMU_RESET */
344 #define BMU_RESET_EP_IN         0x01
345 #define BMU_RESET_EP_OUT        0x02
346
347 /* USB_UPS_CTRL */
348 #define POWER_CUT               0x0100
349
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE         0x0001
352
353 /* USB_USB_CTRL */
354 #define RX_AGG_DISABLE          0x0010
355 #define RX_ZERO_EN              0x0080
356
357 /* USB_U2P3_CTRL */
358 #define U2P3_ENABLE             0x0001
359
360 /* USB_POWER_CUT */
361 #define PWR_EN                  0x0001
362 #define PHASE2_EN               0x0008
363
364 /* USB_MISC_0 */
365 #define PCUT_STATUS             0x0001
366
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER           85000U
369 #define COALESCE_HIGH           250000U
370 #define COALESCE_SLOW           524280U
371
372 /* USB_WDT11_CTRL */
373 #define TIMER11_EN              0x0001
374
375 /* USB_LPM_CTRL */
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK          0x0c
380 #define LPM_TIMER_500MS         0x04    /* 500 ms */
381 #define LPM_TIMER_500US         0x0c    /* 500 us */
382 #define ROK_EXIT_LPM            0x02
383
384 /* USB_AFE_CTRL2 */
385 #define SEN_VAL_MASK            0xf800
386 #define SEN_VAL_NORMAL          0xa000
387 #define SEL_RXIDLE              0x0100
388
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE               0x8000
391 #define ENPDNPS                 0x0200
392 #define LINKENA                 0x0100
393 #define DIS_SDSAVE              0x0010
394
395 /* OCP_PHY_STATUS */
396 #define PHY_STAT_MASK           0x0007
397 #define PHY_STAT_EXT_INIT       2
398 #define PHY_STAT_LAN_ON         3
399 #define PHY_STAT_PWRDN          5
400
401 /* OCP_POWER_CFG */
402 #define EEE_CLKDIV_EN           0x8000
403 #define EN_ALDPS                0x0004
404 #define EN_10M_PLLOFF           0x0001
405
406 /* OCP_EEE_CONFIG1 */
407 #define RG_TXLPI_MSK_HFDUP      0x8000
408 #define RG_MATCLR_EN            0x4000
409 #define EEE_10_CAP              0x2000
410 #define EEE_NWAY_EN             0x1000
411 #define TX_QUIET_EN             0x0200
412 #define RX_QUIET_EN             0x0100
413 #define sd_rise_time_mask       0x0070
414 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
415 #define RG_RXLPI_MSK_HFDUP      0x0008
416 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
417
418 /* OCP_EEE_CONFIG2 */
419 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
420 #define RG_DACQUIET_EN          0x0400
421 #define RG_LDVQUIET_EN          0x0200
422 #define RG_CKRSEL               0x0020
423 #define RG_EEEPRG_EN            0x0010
424
425 /* OCP_EEE_CONFIG3 */
426 #define fast_snr_mask           0xff80
427 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
428 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
429 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
430
431 /* OCP_EEE_AR */
432 /* bit[15:14] function */
433 #define FUN_ADDR                0x0000
434 #define FUN_DATA                0x4000
435 /* bit[4:0] device addr */
436
437 /* OCP_EEE_CFG */
438 #define CTAP_SHORT_EN           0x0040
439 #define EEE10_EN                0x0010
440
441 /* OCP_DOWN_SPEED */
442 #define EN_10M_BGOFF            0x0080
443
444 /* OCP_PHY_STATE */
445 #define TXDIS_STATE             0x01
446 #define ABD_STATE               0x02
447
448 /* OCP_ADC_CFG */
449 #define CKADSEL_L               0x0100
450 #define ADC_EN                  0x0080
451 #define EN_EMI_L                0x0040
452
453 /* SRAM_LPF_CFG */
454 #define LPF_AUTO_TUNE           0x8000
455
456 /* SRAM_10M_AMP1 */
457 #define GDAC_IB_UPALL           0x0008
458
459 /* SRAM_10M_AMP2 */
460 #define AMP_DN                  0x0200
461
462 /* SRAM_IMPEDANCE */
463 #define RX_DRIVING_MASK         0x6000
464
465 /* MAC PASSTHRU */
466 #define AD_MASK                 0xfee0
467 #define EFUSE                   0xcfdb
468 #define PASS_THRU_MASK          0x1
469
470 enum rtl_register_content {
471         _1000bps        = 0x10,
472         _100bps         = 0x08,
473         _10bps          = 0x04,
474         LINK_STATUS     = 0x02,
475         FULL_DUP        = 0x01,
476 };
477
478 #define RTL8152_MAX_TX          4
479 #define RTL8152_MAX_RX          10
480 #define INTBUFSIZE              2
481 #define CRC_SIZE                4
482 #define TX_ALIGN                4
483 #define RX_ALIGN                8
484
485 #define INTR_LINK               0x0004
486
487 #define RTL8152_REQT_READ       0xc0
488 #define RTL8152_REQT_WRITE      0x40
489 #define RTL8152_REQ_GET_REGS    0x05
490 #define RTL8152_REQ_SET_REGS    0x05
491
492 #define BYTE_EN_DWORD           0xff
493 #define BYTE_EN_WORD            0x33
494 #define BYTE_EN_BYTE            0x11
495 #define BYTE_EN_SIX_BYTES       0x3f
496 #define BYTE_EN_START_MASK      0x0f
497 #define BYTE_EN_END_MASK        0xf0
498
499 #define RTL8153_MAX_PACKET      9216 /* 9K */
500 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
501 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
502 #define RTL8153_RMS             RTL8153_MAX_PACKET
503 #define RTL8152_TX_TIMEOUT      (5 * HZ)
504 #define RTL8152_NAPI_WEIGHT     64
505 #define rx_reserved_size(x)     ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
506                                  sizeof(struct rx_desc) + RX_ALIGN)
507
508 /* rtl8152 flags */
509 enum rtl8152_flags {
510         RTL8152_UNPLUG = 0,
511         RTL8152_SET_RX_MODE,
512         WORK_ENABLE,
513         RTL8152_LINK_CHG,
514         SELECTIVE_SUSPEND,
515         PHY_RESET,
516         SCHEDULE_NAPI,
517 };
518
519 /* Define these values to match your device */
520 #define VENDOR_ID_REALTEK               0x0bda
521 #define VENDOR_ID_MICROSOFT             0x045e
522 #define VENDOR_ID_SAMSUNG               0x04e8
523 #define VENDOR_ID_LENOVO                0x17ef
524 #define VENDOR_ID_NVIDIA                0x0955
525
526 #define MCU_TYPE_PLA                    0x0100
527 #define MCU_TYPE_USB                    0x0000
528
529 struct tally_counter {
530         __le64  tx_packets;
531         __le64  rx_packets;
532         __le64  tx_errors;
533         __le32  rx_errors;
534         __le16  rx_missed;
535         __le16  align_errors;
536         __le32  tx_one_collision;
537         __le32  tx_multi_collision;
538         __le64  rx_unicast;
539         __le64  rx_broadcast;
540         __le32  rx_multicast;
541         __le16  tx_aborted;
542         __le16  tx_underrun;
543 };
544
545 struct rx_desc {
546         __le32 opts1;
547 #define RX_LEN_MASK                     0x7fff
548
549         __le32 opts2;
550 #define RD_UDP_CS                       BIT(23)
551 #define RD_TCP_CS                       BIT(22)
552 #define RD_IPV6_CS                      BIT(20)
553 #define RD_IPV4_CS                      BIT(19)
554
555         __le32 opts3;
556 #define IPF                             BIT(23) /* IP checksum fail */
557 #define UDPF                            BIT(22) /* UDP checksum fail */
558 #define TCPF                            BIT(21) /* TCP checksum fail */
559 #define RX_VLAN_TAG                     BIT(16)
560
561         __le32 opts4;
562         __le32 opts5;
563         __le32 opts6;
564 };
565
566 struct tx_desc {
567         __le32 opts1;
568 #define TX_FS                   BIT(31) /* First segment of a packet */
569 #define TX_LS                   BIT(30) /* Final segment of a packet */
570 #define GTSENDV4                BIT(28)
571 #define GTSENDV6                BIT(27)
572 #define GTTCPHO_SHIFT           18
573 #define GTTCPHO_MAX             0x7fU
574 #define TX_LEN_MAX              0x3ffffU
575
576         __le32 opts2;
577 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
578 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
579 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
580 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
581 #define MSS_SHIFT               17
582 #define MSS_MAX                 0x7ffU
583 #define TCPHO_SHIFT             17
584 #define TCPHO_MAX               0x7ffU
585 #define TX_VLAN_TAG             BIT(16)
586 };
587
588 struct r8152;
589
590 struct rx_agg {
591         struct list_head list;
592         struct urb *urb;
593         struct r8152 *context;
594         void *buffer;
595         void *head;
596 };
597
598 struct tx_agg {
599         struct list_head list;
600         struct urb *urb;
601         struct r8152 *context;
602         void *buffer;
603         void *head;
604         u32 skb_num;
605         u32 skb_len;
606 };
607
608 struct r8152 {
609         unsigned long flags;
610         struct usb_device *udev;
611         struct napi_struct napi;
612         struct usb_interface *intf;
613         struct net_device *netdev;
614         struct urb *intr_urb;
615         struct tx_agg tx_info[RTL8152_MAX_TX];
616         struct rx_agg rx_info[RTL8152_MAX_RX];
617         struct list_head rx_done, tx_free;
618         struct sk_buff_head tx_queue, rx_queue;
619         spinlock_t rx_lock, tx_lock;
620         struct delayed_work schedule, hw_phy_work;
621         struct mii_if_info mii;
622         struct mutex control;   /* use for hw setting */
623 #ifdef CONFIG_PM_SLEEP
624         struct notifier_block pm_notifier;
625 #endif
626
627         struct rtl_ops {
628                 void (*init)(struct r8152 *);
629                 int (*enable)(struct r8152 *);
630                 void (*disable)(struct r8152 *);
631                 void (*up)(struct r8152 *);
632                 void (*down)(struct r8152 *);
633                 void (*unload)(struct r8152 *);
634                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
635                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
636                 bool (*in_nway)(struct r8152 *);
637                 void (*hw_phy_cfg)(struct r8152 *);
638                 void (*autosuspend_en)(struct r8152 *tp, bool enable);
639         } rtl_ops;
640
641         int intr_interval;
642         u32 saved_wolopts;
643         u32 msg_enable;
644         u32 tx_qlen;
645         u32 coalesce;
646         u16 ocp_base;
647         u16 speed;
648         u8 *intr_buff;
649         u8 version;
650         u8 duplex;
651         u8 autoneg;
652 };
653
654 enum rtl_version {
655         RTL_VER_UNKNOWN = 0,
656         RTL_VER_01,
657         RTL_VER_02,
658         RTL_VER_03,
659         RTL_VER_04,
660         RTL_VER_05,
661         RTL_VER_06,
662         RTL_VER_MAX
663 };
664
665 enum tx_csum_stat {
666         TX_CSUM_SUCCESS = 0,
667         TX_CSUM_TSO,
668         TX_CSUM_NONE
669 };
670
671 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
672  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
673  */
674 static const int multicast_filter_limit = 32;
675 static unsigned int agg_buf_sz = 16384;
676
677 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
678                                  VLAN_ETH_HLEN - VLAN_HLEN)
679
680 static
681 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
682 {
683         int ret;
684         void *tmp;
685
686         tmp = kmalloc(size, GFP_KERNEL);
687         if (!tmp)
688                 return -ENOMEM;
689
690         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
691                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
692                               value, index, tmp, size, 500);
693
694         memcpy(data, tmp, size);
695         kfree(tmp);
696
697         return ret;
698 }
699
700 static
701 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
702 {
703         int ret;
704         void *tmp;
705
706         tmp = kmemdup(data, size, GFP_KERNEL);
707         if (!tmp)
708                 return -ENOMEM;
709
710         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
711                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
712                               value, index, tmp, size, 500);
713
714         kfree(tmp);
715
716         return ret;
717 }
718
719 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
720                             void *data, u16 type)
721 {
722         u16 limit = 64;
723         int ret = 0;
724
725         if (test_bit(RTL8152_UNPLUG, &tp->flags))
726                 return -ENODEV;
727
728         /* both size and indix must be 4 bytes align */
729         if ((size & 3) || !size || (index & 3) || !data)
730                 return -EPERM;
731
732         if ((u32)index + (u32)size > 0xffff)
733                 return -EPERM;
734
735         while (size) {
736                 if (size > limit) {
737                         ret = get_registers(tp, index, type, limit, data);
738                         if (ret < 0)
739                                 break;
740
741                         index += limit;
742                         data += limit;
743                         size -= limit;
744                 } else {
745                         ret = get_registers(tp, index, type, size, data);
746                         if (ret < 0)
747                                 break;
748
749                         index += size;
750                         data += size;
751                         size = 0;
752                         break;
753                 }
754         }
755
756         if (ret == -ENODEV)
757                 set_bit(RTL8152_UNPLUG, &tp->flags);
758
759         return ret;
760 }
761
762 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
763                              u16 size, void *data, u16 type)
764 {
765         int ret;
766         u16 byteen_start, byteen_end, byen;
767         u16 limit = 512;
768
769         if (test_bit(RTL8152_UNPLUG, &tp->flags))
770                 return -ENODEV;
771
772         /* both size and indix must be 4 bytes align */
773         if ((size & 3) || !size || (index & 3) || !data)
774                 return -EPERM;
775
776         if ((u32)index + (u32)size > 0xffff)
777                 return -EPERM;
778
779         byteen_start = byteen & BYTE_EN_START_MASK;
780         byteen_end = byteen & BYTE_EN_END_MASK;
781
782         byen = byteen_start | (byteen_start << 4);
783         ret = set_registers(tp, index, type | byen, 4, data);
784         if (ret < 0)
785                 goto error1;
786
787         index += 4;
788         data += 4;
789         size -= 4;
790
791         if (size) {
792                 size -= 4;
793
794                 while (size) {
795                         if (size > limit) {
796                                 ret = set_registers(tp, index,
797                                                     type | BYTE_EN_DWORD,
798                                                     limit, data);
799                                 if (ret < 0)
800                                         goto error1;
801
802                                 index += limit;
803                                 data += limit;
804                                 size -= limit;
805                         } else {
806                                 ret = set_registers(tp, index,
807                                                     type | BYTE_EN_DWORD,
808                                                     size, data);
809                                 if (ret < 0)
810                                         goto error1;
811
812                                 index += size;
813                                 data += size;
814                                 size = 0;
815                                 break;
816                         }
817                 }
818
819                 byen = byteen_end | (byteen_end >> 4);
820                 ret = set_registers(tp, index, type | byen, 4, data);
821                 if (ret < 0)
822                         goto error1;
823         }
824
825 error1:
826         if (ret == -ENODEV)
827                 set_bit(RTL8152_UNPLUG, &tp->flags);
828
829         return ret;
830 }
831
832 static inline
833 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
834 {
835         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
836 }
837
838 static inline
839 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
840 {
841         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
842 }
843
844 static inline
845 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
846 {
847         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
848 }
849
850 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
851 {
852         __le32 data;
853
854         generic_ocp_read(tp, index, sizeof(data), &data, type);
855
856         return __le32_to_cpu(data);
857 }
858
859 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
860 {
861         __le32 tmp = __cpu_to_le32(data);
862
863         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
864 }
865
866 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
867 {
868         u32 data;
869         __le32 tmp;
870         u8 shift = index & 2;
871
872         index &= ~3;
873
874         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
875
876         data = __le32_to_cpu(tmp);
877         data >>= (shift * 8);
878         data &= 0xffff;
879
880         return (u16)data;
881 }
882
883 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
884 {
885         u32 mask = 0xffff;
886         __le32 tmp;
887         u16 byen = BYTE_EN_WORD;
888         u8 shift = index & 2;
889
890         data &= mask;
891
892         if (index & 2) {
893                 byen <<= shift;
894                 mask <<= (shift * 8);
895                 data <<= (shift * 8);
896                 index &= ~3;
897         }
898
899         tmp = __cpu_to_le32(data);
900
901         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
902 }
903
904 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
905 {
906         u32 data;
907         __le32 tmp;
908         u8 shift = index & 3;
909
910         index &= ~3;
911
912         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
913
914         data = __le32_to_cpu(tmp);
915         data >>= (shift * 8);
916         data &= 0xff;
917
918         return (u8)data;
919 }
920
921 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
922 {
923         u32 mask = 0xff;
924         __le32 tmp;
925         u16 byen = BYTE_EN_BYTE;
926         u8 shift = index & 3;
927
928         data &= mask;
929
930         if (index & 3) {
931                 byen <<= shift;
932                 mask <<= (shift * 8);
933                 data <<= (shift * 8);
934                 index &= ~3;
935         }
936
937         tmp = __cpu_to_le32(data);
938
939         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
940 }
941
942 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
943 {
944         u16 ocp_base, ocp_index;
945
946         ocp_base = addr & 0xf000;
947         if (ocp_base != tp->ocp_base) {
948                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
949                 tp->ocp_base = ocp_base;
950         }
951
952         ocp_index = (addr & 0x0fff) | 0xb000;
953         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
954 }
955
956 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
957 {
958         u16 ocp_base, ocp_index;
959
960         ocp_base = addr & 0xf000;
961         if (ocp_base != tp->ocp_base) {
962                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
963                 tp->ocp_base = ocp_base;
964         }
965
966         ocp_index = (addr & 0x0fff) | 0xb000;
967         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
968 }
969
970 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
971 {
972         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
973 }
974
975 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
976 {
977         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
978 }
979
980 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
981 {
982         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
983         ocp_reg_write(tp, OCP_SRAM_DATA, data);
984 }
985
986 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
987 {
988         struct r8152 *tp = netdev_priv(netdev);
989         int ret;
990
991         if (test_bit(RTL8152_UNPLUG, &tp->flags))
992                 return -ENODEV;
993
994         if (phy_id != R8152_PHY_ID)
995                 return -EINVAL;
996
997         ret = r8152_mdio_read(tp, reg);
998
999         return ret;
1000 }
1001
1002 static
1003 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1004 {
1005         struct r8152 *tp = netdev_priv(netdev);
1006
1007         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1008                 return;
1009
1010         if (phy_id != R8152_PHY_ID)
1011                 return;
1012
1013         r8152_mdio_write(tp, reg, val);
1014 }
1015
1016 static int
1017 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1018
1019 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1020 {
1021         struct r8152 *tp = netdev_priv(netdev);
1022         struct sockaddr *addr = p;
1023         int ret = -EADDRNOTAVAIL;
1024
1025         if (!is_valid_ether_addr(addr->sa_data))
1026                 goto out1;
1027
1028         ret = usb_autopm_get_interface(tp->intf);
1029         if (ret < 0)
1030                 goto out1;
1031
1032         mutex_lock(&tp->control);
1033
1034         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1035
1036         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1037         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1038         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1039
1040         mutex_unlock(&tp->control);
1041
1042         usb_autopm_put_interface(tp->intf);
1043 out1:
1044         return ret;
1045 }
1046
1047 /* Devices containing RTL8153-AD can support a persistent
1048  * host system provided MAC address.
1049  * Examples of this are Dell TB15 and Dell WD15 docks
1050  */
1051 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1052 {
1053         acpi_status status;
1054         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1055         union acpi_object *obj;
1056         int ret = -EINVAL;
1057         u32 ocp_data;
1058         unsigned char buf[6];
1059
1060         /* test for -AD variant of RTL8153 */
1061         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1062         if ((ocp_data & AD_MASK) != 0x1000)
1063                 return -ENODEV;
1064
1065         /* test for MAC address pass-through bit */
1066         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1067         if ((ocp_data & PASS_THRU_MASK) != 1)
1068                 return -ENODEV;
1069
1070         /* returns _AUXMAC_#AABBCCDDEEFF# */
1071         status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1072         obj = (union acpi_object *)buffer.pointer;
1073         if (!ACPI_SUCCESS(status))
1074                 return -ENODEV;
1075         if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1076                 netif_warn(tp, probe, tp->netdev,
1077                            "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1078                            obj->type, obj->string.length);
1079                 goto amacout;
1080         }
1081         if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1082             strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1083                 netif_warn(tp, probe, tp->netdev,
1084                            "Invalid header when reading pass-thru MAC addr\n");
1085                 goto amacout;
1086         }
1087         ret = hex2bin(buf, obj->string.pointer + 9, 6);
1088         if (!(ret == 0 && is_valid_ether_addr(buf))) {
1089                 netif_warn(tp, probe, tp->netdev,
1090                            "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1091                            ret, buf);
1092                 ret = -EINVAL;
1093                 goto amacout;
1094         }
1095         memcpy(sa->sa_data, buf, 6);
1096         ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1097         netif_info(tp, probe, tp->netdev,
1098                    "Using pass-thru MAC addr %pM\n", sa->sa_data);
1099
1100 amacout:
1101         kfree(obj);
1102         return ret;
1103 }
1104
1105 static int set_ethernet_addr(struct r8152 *tp)
1106 {
1107         struct net_device *dev = tp->netdev;
1108         struct sockaddr sa;
1109         int ret;
1110
1111         if (tp->version == RTL_VER_01) {
1112                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1113         } else {
1114                 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1115                  * or system doesn't provide valid _SB.AMAC this will be
1116                  * be expected to non-zero
1117                  */
1118                 ret = vendor_mac_passthru_addr_read(tp, &sa);
1119                 if (ret < 0)
1120                         ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1121         }
1122
1123         if (ret < 0) {
1124                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1125         } else if (!is_valid_ether_addr(sa.sa_data)) {
1126                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1127                           sa.sa_data);
1128                 eth_hw_addr_random(dev);
1129                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1130                 ret = rtl8152_set_mac_address(dev, &sa);
1131                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1132                            sa.sa_data);
1133         } else {
1134                 if (tp->version == RTL_VER_01)
1135                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1136                 else
1137                         ret = rtl8152_set_mac_address(dev, &sa);
1138         }
1139
1140         return ret;
1141 }
1142
1143 static void read_bulk_callback(struct urb *urb)
1144 {
1145         struct net_device *netdev;
1146         int status = urb->status;
1147         struct rx_agg *agg;
1148         struct r8152 *tp;
1149
1150         agg = urb->context;
1151         if (!agg)
1152                 return;
1153
1154         tp = agg->context;
1155         if (!tp)
1156                 return;
1157
1158         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1159                 return;
1160
1161         if (!test_bit(WORK_ENABLE, &tp->flags))
1162                 return;
1163
1164         netdev = tp->netdev;
1165
1166         /* When link down, the driver would cancel all bulks. */
1167         /* This avoid the re-submitting bulk */
1168         if (!netif_carrier_ok(netdev))
1169                 return;
1170
1171         usb_mark_last_busy(tp->udev);
1172
1173         switch (status) {
1174         case 0:
1175                 if (urb->actual_length < ETH_ZLEN)
1176                         break;
1177
1178                 spin_lock(&tp->rx_lock);
1179                 list_add_tail(&agg->list, &tp->rx_done);
1180                 spin_unlock(&tp->rx_lock);
1181                 napi_schedule(&tp->napi);
1182                 return;
1183         case -ESHUTDOWN:
1184                 set_bit(RTL8152_UNPLUG, &tp->flags);
1185                 netif_device_detach(tp->netdev);
1186                 return;
1187         case -ENOENT:
1188                 return; /* the urb is in unlink state */
1189         case -ETIME:
1190                 if (net_ratelimit())
1191                         netdev_warn(netdev, "maybe reset is needed?\n");
1192                 break;
1193         default:
1194                 if (net_ratelimit())
1195                         netdev_warn(netdev, "Rx status %d\n", status);
1196                 break;
1197         }
1198
1199         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1200 }
1201
1202 static void write_bulk_callback(struct urb *urb)
1203 {
1204         struct net_device_stats *stats;
1205         struct net_device *netdev;
1206         struct tx_agg *agg;
1207         struct r8152 *tp;
1208         int status = urb->status;
1209
1210         agg = urb->context;
1211         if (!agg)
1212                 return;
1213
1214         tp = agg->context;
1215         if (!tp)
1216                 return;
1217
1218         netdev = tp->netdev;
1219         stats = &netdev->stats;
1220         if (status) {
1221                 if (net_ratelimit())
1222                         netdev_warn(netdev, "Tx status %d\n", status);
1223                 stats->tx_errors += agg->skb_num;
1224         } else {
1225                 stats->tx_packets += agg->skb_num;
1226                 stats->tx_bytes += agg->skb_len;
1227         }
1228
1229         spin_lock(&tp->tx_lock);
1230         list_add_tail(&agg->list, &tp->tx_free);
1231         spin_unlock(&tp->tx_lock);
1232
1233         usb_autopm_put_interface_async(tp->intf);
1234
1235         if (!netif_carrier_ok(netdev))
1236                 return;
1237
1238         if (!test_bit(WORK_ENABLE, &tp->flags))
1239                 return;
1240
1241         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1242                 return;
1243
1244         if (!skb_queue_empty(&tp->tx_queue))
1245                 napi_schedule(&tp->napi);
1246 }
1247
1248 static void intr_callback(struct urb *urb)
1249 {
1250         struct r8152 *tp;
1251         __le16 *d;
1252         int status = urb->status;
1253         int res;
1254
1255         tp = urb->context;
1256         if (!tp)
1257                 return;
1258
1259         if (!test_bit(WORK_ENABLE, &tp->flags))
1260                 return;
1261
1262         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1263                 return;
1264
1265         switch (status) {
1266         case 0:                 /* success */
1267                 break;
1268         case -ECONNRESET:       /* unlink */
1269         case -ESHUTDOWN:
1270                 netif_device_detach(tp->netdev);
1271         case -ENOENT:
1272         case -EPROTO:
1273                 netif_info(tp, intr, tp->netdev,
1274                            "Stop submitting intr, status %d\n", status);
1275                 return;
1276         case -EOVERFLOW:
1277                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1278                 goto resubmit;
1279         /* -EPIPE:  should clear the halt */
1280         default:
1281                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1282                 goto resubmit;
1283         }
1284
1285         d = urb->transfer_buffer;
1286         if (INTR_LINK & __le16_to_cpu(d[0])) {
1287                 if (!netif_carrier_ok(tp->netdev)) {
1288                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1289                         schedule_delayed_work(&tp->schedule, 0);
1290                 }
1291         } else {
1292                 if (netif_carrier_ok(tp->netdev)) {
1293                         netif_stop_queue(tp->netdev);
1294                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1295                         schedule_delayed_work(&tp->schedule, 0);
1296                 }
1297         }
1298
1299 resubmit:
1300         res = usb_submit_urb(urb, GFP_ATOMIC);
1301         if (res == -ENODEV) {
1302                 set_bit(RTL8152_UNPLUG, &tp->flags);
1303                 netif_device_detach(tp->netdev);
1304         } else if (res) {
1305                 netif_err(tp, intr, tp->netdev,
1306                           "can't resubmit intr, status %d\n", res);
1307         }
1308 }
1309
1310 static inline void *rx_agg_align(void *data)
1311 {
1312         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1313 }
1314
1315 static inline void *tx_agg_align(void *data)
1316 {
1317         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1318 }
1319
1320 static void free_all_mem(struct r8152 *tp)
1321 {
1322         int i;
1323
1324         for (i = 0; i < RTL8152_MAX_RX; i++) {
1325                 usb_free_urb(tp->rx_info[i].urb);
1326                 tp->rx_info[i].urb = NULL;
1327
1328                 kfree(tp->rx_info[i].buffer);
1329                 tp->rx_info[i].buffer = NULL;
1330                 tp->rx_info[i].head = NULL;
1331         }
1332
1333         for (i = 0; i < RTL8152_MAX_TX; i++) {
1334                 usb_free_urb(tp->tx_info[i].urb);
1335                 tp->tx_info[i].urb = NULL;
1336
1337                 kfree(tp->tx_info[i].buffer);
1338                 tp->tx_info[i].buffer = NULL;
1339                 tp->tx_info[i].head = NULL;
1340         }
1341
1342         usb_free_urb(tp->intr_urb);
1343         tp->intr_urb = NULL;
1344
1345         kfree(tp->intr_buff);
1346         tp->intr_buff = NULL;
1347 }
1348
1349 static int alloc_all_mem(struct r8152 *tp)
1350 {
1351         struct net_device *netdev = tp->netdev;
1352         struct usb_interface *intf = tp->intf;
1353         struct usb_host_interface *alt = intf->cur_altsetting;
1354         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1355         struct urb *urb;
1356         int node, i;
1357         u8 *buf;
1358
1359         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1360
1361         spin_lock_init(&tp->rx_lock);
1362         spin_lock_init(&tp->tx_lock);
1363         INIT_LIST_HEAD(&tp->tx_free);
1364         INIT_LIST_HEAD(&tp->rx_done);
1365         skb_queue_head_init(&tp->tx_queue);
1366         skb_queue_head_init(&tp->rx_queue);
1367
1368         for (i = 0; i < RTL8152_MAX_RX; i++) {
1369                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1370                 if (!buf)
1371                         goto err1;
1372
1373                 if (buf != rx_agg_align(buf)) {
1374                         kfree(buf);
1375                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1376                                            node);
1377                         if (!buf)
1378                                 goto err1;
1379                 }
1380
1381                 urb = usb_alloc_urb(0, GFP_KERNEL);
1382                 if (!urb) {
1383                         kfree(buf);
1384                         goto err1;
1385                 }
1386
1387                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1388                 tp->rx_info[i].context = tp;
1389                 tp->rx_info[i].urb = urb;
1390                 tp->rx_info[i].buffer = buf;
1391                 tp->rx_info[i].head = rx_agg_align(buf);
1392         }
1393
1394         for (i = 0; i < RTL8152_MAX_TX; i++) {
1395                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1396                 if (!buf)
1397                         goto err1;
1398
1399                 if (buf != tx_agg_align(buf)) {
1400                         kfree(buf);
1401                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1402                                            node);
1403                         if (!buf)
1404                                 goto err1;
1405                 }
1406
1407                 urb = usb_alloc_urb(0, GFP_KERNEL);
1408                 if (!urb) {
1409                         kfree(buf);
1410                         goto err1;
1411                 }
1412
1413                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1414                 tp->tx_info[i].context = tp;
1415                 tp->tx_info[i].urb = urb;
1416                 tp->tx_info[i].buffer = buf;
1417                 tp->tx_info[i].head = tx_agg_align(buf);
1418
1419                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1420         }
1421
1422         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1423         if (!tp->intr_urb)
1424                 goto err1;
1425
1426         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1427         if (!tp->intr_buff)
1428                 goto err1;
1429
1430         tp->intr_interval = (int)ep_intr->desc.bInterval;
1431         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1432                          tp->intr_buff, INTBUFSIZE, intr_callback,
1433                          tp, tp->intr_interval);
1434
1435         return 0;
1436
1437 err1:
1438         free_all_mem(tp);
1439         return -ENOMEM;
1440 }
1441
1442 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1443 {
1444         struct tx_agg *agg = NULL;
1445         unsigned long flags;
1446
1447         if (list_empty(&tp->tx_free))
1448                 return NULL;
1449
1450         spin_lock_irqsave(&tp->tx_lock, flags);
1451         if (!list_empty(&tp->tx_free)) {
1452                 struct list_head *cursor;
1453
1454                 cursor = tp->tx_free.next;
1455                 list_del_init(cursor);
1456                 agg = list_entry(cursor, struct tx_agg, list);
1457         }
1458         spin_unlock_irqrestore(&tp->tx_lock, flags);
1459
1460         return agg;
1461 }
1462
1463 /* r8152_csum_workaround()
1464  * The hw limites the value the transport offset. When the offset is out of the
1465  * range, calculate the checksum by sw.
1466  */
1467 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1468                                   struct sk_buff_head *list)
1469 {
1470         if (skb_shinfo(skb)->gso_size) {
1471                 netdev_features_t features = tp->netdev->features;
1472                 struct sk_buff_head seg_list;
1473                 struct sk_buff *segs, *nskb;
1474
1475                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1476                 segs = skb_gso_segment(skb, features);
1477                 if (IS_ERR(segs) || !segs)
1478                         goto drop;
1479
1480                 __skb_queue_head_init(&seg_list);
1481
1482                 do {
1483                         nskb = segs;
1484                         segs = segs->next;
1485                         nskb->next = NULL;
1486                         __skb_queue_tail(&seg_list, nskb);
1487                 } while (segs);
1488
1489                 skb_queue_splice(&seg_list, list);
1490                 dev_kfree_skb(skb);
1491         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1492                 if (skb_checksum_help(skb) < 0)
1493                         goto drop;
1494
1495                 __skb_queue_head(list, skb);
1496         } else {
1497                 struct net_device_stats *stats;
1498
1499 drop:
1500                 stats = &tp->netdev->stats;
1501                 stats->tx_dropped++;
1502                 dev_kfree_skb(skb);
1503         }
1504 }
1505
1506 /* msdn_giant_send_check()
1507  * According to the document of microsoft, the TCP Pseudo Header excludes the
1508  * packet length for IPv6 TCP large packets.
1509  */
1510 static int msdn_giant_send_check(struct sk_buff *skb)
1511 {
1512         const struct ipv6hdr *ipv6h;
1513         struct tcphdr *th;
1514         int ret;
1515
1516         ret = skb_cow_head(skb, 0);
1517         if (ret)
1518                 return ret;
1519
1520         ipv6h = ipv6_hdr(skb);
1521         th = tcp_hdr(skb);
1522
1523         th->check = 0;
1524         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1525
1526         return ret;
1527 }
1528
1529 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1530 {
1531         if (skb_vlan_tag_present(skb)) {
1532                 u32 opts2;
1533
1534                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1535                 desc->opts2 |= cpu_to_le32(opts2);
1536         }
1537 }
1538
1539 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1540 {
1541         u32 opts2 = le32_to_cpu(desc->opts2);
1542
1543         if (opts2 & RX_VLAN_TAG)
1544                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1545                                        swab16(opts2 & 0xffff));
1546 }
1547
1548 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1549                          struct sk_buff *skb, u32 len, u32 transport_offset)
1550 {
1551         u32 mss = skb_shinfo(skb)->gso_size;
1552         u32 opts1, opts2 = 0;
1553         int ret = TX_CSUM_SUCCESS;
1554
1555         WARN_ON_ONCE(len > TX_LEN_MAX);
1556
1557         opts1 = len | TX_FS | TX_LS;
1558
1559         if (mss) {
1560                 if (transport_offset > GTTCPHO_MAX) {
1561                         netif_warn(tp, tx_err, tp->netdev,
1562                                    "Invalid transport offset 0x%x for TSO\n",
1563                                    transport_offset);
1564                         ret = TX_CSUM_TSO;
1565                         goto unavailable;
1566                 }
1567
1568                 switch (vlan_get_protocol(skb)) {
1569                 case htons(ETH_P_IP):
1570                         opts1 |= GTSENDV4;
1571                         break;
1572
1573                 case htons(ETH_P_IPV6):
1574                         if (msdn_giant_send_check(skb)) {
1575                                 ret = TX_CSUM_TSO;
1576                                 goto unavailable;
1577                         }
1578                         opts1 |= GTSENDV6;
1579                         break;
1580
1581                 default:
1582                         WARN_ON_ONCE(1);
1583                         break;
1584                 }
1585
1586                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1587                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1588         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1589                 u8 ip_protocol;
1590
1591                 if (transport_offset > TCPHO_MAX) {
1592                         netif_warn(tp, tx_err, tp->netdev,
1593                                    "Invalid transport offset 0x%x\n",
1594                                    transport_offset);
1595                         ret = TX_CSUM_NONE;
1596                         goto unavailable;
1597                 }
1598
1599                 switch (vlan_get_protocol(skb)) {
1600                 case htons(ETH_P_IP):
1601                         opts2 |= IPV4_CS;
1602                         ip_protocol = ip_hdr(skb)->protocol;
1603                         break;
1604
1605                 case htons(ETH_P_IPV6):
1606                         opts2 |= IPV6_CS;
1607                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1608                         break;
1609
1610                 default:
1611                         ip_protocol = IPPROTO_RAW;
1612                         break;
1613                 }
1614
1615                 if (ip_protocol == IPPROTO_TCP)
1616                         opts2 |= TCP_CS;
1617                 else if (ip_protocol == IPPROTO_UDP)
1618                         opts2 |= UDP_CS;
1619                 else
1620                         WARN_ON_ONCE(1);
1621
1622                 opts2 |= transport_offset << TCPHO_SHIFT;
1623         }
1624
1625         desc->opts2 = cpu_to_le32(opts2);
1626         desc->opts1 = cpu_to_le32(opts1);
1627
1628 unavailable:
1629         return ret;
1630 }
1631
1632 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1633 {
1634         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1635         int remain, ret;
1636         u8 *tx_data;
1637
1638         __skb_queue_head_init(&skb_head);
1639         spin_lock(&tx_queue->lock);
1640         skb_queue_splice_init(tx_queue, &skb_head);
1641         spin_unlock(&tx_queue->lock);
1642
1643         tx_data = agg->head;
1644         agg->skb_num = 0;
1645         agg->skb_len = 0;
1646         remain = agg_buf_sz;
1647
1648         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1649                 struct tx_desc *tx_desc;
1650                 struct sk_buff *skb;
1651                 unsigned int len;
1652                 u32 offset;
1653
1654                 skb = __skb_dequeue(&skb_head);
1655                 if (!skb)
1656                         break;
1657
1658                 len = skb->len + sizeof(*tx_desc);
1659
1660                 if (len > remain) {
1661                         __skb_queue_head(&skb_head, skb);
1662                         break;
1663                 }
1664
1665                 tx_data = tx_agg_align(tx_data);
1666                 tx_desc = (struct tx_desc *)tx_data;
1667
1668                 offset = (u32)skb_transport_offset(skb);
1669
1670                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1671                         r8152_csum_workaround(tp, skb, &skb_head);
1672                         continue;
1673                 }
1674
1675                 rtl_tx_vlan_tag(tx_desc, skb);
1676
1677                 tx_data += sizeof(*tx_desc);
1678
1679                 len = skb->len;
1680                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1681                         struct net_device_stats *stats = &tp->netdev->stats;
1682
1683                         stats->tx_dropped++;
1684                         dev_kfree_skb_any(skb);
1685                         tx_data -= sizeof(*tx_desc);
1686                         continue;
1687                 }
1688
1689                 tx_data += len;
1690                 agg->skb_len += len;
1691                 agg->skb_num++;
1692
1693                 dev_kfree_skb_any(skb);
1694
1695                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1696         }
1697
1698         if (!skb_queue_empty(&skb_head)) {
1699                 spin_lock(&tx_queue->lock);
1700                 skb_queue_splice(&skb_head, tx_queue);
1701                 spin_unlock(&tx_queue->lock);
1702         }
1703
1704         netif_tx_lock(tp->netdev);
1705
1706         if (netif_queue_stopped(tp->netdev) &&
1707             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1708                 netif_wake_queue(tp->netdev);
1709
1710         netif_tx_unlock(tp->netdev);
1711
1712         ret = usb_autopm_get_interface_async(tp->intf);
1713         if (ret < 0)
1714                 goto out_tx_fill;
1715
1716         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1717                           agg->head, (int)(tx_data - (u8 *)agg->head),
1718                           (usb_complete_t)write_bulk_callback, agg);
1719
1720         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1721         if (ret < 0)
1722                 usb_autopm_put_interface_async(tp->intf);
1723
1724 out_tx_fill:
1725         return ret;
1726 }
1727
1728 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1729 {
1730         u8 checksum = CHECKSUM_NONE;
1731         u32 opts2, opts3;
1732
1733         if (!(tp->netdev->features & NETIF_F_RXCSUM))
1734                 goto return_result;
1735
1736         opts2 = le32_to_cpu(rx_desc->opts2);
1737         opts3 = le32_to_cpu(rx_desc->opts3);
1738
1739         if (opts2 & RD_IPV4_CS) {
1740                 if (opts3 & IPF)
1741                         checksum = CHECKSUM_NONE;
1742                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1743                         checksum = CHECKSUM_NONE;
1744                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1745                         checksum = CHECKSUM_NONE;
1746                 else
1747                         checksum = CHECKSUM_UNNECESSARY;
1748         } else if (opts2 & RD_IPV6_CS) {
1749                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1750                         checksum = CHECKSUM_UNNECESSARY;
1751                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1752                         checksum = CHECKSUM_UNNECESSARY;
1753         }
1754
1755 return_result:
1756         return checksum;
1757 }
1758
1759 static int rx_bottom(struct r8152 *tp, int budget)
1760 {
1761         unsigned long flags;
1762         struct list_head *cursor, *next, rx_queue;
1763         int ret = 0, work_done = 0;
1764         struct napi_struct *napi = &tp->napi;
1765
1766         if (!skb_queue_empty(&tp->rx_queue)) {
1767                 while (work_done < budget) {
1768                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1769                         struct net_device *netdev = tp->netdev;
1770                         struct net_device_stats *stats = &netdev->stats;
1771                         unsigned int pkt_len;
1772
1773                         if (!skb)
1774                                 break;
1775
1776                         pkt_len = skb->len;
1777                         napi_gro_receive(napi, skb);
1778                         work_done++;
1779                         stats->rx_packets++;
1780                         stats->rx_bytes += pkt_len;
1781                 }
1782         }
1783
1784         if (list_empty(&tp->rx_done))
1785                 goto out1;
1786
1787         INIT_LIST_HEAD(&rx_queue);
1788         spin_lock_irqsave(&tp->rx_lock, flags);
1789         list_splice_init(&tp->rx_done, &rx_queue);
1790         spin_unlock_irqrestore(&tp->rx_lock, flags);
1791
1792         list_for_each_safe(cursor, next, &rx_queue) {
1793                 struct rx_desc *rx_desc;
1794                 struct rx_agg *agg;
1795                 int len_used = 0;
1796                 struct urb *urb;
1797                 u8 *rx_data;
1798
1799                 list_del_init(cursor);
1800
1801                 agg = list_entry(cursor, struct rx_agg, list);
1802                 urb = agg->urb;
1803                 if (urb->actual_length < ETH_ZLEN)
1804                         goto submit;
1805
1806                 rx_desc = agg->head;
1807                 rx_data = agg->head;
1808                 len_used += sizeof(struct rx_desc);
1809
1810                 while (urb->actual_length > len_used) {
1811                         struct net_device *netdev = tp->netdev;
1812                         struct net_device_stats *stats = &netdev->stats;
1813                         unsigned int pkt_len;
1814                         struct sk_buff *skb;
1815
1816                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1817                         if (pkt_len < ETH_ZLEN)
1818                                 break;
1819
1820                         len_used += pkt_len;
1821                         if (urb->actual_length < len_used)
1822                                 break;
1823
1824                         pkt_len -= CRC_SIZE;
1825                         rx_data += sizeof(struct rx_desc);
1826
1827                         skb = napi_alloc_skb(napi, pkt_len);
1828                         if (!skb) {
1829                                 stats->rx_dropped++;
1830                                 goto find_next_rx;
1831                         }
1832
1833                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1834                         memcpy(skb->data, rx_data, pkt_len);
1835                         skb_put(skb, pkt_len);
1836                         skb->protocol = eth_type_trans(skb, netdev);
1837                         rtl_rx_vlan_tag(rx_desc, skb);
1838                         if (work_done < budget) {
1839                                 napi_gro_receive(napi, skb);
1840                                 work_done++;
1841                                 stats->rx_packets++;
1842                                 stats->rx_bytes += pkt_len;
1843                         } else {
1844                                 __skb_queue_tail(&tp->rx_queue, skb);
1845                         }
1846
1847 find_next_rx:
1848                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1849                         rx_desc = (struct rx_desc *)rx_data;
1850                         len_used = (int)(rx_data - (u8 *)agg->head);
1851                         len_used += sizeof(struct rx_desc);
1852                 }
1853
1854 submit:
1855                 if (!ret) {
1856                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1857                 } else {
1858                         urb->actual_length = 0;
1859                         list_add_tail(&agg->list, next);
1860                 }
1861         }
1862
1863         if (!list_empty(&rx_queue)) {
1864                 spin_lock_irqsave(&tp->rx_lock, flags);
1865                 list_splice_tail(&rx_queue, &tp->rx_done);
1866                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1867         }
1868
1869 out1:
1870         return work_done;
1871 }
1872
1873 static void tx_bottom(struct r8152 *tp)
1874 {
1875         int res;
1876
1877         do {
1878                 struct tx_agg *agg;
1879
1880                 if (skb_queue_empty(&tp->tx_queue))
1881                         break;
1882
1883                 agg = r8152_get_tx_agg(tp);
1884                 if (!agg)
1885                         break;
1886
1887                 res = r8152_tx_agg_fill(tp, agg);
1888                 if (res) {
1889                         struct net_device *netdev = tp->netdev;
1890
1891                         if (res == -ENODEV) {
1892                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1893                                 netif_device_detach(netdev);
1894                         } else {
1895                                 struct net_device_stats *stats = &netdev->stats;
1896                                 unsigned long flags;
1897
1898                                 netif_warn(tp, tx_err, netdev,
1899                                            "failed tx_urb %d\n", res);
1900                                 stats->tx_dropped += agg->skb_num;
1901
1902                                 spin_lock_irqsave(&tp->tx_lock, flags);
1903                                 list_add_tail(&agg->list, &tp->tx_free);
1904                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1905                         }
1906                 }
1907         } while (res == 0);
1908 }
1909
1910 static void bottom_half(struct r8152 *tp)
1911 {
1912         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1913                 return;
1914
1915         if (!test_bit(WORK_ENABLE, &tp->flags))
1916                 return;
1917
1918         /* When link down, the driver would cancel all bulks. */
1919         /* This avoid the re-submitting bulk */
1920         if (!netif_carrier_ok(tp->netdev))
1921                 return;
1922
1923         clear_bit(SCHEDULE_NAPI, &tp->flags);
1924
1925         tx_bottom(tp);
1926 }
1927
1928 static int r8152_poll(struct napi_struct *napi, int budget)
1929 {
1930         struct r8152 *tp = container_of(napi, struct r8152, napi);
1931         int work_done;
1932
1933         work_done = rx_bottom(tp, budget);
1934         bottom_half(tp);
1935
1936         if (work_done < budget) {
1937                 napi_complete(napi);
1938                 if (!list_empty(&tp->rx_done))
1939                         napi_schedule(napi);
1940                 else if (!skb_queue_empty(&tp->tx_queue) &&
1941                          !list_empty(&tp->tx_free))
1942                         napi_schedule(napi);
1943         }
1944
1945         return work_done;
1946 }
1947
1948 static
1949 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1950 {
1951         int ret;
1952
1953         /* The rx would be stopped, so skip submitting */
1954         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1955             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1956                 return 0;
1957
1958         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1959                           agg->head, agg_buf_sz,
1960                           (usb_complete_t)read_bulk_callback, agg);
1961
1962         ret = usb_submit_urb(agg->urb, mem_flags);
1963         if (ret == -ENODEV) {
1964                 set_bit(RTL8152_UNPLUG, &tp->flags);
1965                 netif_device_detach(tp->netdev);
1966         } else if (ret) {
1967                 struct urb *urb = agg->urb;
1968                 unsigned long flags;
1969
1970                 urb->actual_length = 0;
1971                 spin_lock_irqsave(&tp->rx_lock, flags);
1972                 list_add_tail(&agg->list, &tp->rx_done);
1973                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1974
1975                 netif_err(tp, rx_err, tp->netdev,
1976                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1977
1978                 napi_schedule(&tp->napi);
1979         }
1980
1981         return ret;
1982 }
1983
1984 static void rtl_drop_queued_tx(struct r8152 *tp)
1985 {
1986         struct net_device_stats *stats = &tp->netdev->stats;
1987         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1988         struct sk_buff *skb;
1989
1990         if (skb_queue_empty(tx_queue))
1991                 return;
1992
1993         __skb_queue_head_init(&skb_head);
1994         spin_lock_bh(&tx_queue->lock);
1995         skb_queue_splice_init(tx_queue, &skb_head);
1996         spin_unlock_bh(&tx_queue->lock);
1997
1998         while ((skb = __skb_dequeue(&skb_head))) {
1999                 dev_kfree_skb(skb);
2000                 stats->tx_dropped++;
2001         }
2002 }
2003
2004 static void rtl8152_tx_timeout(struct net_device *netdev)
2005 {
2006         struct r8152 *tp = netdev_priv(netdev);
2007
2008         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2009
2010         usb_queue_reset_device(tp->intf);
2011 }
2012
2013 static void rtl8152_set_rx_mode(struct net_device *netdev)
2014 {
2015         struct r8152 *tp = netdev_priv(netdev);
2016
2017         if (netif_carrier_ok(netdev)) {
2018                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2019                 schedule_delayed_work(&tp->schedule, 0);
2020         }
2021 }
2022
2023 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2024 {
2025         struct r8152 *tp = netdev_priv(netdev);
2026         u32 mc_filter[2];       /* Multicast hash filter */
2027         __le32 tmp[2];
2028         u32 ocp_data;
2029
2030         netif_stop_queue(netdev);
2031         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2032         ocp_data &= ~RCR_ACPT_ALL;
2033         ocp_data |= RCR_AB | RCR_APM;
2034
2035         if (netdev->flags & IFF_PROMISC) {
2036                 /* Unconditionally log net taps. */
2037                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2038                 ocp_data |= RCR_AM | RCR_AAP;
2039                 mc_filter[1] = 0xffffffff;
2040                 mc_filter[0] = 0xffffffff;
2041         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2042                    (netdev->flags & IFF_ALLMULTI)) {
2043                 /* Too many to filter perfectly -- accept all multicasts. */
2044                 ocp_data |= RCR_AM;
2045                 mc_filter[1] = 0xffffffff;
2046                 mc_filter[0] = 0xffffffff;
2047         } else {
2048                 struct netdev_hw_addr *ha;
2049
2050                 mc_filter[1] = 0;
2051                 mc_filter[0] = 0;
2052                 netdev_for_each_mc_addr(ha, netdev) {
2053                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2054
2055                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2056                         ocp_data |= RCR_AM;
2057                 }
2058         }
2059
2060         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2061         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2062
2063         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2064         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2065         netif_wake_queue(netdev);
2066 }
2067
2068 static netdev_features_t
2069 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2070                        netdev_features_t features)
2071 {
2072         u32 mss = skb_shinfo(skb)->gso_size;
2073         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2074         int offset = skb_transport_offset(skb);
2075
2076         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2077                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2078         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2079                 features &= ~NETIF_F_GSO_MASK;
2080
2081         return features;
2082 }
2083
2084 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2085                                       struct net_device *netdev)
2086 {
2087         struct r8152 *tp = netdev_priv(netdev);
2088
2089         skb_tx_timestamp(skb);
2090
2091         skb_queue_tail(&tp->tx_queue, skb);
2092
2093         if (!list_empty(&tp->tx_free)) {
2094                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2095                         set_bit(SCHEDULE_NAPI, &tp->flags);
2096                         schedule_delayed_work(&tp->schedule, 0);
2097                 } else {
2098                         usb_mark_last_busy(tp->udev);
2099                         napi_schedule(&tp->napi);
2100                 }
2101         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2102                 netif_stop_queue(netdev);
2103         }
2104
2105         return NETDEV_TX_OK;
2106 }
2107
2108 static void r8152b_reset_packet_filter(struct r8152 *tp)
2109 {
2110         u32     ocp_data;
2111
2112         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2113         ocp_data &= ~FMC_FCR_MCU_EN;
2114         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2115         ocp_data |= FMC_FCR_MCU_EN;
2116         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2117 }
2118
2119 static void rtl8152_nic_reset(struct r8152 *tp)
2120 {
2121         int     i;
2122
2123         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2124
2125         for (i = 0; i < 1000; i++) {
2126                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2127                         break;
2128                 usleep_range(100, 400);
2129         }
2130 }
2131
2132 static void set_tx_qlen(struct r8152 *tp)
2133 {
2134         struct net_device *netdev = tp->netdev;
2135
2136         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2137                                     sizeof(struct tx_desc));
2138 }
2139
2140 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2141 {
2142         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2143 }
2144
2145 static void rtl_set_eee_plus(struct r8152 *tp)
2146 {
2147         u32 ocp_data;
2148         u8 speed;
2149
2150         speed = rtl8152_get_speed(tp);
2151         if (speed & _10bps) {
2152                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2153                 ocp_data |= EEEP_CR_EEEP_TX;
2154                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2155         } else {
2156                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2157                 ocp_data &= ~EEEP_CR_EEEP_TX;
2158                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2159         }
2160 }
2161
2162 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2163 {
2164         u32 ocp_data;
2165
2166         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2167         if (enable)
2168                 ocp_data |= RXDY_GATED_EN;
2169         else
2170                 ocp_data &= ~RXDY_GATED_EN;
2171         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2172 }
2173
2174 static int rtl_start_rx(struct r8152 *tp)
2175 {
2176         int i, ret = 0;
2177
2178         INIT_LIST_HEAD(&tp->rx_done);
2179         for (i = 0; i < RTL8152_MAX_RX; i++) {
2180                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2181                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2182                 if (ret)
2183                         break;
2184         }
2185
2186         if (ret && ++i < RTL8152_MAX_RX) {
2187                 struct list_head rx_queue;
2188                 unsigned long flags;
2189
2190                 INIT_LIST_HEAD(&rx_queue);
2191
2192                 do {
2193                         struct rx_agg *agg = &tp->rx_info[i++];
2194                         struct urb *urb = agg->urb;
2195
2196                         urb->actual_length = 0;
2197                         list_add_tail(&agg->list, &rx_queue);
2198                 } while (i < RTL8152_MAX_RX);
2199
2200                 spin_lock_irqsave(&tp->rx_lock, flags);
2201                 list_splice_tail(&rx_queue, &tp->rx_done);
2202                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2203         }
2204
2205         return ret;
2206 }
2207
2208 static int rtl_stop_rx(struct r8152 *tp)
2209 {
2210         int i;
2211
2212         for (i = 0; i < RTL8152_MAX_RX; i++)
2213                 usb_kill_urb(tp->rx_info[i].urb);
2214
2215         while (!skb_queue_empty(&tp->rx_queue))
2216                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2217
2218         return 0;
2219 }
2220
2221 static int rtl_enable(struct r8152 *tp)
2222 {
2223         u32 ocp_data;
2224
2225         r8152b_reset_packet_filter(tp);
2226
2227         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2228         ocp_data |= CR_RE | CR_TE;
2229         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2230
2231         rxdy_gated_en(tp, false);
2232
2233         return 0;
2234 }
2235
2236 static int rtl8152_enable(struct r8152 *tp)
2237 {
2238         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2239                 return -ENODEV;
2240
2241         set_tx_qlen(tp);
2242         rtl_set_eee_plus(tp);
2243
2244         return rtl_enable(tp);
2245 }
2246
2247 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2248 {
2249         u32 ocp_data = tp->coalesce / 8;
2250
2251         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2252 }
2253
2254 static void r8153_set_rx_early_size(struct r8152 *tp)
2255 {
2256         u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2257
2258         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2259 }
2260
2261 static int rtl8153_enable(struct r8152 *tp)
2262 {
2263         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2264                 return -ENODEV;
2265
2266         set_tx_qlen(tp);
2267         rtl_set_eee_plus(tp);
2268         r8153_set_rx_early_timeout(tp);
2269         r8153_set_rx_early_size(tp);
2270
2271         return rtl_enable(tp);
2272 }
2273
2274 static void rtl_disable(struct r8152 *tp)
2275 {
2276         u32 ocp_data;
2277         int i;
2278
2279         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2280                 rtl_drop_queued_tx(tp);
2281                 return;
2282         }
2283
2284         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2285         ocp_data &= ~RCR_ACPT_ALL;
2286         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2287
2288         rtl_drop_queued_tx(tp);
2289
2290         for (i = 0; i < RTL8152_MAX_TX; i++)
2291                 usb_kill_urb(tp->tx_info[i].urb);
2292
2293         rxdy_gated_en(tp, true);
2294
2295         for (i = 0; i < 1000; i++) {
2296                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2297                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2298                         break;
2299                 usleep_range(1000, 2000);
2300         }
2301
2302         for (i = 0; i < 1000; i++) {
2303                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2304                         break;
2305                 usleep_range(1000, 2000);
2306         }
2307
2308         rtl_stop_rx(tp);
2309
2310         rtl8152_nic_reset(tp);
2311 }
2312
2313 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2314 {
2315         u32 ocp_data;
2316
2317         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2318         if (enable)
2319                 ocp_data |= POWER_CUT;
2320         else
2321                 ocp_data &= ~POWER_CUT;
2322         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2323
2324         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2325         ocp_data &= ~RESUME_INDICATE;
2326         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2327 }
2328
2329 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2330 {
2331         u32 ocp_data;
2332
2333         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2334         if (enable)
2335                 ocp_data |= CPCR_RX_VLAN;
2336         else
2337                 ocp_data &= ~CPCR_RX_VLAN;
2338         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2339 }
2340
2341 static int rtl8152_set_features(struct net_device *dev,
2342                                 netdev_features_t features)
2343 {
2344         netdev_features_t changed = features ^ dev->features;
2345         struct r8152 *tp = netdev_priv(dev);
2346         int ret;
2347
2348         ret = usb_autopm_get_interface(tp->intf);
2349         if (ret < 0)
2350                 goto out;
2351
2352         mutex_lock(&tp->control);
2353
2354         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2355                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2356                         rtl_rx_vlan_en(tp, true);
2357                 else
2358                         rtl_rx_vlan_en(tp, false);
2359         }
2360
2361         mutex_unlock(&tp->control);
2362
2363         usb_autopm_put_interface(tp->intf);
2364
2365 out:
2366         return ret;
2367 }
2368
2369 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2370
2371 static u32 __rtl_get_wol(struct r8152 *tp)
2372 {
2373         u32 ocp_data;
2374         u32 wolopts = 0;
2375
2376         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2377         if (ocp_data & LINK_ON_WAKE_EN)
2378                 wolopts |= WAKE_PHY;
2379
2380         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2381         if (ocp_data & UWF_EN)
2382                 wolopts |= WAKE_UCAST;
2383         if (ocp_data & BWF_EN)
2384                 wolopts |= WAKE_BCAST;
2385         if (ocp_data & MWF_EN)
2386                 wolopts |= WAKE_MCAST;
2387
2388         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2389         if (ocp_data & MAGIC_EN)
2390                 wolopts |= WAKE_MAGIC;
2391
2392         return wolopts;
2393 }
2394
2395 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2396 {
2397         u32 ocp_data;
2398
2399         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2400
2401         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2402         ocp_data &= ~LINK_ON_WAKE_EN;
2403         if (wolopts & WAKE_PHY)
2404                 ocp_data |= LINK_ON_WAKE_EN;
2405         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2406
2407         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2408         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2409         if (wolopts & WAKE_UCAST)
2410                 ocp_data |= UWF_EN;
2411         if (wolopts & WAKE_BCAST)
2412                 ocp_data |= BWF_EN;
2413         if (wolopts & WAKE_MCAST)
2414                 ocp_data |= MWF_EN;
2415         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2416
2417         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2418
2419         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2420         ocp_data &= ~MAGIC_EN;
2421         if (wolopts & WAKE_MAGIC)
2422                 ocp_data |= MAGIC_EN;
2423         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2424
2425         if (wolopts & WAKE_ANY)
2426                 device_set_wakeup_enable(&tp->udev->dev, true);
2427         else
2428                 device_set_wakeup_enable(&tp->udev->dev, false);
2429 }
2430
2431 static void r8153_mac_clk_spd(struct r8152 *tp, bool enable)
2432 {
2433         /* MAC clock speed down */
2434         if (enable) {
2435                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL,
2436                                ALDPS_SPDWN_RATIO);
2437                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2,
2438                                EEE_SPDWN_RATIO);
2439                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
2440                                PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
2441                                U1U2_SPDWN_EN | L1_SPDWN_EN);
2442                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
2443                                PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
2444                                TP100_SPDWN_EN | TP500_SPDWN_EN | EEE_SPDWN_EN |
2445                                TP1000_SPDWN_EN);
2446         } else {
2447                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
2448                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
2449                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
2450                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
2451         }
2452 }
2453
2454 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2455 {
2456         u8 u1u2[8];
2457
2458         if (enable)
2459                 memset(u1u2, 0xff, sizeof(u1u2));
2460         else
2461                 memset(u1u2, 0x00, sizeof(u1u2));
2462
2463         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2464 }
2465
2466 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2467 {
2468         u32 ocp_data;
2469
2470         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2471         if (enable)
2472                 ocp_data |= U2P3_ENABLE;
2473         else
2474                 ocp_data &= ~U2P3_ENABLE;
2475         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2476 }
2477
2478 static u16 r8153_phy_status(struct r8152 *tp, u16 desired)
2479 {
2480         u16 data;
2481         int i;
2482
2483         for (i = 0; i < 500; i++) {
2484                 data = ocp_reg_read(tp, OCP_PHY_STATUS);
2485                 data &= PHY_STAT_MASK;
2486                 if (desired) {
2487                         if (data == desired)
2488                                 break;
2489                 } else if (data == PHY_STAT_LAN_ON || data == PHY_STAT_PWRDN ||
2490                            data == PHY_STAT_EXT_INIT) {
2491                         break;
2492                 }
2493
2494                 msleep(20);
2495         }
2496
2497         return data;
2498 }
2499
2500 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2501 {
2502         u32 ocp_data;
2503
2504         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2505         if (enable)
2506                 ocp_data |= PWR_EN | PHASE2_EN;
2507         else
2508                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2509         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2510
2511         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2512         ocp_data &= ~PCUT_STATUS;
2513         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2514 }
2515
2516 static bool rtl_can_wakeup(struct r8152 *tp)
2517 {
2518         struct usb_device *udev = tp->udev;
2519
2520         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2521 }
2522
2523 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2524 {
2525         if (enable) {
2526                 u32 ocp_data;
2527
2528                 __rtl_set_wol(tp, WAKE_ANY);
2529
2530                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2531
2532                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2533                 ocp_data |= LINK_OFF_WAKE_EN;
2534                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2535
2536                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2537         } else {
2538                 u32 ocp_data;
2539
2540                 __rtl_set_wol(tp, tp->saved_wolopts);
2541
2542                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2543
2544                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2545                 ocp_data &= ~LINK_OFF_WAKE_EN;
2546                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2547
2548                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2549         }
2550 }
2551
2552 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2553 {
2554         if (enable) {
2555                 r8153_u1u2en(tp, false);
2556                 r8153_u2p3en(tp, false);
2557                 r8153_mac_clk_spd(tp, true);
2558                 rtl_runtime_suspend_enable(tp, true);
2559         } else {
2560                 rtl_runtime_suspend_enable(tp, false);
2561                 r8153_mac_clk_spd(tp, false);
2562
2563                 switch (tp->version) {
2564                 case RTL_VER_03:
2565                 case RTL_VER_04:
2566                         break;
2567                 case RTL_VER_05:
2568                 case RTL_VER_06:
2569                 default:
2570                         r8153_u2p3en(tp, true);
2571                         break;
2572                 }
2573
2574                 r8153_u1u2en(tp, true);
2575         }
2576 }
2577
2578 static void r8153_teredo_off(struct r8152 *tp)
2579 {
2580         u32 ocp_data;
2581
2582         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2583         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2584         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2585
2586         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2587         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2588         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2589 }
2590
2591 static void rtl_reset_bmu(struct r8152 *tp)
2592 {
2593         u32 ocp_data;
2594
2595         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2596         ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2597         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2598         ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2599         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2600 }
2601
2602 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2603 {
2604         if (enable) {
2605                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2606                                                     LINKENA | DIS_SDSAVE);
2607         } else {
2608                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2609                                                     DIS_SDSAVE);
2610                 msleep(20);
2611         }
2612 }
2613
2614 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2615 {
2616         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2617         ocp_reg_write(tp, OCP_EEE_DATA, reg);
2618         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2619 }
2620
2621 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2622 {
2623         u16 data;
2624
2625         r8152_mmd_indirect(tp, dev, reg);
2626         data = ocp_reg_read(tp, OCP_EEE_DATA);
2627         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2628
2629         return data;
2630 }
2631
2632 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2633 {
2634         r8152_mmd_indirect(tp, dev, reg);
2635         ocp_reg_write(tp, OCP_EEE_DATA, data);
2636         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2637 }
2638
2639 static void r8152_eee_en(struct r8152 *tp, bool enable)
2640 {
2641         u16 config1, config2, config3;
2642         u32 ocp_data;
2643
2644         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2645         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2646         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2647         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2648
2649         if (enable) {
2650                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2651                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2652                 config1 |= sd_rise_time(1);
2653                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2654                 config3 |= fast_snr(42);
2655         } else {
2656                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2657                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2658                              RX_QUIET_EN);
2659                 config1 |= sd_rise_time(7);
2660                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2661                 config3 |= fast_snr(511);
2662         }
2663
2664         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2665         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2666         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2667         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2668 }
2669
2670 static void r8152b_enable_eee(struct r8152 *tp)
2671 {
2672         r8152_eee_en(tp, true);
2673         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2674 }
2675
2676 static void r8152b_enable_fc(struct r8152 *tp)
2677 {
2678         u16 anar;
2679
2680         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2681         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2682         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2683 }
2684
2685 static void rtl8152_disable(struct r8152 *tp)
2686 {
2687         r8152_aldps_en(tp, false);
2688         rtl_disable(tp);
2689         r8152_aldps_en(tp, true);
2690 }
2691
2692 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2693 {
2694         r8152b_enable_eee(tp);
2695         r8152_aldps_en(tp, true);
2696         r8152b_enable_fc(tp);
2697
2698         set_bit(PHY_RESET, &tp->flags);
2699 }
2700
2701 static void r8152b_exit_oob(struct r8152 *tp)
2702 {
2703         u32 ocp_data;
2704         int i;
2705
2706         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2707         ocp_data &= ~RCR_ACPT_ALL;
2708         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2709
2710         rxdy_gated_en(tp, true);
2711         r8153_teredo_off(tp);
2712         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2713         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2714
2715         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2716         ocp_data &= ~NOW_IS_OOB;
2717         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2718
2719         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2720         ocp_data &= ~MCU_BORW_EN;
2721         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2722
2723         for (i = 0; i < 1000; i++) {
2724                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2725                 if (ocp_data & LINK_LIST_READY)
2726                         break;
2727                 usleep_range(1000, 2000);
2728         }
2729
2730         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2731         ocp_data |= RE_INIT_LL;
2732         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2733
2734         for (i = 0; i < 1000; i++) {
2735                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2736                 if (ocp_data & LINK_LIST_READY)
2737                         break;
2738                 usleep_range(1000, 2000);
2739         }
2740
2741         rtl8152_nic_reset(tp);
2742
2743         /* rx share fifo credit full threshold */
2744         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2745
2746         if (tp->udev->speed == USB_SPEED_FULL ||
2747             tp->udev->speed == USB_SPEED_LOW) {
2748                 /* rx share fifo credit near full threshold */
2749                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2750                                 RXFIFO_THR2_FULL);
2751                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2752                                 RXFIFO_THR3_FULL);
2753         } else {
2754                 /* rx share fifo credit near full threshold */
2755                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2756                                 RXFIFO_THR2_HIGH);
2757                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2758                                 RXFIFO_THR3_HIGH);
2759         }
2760
2761         /* TX share fifo free credit full threshold */
2762         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2763
2764         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2765         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2766         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2767                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2768
2769         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2770
2771         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2772
2773         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2774         ocp_data |= TCR0_AUTO_FIFO;
2775         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2776 }
2777
2778 static void r8152b_enter_oob(struct r8152 *tp)
2779 {
2780         u32 ocp_data;
2781         int i;
2782
2783         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2784         ocp_data &= ~NOW_IS_OOB;
2785         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2786
2787         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2788         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2789         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2790
2791         rtl_disable(tp);
2792
2793         for (i = 0; i < 1000; i++) {
2794                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2795                 if (ocp_data & LINK_LIST_READY)
2796                         break;
2797                 usleep_range(1000, 2000);
2798         }
2799
2800         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2801         ocp_data |= RE_INIT_LL;
2802         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2803
2804         for (i = 0; i < 1000; i++) {
2805                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2806                 if (ocp_data & LINK_LIST_READY)
2807                         break;
2808                 usleep_range(1000, 2000);
2809         }
2810
2811         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2812
2813         rtl_rx_vlan_en(tp, true);
2814
2815         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2816         ocp_data |= ALDPS_PROXY_MODE;
2817         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2818
2819         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2820         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2821         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2822
2823         rxdy_gated_en(tp, false);
2824
2825         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2826         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2827         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2828 }
2829
2830 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2831 {
2832         u16 data;
2833
2834         data = ocp_reg_read(tp, OCP_POWER_CFG);
2835         if (enable) {
2836                 data |= EN_ALDPS;
2837                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2838         } else {
2839                 data &= ~EN_ALDPS;
2840                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2841                 msleep(20);
2842         }
2843 }
2844
2845 static void r8153_eee_en(struct r8152 *tp, bool enable)
2846 {
2847         u32 ocp_data;
2848         u16 config;
2849
2850         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2851         config = ocp_reg_read(tp, OCP_EEE_CFG);
2852
2853         if (enable) {
2854                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2855                 config |= EEE10_EN;
2856         } else {
2857                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2858                 config &= ~EEE10_EN;
2859         }
2860
2861         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2862         ocp_reg_write(tp, OCP_EEE_CFG, config);
2863 }
2864
2865 static void r8153_hw_phy_cfg(struct r8152 *tp)
2866 {
2867         u32 ocp_data;
2868         u16 data;
2869
2870         /* disable ALDPS before updating the PHY parameters */
2871         r8153_aldps_en(tp, false);
2872
2873         /* disable EEE before updating the PHY parameters */
2874         r8153_eee_en(tp, false);
2875         ocp_reg_write(tp, OCP_EEE_ADV, 0);
2876
2877         if (tp->version == RTL_VER_03) {
2878                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2879                 data &= ~CTAP_SHORT_EN;
2880                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2881         }
2882
2883         data = ocp_reg_read(tp, OCP_POWER_CFG);
2884         data |= EEE_CLKDIV_EN;
2885         ocp_reg_write(tp, OCP_POWER_CFG, data);
2886
2887         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2888         data |= EN_10M_BGOFF;
2889         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2890         data = ocp_reg_read(tp, OCP_POWER_CFG);
2891         data |= EN_10M_PLLOFF;
2892         ocp_reg_write(tp, OCP_POWER_CFG, data);
2893         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2894
2895         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2896         ocp_data |= PFM_PWM_SWITCH;
2897         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2898
2899         /* Enable LPF corner auto tune */
2900         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2901
2902         /* Adjust 10M Amplitude */
2903         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2904         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2905
2906         r8153_eee_en(tp, true);
2907         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2908
2909         r8153_aldps_en(tp, true);
2910         r8152b_enable_fc(tp);
2911
2912         switch (tp->version) {
2913         case RTL_VER_03:
2914         case RTL_VER_04:
2915                 break;
2916         case RTL_VER_05:
2917         case RTL_VER_06:
2918         default:
2919                 r8153_u2p3en(tp, true);
2920                 break;
2921         }
2922
2923         set_bit(PHY_RESET, &tp->flags);
2924 }
2925
2926 static void r8153_first_init(struct r8152 *tp)
2927 {
2928         u32 ocp_data;
2929         int i;
2930
2931         r8153_mac_clk_spd(tp, false);
2932         rxdy_gated_en(tp, true);
2933         r8153_teredo_off(tp);
2934
2935         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2936         ocp_data &= ~RCR_ACPT_ALL;
2937         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2938
2939         rtl8152_nic_reset(tp);
2940         rtl_reset_bmu(tp);
2941
2942         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2943         ocp_data &= ~NOW_IS_OOB;
2944         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2945
2946         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2947         ocp_data &= ~MCU_BORW_EN;
2948         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2949
2950         for (i = 0; i < 1000; i++) {
2951                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2952                 if (ocp_data & LINK_LIST_READY)
2953                         break;
2954                 usleep_range(1000, 2000);
2955         }
2956
2957         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2958         ocp_data |= RE_INIT_LL;
2959         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2960
2961         for (i = 0; i < 1000; i++) {
2962                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2963                 if (ocp_data & LINK_LIST_READY)
2964                         break;
2965                 usleep_range(1000, 2000);
2966         }
2967
2968         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2969
2970         ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2971         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2972         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2973
2974         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2975         ocp_data |= TCR0_AUTO_FIFO;
2976         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2977
2978         rtl8152_nic_reset(tp);
2979
2980         /* rx share fifo credit full threshold */
2981         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2982         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2983         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2984         /* TX share fifo free credit full threshold */
2985         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2986 }
2987
2988 static void r8153_enter_oob(struct r8152 *tp)
2989 {
2990         u32 ocp_data;
2991         int i;
2992
2993         r8153_mac_clk_spd(tp, true);
2994
2995         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2996         ocp_data &= ~NOW_IS_OOB;
2997         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2998
2999         rtl_disable(tp);
3000         rtl_reset_bmu(tp);
3001
3002         for (i = 0; i < 1000; i++) {
3003                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3004                 if (ocp_data & LINK_LIST_READY)
3005                         break;
3006                 usleep_range(1000, 2000);
3007         }
3008
3009         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3010         ocp_data |= RE_INIT_LL;
3011         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3012
3013         for (i = 0; i < 1000; i++) {
3014                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3015                 if (ocp_data & LINK_LIST_READY)
3016                         break;
3017                 usleep_range(1000, 2000);
3018         }
3019
3020         ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
3021         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3022
3023         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3024         ocp_data &= ~TEREDO_WAKE_MASK;
3025         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3026
3027         rtl_rx_vlan_en(tp, true);
3028
3029         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
3030         ocp_data |= ALDPS_PROXY_MODE;
3031         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
3032
3033         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3034         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3035         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3036
3037         rxdy_gated_en(tp, false);
3038
3039         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3040         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3041         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3042 }
3043
3044 static void rtl8153_disable(struct r8152 *tp)
3045 {
3046         r8153_aldps_en(tp, false);
3047         rtl_disable(tp);
3048         rtl_reset_bmu(tp);
3049         r8153_aldps_en(tp, true);
3050 }
3051
3052 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
3053 {
3054         u16 bmcr, anar, gbcr;
3055         int ret = 0;
3056
3057         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3058         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
3059                   ADVERTISE_100HALF | ADVERTISE_100FULL);
3060         if (tp->mii.supports_gmii) {
3061                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3062                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3063         } else {
3064                 gbcr = 0;
3065         }
3066
3067         if (autoneg == AUTONEG_DISABLE) {
3068                 if (speed == SPEED_10) {
3069                         bmcr = 0;
3070                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3071                 } else if (speed == SPEED_100) {
3072                         bmcr = BMCR_SPEED100;
3073                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3074                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3075                         bmcr = BMCR_SPEED1000;
3076                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3077                 } else {
3078                         ret = -EINVAL;
3079                         goto out;
3080                 }
3081
3082                 if (duplex == DUPLEX_FULL)
3083                         bmcr |= BMCR_FULLDPLX;
3084         } else {
3085                 if (speed == SPEED_10) {
3086                         if (duplex == DUPLEX_FULL)
3087                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3088                         else
3089                                 anar |= ADVERTISE_10HALF;
3090                 } else if (speed == SPEED_100) {
3091                         if (duplex == DUPLEX_FULL) {
3092                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3093                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3094                         } else {
3095                                 anar |= ADVERTISE_10HALF;
3096                                 anar |= ADVERTISE_100HALF;
3097                         }
3098                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3099                         if (duplex == DUPLEX_FULL) {
3100                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3101                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3102                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3103                         } else {
3104                                 anar |= ADVERTISE_10HALF;
3105                                 anar |= ADVERTISE_100HALF;
3106                                 gbcr |= ADVERTISE_1000HALF;
3107                         }
3108                 } else {
3109                         ret = -EINVAL;
3110                         goto out;
3111                 }
3112
3113                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3114         }
3115
3116         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3117                 bmcr |= BMCR_RESET;
3118
3119         if (tp->mii.supports_gmii)
3120                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3121
3122         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3123         r8152_mdio_write(tp, MII_BMCR, bmcr);
3124
3125         if (bmcr & BMCR_RESET) {
3126                 int i;
3127
3128                 for (i = 0; i < 50; i++) {
3129                         msleep(20);
3130                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3131                                 break;
3132                 }
3133         }
3134
3135 out:
3136         return ret;
3137 }
3138
3139 static void rtl8152_up(struct r8152 *tp)
3140 {
3141         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3142                 return;
3143
3144         r8152_aldps_en(tp, false);
3145         r8152b_exit_oob(tp);
3146         r8152_aldps_en(tp, true);
3147 }
3148
3149 static void rtl8152_down(struct r8152 *tp)
3150 {
3151         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3152                 rtl_drop_queued_tx(tp);
3153                 return;
3154         }
3155
3156         r8152_power_cut_en(tp, false);
3157         r8152_aldps_en(tp, false);
3158         r8152b_enter_oob(tp);
3159         r8152_aldps_en(tp, true);
3160 }
3161
3162 static void rtl8153_up(struct r8152 *tp)
3163 {
3164         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3165                 return;
3166
3167         r8153_u1u2en(tp, false);
3168         r8153_u2p3en(tp, false);
3169         r8153_aldps_en(tp, false);
3170         r8153_first_init(tp);
3171         r8153_aldps_en(tp, true);
3172
3173         switch (tp->version) {
3174         case RTL_VER_03:
3175         case RTL_VER_04:
3176                 break;
3177         case RTL_VER_05:
3178         case RTL_VER_06:
3179         default:
3180                 r8153_u2p3en(tp, true);
3181                 break;
3182         }
3183
3184         r8153_u1u2en(tp, true);
3185 }
3186
3187 static void rtl8153_down(struct r8152 *tp)
3188 {
3189         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3190                 rtl_drop_queued_tx(tp);
3191                 return;
3192         }
3193
3194         r8153_u1u2en(tp, false);
3195         r8153_u2p3en(tp, false);
3196         r8153_power_cut_en(tp, false);
3197         r8153_aldps_en(tp, false);
3198         r8153_enter_oob(tp);
3199         r8153_aldps_en(tp, true);
3200 }
3201
3202 static bool rtl8152_in_nway(struct r8152 *tp)
3203 {
3204         u16 nway_state;
3205
3206         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3207         tp->ocp_base = 0x2000;
3208         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
3209         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3210
3211         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3212         if (nway_state & 0xc000)
3213                 return false;
3214         else
3215                 return true;
3216 }
3217
3218 static bool rtl8153_in_nway(struct r8152 *tp)
3219 {
3220         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3221
3222         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3223                 return false;
3224         else
3225                 return true;
3226 }
3227
3228 static void set_carrier(struct r8152 *tp)
3229 {
3230         struct net_device *netdev = tp->netdev;
3231         struct napi_struct *napi = &tp->napi;
3232         u8 speed;
3233
3234         speed = rtl8152_get_speed(tp);
3235
3236         if (speed & LINK_STATUS) {
3237                 if (!netif_carrier_ok(netdev)) {
3238                         tp->rtl_ops.enable(tp);
3239                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3240                         netif_stop_queue(netdev);
3241                         napi_disable(napi);
3242                         netif_carrier_on(netdev);
3243                         rtl_start_rx(tp);
3244                         napi_enable(&tp->napi);
3245                         netif_wake_queue(netdev);
3246                         netif_info(tp, link, netdev, "carrier on\n");
3247                 } else if (netif_queue_stopped(netdev) &&
3248                            skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3249                         netif_wake_queue(netdev);
3250                 }
3251         } else {
3252                 if (netif_carrier_ok(netdev)) {
3253                         netif_carrier_off(netdev);
3254                         napi_disable(napi);
3255                         tp->rtl_ops.disable(tp);
3256                         napi_enable(napi);
3257                         netif_info(tp, link, netdev, "carrier off\n");
3258                 }
3259         }
3260 }
3261
3262 static void rtl_work_func_t(struct work_struct *work)
3263 {
3264         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3265
3266         /* If the device is unplugged or !netif_running(), the workqueue
3267          * doesn't need to wake the device, and could return directly.
3268          */
3269         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3270                 return;
3271
3272         if (usb_autopm_get_interface(tp->intf) < 0)
3273                 return;
3274
3275         if (!test_bit(WORK_ENABLE, &tp->flags))
3276                 goto out1;
3277
3278         if (!mutex_trylock(&tp->control)) {
3279                 schedule_delayed_work(&tp->schedule, 0);
3280                 goto out1;
3281         }
3282
3283         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3284                 set_carrier(tp);
3285
3286         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3287                 _rtl8152_set_rx_mode(tp->netdev);
3288
3289         /* don't schedule napi before linking */
3290         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3291             netif_carrier_ok(tp->netdev))
3292                 napi_schedule(&tp->napi);
3293
3294         mutex_unlock(&tp->control);
3295
3296 out1:
3297         usb_autopm_put_interface(tp->intf);
3298 }
3299
3300 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3301 {
3302         struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3303
3304         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3305                 return;
3306
3307         if (usb_autopm_get_interface(tp->intf) < 0)
3308                 return;
3309
3310         mutex_lock(&tp->control);
3311
3312         tp->rtl_ops.hw_phy_cfg(tp);
3313
3314         rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3315
3316         mutex_unlock(&tp->control);
3317
3318         usb_autopm_put_interface(tp->intf);
3319 }
3320
3321 #ifdef CONFIG_PM_SLEEP
3322 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3323                         void *data)
3324 {
3325         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3326
3327         switch (action) {
3328         case PM_HIBERNATION_PREPARE:
3329         case PM_SUSPEND_PREPARE:
3330                 usb_autopm_get_interface(tp->intf);
3331                 break;
3332
3333         case PM_POST_HIBERNATION:
3334         case PM_POST_SUSPEND:
3335                 usb_autopm_put_interface(tp->intf);
3336                 break;
3337
3338         case PM_POST_RESTORE:
3339         case PM_RESTORE_PREPARE:
3340         default:
3341                 break;
3342         }
3343
3344         return NOTIFY_DONE;
3345 }
3346 #endif
3347
3348 static int rtl8152_open(struct net_device *netdev)
3349 {
3350         struct r8152 *tp = netdev_priv(netdev);
3351         int res = 0;
3352
3353         res = alloc_all_mem(tp);
3354         if (res)
3355                 goto out;
3356
3357         res = usb_autopm_get_interface(tp->intf);
3358         if (res < 0)
3359                 goto out_free;
3360
3361         mutex_lock(&tp->control);
3362
3363         tp->rtl_ops.up(tp);
3364
3365         netif_carrier_off(netdev);
3366         netif_start_queue(netdev);
3367         set_bit(WORK_ENABLE, &tp->flags);
3368
3369         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3370         if (res) {
3371                 if (res == -ENODEV)
3372                         netif_device_detach(tp->netdev);
3373                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3374                            res);
3375                 goto out_unlock;
3376         }
3377         napi_enable(&tp->napi);
3378
3379         mutex_unlock(&tp->control);
3380
3381         usb_autopm_put_interface(tp->intf);
3382 #ifdef CONFIG_PM_SLEEP
3383         tp->pm_notifier.notifier_call = rtl_notifier;
3384         register_pm_notifier(&tp->pm_notifier);
3385 #endif
3386         return 0;
3387
3388 out_unlock:
3389         mutex_unlock(&tp->control);
3390         usb_autopm_put_interface(tp->intf);
3391 out_free:
3392         free_all_mem(tp);
3393 out:
3394         return res;
3395 }
3396
3397 static int rtl8152_close(struct net_device *netdev)
3398 {
3399         struct r8152 *tp = netdev_priv(netdev);
3400         int res = 0;
3401
3402 #ifdef CONFIG_PM_SLEEP
3403         unregister_pm_notifier(&tp->pm_notifier);
3404 #endif
3405         napi_disable(&tp->napi);
3406         clear_bit(WORK_ENABLE, &tp->flags);
3407         usb_kill_urb(tp->intr_urb);
3408         cancel_delayed_work_sync(&tp->schedule);
3409         netif_stop_queue(netdev);
3410
3411         res = usb_autopm_get_interface(tp->intf);
3412         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3413                 rtl_drop_queued_tx(tp);
3414                 rtl_stop_rx(tp);
3415         } else {
3416                 mutex_lock(&tp->control);
3417
3418                 tp->rtl_ops.down(tp);
3419
3420                 mutex_unlock(&tp->control);
3421
3422                 usb_autopm_put_interface(tp->intf);
3423         }
3424
3425         free_all_mem(tp);
3426
3427         return res;
3428 }
3429
3430 static void rtl_tally_reset(struct r8152 *tp)
3431 {
3432         u32 ocp_data;
3433
3434         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3435         ocp_data |= TALLY_RESET;
3436         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3437 }
3438
3439 static void r8152b_init(struct r8152 *tp)
3440 {
3441         u32 ocp_data;
3442         u16 data;
3443
3444         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3445                 return;
3446
3447         data = r8152_mdio_read(tp, MII_BMCR);
3448         if (data & BMCR_PDOWN) {
3449                 data &= ~BMCR_PDOWN;
3450                 r8152_mdio_write(tp, MII_BMCR, data);
3451         }
3452
3453         r8152_aldps_en(tp, false);
3454
3455         if (tp->version == RTL_VER_01) {
3456                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3457                 ocp_data &= ~LED_MODE_MASK;
3458                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3459         }
3460
3461         r8152_power_cut_en(tp, false);
3462
3463         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3464         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3465         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3466         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3467         ocp_data &= ~MCU_CLK_RATIO_MASK;
3468         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3469         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3470         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3471                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3472         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3473
3474         rtl_tally_reset(tp);
3475
3476         /* enable rx aggregation */
3477         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3478         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3479         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3480 }
3481
3482 static void r8153_init(struct r8152 *tp)
3483 {
3484         u32 ocp_data;
3485         u16 data;
3486         int i;
3487
3488         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3489                 return;
3490
3491         r8153_u1u2en(tp, false);
3492
3493         for (i = 0; i < 500; i++) {
3494                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3495                     AUTOLOAD_DONE)
3496                         break;
3497                 msleep(20);
3498         }
3499
3500         data = r8153_phy_status(tp, 0);
3501
3502         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3503             tp->version == RTL_VER_05)
3504                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3505
3506         data = r8152_mdio_read(tp, MII_BMCR);
3507         if (data & BMCR_PDOWN) {
3508                 data &= ~BMCR_PDOWN;
3509                 r8152_mdio_write(tp, MII_BMCR, data);
3510         }
3511
3512         data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
3513
3514         r8153_u2p3en(tp, false);
3515
3516         if (tp->version == RTL_VER_04) {
3517                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3518                 ocp_data &= ~pwd_dn_scale_mask;
3519                 ocp_data |= pwd_dn_scale(96);
3520                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3521
3522                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3523                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3524                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3525         } else if (tp->version == RTL_VER_05) {
3526                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3527                 ocp_data &= ~ECM_ALDPS;
3528                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3529
3530                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3531                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3532                         ocp_data &= ~DYNAMIC_BURST;
3533                 else
3534                         ocp_data |= DYNAMIC_BURST;
3535                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3536         } else if (tp->version == RTL_VER_06) {
3537                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3538                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3539                         ocp_data &= ~DYNAMIC_BURST;
3540                 else
3541                         ocp_data |= DYNAMIC_BURST;
3542                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3543         }
3544
3545         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3546         ocp_data |= EP4_FULL_FC;
3547         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3548
3549         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3550         ocp_data &= ~TIMER11_EN;
3551         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3552
3553         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3554         ocp_data &= ~LED_MODE_MASK;
3555         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3556
3557         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3558         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3559                 ocp_data |= LPM_TIMER_500MS;
3560         else
3561                 ocp_data |= LPM_TIMER_500US;
3562         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3563
3564         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3565         ocp_data &= ~SEN_VAL_MASK;
3566         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3567         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3568
3569         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3570
3571         r8153_power_cut_en(tp, false);
3572         r8153_u1u2en(tp, true);
3573         r8153_mac_clk_spd(tp, false);
3574         usb_enable_lpm(tp->udev);
3575
3576         /* rx aggregation */
3577         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3578         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3579         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3580
3581         rtl_tally_reset(tp);
3582
3583         switch (tp->udev->speed) {
3584         case USB_SPEED_SUPER:
3585         case USB_SPEED_SUPER_PLUS:
3586                 tp->coalesce = COALESCE_SUPER;
3587                 break;
3588         case USB_SPEED_HIGH:
3589                 tp->coalesce = COALESCE_HIGH;
3590                 break;
3591         default:
3592                 tp->coalesce = COALESCE_SLOW;
3593                 break;
3594         }
3595 }
3596
3597 static int rtl8152_pre_reset(struct usb_interface *intf)
3598 {
3599         struct r8152 *tp = usb_get_intfdata(intf);
3600         struct net_device *netdev;
3601
3602         if (!tp)
3603                 return 0;
3604
3605         netdev = tp->netdev;
3606         if (!netif_running(netdev))
3607                 return 0;
3608
3609         netif_stop_queue(netdev);
3610         napi_disable(&tp->napi);
3611         clear_bit(WORK_ENABLE, &tp->flags);
3612         usb_kill_urb(tp->intr_urb);
3613         cancel_delayed_work_sync(&tp->schedule);
3614         if (netif_carrier_ok(netdev)) {
3615                 mutex_lock(&tp->control);
3616                 tp->rtl_ops.disable(tp);
3617                 mutex_unlock(&tp->control);
3618         }
3619
3620         return 0;
3621 }
3622
3623 static int rtl8152_post_reset(struct usb_interface *intf)
3624 {
3625         struct r8152 *tp = usb_get_intfdata(intf);
3626         struct net_device *netdev;
3627
3628         if (!tp)
3629                 return 0;
3630
3631         netdev = tp->netdev;
3632         if (!netif_running(netdev))
3633                 return 0;
3634
3635         set_bit(WORK_ENABLE, &tp->flags);
3636         if (netif_carrier_ok(netdev)) {
3637                 mutex_lock(&tp->control);
3638                 tp->rtl_ops.enable(tp);
3639                 rtl_start_rx(tp);
3640                 rtl8152_set_rx_mode(netdev);
3641                 mutex_unlock(&tp->control);
3642         }
3643
3644         napi_enable(&tp->napi);
3645         netif_wake_queue(netdev);
3646         usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3647
3648         if (!list_empty(&tp->rx_done))
3649                 napi_schedule(&tp->napi);
3650
3651         return 0;
3652 }
3653
3654 static bool delay_autosuspend(struct r8152 *tp)
3655 {
3656         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3657         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3658
3659         /* This means a linking change occurs and the driver doesn't detect it,
3660          * yet. If the driver has disabled tx/rx and hw is linking on, the
3661          * device wouldn't wake up by receiving any packet.
3662          */
3663         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3664                 return true;
3665
3666         /* If the linking down is occurred by nway, the device may miss the
3667          * linking change event. And it wouldn't wake when linking on.
3668          */
3669         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3670                 return true;
3671         else if (!skb_queue_empty(&tp->tx_queue))
3672                 return true;
3673         else
3674                 return false;
3675 }
3676
3677 static int rtl8152_runtime_suspend(struct r8152 *tp)
3678 {
3679         struct net_device *netdev = tp->netdev;
3680         int ret = 0;
3681
3682         set_bit(SELECTIVE_SUSPEND, &tp->flags);
3683         smp_mb__after_atomic();
3684
3685         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3686                 u32 rcr = 0;
3687
3688                 if (delay_autosuspend(tp)) {
3689                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3690                         smp_mb__after_atomic();
3691                         ret = -EBUSY;
3692                         goto out1;
3693                 }
3694
3695                 if (netif_carrier_ok(netdev)) {
3696                         u32 ocp_data;
3697
3698                         rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3699                         ocp_data = rcr & ~RCR_ACPT_ALL;
3700                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3701                         rxdy_gated_en(tp, true);
3702                         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3703                                                  PLA_OOB_CTRL);
3704                         if (!(ocp_data & RXFIFO_EMPTY)) {
3705                                 rxdy_gated_en(tp, false);
3706                                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3707                                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3708                                 smp_mb__after_atomic();
3709                                 ret = -EBUSY;
3710                                 goto out1;
3711                         }
3712                 }
3713
3714                 clear_bit(WORK_ENABLE, &tp->flags);
3715                 usb_kill_urb(tp->intr_urb);
3716
3717                 tp->rtl_ops.autosuspend_en(tp, true);
3718
3719                 if (netif_carrier_ok(netdev)) {
3720                         struct napi_struct *napi = &tp->napi;
3721
3722                         napi_disable(napi);
3723                         rtl_stop_rx(tp);
3724                         rxdy_gated_en(tp, false);
3725                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3726                         napi_enable(napi);
3727                 }
3728         }
3729
3730 out1:
3731         return ret;
3732 }
3733
3734 static int rtl8152_system_suspend(struct r8152 *tp)
3735 {
3736         struct net_device *netdev = tp->netdev;
3737         int ret = 0;
3738
3739         netif_device_detach(netdev);
3740
3741         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3742                 struct napi_struct *napi = &tp->napi;
3743
3744                 clear_bit(WORK_ENABLE, &tp->flags);
3745                 usb_kill_urb(tp->intr_urb);
3746                 napi_disable(napi);
3747                 cancel_delayed_work_sync(&tp->schedule);
3748                 tp->rtl_ops.down(tp);
3749                 napi_enable(napi);
3750         }
3751
3752         return ret;
3753 }
3754
3755 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3756 {
3757         struct r8152 *tp = usb_get_intfdata(intf);
3758         int ret;
3759
3760         mutex_lock(&tp->control);
3761
3762         if (PMSG_IS_AUTO(message))
3763                 ret = rtl8152_runtime_suspend(tp);
3764         else
3765                 ret = rtl8152_system_suspend(tp);
3766
3767         mutex_unlock(&tp->control);
3768
3769         return ret;
3770 }
3771
3772 static int rtl8152_resume(struct usb_interface *intf)
3773 {
3774         struct r8152 *tp = usb_get_intfdata(intf);
3775         struct net_device *netdev = tp->netdev;
3776
3777         mutex_lock(&tp->control);
3778
3779         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags))
3780                 netif_device_attach(netdev);
3781
3782         if (netif_running(netdev) && netdev->flags & IFF_UP) {
3783                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3784                         struct napi_struct *napi = &tp->napi;
3785
3786                         tp->rtl_ops.autosuspend_en(tp, false);
3787                         napi_disable(napi);
3788                         set_bit(WORK_ENABLE, &tp->flags);
3789                         if (netif_carrier_ok(netdev)) {
3790                                 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3791                                         rtl_start_rx(tp);
3792                                 } else {
3793                                         netif_carrier_off(netdev);
3794                                         tp->rtl_ops.disable(tp);
3795                                         netif_info(tp, link, netdev,
3796                                                    "linking down\n");
3797                                 }
3798                         }
3799                         napi_enable(napi);
3800                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3801                         smp_mb__after_atomic();
3802                         if (!list_empty(&tp->rx_done))
3803                                 napi_schedule(&tp->napi);
3804                 } else {
3805                         tp->rtl_ops.up(tp);
3806                         netif_carrier_off(netdev);
3807                         set_bit(WORK_ENABLE, &tp->flags);
3808                 }
3809                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3810         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3811                 if (netdev->flags & IFF_UP)
3812                         tp->rtl_ops.autosuspend_en(tp, false);
3813                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3814         }
3815
3816         mutex_unlock(&tp->control);
3817
3818         return 0;
3819 }
3820
3821 static int rtl8152_reset_resume(struct usb_interface *intf)
3822 {
3823         struct r8152 *tp = usb_get_intfdata(intf);
3824
3825         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3826         mutex_lock(&tp->control);
3827         tp->rtl_ops.init(tp);
3828         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3829         mutex_unlock(&tp->control);
3830         return rtl8152_resume(intf);
3831 }
3832
3833 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3834 {
3835         struct r8152 *tp = netdev_priv(dev);
3836
3837         if (usb_autopm_get_interface(tp->intf) < 0)
3838                 return;
3839
3840         if (!rtl_can_wakeup(tp)) {
3841                 wol->supported = 0;
3842                 wol->wolopts = 0;
3843         } else {
3844                 mutex_lock(&tp->control);
3845                 wol->supported = WAKE_ANY;
3846                 wol->wolopts = __rtl_get_wol(tp);
3847                 mutex_unlock(&tp->control);
3848         }
3849
3850         usb_autopm_put_interface(tp->intf);
3851 }
3852
3853 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3854 {
3855         struct r8152 *tp = netdev_priv(dev);
3856         int ret;
3857
3858         if (!rtl_can_wakeup(tp))
3859                 return -EOPNOTSUPP;
3860
3861         ret = usb_autopm_get_interface(tp->intf);
3862         if (ret < 0)
3863                 goto out_set_wol;
3864
3865         mutex_lock(&tp->control);
3866
3867         __rtl_set_wol(tp, wol->wolopts);
3868         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3869
3870         mutex_unlock(&tp->control);
3871
3872         usb_autopm_put_interface(tp->intf);
3873
3874 out_set_wol:
3875         return ret;
3876 }
3877
3878 static u32 rtl8152_get_msglevel(struct net_device *dev)
3879 {
3880         struct r8152 *tp = netdev_priv(dev);
3881
3882         return tp->msg_enable;
3883 }
3884
3885 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3886 {
3887         struct r8152 *tp = netdev_priv(dev);
3888
3889         tp->msg_enable = value;
3890 }
3891
3892 static void rtl8152_get_drvinfo(struct net_device *netdev,
3893                                 struct ethtool_drvinfo *info)
3894 {
3895         struct r8152 *tp = netdev_priv(netdev);
3896
3897         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3898         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3899         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3900 }
3901
3902 static
3903 int rtl8152_get_link_ksettings(struct net_device *netdev,
3904                                struct ethtool_link_ksettings *cmd)
3905 {
3906         struct r8152 *tp = netdev_priv(netdev);
3907         int ret;
3908
3909         if (!tp->mii.mdio_read)
3910                 return -EOPNOTSUPP;
3911
3912         ret = usb_autopm_get_interface(tp->intf);
3913         if (ret < 0)
3914                 goto out;
3915
3916         mutex_lock(&tp->control);
3917
3918         mii_ethtool_get_link_ksettings(&tp->mii, cmd);
3919
3920         mutex_unlock(&tp->control);
3921
3922         usb_autopm_put_interface(tp->intf);
3923
3924 out:
3925         return ret;
3926 }
3927
3928 static int rtl8152_set_link_ksettings(struct net_device *dev,
3929                                       const struct ethtool_link_ksettings *cmd)
3930 {
3931         struct r8152 *tp = netdev_priv(dev);
3932         int ret;
3933
3934         ret = usb_autopm_get_interface(tp->intf);
3935         if (ret < 0)
3936                 goto out;
3937
3938         mutex_lock(&tp->control);
3939
3940         ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
3941                                 cmd->base.duplex);
3942         if (!ret) {
3943                 tp->autoneg = cmd->base.autoneg;
3944                 tp->speed = cmd->base.speed;
3945                 tp->duplex = cmd->base.duplex;
3946         }
3947
3948         mutex_unlock(&tp->control);
3949
3950         usb_autopm_put_interface(tp->intf);
3951
3952 out:
3953         return ret;
3954 }
3955
3956 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3957         "tx_packets",
3958         "rx_packets",
3959         "tx_errors",
3960         "rx_errors",
3961         "rx_missed",
3962         "align_errors",
3963         "tx_single_collisions",
3964         "tx_multi_collisions",
3965         "rx_unicast",
3966         "rx_broadcast",
3967         "rx_multicast",
3968         "tx_aborted",
3969         "tx_underrun",
3970 };
3971
3972 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3973 {
3974         switch (sset) {
3975         case ETH_SS_STATS:
3976                 return ARRAY_SIZE(rtl8152_gstrings);
3977         default:
3978                 return -EOPNOTSUPP;
3979         }
3980 }
3981
3982 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3983                                       struct ethtool_stats *stats, u64 *data)
3984 {
3985         struct r8152 *tp = netdev_priv(dev);
3986         struct tally_counter tally;
3987
3988         if (usb_autopm_get_interface(tp->intf) < 0)
3989                 return;
3990
3991         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3992
3993         usb_autopm_put_interface(tp->intf);
3994
3995         data[0] = le64_to_cpu(tally.tx_packets);
3996         data[1] = le64_to_cpu(tally.rx_packets);
3997         data[2] = le64_to_cpu(tally.tx_errors);
3998         data[3] = le32_to_cpu(tally.rx_errors);
3999         data[4] = le16_to_cpu(tally.rx_missed);
4000         data[5] = le16_to_cpu(tally.align_errors);
4001         data[6] = le32_to_cpu(tally.tx_one_collision);
4002         data[7] = le32_to_cpu(tally.tx_multi_collision);
4003         data[8] = le64_to_cpu(tally.rx_unicast);
4004         data[9] = le64_to_cpu(tally.rx_broadcast);
4005         data[10] = le32_to_cpu(tally.rx_multicast);
4006         data[11] = le16_to_cpu(tally.tx_aborted);
4007         data[12] = le16_to_cpu(tally.tx_underrun);
4008 }
4009
4010 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4011 {
4012         switch (stringset) {
4013         case ETH_SS_STATS:
4014                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
4015                 break;
4016         }
4017 }
4018
4019 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4020 {
4021         u32 ocp_data, lp, adv, supported = 0;
4022         u16 val;
4023
4024         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
4025         supported = mmd_eee_cap_to_ethtool_sup_t(val);
4026
4027         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
4028         adv = mmd_eee_adv_to_ethtool_adv_t(val);
4029
4030         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
4031         lp = mmd_eee_adv_to_ethtool_adv_t(val);
4032
4033         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4034         ocp_data &= EEE_RX_EN | EEE_TX_EN;
4035
4036         eee->eee_enabled = !!ocp_data;
4037         eee->eee_active = !!(supported & adv & lp);
4038         eee->supported = supported;
4039         eee->advertised = adv;
4040         eee->lp_advertised = lp;
4041
4042         return 0;
4043 }
4044
4045 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4046 {
4047         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4048
4049         r8152_eee_en(tp, eee->eee_enabled);
4050
4051         if (!eee->eee_enabled)
4052                 val = 0;
4053
4054         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
4055
4056         return 0;
4057 }
4058
4059 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4060 {
4061         u32 ocp_data, lp, adv, supported = 0;
4062         u16 val;
4063
4064         val = ocp_reg_read(tp, OCP_EEE_ABLE);
4065         supported = mmd_eee_cap_to_ethtool_sup_t(val);
4066
4067         val = ocp_reg_read(tp, OCP_EEE_ADV);
4068         adv = mmd_eee_adv_to_ethtool_adv_t(val);
4069
4070         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
4071         lp = mmd_eee_adv_to_ethtool_adv_t(val);
4072
4073         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4074         ocp_data &= EEE_RX_EN | EEE_TX_EN;
4075
4076         eee->eee_enabled = !!ocp_data;
4077         eee->eee_active = !!(supported & adv & lp);
4078         eee->supported = supported;
4079         eee->advertised = adv;
4080         eee->lp_advertised = lp;
4081
4082         return 0;
4083 }
4084
4085 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4086 {
4087         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4088
4089         r8153_eee_en(tp, eee->eee_enabled);
4090
4091         if (!eee->eee_enabled)
4092                 val = 0;
4093
4094         ocp_reg_write(tp, OCP_EEE_ADV, val);
4095
4096         return 0;
4097 }
4098
4099 static int
4100 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4101 {
4102         struct r8152 *tp = netdev_priv(net);
4103         int ret;
4104
4105         ret = usb_autopm_get_interface(tp->intf);
4106         if (ret < 0)
4107                 goto out;
4108
4109         mutex_lock(&tp->control);
4110
4111         ret = tp->rtl_ops.eee_get(tp, edata);
4112
4113         mutex_unlock(&tp->control);
4114
4115         usb_autopm_put_interface(tp->intf);
4116
4117 out:
4118         return ret;
4119 }
4120
4121 static int
4122 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4123 {
4124         struct r8152 *tp = netdev_priv(net);
4125         int ret;
4126
4127         ret = usb_autopm_get_interface(tp->intf);
4128         if (ret < 0)
4129                 goto out;
4130
4131         mutex_lock(&tp->control);
4132
4133         ret = tp->rtl_ops.eee_set(tp, edata);
4134         if (!ret)
4135                 ret = mii_nway_restart(&tp->mii);
4136
4137         mutex_unlock(&tp->control);
4138
4139         usb_autopm_put_interface(tp->intf);
4140
4141 out:
4142         return ret;
4143 }
4144
4145 static int rtl8152_nway_reset(struct net_device *dev)
4146 {
4147         struct r8152 *tp = netdev_priv(dev);
4148         int ret;
4149
4150         ret = usb_autopm_get_interface(tp->intf);
4151         if (ret < 0)
4152                 goto out;
4153
4154         mutex_lock(&tp->control);
4155
4156         ret = mii_nway_restart(&tp->mii);
4157
4158         mutex_unlock(&tp->control);
4159
4160         usb_autopm_put_interface(tp->intf);
4161
4162 out:
4163         return ret;
4164 }
4165
4166 static int rtl8152_get_coalesce(struct net_device *netdev,
4167                                 struct ethtool_coalesce *coalesce)
4168 {
4169         struct r8152 *tp = netdev_priv(netdev);
4170
4171         switch (tp->version) {
4172         case RTL_VER_01:
4173         case RTL_VER_02:
4174                 return -EOPNOTSUPP;
4175         default:
4176                 break;
4177         }
4178
4179         coalesce->rx_coalesce_usecs = tp->coalesce;
4180
4181         return 0;
4182 }
4183
4184 static int rtl8152_set_coalesce(struct net_device *netdev,
4185                                 struct ethtool_coalesce *coalesce)
4186 {
4187         struct r8152 *tp = netdev_priv(netdev);
4188         int ret;
4189
4190         switch (tp->version) {
4191         case RTL_VER_01:
4192         case RTL_VER_02:
4193                 return -EOPNOTSUPP;
4194         default:
4195                 break;
4196         }
4197
4198         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4199                 return -EINVAL;
4200
4201         ret = usb_autopm_get_interface(tp->intf);
4202         if (ret < 0)
4203                 return ret;
4204
4205         mutex_lock(&tp->control);
4206
4207         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4208                 tp->coalesce = coalesce->rx_coalesce_usecs;
4209
4210                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4211                         r8153_set_rx_early_timeout(tp);
4212         }
4213
4214         mutex_unlock(&tp->control);
4215
4216         usb_autopm_put_interface(tp->intf);
4217
4218         return ret;
4219 }
4220
4221 static const struct ethtool_ops ops = {
4222         .get_drvinfo = rtl8152_get_drvinfo,
4223         .get_link = ethtool_op_get_link,
4224         .nway_reset = rtl8152_nway_reset,
4225         .get_msglevel = rtl8152_get_msglevel,
4226         .set_msglevel = rtl8152_set_msglevel,
4227         .get_wol = rtl8152_get_wol,
4228         .set_wol = rtl8152_set_wol,
4229         .get_strings = rtl8152_get_strings,
4230         .get_sset_count = rtl8152_get_sset_count,
4231         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4232         .get_coalesce = rtl8152_get_coalesce,
4233         .set_coalesce = rtl8152_set_coalesce,
4234         .get_eee = rtl_ethtool_get_eee,
4235         .set_eee = rtl_ethtool_set_eee,
4236         .get_link_ksettings = rtl8152_get_link_ksettings,
4237         .set_link_ksettings = rtl8152_set_link_ksettings,
4238 };
4239
4240 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4241 {
4242         struct r8152 *tp = netdev_priv(netdev);
4243         struct mii_ioctl_data *data = if_mii(rq);
4244         int res;
4245
4246         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4247                 return -ENODEV;
4248
4249         res = usb_autopm_get_interface(tp->intf);
4250         if (res < 0)
4251                 goto out;
4252
4253         switch (cmd) {
4254         case SIOCGMIIPHY:
4255                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4256                 break;
4257
4258         case SIOCGMIIREG:
4259                 mutex_lock(&tp->control);
4260                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4261                 mutex_unlock(&tp->control);
4262                 break;
4263
4264         case SIOCSMIIREG:
4265                 if (!capable(CAP_NET_ADMIN)) {
4266                         res = -EPERM;
4267                         break;
4268                 }
4269                 mutex_lock(&tp->control);
4270                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4271                 mutex_unlock(&tp->control);
4272                 break;
4273
4274         default:
4275                 res = -EOPNOTSUPP;
4276         }
4277
4278         usb_autopm_put_interface(tp->intf);
4279
4280 out:
4281         return res;
4282 }
4283
4284 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4285 {
4286         struct r8152 *tp = netdev_priv(dev);
4287         int ret;
4288
4289         switch (tp->version) {
4290         case RTL_VER_01:
4291         case RTL_VER_02:
4292                 dev->mtu = new_mtu;
4293                 return 0;
4294         default:
4295                 break;
4296         }
4297
4298         ret = usb_autopm_get_interface(tp->intf);
4299         if (ret < 0)
4300                 return ret;
4301
4302         mutex_lock(&tp->control);
4303
4304         dev->mtu = new_mtu;
4305
4306         if (netif_running(dev)) {
4307                 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4308
4309                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4310
4311                 if (netif_carrier_ok(dev))
4312                         r8153_set_rx_early_size(tp);
4313         }
4314
4315         mutex_unlock(&tp->control);
4316
4317         usb_autopm_put_interface(tp->intf);
4318
4319         return ret;
4320 }
4321
4322 static const struct net_device_ops rtl8152_netdev_ops = {
4323         .ndo_open               = rtl8152_open,
4324         .ndo_stop               = rtl8152_close,
4325         .ndo_do_ioctl           = rtl8152_ioctl,
4326         .ndo_start_xmit         = rtl8152_start_xmit,
4327         .ndo_tx_timeout         = rtl8152_tx_timeout,
4328         .ndo_set_features       = rtl8152_set_features,
4329         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4330         .ndo_set_mac_address    = rtl8152_set_mac_address,
4331         .ndo_change_mtu         = rtl8152_change_mtu,
4332         .ndo_validate_addr      = eth_validate_addr,
4333         .ndo_features_check     = rtl8152_features_check,
4334 };
4335
4336 static void rtl8152_unload(struct r8152 *tp)
4337 {
4338         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4339                 return;
4340
4341         if (tp->version != RTL_VER_01)
4342                 r8152_power_cut_en(tp, true);
4343 }
4344
4345 static void rtl8153_unload(struct r8152 *tp)
4346 {
4347         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4348                 return;
4349
4350         r8153_power_cut_en(tp, false);
4351 }
4352
4353 static int rtl_ops_init(struct r8152 *tp)
4354 {
4355         struct rtl_ops *ops = &tp->rtl_ops;
4356         int ret = 0;
4357
4358         switch (tp->version) {
4359         case RTL_VER_01:
4360         case RTL_VER_02:
4361                 ops->init               = r8152b_init;
4362                 ops->enable             = rtl8152_enable;
4363                 ops->disable            = rtl8152_disable;
4364                 ops->up                 = rtl8152_up;
4365                 ops->down               = rtl8152_down;
4366                 ops->unload             = rtl8152_unload;
4367                 ops->eee_get            = r8152_get_eee;
4368                 ops->eee_set            = r8152_set_eee;
4369                 ops->in_nway            = rtl8152_in_nway;
4370                 ops->hw_phy_cfg         = r8152b_hw_phy_cfg;
4371                 ops->autosuspend_en     = rtl_runtime_suspend_enable;
4372                 break;
4373
4374         case RTL_VER_03:
4375         case RTL_VER_04:
4376         case RTL_VER_05:
4377         case RTL_VER_06:
4378                 ops->init               = r8153_init;
4379                 ops->enable             = rtl8153_enable;
4380                 ops->disable            = rtl8153_disable;
4381                 ops->up                 = rtl8153_up;
4382                 ops->down               = rtl8153_down;
4383                 ops->unload             = rtl8153_unload;
4384                 ops->eee_get            = r8153_get_eee;
4385                 ops->eee_set            = r8153_set_eee;
4386                 ops->in_nway            = rtl8153_in_nway;
4387                 ops->hw_phy_cfg         = r8153_hw_phy_cfg;
4388                 ops->autosuspend_en     = rtl8153_runtime_enable;
4389                 break;
4390
4391         default:
4392                 ret = -ENODEV;
4393                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4394                 break;
4395         }
4396
4397         return ret;
4398 }
4399
4400 static u8 rtl_get_version(struct usb_interface *intf)
4401 {
4402         struct usb_device *udev = interface_to_usbdev(intf);
4403         u32 ocp_data = 0;
4404         __le32 *tmp;
4405         u8 version;
4406         int ret;
4407
4408         tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
4409         if (!tmp)
4410                 return 0;
4411
4412         ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
4413                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
4414                               PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
4415         if (ret > 0)
4416                 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
4417
4418         kfree(tmp);
4419
4420         switch (ocp_data) {
4421         case 0x4c00:
4422                 version = RTL_VER_01;
4423                 break;
4424         case 0x4c10:
4425                 version = RTL_VER_02;
4426                 break;
4427         case 0x5c00:
4428                 version = RTL_VER_03;
4429                 break;
4430         case 0x5c10:
4431                 version = RTL_VER_04;
4432                 break;
4433         case 0x5c20:
4434                 version = RTL_VER_05;
4435                 break;
4436         case 0x5c30:
4437                 version = RTL_VER_06;
4438                 break;
4439         default:
4440                 version = RTL_VER_UNKNOWN;
4441                 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
4442                 break;
4443         }
4444
4445         return version;
4446 }
4447
4448 static int rtl8152_probe(struct usb_interface *intf,
4449                          const struct usb_device_id *id)
4450 {
4451         struct usb_device *udev = interface_to_usbdev(intf);
4452         u8 version = rtl_get_version(intf);
4453         struct r8152 *tp;
4454         struct net_device *netdev;
4455         int ret;
4456
4457         if (version == RTL_VER_UNKNOWN)
4458                 return -ENODEV;
4459
4460         if (udev->actconfig->desc.bConfigurationValue != 1) {
4461                 usb_driver_set_configuration(udev, 1);
4462                 return -ENODEV;
4463         }
4464
4465         usb_reset_device(udev);
4466         netdev = alloc_etherdev(sizeof(struct r8152));
4467         if (!netdev) {
4468                 dev_err(&intf->dev, "Out of memory\n");
4469                 return -ENOMEM;
4470         }
4471
4472         SET_NETDEV_DEV(netdev, &intf->dev);
4473         tp = netdev_priv(netdev);
4474         tp->msg_enable = 0x7FFF;
4475
4476         tp->udev = udev;
4477         tp->netdev = netdev;
4478         tp->intf = intf;
4479         tp->version = version;
4480
4481         switch (version) {
4482         case RTL_VER_01:
4483         case RTL_VER_02:
4484                 tp->mii.supports_gmii = 0;
4485                 break;
4486         default:
4487                 tp->mii.supports_gmii = 1;
4488                 break;
4489         }
4490
4491         ret = rtl_ops_init(tp);
4492         if (ret)
4493                 goto out;
4494
4495         mutex_init(&tp->control);
4496         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4497         INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4498
4499         netdev->netdev_ops = &rtl8152_netdev_ops;
4500         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4501
4502         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4503                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4504                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4505                             NETIF_F_HW_VLAN_CTAG_TX;
4506         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4507                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4508                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4509                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4510         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4511                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4512                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4513
4514         if (tp->version == RTL_VER_01) {
4515                 netdev->features &= ~NETIF_F_RXCSUM;
4516                 netdev->hw_features &= ~NETIF_F_RXCSUM;
4517         }
4518
4519         netdev->ethtool_ops = &ops;
4520         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4521
4522         /* MTU range: 68 - 1500 or 9194 */
4523         netdev->min_mtu = ETH_MIN_MTU;
4524         switch (tp->version) {
4525         case RTL_VER_01:
4526         case RTL_VER_02:
4527                 netdev->max_mtu = ETH_DATA_LEN;
4528                 break;
4529         default:
4530                 netdev->max_mtu = RTL8153_MAX_MTU;
4531                 break;
4532         }
4533
4534         tp->mii.dev = netdev;
4535         tp->mii.mdio_read = read_mii_word;
4536         tp->mii.mdio_write = write_mii_word;
4537         tp->mii.phy_id_mask = 0x3f;
4538         tp->mii.reg_num_mask = 0x1f;
4539         tp->mii.phy_id = R8152_PHY_ID;
4540
4541         tp->autoneg = AUTONEG_ENABLE;
4542         tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4543         tp->duplex = DUPLEX_FULL;
4544
4545         intf->needs_remote_wakeup = 1;
4546
4547         tp->rtl_ops.init(tp);
4548         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4549         set_ethernet_addr(tp);
4550
4551         usb_set_intfdata(intf, tp);
4552         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4553
4554         ret = register_netdev(netdev);
4555         if (ret != 0) {
4556                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4557                 goto out1;
4558         }
4559
4560         if (!rtl_can_wakeup(tp))
4561                 __rtl_set_wol(tp, 0);
4562
4563         tp->saved_wolopts = __rtl_get_wol(tp);
4564         if (tp->saved_wolopts)
4565                 device_set_wakeup_enable(&udev->dev, true);
4566         else
4567                 device_set_wakeup_enable(&udev->dev, false);
4568
4569         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4570
4571         return 0;
4572
4573 out1:
4574         netif_napi_del(&tp->napi);
4575         usb_set_intfdata(intf, NULL);
4576 out:
4577         free_netdev(netdev);
4578         return ret;
4579 }
4580
4581 static void rtl8152_disconnect(struct usb_interface *intf)
4582 {
4583         struct r8152 *tp = usb_get_intfdata(intf);
4584
4585         usb_set_intfdata(intf, NULL);
4586         if (tp) {
4587                 struct usb_device *udev = tp->udev;
4588
4589                 if (udev->state == USB_STATE_NOTATTACHED)
4590                         set_bit(RTL8152_UNPLUG, &tp->flags);
4591
4592                 netif_napi_del(&tp->napi);
4593                 unregister_netdev(tp->netdev);
4594                 cancel_delayed_work_sync(&tp->hw_phy_work);
4595                 tp->rtl_ops.unload(tp);
4596                 free_netdev(tp->netdev);
4597         }
4598 }
4599
4600 #define REALTEK_USB_DEVICE(vend, prod)  \
4601         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4602                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4603         .idVendor = (vend), \
4604         .idProduct = (prod), \
4605         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4606 }, \
4607 { \
4608         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4609                        USB_DEVICE_ID_MATCH_DEVICE, \
4610         .idVendor = (vend), \
4611         .idProduct = (prod), \
4612         .bInterfaceClass = USB_CLASS_COMM, \
4613         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4614         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4615
4616 /* table of devices that work with this driver */
4617 static struct usb_device_id rtl8152_table[] = {
4618         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4619         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4620         {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
4621         {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
4622         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4623         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4624         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x3062)},
4625         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x3069)},
4626         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4627         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x720c)},
4628         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7214)},
4629         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4630         {}
4631 };
4632
4633 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4634
4635 static struct usb_driver rtl8152_driver = {
4636         .name =         MODULENAME,
4637         .id_table =     rtl8152_table,
4638         .probe =        rtl8152_probe,
4639         .disconnect =   rtl8152_disconnect,
4640         .suspend =      rtl8152_suspend,
4641         .resume =       rtl8152_resume,
4642         .reset_resume = rtl8152_reset_resume,
4643         .pre_reset =    rtl8152_pre_reset,
4644         .post_reset =   rtl8152_post_reset,
4645         .supports_autosuspend = 1,
4646         .disable_hub_initiated_lpm = 1,
4647 };
4648
4649 module_usb_driver(rtl8152_driver);
4650
4651 MODULE_AUTHOR(DRIVER_AUTHOR);
4652 MODULE_DESCRIPTION(DRIVER_DESC);
4653 MODULE_LICENSE("GPL");
4654 MODULE_VERSION(DRIVER_VERSION);