2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_EXT_INIT 2
398 #define PHY_STAT_LAN_ON 3
399 #define PHY_STAT_PWRDN 5
402 #define EEE_CLKDIV_EN 0x8000
403 #define EN_ALDPS 0x0004
404 #define EN_10M_PLLOFF 0x0001
406 /* OCP_EEE_CONFIG1 */
407 #define RG_TXLPI_MSK_HFDUP 0x8000
408 #define RG_MATCLR_EN 0x4000
409 #define EEE_10_CAP 0x2000
410 #define EEE_NWAY_EN 0x1000
411 #define TX_QUIET_EN 0x0200
412 #define RX_QUIET_EN 0x0100
413 #define sd_rise_time_mask 0x0070
414 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
415 #define RG_RXLPI_MSK_HFDUP 0x0008
416 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
418 /* OCP_EEE_CONFIG2 */
419 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
420 #define RG_DACQUIET_EN 0x0400
421 #define RG_LDVQUIET_EN 0x0200
422 #define RG_CKRSEL 0x0020
423 #define RG_EEEPRG_EN 0x0010
425 /* OCP_EEE_CONFIG3 */
426 #define fast_snr_mask 0xff80
427 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
428 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
429 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
432 /* bit[15:14] function */
433 #define FUN_ADDR 0x0000
434 #define FUN_DATA 0x4000
435 /* bit[4:0] device addr */
438 #define CTAP_SHORT_EN 0x0040
439 #define EEE10_EN 0x0010
442 #define EN_10M_BGOFF 0x0080
445 #define TXDIS_STATE 0x01
446 #define ABD_STATE 0x02
449 #define CKADSEL_L 0x0100
450 #define ADC_EN 0x0080
451 #define EN_EMI_L 0x0040
454 #define LPF_AUTO_TUNE 0x8000
457 #define GDAC_IB_UPALL 0x0008
460 #define AMP_DN 0x0200
463 #define RX_DRIVING_MASK 0x6000
466 #define AD_MASK 0xfee0
468 #define PASS_THRU_MASK 0x1
470 enum rtl_register_content {
478 #define RTL8152_MAX_TX 4
479 #define RTL8152_MAX_RX 10
485 #define INTR_LINK 0x0004
487 #define RTL8152_REQT_READ 0xc0
488 #define RTL8152_REQT_WRITE 0x40
489 #define RTL8152_REQ_GET_REGS 0x05
490 #define RTL8152_REQ_SET_REGS 0x05
492 #define BYTE_EN_DWORD 0xff
493 #define BYTE_EN_WORD 0x33
494 #define BYTE_EN_BYTE 0x11
495 #define BYTE_EN_SIX_BYTES 0x3f
496 #define BYTE_EN_START_MASK 0x0f
497 #define BYTE_EN_END_MASK 0xf0
499 #define RTL8153_MAX_PACKET 9216 /* 9K */
500 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
501 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
502 #define RTL8153_RMS RTL8153_MAX_PACKET
503 #define RTL8152_TX_TIMEOUT (5 * HZ)
504 #define RTL8152_NAPI_WEIGHT 64
505 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
506 sizeof(struct rx_desc) + RX_ALIGN)
519 /* Define these values to match your device */
520 #define VENDOR_ID_REALTEK 0x0bda
521 #define VENDOR_ID_MICROSOFT 0x045e
522 #define VENDOR_ID_SAMSUNG 0x04e8
523 #define VENDOR_ID_LENOVO 0x17ef
524 #define VENDOR_ID_NVIDIA 0x0955
526 #define MCU_TYPE_PLA 0x0100
527 #define MCU_TYPE_USB 0x0000
529 struct tally_counter {
536 __le32 tx_one_collision;
537 __le32 tx_multi_collision;
547 #define RX_LEN_MASK 0x7fff
550 #define RD_UDP_CS BIT(23)
551 #define RD_TCP_CS BIT(22)
552 #define RD_IPV6_CS BIT(20)
553 #define RD_IPV4_CS BIT(19)
556 #define IPF BIT(23) /* IP checksum fail */
557 #define UDPF BIT(22) /* UDP checksum fail */
558 #define TCPF BIT(21) /* TCP checksum fail */
559 #define RX_VLAN_TAG BIT(16)
568 #define TX_FS BIT(31) /* First segment of a packet */
569 #define TX_LS BIT(30) /* Final segment of a packet */
570 #define GTSENDV4 BIT(28)
571 #define GTSENDV6 BIT(27)
572 #define GTTCPHO_SHIFT 18
573 #define GTTCPHO_MAX 0x7fU
574 #define TX_LEN_MAX 0x3ffffU
577 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
578 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
579 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
580 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
582 #define MSS_MAX 0x7ffU
583 #define TCPHO_SHIFT 17
584 #define TCPHO_MAX 0x7ffU
585 #define TX_VLAN_TAG BIT(16)
591 struct list_head list;
593 struct r8152 *context;
599 struct list_head list;
601 struct r8152 *context;
610 struct usb_device *udev;
611 struct napi_struct napi;
612 struct usb_interface *intf;
613 struct net_device *netdev;
614 struct urb *intr_urb;
615 struct tx_agg tx_info[RTL8152_MAX_TX];
616 struct rx_agg rx_info[RTL8152_MAX_RX];
617 struct list_head rx_done, tx_free;
618 struct sk_buff_head tx_queue, rx_queue;
619 spinlock_t rx_lock, tx_lock;
620 struct delayed_work schedule, hw_phy_work;
621 struct mii_if_info mii;
622 struct mutex control; /* use for hw setting */
623 #ifdef CONFIG_PM_SLEEP
624 struct notifier_block pm_notifier;
628 void (*init)(struct r8152 *);
629 int (*enable)(struct r8152 *);
630 void (*disable)(struct r8152 *);
631 void (*up)(struct r8152 *);
632 void (*down)(struct r8152 *);
633 void (*unload)(struct r8152 *);
634 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
635 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
636 bool (*in_nway)(struct r8152 *);
637 void (*hw_phy_cfg)(struct r8152 *);
638 void (*autosuspend_en)(struct r8152 *tp, bool enable);
671 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
672 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
674 static const int multicast_filter_limit = 32;
675 static unsigned int agg_buf_sz = 16384;
677 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
678 VLAN_ETH_HLEN - VLAN_HLEN)
681 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
686 tmp = kmalloc(size, GFP_KERNEL);
690 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
691 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
692 value, index, tmp, size, 500);
694 memcpy(data, tmp, size);
701 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
706 tmp = kmemdup(data, size, GFP_KERNEL);
710 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
711 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
712 value, index, tmp, size, 500);
719 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
720 void *data, u16 type)
725 if (test_bit(RTL8152_UNPLUG, &tp->flags))
728 /* both size and indix must be 4 bytes align */
729 if ((size & 3) || !size || (index & 3) || !data)
732 if ((u32)index + (u32)size > 0xffff)
737 ret = get_registers(tp, index, type, limit, data);
745 ret = get_registers(tp, index, type, size, data);
757 set_bit(RTL8152_UNPLUG, &tp->flags);
762 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
763 u16 size, void *data, u16 type)
766 u16 byteen_start, byteen_end, byen;
769 if (test_bit(RTL8152_UNPLUG, &tp->flags))
772 /* both size and indix must be 4 bytes align */
773 if ((size & 3) || !size || (index & 3) || !data)
776 if ((u32)index + (u32)size > 0xffff)
779 byteen_start = byteen & BYTE_EN_START_MASK;
780 byteen_end = byteen & BYTE_EN_END_MASK;
782 byen = byteen_start | (byteen_start << 4);
783 ret = set_registers(tp, index, type | byen, 4, data);
796 ret = set_registers(tp, index,
797 type | BYTE_EN_DWORD,
806 ret = set_registers(tp, index,
807 type | BYTE_EN_DWORD,
819 byen = byteen_end | (byteen_end >> 4);
820 ret = set_registers(tp, index, type | byen, 4, data);
827 set_bit(RTL8152_UNPLUG, &tp->flags);
833 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
835 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
839 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
841 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
845 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
847 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
850 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
854 generic_ocp_read(tp, index, sizeof(data), &data, type);
856 return __le32_to_cpu(data);
859 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
861 __le32 tmp = __cpu_to_le32(data);
863 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
866 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
870 u8 shift = index & 2;
874 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
876 data = __le32_to_cpu(tmp);
877 data >>= (shift * 8);
883 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
887 u16 byen = BYTE_EN_WORD;
888 u8 shift = index & 2;
894 mask <<= (shift * 8);
895 data <<= (shift * 8);
899 tmp = __cpu_to_le32(data);
901 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
904 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
908 u8 shift = index & 3;
912 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
914 data = __le32_to_cpu(tmp);
915 data >>= (shift * 8);
921 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
925 u16 byen = BYTE_EN_BYTE;
926 u8 shift = index & 3;
932 mask <<= (shift * 8);
933 data <<= (shift * 8);
937 tmp = __cpu_to_le32(data);
939 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
942 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
944 u16 ocp_base, ocp_index;
946 ocp_base = addr & 0xf000;
947 if (ocp_base != tp->ocp_base) {
948 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
949 tp->ocp_base = ocp_base;
952 ocp_index = (addr & 0x0fff) | 0xb000;
953 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
956 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
958 u16 ocp_base, ocp_index;
960 ocp_base = addr & 0xf000;
961 if (ocp_base != tp->ocp_base) {
962 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
963 tp->ocp_base = ocp_base;
966 ocp_index = (addr & 0x0fff) | 0xb000;
967 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
970 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
972 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
975 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
977 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
980 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
982 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
983 ocp_reg_write(tp, OCP_SRAM_DATA, data);
986 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
988 struct r8152 *tp = netdev_priv(netdev);
991 if (test_bit(RTL8152_UNPLUG, &tp->flags))
994 if (phy_id != R8152_PHY_ID)
997 ret = r8152_mdio_read(tp, reg);
1003 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1005 struct r8152 *tp = netdev_priv(netdev);
1007 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1010 if (phy_id != R8152_PHY_ID)
1013 r8152_mdio_write(tp, reg, val);
1017 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1019 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1021 struct r8152 *tp = netdev_priv(netdev);
1022 struct sockaddr *addr = p;
1023 int ret = -EADDRNOTAVAIL;
1025 if (!is_valid_ether_addr(addr->sa_data))
1028 ret = usb_autopm_get_interface(tp->intf);
1032 mutex_lock(&tp->control);
1034 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1036 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1037 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1038 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1040 mutex_unlock(&tp->control);
1042 usb_autopm_put_interface(tp->intf);
1047 /* Devices containing RTL8153-AD can support a persistent
1048 * host system provided MAC address.
1049 * Examples of this are Dell TB15 and Dell WD15 docks
1051 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1054 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1055 union acpi_object *obj;
1058 unsigned char buf[6];
1060 /* test for -AD variant of RTL8153 */
1061 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1062 if ((ocp_data & AD_MASK) != 0x1000)
1065 /* test for MAC address pass-through bit */
1066 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1067 if ((ocp_data & PASS_THRU_MASK) != 1)
1070 /* returns _AUXMAC_#AABBCCDDEEFF# */
1071 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1072 obj = (union acpi_object *)buffer.pointer;
1073 if (!ACPI_SUCCESS(status))
1075 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1076 netif_warn(tp, probe, tp->netdev,
1077 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1078 obj->type, obj->string.length);
1081 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1082 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1083 netif_warn(tp, probe, tp->netdev,
1084 "Invalid header when reading pass-thru MAC addr\n");
1087 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1088 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1089 netif_warn(tp, probe, tp->netdev,
1090 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1095 memcpy(sa->sa_data, buf, 6);
1096 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1097 netif_info(tp, probe, tp->netdev,
1098 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1105 static int set_ethernet_addr(struct r8152 *tp)
1107 struct net_device *dev = tp->netdev;
1111 if (tp->version == RTL_VER_01) {
1112 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1114 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1115 * or system doesn't provide valid _SB.AMAC this will be
1116 * be expected to non-zero
1118 ret = vendor_mac_passthru_addr_read(tp, &sa);
1120 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1124 netif_err(tp, probe, dev, "Get ether addr fail\n");
1125 } else if (!is_valid_ether_addr(sa.sa_data)) {
1126 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1128 eth_hw_addr_random(dev);
1129 ether_addr_copy(sa.sa_data, dev->dev_addr);
1130 ret = rtl8152_set_mac_address(dev, &sa);
1131 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1134 if (tp->version == RTL_VER_01)
1135 ether_addr_copy(dev->dev_addr, sa.sa_data);
1137 ret = rtl8152_set_mac_address(dev, &sa);
1143 static void read_bulk_callback(struct urb *urb)
1145 struct net_device *netdev;
1146 int status = urb->status;
1158 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1161 if (!test_bit(WORK_ENABLE, &tp->flags))
1164 netdev = tp->netdev;
1166 /* When link down, the driver would cancel all bulks. */
1167 /* This avoid the re-submitting bulk */
1168 if (!netif_carrier_ok(netdev))
1171 usb_mark_last_busy(tp->udev);
1175 if (urb->actual_length < ETH_ZLEN)
1178 spin_lock(&tp->rx_lock);
1179 list_add_tail(&agg->list, &tp->rx_done);
1180 spin_unlock(&tp->rx_lock);
1181 napi_schedule(&tp->napi);
1184 set_bit(RTL8152_UNPLUG, &tp->flags);
1185 netif_device_detach(tp->netdev);
1188 return; /* the urb is in unlink state */
1190 if (net_ratelimit())
1191 netdev_warn(netdev, "maybe reset is needed?\n");
1194 if (net_ratelimit())
1195 netdev_warn(netdev, "Rx status %d\n", status);
1199 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1202 static void write_bulk_callback(struct urb *urb)
1204 struct net_device_stats *stats;
1205 struct net_device *netdev;
1208 int status = urb->status;
1218 netdev = tp->netdev;
1219 stats = &netdev->stats;
1221 if (net_ratelimit())
1222 netdev_warn(netdev, "Tx status %d\n", status);
1223 stats->tx_errors += agg->skb_num;
1225 stats->tx_packets += agg->skb_num;
1226 stats->tx_bytes += agg->skb_len;
1229 spin_lock(&tp->tx_lock);
1230 list_add_tail(&agg->list, &tp->tx_free);
1231 spin_unlock(&tp->tx_lock);
1233 usb_autopm_put_interface_async(tp->intf);
1235 if (!netif_carrier_ok(netdev))
1238 if (!test_bit(WORK_ENABLE, &tp->flags))
1241 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1244 if (!skb_queue_empty(&tp->tx_queue))
1245 napi_schedule(&tp->napi);
1248 static void intr_callback(struct urb *urb)
1252 int status = urb->status;
1259 if (!test_bit(WORK_ENABLE, &tp->flags))
1262 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1266 case 0: /* success */
1268 case -ECONNRESET: /* unlink */
1270 netif_device_detach(tp->netdev);
1273 netif_info(tp, intr, tp->netdev,
1274 "Stop submitting intr, status %d\n", status);
1277 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1279 /* -EPIPE: should clear the halt */
1281 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1285 d = urb->transfer_buffer;
1286 if (INTR_LINK & __le16_to_cpu(d[0])) {
1287 if (!netif_carrier_ok(tp->netdev)) {
1288 set_bit(RTL8152_LINK_CHG, &tp->flags);
1289 schedule_delayed_work(&tp->schedule, 0);
1292 if (netif_carrier_ok(tp->netdev)) {
1293 netif_stop_queue(tp->netdev);
1294 set_bit(RTL8152_LINK_CHG, &tp->flags);
1295 schedule_delayed_work(&tp->schedule, 0);
1300 res = usb_submit_urb(urb, GFP_ATOMIC);
1301 if (res == -ENODEV) {
1302 set_bit(RTL8152_UNPLUG, &tp->flags);
1303 netif_device_detach(tp->netdev);
1305 netif_err(tp, intr, tp->netdev,
1306 "can't resubmit intr, status %d\n", res);
1310 static inline void *rx_agg_align(void *data)
1312 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1315 static inline void *tx_agg_align(void *data)
1317 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1320 static void free_all_mem(struct r8152 *tp)
1324 for (i = 0; i < RTL8152_MAX_RX; i++) {
1325 usb_free_urb(tp->rx_info[i].urb);
1326 tp->rx_info[i].urb = NULL;
1328 kfree(tp->rx_info[i].buffer);
1329 tp->rx_info[i].buffer = NULL;
1330 tp->rx_info[i].head = NULL;
1333 for (i = 0; i < RTL8152_MAX_TX; i++) {
1334 usb_free_urb(tp->tx_info[i].urb);
1335 tp->tx_info[i].urb = NULL;
1337 kfree(tp->tx_info[i].buffer);
1338 tp->tx_info[i].buffer = NULL;
1339 tp->tx_info[i].head = NULL;
1342 usb_free_urb(tp->intr_urb);
1343 tp->intr_urb = NULL;
1345 kfree(tp->intr_buff);
1346 tp->intr_buff = NULL;
1349 static int alloc_all_mem(struct r8152 *tp)
1351 struct net_device *netdev = tp->netdev;
1352 struct usb_interface *intf = tp->intf;
1353 struct usb_host_interface *alt = intf->cur_altsetting;
1354 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1359 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1361 spin_lock_init(&tp->rx_lock);
1362 spin_lock_init(&tp->tx_lock);
1363 INIT_LIST_HEAD(&tp->tx_free);
1364 INIT_LIST_HEAD(&tp->rx_done);
1365 skb_queue_head_init(&tp->tx_queue);
1366 skb_queue_head_init(&tp->rx_queue);
1368 for (i = 0; i < RTL8152_MAX_RX; i++) {
1369 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1373 if (buf != rx_agg_align(buf)) {
1375 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1381 urb = usb_alloc_urb(0, GFP_KERNEL);
1387 INIT_LIST_HEAD(&tp->rx_info[i].list);
1388 tp->rx_info[i].context = tp;
1389 tp->rx_info[i].urb = urb;
1390 tp->rx_info[i].buffer = buf;
1391 tp->rx_info[i].head = rx_agg_align(buf);
1394 for (i = 0; i < RTL8152_MAX_TX; i++) {
1395 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1399 if (buf != tx_agg_align(buf)) {
1401 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1407 urb = usb_alloc_urb(0, GFP_KERNEL);
1413 INIT_LIST_HEAD(&tp->tx_info[i].list);
1414 tp->tx_info[i].context = tp;
1415 tp->tx_info[i].urb = urb;
1416 tp->tx_info[i].buffer = buf;
1417 tp->tx_info[i].head = tx_agg_align(buf);
1419 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1422 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1426 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1430 tp->intr_interval = (int)ep_intr->desc.bInterval;
1431 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1432 tp->intr_buff, INTBUFSIZE, intr_callback,
1433 tp, tp->intr_interval);
1442 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1444 struct tx_agg *agg = NULL;
1445 unsigned long flags;
1447 if (list_empty(&tp->tx_free))
1450 spin_lock_irqsave(&tp->tx_lock, flags);
1451 if (!list_empty(&tp->tx_free)) {
1452 struct list_head *cursor;
1454 cursor = tp->tx_free.next;
1455 list_del_init(cursor);
1456 agg = list_entry(cursor, struct tx_agg, list);
1458 spin_unlock_irqrestore(&tp->tx_lock, flags);
1463 /* r8152_csum_workaround()
1464 * The hw limites the value the transport offset. When the offset is out of the
1465 * range, calculate the checksum by sw.
1467 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1468 struct sk_buff_head *list)
1470 if (skb_shinfo(skb)->gso_size) {
1471 netdev_features_t features = tp->netdev->features;
1472 struct sk_buff_head seg_list;
1473 struct sk_buff *segs, *nskb;
1475 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1476 segs = skb_gso_segment(skb, features);
1477 if (IS_ERR(segs) || !segs)
1480 __skb_queue_head_init(&seg_list);
1486 __skb_queue_tail(&seg_list, nskb);
1489 skb_queue_splice(&seg_list, list);
1491 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1492 if (skb_checksum_help(skb) < 0)
1495 __skb_queue_head(list, skb);
1497 struct net_device_stats *stats;
1500 stats = &tp->netdev->stats;
1501 stats->tx_dropped++;
1506 /* msdn_giant_send_check()
1507 * According to the document of microsoft, the TCP Pseudo Header excludes the
1508 * packet length for IPv6 TCP large packets.
1510 static int msdn_giant_send_check(struct sk_buff *skb)
1512 const struct ipv6hdr *ipv6h;
1516 ret = skb_cow_head(skb, 0);
1520 ipv6h = ipv6_hdr(skb);
1524 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1529 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1531 if (skb_vlan_tag_present(skb)) {
1534 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1535 desc->opts2 |= cpu_to_le32(opts2);
1539 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1541 u32 opts2 = le32_to_cpu(desc->opts2);
1543 if (opts2 & RX_VLAN_TAG)
1544 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1545 swab16(opts2 & 0xffff));
1548 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1549 struct sk_buff *skb, u32 len, u32 transport_offset)
1551 u32 mss = skb_shinfo(skb)->gso_size;
1552 u32 opts1, opts2 = 0;
1553 int ret = TX_CSUM_SUCCESS;
1555 WARN_ON_ONCE(len > TX_LEN_MAX);
1557 opts1 = len | TX_FS | TX_LS;
1560 if (transport_offset > GTTCPHO_MAX) {
1561 netif_warn(tp, tx_err, tp->netdev,
1562 "Invalid transport offset 0x%x for TSO\n",
1568 switch (vlan_get_protocol(skb)) {
1569 case htons(ETH_P_IP):
1573 case htons(ETH_P_IPV6):
1574 if (msdn_giant_send_check(skb)) {
1586 opts1 |= transport_offset << GTTCPHO_SHIFT;
1587 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1588 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1591 if (transport_offset > TCPHO_MAX) {
1592 netif_warn(tp, tx_err, tp->netdev,
1593 "Invalid transport offset 0x%x\n",
1599 switch (vlan_get_protocol(skb)) {
1600 case htons(ETH_P_IP):
1602 ip_protocol = ip_hdr(skb)->protocol;
1605 case htons(ETH_P_IPV6):
1607 ip_protocol = ipv6_hdr(skb)->nexthdr;
1611 ip_protocol = IPPROTO_RAW;
1615 if (ip_protocol == IPPROTO_TCP)
1617 else if (ip_protocol == IPPROTO_UDP)
1622 opts2 |= transport_offset << TCPHO_SHIFT;
1625 desc->opts2 = cpu_to_le32(opts2);
1626 desc->opts1 = cpu_to_le32(opts1);
1632 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1634 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1638 __skb_queue_head_init(&skb_head);
1639 spin_lock(&tx_queue->lock);
1640 skb_queue_splice_init(tx_queue, &skb_head);
1641 spin_unlock(&tx_queue->lock);
1643 tx_data = agg->head;
1646 remain = agg_buf_sz;
1648 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1649 struct tx_desc *tx_desc;
1650 struct sk_buff *skb;
1654 skb = __skb_dequeue(&skb_head);
1658 len = skb->len + sizeof(*tx_desc);
1661 __skb_queue_head(&skb_head, skb);
1665 tx_data = tx_agg_align(tx_data);
1666 tx_desc = (struct tx_desc *)tx_data;
1668 offset = (u32)skb_transport_offset(skb);
1670 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1671 r8152_csum_workaround(tp, skb, &skb_head);
1675 rtl_tx_vlan_tag(tx_desc, skb);
1677 tx_data += sizeof(*tx_desc);
1680 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1681 struct net_device_stats *stats = &tp->netdev->stats;
1683 stats->tx_dropped++;
1684 dev_kfree_skb_any(skb);
1685 tx_data -= sizeof(*tx_desc);
1690 agg->skb_len += len;
1693 dev_kfree_skb_any(skb);
1695 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1698 if (!skb_queue_empty(&skb_head)) {
1699 spin_lock(&tx_queue->lock);
1700 skb_queue_splice(&skb_head, tx_queue);
1701 spin_unlock(&tx_queue->lock);
1704 netif_tx_lock(tp->netdev);
1706 if (netif_queue_stopped(tp->netdev) &&
1707 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1708 netif_wake_queue(tp->netdev);
1710 netif_tx_unlock(tp->netdev);
1712 ret = usb_autopm_get_interface_async(tp->intf);
1716 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1717 agg->head, (int)(tx_data - (u8 *)agg->head),
1718 (usb_complete_t)write_bulk_callback, agg);
1720 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1722 usb_autopm_put_interface_async(tp->intf);
1728 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1730 u8 checksum = CHECKSUM_NONE;
1733 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1736 opts2 = le32_to_cpu(rx_desc->opts2);
1737 opts3 = le32_to_cpu(rx_desc->opts3);
1739 if (opts2 & RD_IPV4_CS) {
1741 checksum = CHECKSUM_NONE;
1742 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1743 checksum = CHECKSUM_NONE;
1744 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1745 checksum = CHECKSUM_NONE;
1747 checksum = CHECKSUM_UNNECESSARY;
1748 } else if (opts2 & RD_IPV6_CS) {
1749 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1750 checksum = CHECKSUM_UNNECESSARY;
1751 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1752 checksum = CHECKSUM_UNNECESSARY;
1759 static int rx_bottom(struct r8152 *tp, int budget)
1761 unsigned long flags;
1762 struct list_head *cursor, *next, rx_queue;
1763 int ret = 0, work_done = 0;
1764 struct napi_struct *napi = &tp->napi;
1766 if (!skb_queue_empty(&tp->rx_queue)) {
1767 while (work_done < budget) {
1768 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1769 struct net_device *netdev = tp->netdev;
1770 struct net_device_stats *stats = &netdev->stats;
1771 unsigned int pkt_len;
1777 napi_gro_receive(napi, skb);
1779 stats->rx_packets++;
1780 stats->rx_bytes += pkt_len;
1784 if (list_empty(&tp->rx_done))
1787 INIT_LIST_HEAD(&rx_queue);
1788 spin_lock_irqsave(&tp->rx_lock, flags);
1789 list_splice_init(&tp->rx_done, &rx_queue);
1790 spin_unlock_irqrestore(&tp->rx_lock, flags);
1792 list_for_each_safe(cursor, next, &rx_queue) {
1793 struct rx_desc *rx_desc;
1799 list_del_init(cursor);
1801 agg = list_entry(cursor, struct rx_agg, list);
1803 if (urb->actual_length < ETH_ZLEN)
1806 rx_desc = agg->head;
1807 rx_data = agg->head;
1808 len_used += sizeof(struct rx_desc);
1810 while (urb->actual_length > len_used) {
1811 struct net_device *netdev = tp->netdev;
1812 struct net_device_stats *stats = &netdev->stats;
1813 unsigned int pkt_len;
1814 struct sk_buff *skb;
1816 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1817 if (pkt_len < ETH_ZLEN)
1820 len_used += pkt_len;
1821 if (urb->actual_length < len_used)
1824 pkt_len -= CRC_SIZE;
1825 rx_data += sizeof(struct rx_desc);
1827 skb = napi_alloc_skb(napi, pkt_len);
1829 stats->rx_dropped++;
1833 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1834 memcpy(skb->data, rx_data, pkt_len);
1835 skb_put(skb, pkt_len);
1836 skb->protocol = eth_type_trans(skb, netdev);
1837 rtl_rx_vlan_tag(rx_desc, skb);
1838 if (work_done < budget) {
1839 napi_gro_receive(napi, skb);
1841 stats->rx_packets++;
1842 stats->rx_bytes += pkt_len;
1844 __skb_queue_tail(&tp->rx_queue, skb);
1848 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1849 rx_desc = (struct rx_desc *)rx_data;
1850 len_used = (int)(rx_data - (u8 *)agg->head);
1851 len_used += sizeof(struct rx_desc);
1856 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1858 urb->actual_length = 0;
1859 list_add_tail(&agg->list, next);
1863 if (!list_empty(&rx_queue)) {
1864 spin_lock_irqsave(&tp->rx_lock, flags);
1865 list_splice_tail(&rx_queue, &tp->rx_done);
1866 spin_unlock_irqrestore(&tp->rx_lock, flags);
1873 static void tx_bottom(struct r8152 *tp)
1880 if (skb_queue_empty(&tp->tx_queue))
1883 agg = r8152_get_tx_agg(tp);
1887 res = r8152_tx_agg_fill(tp, agg);
1889 struct net_device *netdev = tp->netdev;
1891 if (res == -ENODEV) {
1892 set_bit(RTL8152_UNPLUG, &tp->flags);
1893 netif_device_detach(netdev);
1895 struct net_device_stats *stats = &netdev->stats;
1896 unsigned long flags;
1898 netif_warn(tp, tx_err, netdev,
1899 "failed tx_urb %d\n", res);
1900 stats->tx_dropped += agg->skb_num;
1902 spin_lock_irqsave(&tp->tx_lock, flags);
1903 list_add_tail(&agg->list, &tp->tx_free);
1904 spin_unlock_irqrestore(&tp->tx_lock, flags);
1910 static void bottom_half(struct r8152 *tp)
1912 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1915 if (!test_bit(WORK_ENABLE, &tp->flags))
1918 /* When link down, the driver would cancel all bulks. */
1919 /* This avoid the re-submitting bulk */
1920 if (!netif_carrier_ok(tp->netdev))
1923 clear_bit(SCHEDULE_NAPI, &tp->flags);
1928 static int r8152_poll(struct napi_struct *napi, int budget)
1930 struct r8152 *tp = container_of(napi, struct r8152, napi);
1933 work_done = rx_bottom(tp, budget);
1936 if (work_done < budget) {
1937 napi_complete(napi);
1938 if (!list_empty(&tp->rx_done))
1939 napi_schedule(napi);
1940 else if (!skb_queue_empty(&tp->tx_queue) &&
1941 !list_empty(&tp->tx_free))
1942 napi_schedule(napi);
1949 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1953 /* The rx would be stopped, so skip submitting */
1954 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1955 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1958 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1959 agg->head, agg_buf_sz,
1960 (usb_complete_t)read_bulk_callback, agg);
1962 ret = usb_submit_urb(agg->urb, mem_flags);
1963 if (ret == -ENODEV) {
1964 set_bit(RTL8152_UNPLUG, &tp->flags);
1965 netif_device_detach(tp->netdev);
1967 struct urb *urb = agg->urb;
1968 unsigned long flags;
1970 urb->actual_length = 0;
1971 spin_lock_irqsave(&tp->rx_lock, flags);
1972 list_add_tail(&agg->list, &tp->rx_done);
1973 spin_unlock_irqrestore(&tp->rx_lock, flags);
1975 netif_err(tp, rx_err, tp->netdev,
1976 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1978 napi_schedule(&tp->napi);
1984 static void rtl_drop_queued_tx(struct r8152 *tp)
1986 struct net_device_stats *stats = &tp->netdev->stats;
1987 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1988 struct sk_buff *skb;
1990 if (skb_queue_empty(tx_queue))
1993 __skb_queue_head_init(&skb_head);
1994 spin_lock_bh(&tx_queue->lock);
1995 skb_queue_splice_init(tx_queue, &skb_head);
1996 spin_unlock_bh(&tx_queue->lock);
1998 while ((skb = __skb_dequeue(&skb_head))) {
2000 stats->tx_dropped++;
2004 static void rtl8152_tx_timeout(struct net_device *netdev)
2006 struct r8152 *tp = netdev_priv(netdev);
2008 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2010 usb_queue_reset_device(tp->intf);
2013 static void rtl8152_set_rx_mode(struct net_device *netdev)
2015 struct r8152 *tp = netdev_priv(netdev);
2017 if (netif_carrier_ok(netdev)) {
2018 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2019 schedule_delayed_work(&tp->schedule, 0);
2023 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2025 struct r8152 *tp = netdev_priv(netdev);
2026 u32 mc_filter[2]; /* Multicast hash filter */
2030 netif_stop_queue(netdev);
2031 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2032 ocp_data &= ~RCR_ACPT_ALL;
2033 ocp_data |= RCR_AB | RCR_APM;
2035 if (netdev->flags & IFF_PROMISC) {
2036 /* Unconditionally log net taps. */
2037 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2038 ocp_data |= RCR_AM | RCR_AAP;
2039 mc_filter[1] = 0xffffffff;
2040 mc_filter[0] = 0xffffffff;
2041 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2042 (netdev->flags & IFF_ALLMULTI)) {
2043 /* Too many to filter perfectly -- accept all multicasts. */
2045 mc_filter[1] = 0xffffffff;
2046 mc_filter[0] = 0xffffffff;
2048 struct netdev_hw_addr *ha;
2052 netdev_for_each_mc_addr(ha, netdev) {
2053 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2055 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2060 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2061 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2063 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2064 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2065 netif_wake_queue(netdev);
2068 static netdev_features_t
2069 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2070 netdev_features_t features)
2072 u32 mss = skb_shinfo(skb)->gso_size;
2073 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2074 int offset = skb_transport_offset(skb);
2076 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2077 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2078 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2079 features &= ~NETIF_F_GSO_MASK;
2084 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2085 struct net_device *netdev)
2087 struct r8152 *tp = netdev_priv(netdev);
2089 skb_tx_timestamp(skb);
2091 skb_queue_tail(&tp->tx_queue, skb);
2093 if (!list_empty(&tp->tx_free)) {
2094 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2095 set_bit(SCHEDULE_NAPI, &tp->flags);
2096 schedule_delayed_work(&tp->schedule, 0);
2098 usb_mark_last_busy(tp->udev);
2099 napi_schedule(&tp->napi);
2101 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2102 netif_stop_queue(netdev);
2105 return NETDEV_TX_OK;
2108 static void r8152b_reset_packet_filter(struct r8152 *tp)
2112 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2113 ocp_data &= ~FMC_FCR_MCU_EN;
2114 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2115 ocp_data |= FMC_FCR_MCU_EN;
2116 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2119 static void rtl8152_nic_reset(struct r8152 *tp)
2123 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2125 for (i = 0; i < 1000; i++) {
2126 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2128 usleep_range(100, 400);
2132 static void set_tx_qlen(struct r8152 *tp)
2134 struct net_device *netdev = tp->netdev;
2136 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2137 sizeof(struct tx_desc));
2140 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2142 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2145 static void rtl_set_eee_plus(struct r8152 *tp)
2150 speed = rtl8152_get_speed(tp);
2151 if (speed & _10bps) {
2152 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2153 ocp_data |= EEEP_CR_EEEP_TX;
2154 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2156 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2157 ocp_data &= ~EEEP_CR_EEEP_TX;
2158 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2162 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2166 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2168 ocp_data |= RXDY_GATED_EN;
2170 ocp_data &= ~RXDY_GATED_EN;
2171 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2174 static int rtl_start_rx(struct r8152 *tp)
2178 INIT_LIST_HEAD(&tp->rx_done);
2179 for (i = 0; i < RTL8152_MAX_RX; i++) {
2180 INIT_LIST_HEAD(&tp->rx_info[i].list);
2181 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2186 if (ret && ++i < RTL8152_MAX_RX) {
2187 struct list_head rx_queue;
2188 unsigned long flags;
2190 INIT_LIST_HEAD(&rx_queue);
2193 struct rx_agg *agg = &tp->rx_info[i++];
2194 struct urb *urb = agg->urb;
2196 urb->actual_length = 0;
2197 list_add_tail(&agg->list, &rx_queue);
2198 } while (i < RTL8152_MAX_RX);
2200 spin_lock_irqsave(&tp->rx_lock, flags);
2201 list_splice_tail(&rx_queue, &tp->rx_done);
2202 spin_unlock_irqrestore(&tp->rx_lock, flags);
2208 static int rtl_stop_rx(struct r8152 *tp)
2212 for (i = 0; i < RTL8152_MAX_RX; i++)
2213 usb_kill_urb(tp->rx_info[i].urb);
2215 while (!skb_queue_empty(&tp->rx_queue))
2216 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2221 static int rtl_enable(struct r8152 *tp)
2225 r8152b_reset_packet_filter(tp);
2227 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2228 ocp_data |= CR_RE | CR_TE;
2229 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2231 rxdy_gated_en(tp, false);
2236 static int rtl8152_enable(struct r8152 *tp)
2238 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2242 rtl_set_eee_plus(tp);
2244 return rtl_enable(tp);
2247 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2249 u32 ocp_data = tp->coalesce / 8;
2251 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2254 static void r8153_set_rx_early_size(struct r8152 *tp)
2256 u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2258 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2261 static int rtl8153_enable(struct r8152 *tp)
2263 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2267 rtl_set_eee_plus(tp);
2268 r8153_set_rx_early_timeout(tp);
2269 r8153_set_rx_early_size(tp);
2271 return rtl_enable(tp);
2274 static void rtl_disable(struct r8152 *tp)
2279 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2280 rtl_drop_queued_tx(tp);
2284 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2285 ocp_data &= ~RCR_ACPT_ALL;
2286 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2288 rtl_drop_queued_tx(tp);
2290 for (i = 0; i < RTL8152_MAX_TX; i++)
2291 usb_kill_urb(tp->tx_info[i].urb);
2293 rxdy_gated_en(tp, true);
2295 for (i = 0; i < 1000; i++) {
2296 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2297 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2299 usleep_range(1000, 2000);
2302 for (i = 0; i < 1000; i++) {
2303 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2305 usleep_range(1000, 2000);
2310 rtl8152_nic_reset(tp);
2313 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2317 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2319 ocp_data |= POWER_CUT;
2321 ocp_data &= ~POWER_CUT;
2322 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2324 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2325 ocp_data &= ~RESUME_INDICATE;
2326 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2329 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2333 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2335 ocp_data |= CPCR_RX_VLAN;
2337 ocp_data &= ~CPCR_RX_VLAN;
2338 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2341 static int rtl8152_set_features(struct net_device *dev,
2342 netdev_features_t features)
2344 netdev_features_t changed = features ^ dev->features;
2345 struct r8152 *tp = netdev_priv(dev);
2348 ret = usb_autopm_get_interface(tp->intf);
2352 mutex_lock(&tp->control);
2354 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2355 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2356 rtl_rx_vlan_en(tp, true);
2358 rtl_rx_vlan_en(tp, false);
2361 mutex_unlock(&tp->control);
2363 usb_autopm_put_interface(tp->intf);
2369 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2371 static u32 __rtl_get_wol(struct r8152 *tp)
2376 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2377 if (ocp_data & LINK_ON_WAKE_EN)
2378 wolopts |= WAKE_PHY;
2380 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2381 if (ocp_data & UWF_EN)
2382 wolopts |= WAKE_UCAST;
2383 if (ocp_data & BWF_EN)
2384 wolopts |= WAKE_BCAST;
2385 if (ocp_data & MWF_EN)
2386 wolopts |= WAKE_MCAST;
2388 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2389 if (ocp_data & MAGIC_EN)
2390 wolopts |= WAKE_MAGIC;
2395 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2399 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2401 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2402 ocp_data &= ~LINK_ON_WAKE_EN;
2403 if (wolopts & WAKE_PHY)
2404 ocp_data |= LINK_ON_WAKE_EN;
2405 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2407 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2408 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2409 if (wolopts & WAKE_UCAST)
2411 if (wolopts & WAKE_BCAST)
2413 if (wolopts & WAKE_MCAST)
2415 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2417 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2419 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2420 ocp_data &= ~MAGIC_EN;
2421 if (wolopts & WAKE_MAGIC)
2422 ocp_data |= MAGIC_EN;
2423 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2425 if (wolopts & WAKE_ANY)
2426 device_set_wakeup_enable(&tp->udev->dev, true);
2428 device_set_wakeup_enable(&tp->udev->dev, false);
2431 static void r8153_mac_clk_spd(struct r8152 *tp, bool enable)
2433 /* MAC clock speed down */
2435 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL,
2437 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2,
2439 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
2440 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
2441 U1U2_SPDWN_EN | L1_SPDWN_EN);
2442 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
2443 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
2444 TP100_SPDWN_EN | TP500_SPDWN_EN | EEE_SPDWN_EN |
2447 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
2448 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
2449 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
2450 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
2454 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2459 memset(u1u2, 0xff, sizeof(u1u2));
2461 memset(u1u2, 0x00, sizeof(u1u2));
2463 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2466 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2470 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2472 ocp_data |= U2P3_ENABLE;
2474 ocp_data &= ~U2P3_ENABLE;
2475 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2478 static u16 r8153_phy_status(struct r8152 *tp, u16 desired)
2483 for (i = 0; i < 500; i++) {
2484 data = ocp_reg_read(tp, OCP_PHY_STATUS);
2485 data &= PHY_STAT_MASK;
2487 if (data == desired)
2489 } else if (data == PHY_STAT_LAN_ON || data == PHY_STAT_PWRDN ||
2490 data == PHY_STAT_EXT_INIT) {
2500 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2504 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2506 ocp_data |= PWR_EN | PHASE2_EN;
2508 ocp_data &= ~(PWR_EN | PHASE2_EN);
2509 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2511 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2512 ocp_data &= ~PCUT_STATUS;
2513 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2516 static bool rtl_can_wakeup(struct r8152 *tp)
2518 struct usb_device *udev = tp->udev;
2520 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2523 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2528 __rtl_set_wol(tp, WAKE_ANY);
2530 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2532 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2533 ocp_data |= LINK_OFF_WAKE_EN;
2534 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2536 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2540 __rtl_set_wol(tp, tp->saved_wolopts);
2542 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2544 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2545 ocp_data &= ~LINK_OFF_WAKE_EN;
2546 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2548 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2552 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2555 r8153_u1u2en(tp, false);
2556 r8153_u2p3en(tp, false);
2557 r8153_mac_clk_spd(tp, true);
2558 rtl_runtime_suspend_enable(tp, true);
2560 rtl_runtime_suspend_enable(tp, false);
2561 r8153_mac_clk_spd(tp, false);
2563 switch (tp->version) {
2570 r8153_u2p3en(tp, true);
2574 r8153_u1u2en(tp, true);
2578 static void r8153_teredo_off(struct r8152 *tp)
2582 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2583 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2584 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2586 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2587 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2588 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2591 static void rtl_reset_bmu(struct r8152 *tp)
2595 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2596 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2597 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2598 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2599 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2602 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2605 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2606 LINKENA | DIS_SDSAVE);
2608 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2614 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2616 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2617 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2618 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2621 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2625 r8152_mmd_indirect(tp, dev, reg);
2626 data = ocp_reg_read(tp, OCP_EEE_DATA);
2627 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2632 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2634 r8152_mmd_indirect(tp, dev, reg);
2635 ocp_reg_write(tp, OCP_EEE_DATA, data);
2636 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2639 static void r8152_eee_en(struct r8152 *tp, bool enable)
2641 u16 config1, config2, config3;
2644 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2645 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2646 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2647 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2650 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2651 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2652 config1 |= sd_rise_time(1);
2653 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2654 config3 |= fast_snr(42);
2656 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2657 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2659 config1 |= sd_rise_time(7);
2660 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2661 config3 |= fast_snr(511);
2664 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2665 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2666 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2667 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2670 static void r8152b_enable_eee(struct r8152 *tp)
2672 r8152_eee_en(tp, true);
2673 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2676 static void r8152b_enable_fc(struct r8152 *tp)
2680 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2681 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2682 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2685 static void rtl8152_disable(struct r8152 *tp)
2687 r8152_aldps_en(tp, false);
2689 r8152_aldps_en(tp, true);
2692 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2694 r8152b_enable_eee(tp);
2695 r8152_aldps_en(tp, true);
2696 r8152b_enable_fc(tp);
2698 set_bit(PHY_RESET, &tp->flags);
2701 static void r8152b_exit_oob(struct r8152 *tp)
2706 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2707 ocp_data &= ~RCR_ACPT_ALL;
2708 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2710 rxdy_gated_en(tp, true);
2711 r8153_teredo_off(tp);
2712 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2713 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2715 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2716 ocp_data &= ~NOW_IS_OOB;
2717 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2719 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2720 ocp_data &= ~MCU_BORW_EN;
2721 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2723 for (i = 0; i < 1000; i++) {
2724 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2725 if (ocp_data & LINK_LIST_READY)
2727 usleep_range(1000, 2000);
2730 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2731 ocp_data |= RE_INIT_LL;
2732 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2734 for (i = 0; i < 1000; i++) {
2735 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2736 if (ocp_data & LINK_LIST_READY)
2738 usleep_range(1000, 2000);
2741 rtl8152_nic_reset(tp);
2743 /* rx share fifo credit full threshold */
2744 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2746 if (tp->udev->speed == USB_SPEED_FULL ||
2747 tp->udev->speed == USB_SPEED_LOW) {
2748 /* rx share fifo credit near full threshold */
2749 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2751 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2754 /* rx share fifo credit near full threshold */
2755 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2757 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2761 /* TX share fifo free credit full threshold */
2762 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2764 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2765 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2766 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2767 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2769 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2771 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2773 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2774 ocp_data |= TCR0_AUTO_FIFO;
2775 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2778 static void r8152b_enter_oob(struct r8152 *tp)
2783 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2784 ocp_data &= ~NOW_IS_OOB;
2785 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2787 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2788 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2789 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2793 for (i = 0; i < 1000; i++) {
2794 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2795 if (ocp_data & LINK_LIST_READY)
2797 usleep_range(1000, 2000);
2800 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2801 ocp_data |= RE_INIT_LL;
2802 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2804 for (i = 0; i < 1000; i++) {
2805 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2806 if (ocp_data & LINK_LIST_READY)
2808 usleep_range(1000, 2000);
2811 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2813 rtl_rx_vlan_en(tp, true);
2815 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2816 ocp_data |= ALDPS_PROXY_MODE;
2817 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2819 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2820 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2821 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2823 rxdy_gated_en(tp, false);
2825 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2826 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2827 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2830 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2834 data = ocp_reg_read(tp, OCP_POWER_CFG);
2837 ocp_reg_write(tp, OCP_POWER_CFG, data);
2840 ocp_reg_write(tp, OCP_POWER_CFG, data);
2845 static void r8153_eee_en(struct r8152 *tp, bool enable)
2850 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2851 config = ocp_reg_read(tp, OCP_EEE_CFG);
2854 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2857 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2858 config &= ~EEE10_EN;
2861 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2862 ocp_reg_write(tp, OCP_EEE_CFG, config);
2865 static void r8153_hw_phy_cfg(struct r8152 *tp)
2870 /* disable ALDPS before updating the PHY parameters */
2871 r8153_aldps_en(tp, false);
2873 /* disable EEE before updating the PHY parameters */
2874 r8153_eee_en(tp, false);
2875 ocp_reg_write(tp, OCP_EEE_ADV, 0);
2877 if (tp->version == RTL_VER_03) {
2878 data = ocp_reg_read(tp, OCP_EEE_CFG);
2879 data &= ~CTAP_SHORT_EN;
2880 ocp_reg_write(tp, OCP_EEE_CFG, data);
2883 data = ocp_reg_read(tp, OCP_POWER_CFG);
2884 data |= EEE_CLKDIV_EN;
2885 ocp_reg_write(tp, OCP_POWER_CFG, data);
2887 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2888 data |= EN_10M_BGOFF;
2889 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2890 data = ocp_reg_read(tp, OCP_POWER_CFG);
2891 data |= EN_10M_PLLOFF;
2892 ocp_reg_write(tp, OCP_POWER_CFG, data);
2893 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2895 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2896 ocp_data |= PFM_PWM_SWITCH;
2897 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2899 /* Enable LPF corner auto tune */
2900 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2902 /* Adjust 10M Amplitude */
2903 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2904 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2906 r8153_eee_en(tp, true);
2907 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2909 r8153_aldps_en(tp, true);
2910 r8152b_enable_fc(tp);
2912 switch (tp->version) {
2919 r8153_u2p3en(tp, true);
2923 set_bit(PHY_RESET, &tp->flags);
2926 static void r8153_first_init(struct r8152 *tp)
2931 r8153_mac_clk_spd(tp, false);
2932 rxdy_gated_en(tp, true);
2933 r8153_teredo_off(tp);
2935 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2936 ocp_data &= ~RCR_ACPT_ALL;
2937 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2939 rtl8152_nic_reset(tp);
2942 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2943 ocp_data &= ~NOW_IS_OOB;
2944 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2946 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2947 ocp_data &= ~MCU_BORW_EN;
2948 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2950 for (i = 0; i < 1000; i++) {
2951 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2952 if (ocp_data & LINK_LIST_READY)
2954 usleep_range(1000, 2000);
2957 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2958 ocp_data |= RE_INIT_LL;
2959 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2961 for (i = 0; i < 1000; i++) {
2962 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2963 if (ocp_data & LINK_LIST_READY)
2965 usleep_range(1000, 2000);
2968 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2970 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2971 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2972 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2974 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2975 ocp_data |= TCR0_AUTO_FIFO;
2976 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2978 rtl8152_nic_reset(tp);
2980 /* rx share fifo credit full threshold */
2981 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2982 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2983 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2984 /* TX share fifo free credit full threshold */
2985 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2988 static void r8153_enter_oob(struct r8152 *tp)
2993 r8153_mac_clk_spd(tp, true);
2995 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2996 ocp_data &= ~NOW_IS_OOB;
2997 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3002 for (i = 0; i < 1000; i++) {
3003 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3004 if (ocp_data & LINK_LIST_READY)
3006 usleep_range(1000, 2000);
3009 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3010 ocp_data |= RE_INIT_LL;
3011 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3013 for (i = 0; i < 1000; i++) {
3014 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3015 if (ocp_data & LINK_LIST_READY)
3017 usleep_range(1000, 2000);
3020 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
3021 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3023 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3024 ocp_data &= ~TEREDO_WAKE_MASK;
3025 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3027 rtl_rx_vlan_en(tp, true);
3029 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
3030 ocp_data |= ALDPS_PROXY_MODE;
3031 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
3033 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3034 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3035 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3037 rxdy_gated_en(tp, false);
3039 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3040 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3041 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3044 static void rtl8153_disable(struct r8152 *tp)
3046 r8153_aldps_en(tp, false);
3049 r8153_aldps_en(tp, true);
3052 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
3054 u16 bmcr, anar, gbcr;
3057 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3058 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
3059 ADVERTISE_100HALF | ADVERTISE_100FULL);
3060 if (tp->mii.supports_gmii) {
3061 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3062 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3067 if (autoneg == AUTONEG_DISABLE) {
3068 if (speed == SPEED_10) {
3070 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3071 } else if (speed == SPEED_100) {
3072 bmcr = BMCR_SPEED100;
3073 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3074 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3075 bmcr = BMCR_SPEED1000;
3076 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3082 if (duplex == DUPLEX_FULL)
3083 bmcr |= BMCR_FULLDPLX;
3085 if (speed == SPEED_10) {
3086 if (duplex == DUPLEX_FULL)
3087 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3089 anar |= ADVERTISE_10HALF;
3090 } else if (speed == SPEED_100) {
3091 if (duplex == DUPLEX_FULL) {
3092 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3093 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3095 anar |= ADVERTISE_10HALF;
3096 anar |= ADVERTISE_100HALF;
3098 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3099 if (duplex == DUPLEX_FULL) {
3100 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3101 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3102 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3104 anar |= ADVERTISE_10HALF;
3105 anar |= ADVERTISE_100HALF;
3106 gbcr |= ADVERTISE_1000HALF;
3113 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3116 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3119 if (tp->mii.supports_gmii)
3120 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3122 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3123 r8152_mdio_write(tp, MII_BMCR, bmcr);
3125 if (bmcr & BMCR_RESET) {
3128 for (i = 0; i < 50; i++) {
3130 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3139 static void rtl8152_up(struct r8152 *tp)
3141 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3144 r8152_aldps_en(tp, false);
3145 r8152b_exit_oob(tp);
3146 r8152_aldps_en(tp, true);
3149 static void rtl8152_down(struct r8152 *tp)
3151 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3152 rtl_drop_queued_tx(tp);
3156 r8152_power_cut_en(tp, false);
3157 r8152_aldps_en(tp, false);
3158 r8152b_enter_oob(tp);
3159 r8152_aldps_en(tp, true);
3162 static void rtl8153_up(struct r8152 *tp)
3164 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3167 r8153_u1u2en(tp, false);
3168 r8153_u2p3en(tp, false);
3169 r8153_aldps_en(tp, false);
3170 r8153_first_init(tp);
3171 r8153_aldps_en(tp, true);
3173 switch (tp->version) {
3180 r8153_u2p3en(tp, true);
3184 r8153_u1u2en(tp, true);
3187 static void rtl8153_down(struct r8152 *tp)
3189 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3190 rtl_drop_queued_tx(tp);
3194 r8153_u1u2en(tp, false);
3195 r8153_u2p3en(tp, false);
3196 r8153_power_cut_en(tp, false);
3197 r8153_aldps_en(tp, false);
3198 r8153_enter_oob(tp);
3199 r8153_aldps_en(tp, true);
3202 static bool rtl8152_in_nway(struct r8152 *tp)
3206 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3207 tp->ocp_base = 0x2000;
3208 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3209 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3211 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3212 if (nway_state & 0xc000)
3218 static bool rtl8153_in_nway(struct r8152 *tp)
3220 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3222 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3228 static void set_carrier(struct r8152 *tp)
3230 struct net_device *netdev = tp->netdev;
3231 struct napi_struct *napi = &tp->napi;
3234 speed = rtl8152_get_speed(tp);
3236 if (speed & LINK_STATUS) {
3237 if (!netif_carrier_ok(netdev)) {
3238 tp->rtl_ops.enable(tp);
3239 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3240 netif_stop_queue(netdev);
3242 netif_carrier_on(netdev);
3244 napi_enable(&tp->napi);
3245 netif_wake_queue(netdev);
3246 netif_info(tp, link, netdev, "carrier on\n");
3247 } else if (netif_queue_stopped(netdev) &&
3248 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3249 netif_wake_queue(netdev);
3252 if (netif_carrier_ok(netdev)) {
3253 netif_carrier_off(netdev);
3255 tp->rtl_ops.disable(tp);
3257 netif_info(tp, link, netdev, "carrier off\n");
3262 static void rtl_work_func_t(struct work_struct *work)
3264 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3266 /* If the device is unplugged or !netif_running(), the workqueue
3267 * doesn't need to wake the device, and could return directly.
3269 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3272 if (usb_autopm_get_interface(tp->intf) < 0)
3275 if (!test_bit(WORK_ENABLE, &tp->flags))
3278 if (!mutex_trylock(&tp->control)) {
3279 schedule_delayed_work(&tp->schedule, 0);
3283 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3286 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3287 _rtl8152_set_rx_mode(tp->netdev);
3289 /* don't schedule napi before linking */
3290 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3291 netif_carrier_ok(tp->netdev))
3292 napi_schedule(&tp->napi);
3294 mutex_unlock(&tp->control);
3297 usb_autopm_put_interface(tp->intf);
3300 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3302 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3304 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3307 if (usb_autopm_get_interface(tp->intf) < 0)
3310 mutex_lock(&tp->control);
3312 tp->rtl_ops.hw_phy_cfg(tp);
3314 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3316 mutex_unlock(&tp->control);
3318 usb_autopm_put_interface(tp->intf);
3321 #ifdef CONFIG_PM_SLEEP
3322 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3325 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3328 case PM_HIBERNATION_PREPARE:
3329 case PM_SUSPEND_PREPARE:
3330 usb_autopm_get_interface(tp->intf);
3333 case PM_POST_HIBERNATION:
3334 case PM_POST_SUSPEND:
3335 usb_autopm_put_interface(tp->intf);
3338 case PM_POST_RESTORE:
3339 case PM_RESTORE_PREPARE:
3348 static int rtl8152_open(struct net_device *netdev)
3350 struct r8152 *tp = netdev_priv(netdev);
3353 res = alloc_all_mem(tp);
3357 res = usb_autopm_get_interface(tp->intf);
3361 mutex_lock(&tp->control);
3365 netif_carrier_off(netdev);
3366 netif_start_queue(netdev);
3367 set_bit(WORK_ENABLE, &tp->flags);
3369 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3372 netif_device_detach(tp->netdev);
3373 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3377 napi_enable(&tp->napi);
3379 mutex_unlock(&tp->control);
3381 usb_autopm_put_interface(tp->intf);
3382 #ifdef CONFIG_PM_SLEEP
3383 tp->pm_notifier.notifier_call = rtl_notifier;
3384 register_pm_notifier(&tp->pm_notifier);
3389 mutex_unlock(&tp->control);
3390 usb_autopm_put_interface(tp->intf);
3397 static int rtl8152_close(struct net_device *netdev)
3399 struct r8152 *tp = netdev_priv(netdev);
3402 #ifdef CONFIG_PM_SLEEP
3403 unregister_pm_notifier(&tp->pm_notifier);
3405 napi_disable(&tp->napi);
3406 clear_bit(WORK_ENABLE, &tp->flags);
3407 usb_kill_urb(tp->intr_urb);
3408 cancel_delayed_work_sync(&tp->schedule);
3409 netif_stop_queue(netdev);
3411 res = usb_autopm_get_interface(tp->intf);
3412 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3413 rtl_drop_queued_tx(tp);
3416 mutex_lock(&tp->control);
3418 tp->rtl_ops.down(tp);
3420 mutex_unlock(&tp->control);
3422 usb_autopm_put_interface(tp->intf);
3430 static void rtl_tally_reset(struct r8152 *tp)
3434 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3435 ocp_data |= TALLY_RESET;
3436 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3439 static void r8152b_init(struct r8152 *tp)
3444 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3447 data = r8152_mdio_read(tp, MII_BMCR);
3448 if (data & BMCR_PDOWN) {
3449 data &= ~BMCR_PDOWN;
3450 r8152_mdio_write(tp, MII_BMCR, data);
3453 r8152_aldps_en(tp, false);
3455 if (tp->version == RTL_VER_01) {
3456 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3457 ocp_data &= ~LED_MODE_MASK;
3458 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3461 r8152_power_cut_en(tp, false);
3463 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3464 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3465 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3466 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3467 ocp_data &= ~MCU_CLK_RATIO_MASK;
3468 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3469 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3470 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3471 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3472 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3474 rtl_tally_reset(tp);
3476 /* enable rx aggregation */
3477 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3478 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3479 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3482 static void r8153_init(struct r8152 *tp)
3488 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3491 r8153_u1u2en(tp, false);
3493 for (i = 0; i < 500; i++) {
3494 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3500 data = r8153_phy_status(tp, 0);
3502 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3503 tp->version == RTL_VER_05)
3504 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3506 data = r8152_mdio_read(tp, MII_BMCR);
3507 if (data & BMCR_PDOWN) {
3508 data &= ~BMCR_PDOWN;
3509 r8152_mdio_write(tp, MII_BMCR, data);
3512 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
3514 r8153_u2p3en(tp, false);
3516 if (tp->version == RTL_VER_04) {
3517 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3518 ocp_data &= ~pwd_dn_scale_mask;
3519 ocp_data |= pwd_dn_scale(96);
3520 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3522 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3523 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3524 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3525 } else if (tp->version == RTL_VER_05) {
3526 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3527 ocp_data &= ~ECM_ALDPS;
3528 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3530 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3531 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3532 ocp_data &= ~DYNAMIC_BURST;
3534 ocp_data |= DYNAMIC_BURST;
3535 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3536 } else if (tp->version == RTL_VER_06) {
3537 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3538 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3539 ocp_data &= ~DYNAMIC_BURST;
3541 ocp_data |= DYNAMIC_BURST;
3542 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3545 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3546 ocp_data |= EP4_FULL_FC;
3547 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3549 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3550 ocp_data &= ~TIMER11_EN;
3551 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3553 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3554 ocp_data &= ~LED_MODE_MASK;
3555 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3557 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3558 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3559 ocp_data |= LPM_TIMER_500MS;
3561 ocp_data |= LPM_TIMER_500US;
3562 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3564 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3565 ocp_data &= ~SEN_VAL_MASK;
3566 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3567 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3569 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3571 r8153_power_cut_en(tp, false);
3572 r8153_u1u2en(tp, true);
3573 r8153_mac_clk_spd(tp, false);
3574 usb_enable_lpm(tp->udev);
3576 /* rx aggregation */
3577 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3578 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3579 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3581 rtl_tally_reset(tp);
3584 static int rtl8152_pre_reset(struct usb_interface *intf)
3586 struct r8152 *tp = usb_get_intfdata(intf);
3587 struct net_device *netdev;
3592 netdev = tp->netdev;
3593 if (!netif_running(netdev))
3596 netif_stop_queue(netdev);
3597 napi_disable(&tp->napi);
3598 clear_bit(WORK_ENABLE, &tp->flags);
3599 usb_kill_urb(tp->intr_urb);
3600 cancel_delayed_work_sync(&tp->schedule);
3601 if (netif_carrier_ok(netdev)) {
3602 mutex_lock(&tp->control);
3603 tp->rtl_ops.disable(tp);
3604 mutex_unlock(&tp->control);
3610 static int rtl8152_post_reset(struct usb_interface *intf)
3612 struct r8152 *tp = usb_get_intfdata(intf);
3613 struct net_device *netdev;
3618 netdev = tp->netdev;
3619 if (!netif_running(netdev))
3622 set_bit(WORK_ENABLE, &tp->flags);
3623 if (netif_carrier_ok(netdev)) {
3624 mutex_lock(&tp->control);
3625 tp->rtl_ops.enable(tp);
3627 rtl8152_set_rx_mode(netdev);
3628 mutex_unlock(&tp->control);
3631 napi_enable(&tp->napi);
3632 netif_wake_queue(netdev);
3633 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3635 if (!list_empty(&tp->rx_done))
3636 napi_schedule(&tp->napi);
3641 static bool delay_autosuspend(struct r8152 *tp)
3643 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3644 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3646 /* This means a linking change occurs and the driver doesn't detect it,
3647 * yet. If the driver has disabled tx/rx and hw is linking on, the
3648 * device wouldn't wake up by receiving any packet.
3650 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3653 /* If the linking down is occurred by nway, the device may miss the
3654 * linking change event. And it wouldn't wake when linking on.
3656 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3658 else if (!skb_queue_empty(&tp->tx_queue))
3664 static int rtl8152_runtime_suspend(struct r8152 *tp)
3666 struct net_device *netdev = tp->netdev;
3669 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3670 smp_mb__after_atomic();
3672 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3675 if (delay_autosuspend(tp)) {
3676 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3677 smp_mb__after_atomic();
3682 if (netif_carrier_ok(netdev)) {
3685 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3686 ocp_data = rcr & ~RCR_ACPT_ALL;
3687 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3688 rxdy_gated_en(tp, true);
3689 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3691 if (!(ocp_data & RXFIFO_EMPTY)) {
3692 rxdy_gated_en(tp, false);
3693 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3694 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3695 smp_mb__after_atomic();
3701 clear_bit(WORK_ENABLE, &tp->flags);
3702 usb_kill_urb(tp->intr_urb);
3704 tp->rtl_ops.autosuspend_en(tp, true);
3706 if (netif_carrier_ok(netdev)) {
3707 struct napi_struct *napi = &tp->napi;
3711 rxdy_gated_en(tp, false);
3712 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3721 static int rtl8152_system_suspend(struct r8152 *tp)
3723 struct net_device *netdev = tp->netdev;
3726 netif_device_detach(netdev);
3728 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3729 struct napi_struct *napi = &tp->napi;
3731 clear_bit(WORK_ENABLE, &tp->flags);
3732 usb_kill_urb(tp->intr_urb);
3734 cancel_delayed_work_sync(&tp->schedule);
3735 tp->rtl_ops.down(tp);
3742 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3744 struct r8152 *tp = usb_get_intfdata(intf);
3747 mutex_lock(&tp->control);
3749 if (PMSG_IS_AUTO(message))
3750 ret = rtl8152_runtime_suspend(tp);
3752 ret = rtl8152_system_suspend(tp);
3754 mutex_unlock(&tp->control);
3759 static int rtl8152_resume(struct usb_interface *intf)
3761 struct r8152 *tp = usb_get_intfdata(intf);
3762 struct net_device *netdev = tp->netdev;
3764 mutex_lock(&tp->control);
3766 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3767 tp->rtl_ops.init(tp);
3768 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3769 netif_device_attach(netdev);
3772 if (netif_running(netdev) && netdev->flags & IFF_UP) {
3773 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3774 struct napi_struct *napi = &tp->napi;
3776 tp->rtl_ops.autosuspend_en(tp, false);
3778 set_bit(WORK_ENABLE, &tp->flags);
3779 if (netif_carrier_ok(netdev)) {
3780 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3783 netif_carrier_off(netdev);
3784 tp->rtl_ops.disable(tp);
3785 netif_info(tp, link, netdev,
3790 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3791 smp_mb__after_atomic();
3792 if (!list_empty(&tp->rx_done))
3793 napi_schedule(&tp->napi);
3796 netif_carrier_off(netdev);
3797 set_bit(WORK_ENABLE, &tp->flags);
3799 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3800 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3801 if (netdev->flags & IFF_UP)
3802 tp->rtl_ops.autosuspend_en(tp, false);
3803 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3806 mutex_unlock(&tp->control);
3811 static int rtl8152_reset_resume(struct usb_interface *intf)
3813 struct r8152 *tp = usb_get_intfdata(intf);
3815 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3816 return rtl8152_resume(intf);
3819 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3821 struct r8152 *tp = netdev_priv(dev);
3823 if (usb_autopm_get_interface(tp->intf) < 0)
3826 if (!rtl_can_wakeup(tp)) {
3830 mutex_lock(&tp->control);
3831 wol->supported = WAKE_ANY;
3832 wol->wolopts = __rtl_get_wol(tp);
3833 mutex_unlock(&tp->control);
3836 usb_autopm_put_interface(tp->intf);
3839 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3841 struct r8152 *tp = netdev_priv(dev);
3844 if (!rtl_can_wakeup(tp))
3847 ret = usb_autopm_get_interface(tp->intf);
3851 mutex_lock(&tp->control);
3853 __rtl_set_wol(tp, wol->wolopts);
3854 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3856 mutex_unlock(&tp->control);
3858 usb_autopm_put_interface(tp->intf);
3864 static u32 rtl8152_get_msglevel(struct net_device *dev)
3866 struct r8152 *tp = netdev_priv(dev);
3868 return tp->msg_enable;
3871 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3873 struct r8152 *tp = netdev_priv(dev);
3875 tp->msg_enable = value;
3878 static void rtl8152_get_drvinfo(struct net_device *netdev,
3879 struct ethtool_drvinfo *info)
3881 struct r8152 *tp = netdev_priv(netdev);
3883 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3884 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3885 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3889 int rtl8152_get_link_ksettings(struct net_device *netdev,
3890 struct ethtool_link_ksettings *cmd)
3892 struct r8152 *tp = netdev_priv(netdev);
3895 if (!tp->mii.mdio_read)
3898 ret = usb_autopm_get_interface(tp->intf);
3902 mutex_lock(&tp->control);
3904 mii_ethtool_get_link_ksettings(&tp->mii, cmd);
3906 mutex_unlock(&tp->control);
3908 usb_autopm_put_interface(tp->intf);
3914 static int rtl8152_set_link_ksettings(struct net_device *dev,
3915 const struct ethtool_link_ksettings *cmd)
3917 struct r8152 *tp = netdev_priv(dev);
3920 ret = usb_autopm_get_interface(tp->intf);
3924 mutex_lock(&tp->control);
3926 ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
3929 tp->autoneg = cmd->base.autoneg;
3930 tp->speed = cmd->base.speed;
3931 tp->duplex = cmd->base.duplex;
3934 mutex_unlock(&tp->control);
3936 usb_autopm_put_interface(tp->intf);
3942 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3949 "tx_single_collisions",
3950 "tx_multi_collisions",
3958 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3962 return ARRAY_SIZE(rtl8152_gstrings);
3968 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3969 struct ethtool_stats *stats, u64 *data)
3971 struct r8152 *tp = netdev_priv(dev);
3972 struct tally_counter tally;
3974 if (usb_autopm_get_interface(tp->intf) < 0)
3977 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3979 usb_autopm_put_interface(tp->intf);
3981 data[0] = le64_to_cpu(tally.tx_packets);
3982 data[1] = le64_to_cpu(tally.rx_packets);
3983 data[2] = le64_to_cpu(tally.tx_errors);
3984 data[3] = le32_to_cpu(tally.rx_errors);
3985 data[4] = le16_to_cpu(tally.rx_missed);
3986 data[5] = le16_to_cpu(tally.align_errors);
3987 data[6] = le32_to_cpu(tally.tx_one_collision);
3988 data[7] = le32_to_cpu(tally.tx_multi_collision);
3989 data[8] = le64_to_cpu(tally.rx_unicast);
3990 data[9] = le64_to_cpu(tally.rx_broadcast);
3991 data[10] = le32_to_cpu(tally.rx_multicast);
3992 data[11] = le16_to_cpu(tally.tx_aborted);
3993 data[12] = le16_to_cpu(tally.tx_underrun);
3996 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3998 switch (stringset) {
4000 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
4005 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4007 u32 ocp_data, lp, adv, supported = 0;
4010 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
4011 supported = mmd_eee_cap_to_ethtool_sup_t(val);
4013 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
4014 adv = mmd_eee_adv_to_ethtool_adv_t(val);
4016 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
4017 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4019 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4020 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4022 eee->eee_enabled = !!ocp_data;
4023 eee->eee_active = !!(supported & adv & lp);
4024 eee->supported = supported;
4025 eee->advertised = adv;
4026 eee->lp_advertised = lp;
4031 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4033 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4035 r8152_eee_en(tp, eee->eee_enabled);
4037 if (!eee->eee_enabled)
4040 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
4045 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4047 u32 ocp_data, lp, adv, supported = 0;
4050 val = ocp_reg_read(tp, OCP_EEE_ABLE);
4051 supported = mmd_eee_cap_to_ethtool_sup_t(val);
4053 val = ocp_reg_read(tp, OCP_EEE_ADV);
4054 adv = mmd_eee_adv_to_ethtool_adv_t(val);
4056 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
4057 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4059 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4060 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4062 eee->eee_enabled = !!ocp_data;
4063 eee->eee_active = !!(supported & adv & lp);
4064 eee->supported = supported;
4065 eee->advertised = adv;
4066 eee->lp_advertised = lp;
4071 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4073 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4075 r8153_eee_en(tp, eee->eee_enabled);
4077 if (!eee->eee_enabled)
4080 ocp_reg_write(tp, OCP_EEE_ADV, val);
4086 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4088 struct r8152 *tp = netdev_priv(net);
4091 ret = usb_autopm_get_interface(tp->intf);
4095 mutex_lock(&tp->control);
4097 ret = tp->rtl_ops.eee_get(tp, edata);
4099 mutex_unlock(&tp->control);
4101 usb_autopm_put_interface(tp->intf);
4108 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4110 struct r8152 *tp = netdev_priv(net);
4113 ret = usb_autopm_get_interface(tp->intf);
4117 mutex_lock(&tp->control);
4119 ret = tp->rtl_ops.eee_set(tp, edata);
4121 ret = mii_nway_restart(&tp->mii);
4123 mutex_unlock(&tp->control);
4125 usb_autopm_put_interface(tp->intf);
4131 static int rtl8152_nway_reset(struct net_device *dev)
4133 struct r8152 *tp = netdev_priv(dev);
4136 ret = usb_autopm_get_interface(tp->intf);
4140 mutex_lock(&tp->control);
4142 ret = mii_nway_restart(&tp->mii);
4144 mutex_unlock(&tp->control);
4146 usb_autopm_put_interface(tp->intf);
4152 static int rtl8152_get_coalesce(struct net_device *netdev,
4153 struct ethtool_coalesce *coalesce)
4155 struct r8152 *tp = netdev_priv(netdev);
4157 switch (tp->version) {
4165 coalesce->rx_coalesce_usecs = tp->coalesce;
4170 static int rtl8152_set_coalesce(struct net_device *netdev,
4171 struct ethtool_coalesce *coalesce)
4173 struct r8152 *tp = netdev_priv(netdev);
4176 switch (tp->version) {
4184 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4187 ret = usb_autopm_get_interface(tp->intf);
4191 mutex_lock(&tp->control);
4193 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4194 tp->coalesce = coalesce->rx_coalesce_usecs;
4196 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4197 r8153_set_rx_early_timeout(tp);
4200 mutex_unlock(&tp->control);
4202 usb_autopm_put_interface(tp->intf);
4207 static const struct ethtool_ops ops = {
4208 .get_drvinfo = rtl8152_get_drvinfo,
4209 .get_link = ethtool_op_get_link,
4210 .nway_reset = rtl8152_nway_reset,
4211 .get_msglevel = rtl8152_get_msglevel,
4212 .set_msglevel = rtl8152_set_msglevel,
4213 .get_wol = rtl8152_get_wol,
4214 .set_wol = rtl8152_set_wol,
4215 .get_strings = rtl8152_get_strings,
4216 .get_sset_count = rtl8152_get_sset_count,
4217 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4218 .get_coalesce = rtl8152_get_coalesce,
4219 .set_coalesce = rtl8152_set_coalesce,
4220 .get_eee = rtl_ethtool_get_eee,
4221 .set_eee = rtl_ethtool_set_eee,
4222 .get_link_ksettings = rtl8152_get_link_ksettings,
4223 .set_link_ksettings = rtl8152_set_link_ksettings,
4226 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4228 struct r8152 *tp = netdev_priv(netdev);
4229 struct mii_ioctl_data *data = if_mii(rq);
4232 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4235 res = usb_autopm_get_interface(tp->intf);
4241 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4245 mutex_lock(&tp->control);
4246 data->val_out = r8152_mdio_read(tp, data->reg_num);
4247 mutex_unlock(&tp->control);
4251 if (!capable(CAP_NET_ADMIN)) {
4255 mutex_lock(&tp->control);
4256 r8152_mdio_write(tp, data->reg_num, data->val_in);
4257 mutex_unlock(&tp->control);
4264 usb_autopm_put_interface(tp->intf);
4270 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4272 struct r8152 *tp = netdev_priv(dev);
4275 switch (tp->version) {
4284 ret = usb_autopm_get_interface(tp->intf);
4288 mutex_lock(&tp->control);
4292 if (netif_running(dev)) {
4293 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4295 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4297 if (netif_carrier_ok(dev))
4298 r8153_set_rx_early_size(tp);
4301 mutex_unlock(&tp->control);
4303 usb_autopm_put_interface(tp->intf);
4308 static const struct net_device_ops rtl8152_netdev_ops = {
4309 .ndo_open = rtl8152_open,
4310 .ndo_stop = rtl8152_close,
4311 .ndo_do_ioctl = rtl8152_ioctl,
4312 .ndo_start_xmit = rtl8152_start_xmit,
4313 .ndo_tx_timeout = rtl8152_tx_timeout,
4314 .ndo_set_features = rtl8152_set_features,
4315 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4316 .ndo_set_mac_address = rtl8152_set_mac_address,
4317 .ndo_change_mtu = rtl8152_change_mtu,
4318 .ndo_validate_addr = eth_validate_addr,
4319 .ndo_features_check = rtl8152_features_check,
4322 static void rtl8152_unload(struct r8152 *tp)
4324 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4327 if (tp->version != RTL_VER_01)
4328 r8152_power_cut_en(tp, true);
4331 static void rtl8153_unload(struct r8152 *tp)
4333 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4336 r8153_power_cut_en(tp, false);
4339 static int rtl_ops_init(struct r8152 *tp)
4341 struct rtl_ops *ops = &tp->rtl_ops;
4344 switch (tp->version) {
4347 ops->init = r8152b_init;
4348 ops->enable = rtl8152_enable;
4349 ops->disable = rtl8152_disable;
4350 ops->up = rtl8152_up;
4351 ops->down = rtl8152_down;
4352 ops->unload = rtl8152_unload;
4353 ops->eee_get = r8152_get_eee;
4354 ops->eee_set = r8152_set_eee;
4355 ops->in_nway = rtl8152_in_nway;
4356 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4357 ops->autosuspend_en = rtl_runtime_suspend_enable;
4364 ops->init = r8153_init;
4365 ops->enable = rtl8153_enable;
4366 ops->disable = rtl8153_disable;
4367 ops->up = rtl8153_up;
4368 ops->down = rtl8153_down;
4369 ops->unload = rtl8153_unload;
4370 ops->eee_get = r8153_get_eee;
4371 ops->eee_set = r8153_set_eee;
4372 ops->in_nway = rtl8153_in_nway;
4373 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4374 ops->autosuspend_en = rtl8153_runtime_enable;
4379 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4386 static u8 rtl_get_version(struct usb_interface *intf)
4388 struct usb_device *udev = interface_to_usbdev(intf);
4394 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
4398 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
4399 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
4400 PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
4402 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
4408 version = RTL_VER_01;
4411 version = RTL_VER_02;
4414 version = RTL_VER_03;
4417 version = RTL_VER_04;
4420 version = RTL_VER_05;
4423 version = RTL_VER_06;
4426 version = RTL_VER_UNKNOWN;
4427 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
4434 static int rtl8152_probe(struct usb_interface *intf,
4435 const struct usb_device_id *id)
4437 struct usb_device *udev = interface_to_usbdev(intf);
4438 u8 version = rtl_get_version(intf);
4440 struct net_device *netdev;
4443 if (version == RTL_VER_UNKNOWN)
4446 if (udev->actconfig->desc.bConfigurationValue != 1) {
4447 usb_driver_set_configuration(udev, 1);
4451 usb_reset_device(udev);
4452 netdev = alloc_etherdev(sizeof(struct r8152));
4454 dev_err(&intf->dev, "Out of memory\n");
4458 SET_NETDEV_DEV(netdev, &intf->dev);
4459 tp = netdev_priv(netdev);
4460 tp->msg_enable = 0x7FFF;
4463 tp->netdev = netdev;
4465 tp->version = version;
4470 tp->mii.supports_gmii = 0;
4473 tp->mii.supports_gmii = 1;
4477 ret = rtl_ops_init(tp);
4481 mutex_init(&tp->control);
4482 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4483 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4485 netdev->netdev_ops = &rtl8152_netdev_ops;
4486 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4488 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4489 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4490 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4491 NETIF_F_HW_VLAN_CTAG_TX;
4492 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4493 NETIF_F_TSO | NETIF_F_FRAGLIST |
4494 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4495 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4496 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4497 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4498 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4500 if (tp->version == RTL_VER_01) {
4501 netdev->features &= ~NETIF_F_RXCSUM;
4502 netdev->hw_features &= ~NETIF_F_RXCSUM;
4505 netdev->ethtool_ops = &ops;
4506 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4508 /* MTU range: 68 - 1500 or 9194 */
4509 netdev->min_mtu = ETH_MIN_MTU;
4510 switch (tp->version) {
4513 netdev->max_mtu = ETH_DATA_LEN;
4516 netdev->max_mtu = RTL8153_MAX_MTU;
4520 tp->mii.dev = netdev;
4521 tp->mii.mdio_read = read_mii_word;
4522 tp->mii.mdio_write = write_mii_word;
4523 tp->mii.phy_id_mask = 0x3f;
4524 tp->mii.reg_num_mask = 0x1f;
4525 tp->mii.phy_id = R8152_PHY_ID;
4527 switch (udev->speed) {
4528 case USB_SPEED_SUPER:
4529 case USB_SPEED_SUPER_PLUS:
4530 tp->coalesce = COALESCE_SUPER;
4532 case USB_SPEED_HIGH:
4533 tp->coalesce = COALESCE_HIGH;
4536 tp->coalesce = COALESCE_SLOW;
4540 tp->autoneg = AUTONEG_ENABLE;
4541 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4542 tp->duplex = DUPLEX_FULL;
4544 intf->needs_remote_wakeup = 1;
4546 tp->rtl_ops.init(tp);
4547 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4548 set_ethernet_addr(tp);
4550 usb_set_intfdata(intf, tp);
4551 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4553 ret = register_netdev(netdev);
4555 netif_err(tp, probe, netdev, "couldn't register the device\n");
4559 if (!rtl_can_wakeup(tp))
4560 __rtl_set_wol(tp, 0);
4562 tp->saved_wolopts = __rtl_get_wol(tp);
4563 if (tp->saved_wolopts)
4564 device_set_wakeup_enable(&udev->dev, true);
4566 device_set_wakeup_enable(&udev->dev, false);
4568 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4573 netif_napi_del(&tp->napi);
4574 usb_set_intfdata(intf, NULL);
4576 free_netdev(netdev);
4580 static void rtl8152_disconnect(struct usb_interface *intf)
4582 struct r8152 *tp = usb_get_intfdata(intf);
4584 usb_set_intfdata(intf, NULL);
4586 struct usb_device *udev = tp->udev;
4588 if (udev->state == USB_STATE_NOTATTACHED)
4589 set_bit(RTL8152_UNPLUG, &tp->flags);
4591 netif_napi_del(&tp->napi);
4592 unregister_netdev(tp->netdev);
4593 cancel_delayed_work_sync(&tp->hw_phy_work);
4594 tp->rtl_ops.unload(tp);
4595 free_netdev(tp->netdev);
4599 #define REALTEK_USB_DEVICE(vend, prod) \
4600 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4601 USB_DEVICE_ID_MATCH_INT_CLASS, \
4602 .idVendor = (vend), \
4603 .idProduct = (prod), \
4604 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4607 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4608 USB_DEVICE_ID_MATCH_DEVICE, \
4609 .idVendor = (vend), \
4610 .idProduct = (prod), \
4611 .bInterfaceClass = USB_CLASS_COMM, \
4612 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4613 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4615 /* table of devices that work with this driver */
4616 static struct usb_device_id rtl8152_table[] = {
4617 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4618 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4619 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
4620 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
4621 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4622 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4623 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
4624 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
4625 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4626 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
4627 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
4628 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4632 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4634 static struct usb_driver rtl8152_driver = {
4636 .id_table = rtl8152_table,
4637 .probe = rtl8152_probe,
4638 .disconnect = rtl8152_disconnect,
4639 .suspend = rtl8152_suspend,
4640 .resume = rtl8152_resume,
4641 .reset_resume = rtl8152_reset_resume,
4642 .pre_reset = rtl8152_pre_reset,
4643 .post_reset = rtl8152_post_reset,
4644 .supports_autosuspend = 1,
4645 .disable_hub_initiated_lpm = 1,
4648 module_usb_driver(rtl8152_driver);
4650 MODULE_AUTHOR(DRIVER_AUTHOR);
4651 MODULE_DESCRIPTION(DRIVER_DESC);
4652 MODULE_LICENSE("GPL");
4653 MODULE_VERSION(DRIVER_VERSION);