1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
6 #include <linux/signal.h>
7 #include <linux/slab.h>
8 #include <linux/module.h>
9 #include <linux/netdevice.h>
10 #include <linux/etherdevice.h>
11 #include <linux/mii.h>
12 #include <linux/ethtool.h>
13 #include <linux/usb.h>
14 #include <linux/crc32.h>
15 #include <linux/if_vlan.h>
16 #include <linux/uaccess.h>
17 #include <linux/list.h>
19 #include <linux/ipv6.h>
20 #include <net/ip6_checksum.h>
21 #include <uapi/linux/mdio.h>
22 #include <linux/mdio.h>
23 #include <linux/usb/cdc.h>
24 #include <linux/suspend.h>
25 #include <linux/atomic.h>
26 #include <linux/acpi.h>
28 /* Information for net-next */
29 #define NETNEXT_VERSION "10"
31 /* Information for net */
32 #define NET_VERSION "10"
34 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
35 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
36 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
37 #define MODULENAME "r8152"
39 #define R8152_PHY_ID 32
41 #define PLA_IDR 0xc000
42 #define PLA_RCR 0xc010
43 #define PLA_RMS 0xc016
44 #define PLA_RXFIFO_CTRL0 0xc0a0
45 #define PLA_RXFIFO_CTRL1 0xc0a4
46 #define PLA_RXFIFO_CTRL2 0xc0a8
47 #define PLA_DMY_REG0 0xc0b0
48 #define PLA_FMC 0xc0b4
49 #define PLA_CFG_WOL 0xc0b6
50 #define PLA_TEREDO_CFG 0xc0bc
51 #define PLA_TEREDO_WAKE_BASE 0xc0c4
52 #define PLA_MAR 0xcd00
53 #define PLA_BACKUP 0xd000
54 #define PLA_BDC_CR 0xd1a0
55 #define PLA_TEREDO_TIMER 0xd2cc
56 #define PLA_REALWOW_TIMER 0xd2e8
57 #define PLA_SUSPEND_FLAG 0xd38a
58 #define PLA_INDICATE_FALG 0xd38c
59 #define PLA_EXTRA_STATUS 0xd398
60 #define PLA_EFUSE_DATA 0xdd00
61 #define PLA_EFUSE_CMD 0xdd02
62 #define PLA_LEDSEL 0xdd90
63 #define PLA_LED_FEATURE 0xdd92
64 #define PLA_PHYAR 0xde00
65 #define PLA_BOOT_CTRL 0xe004
66 #define PLA_GPHY_INTR_IMR 0xe022
67 #define PLA_EEE_CR 0xe040
68 #define PLA_EEEP_CR 0xe080
69 #define PLA_MAC_PWR_CTRL 0xe0c0
70 #define PLA_MAC_PWR_CTRL2 0xe0ca
71 #define PLA_MAC_PWR_CTRL3 0xe0cc
72 #define PLA_MAC_PWR_CTRL4 0xe0ce
73 #define PLA_WDT6_CTRL 0xe428
74 #define PLA_TCR0 0xe610
75 #define PLA_TCR1 0xe612
76 #define PLA_MTPS 0xe615
77 #define PLA_TXFIFO_CTRL 0xe618
78 #define PLA_RSTTALLY 0xe800
80 #define PLA_CRWECR 0xe81c
81 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
82 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
83 #define PLA_CONFIG5 0xe822
84 #define PLA_PHY_PWR 0xe84c
85 #define PLA_OOB_CTRL 0xe84f
86 #define PLA_CPCR 0xe854
87 #define PLA_MISC_0 0xe858
88 #define PLA_MISC_1 0xe85a
89 #define PLA_OCP_GPHY_BASE 0xe86c
90 #define PLA_TALLYCNT 0xe890
91 #define PLA_SFF_STS_7 0xe8de
92 #define PLA_PHYSTATUS 0xe908
93 #define PLA_BP_BA 0xfc26
94 #define PLA_BP_0 0xfc28
95 #define PLA_BP_1 0xfc2a
96 #define PLA_BP_2 0xfc2c
97 #define PLA_BP_3 0xfc2e
98 #define PLA_BP_4 0xfc30
99 #define PLA_BP_5 0xfc32
100 #define PLA_BP_6 0xfc34
101 #define PLA_BP_7 0xfc36
102 #define PLA_BP_EN 0xfc38
104 #define USB_USB2PHY 0xb41e
105 #define USB_SSPHYLINK2 0xb428
106 #define USB_U2P3_CTRL 0xb460
107 #define USB_CSR_DUMMY1 0xb464
108 #define USB_CSR_DUMMY2 0xb466
109 #define USB_DEV_STAT 0xb808
110 #define USB_CONNECT_TIMER 0xcbf8
111 #define USB_MSC_TIMER 0xcbfc
112 #define USB_BURST_SIZE 0xcfc0
113 #define USB_LPM_CONFIG 0xcfd8
114 #define USB_USB_CTRL 0xd406
115 #define USB_PHY_CTRL 0xd408
116 #define USB_TX_AGG 0xd40a
117 #define USB_RX_BUF_TH 0xd40c
118 #define USB_USB_TIMER 0xd428
119 #define USB_RX_EARLY_TIMEOUT 0xd42c
120 #define USB_RX_EARLY_SIZE 0xd42e
121 #define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
122 #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
123 #define USB_TX_DMA 0xd434
124 #define USB_UPT_RXDMA_OWN 0xd437
125 #define USB_TOLERANCE 0xd490
126 #define USB_LPM_CTRL 0xd41a
127 #define USB_BMU_RESET 0xd4b0
128 #define USB_U1U2_TIMER 0xd4da
129 #define USB_UPS_CTRL 0xd800
130 #define USB_POWER_CUT 0xd80a
131 #define USB_MISC_0 0xd81a
132 #define USB_MISC_1 0xd81f
133 #define USB_AFE_CTRL2 0xd824
134 #define USB_UPS_CFG 0xd842
135 #define USB_UPS_FLAGS 0xd848
136 #define USB_WDT11_CTRL 0xe43c
137 #define USB_BP_BA 0xfc26
138 #define USB_BP_0 0xfc28
139 #define USB_BP_1 0xfc2a
140 #define USB_BP_2 0xfc2c
141 #define USB_BP_3 0xfc2e
142 #define USB_BP_4 0xfc30
143 #define USB_BP_5 0xfc32
144 #define USB_BP_6 0xfc34
145 #define USB_BP_7 0xfc36
146 #define USB_BP_EN 0xfc38
147 #define USB_BP_8 0xfc38
148 #define USB_BP_9 0xfc3a
149 #define USB_BP_10 0xfc3c
150 #define USB_BP_11 0xfc3e
151 #define USB_BP_12 0xfc40
152 #define USB_BP_13 0xfc42
153 #define USB_BP_14 0xfc44
154 #define USB_BP_15 0xfc46
155 #define USB_BP2_EN 0xfc48
158 #define OCP_ALDPS_CONFIG 0x2010
159 #define OCP_EEE_CONFIG1 0x2080
160 #define OCP_EEE_CONFIG2 0x2092
161 #define OCP_EEE_CONFIG3 0x2094
162 #define OCP_BASE_MII 0xa400
163 #define OCP_EEE_AR 0xa41a
164 #define OCP_EEE_DATA 0xa41c
165 #define OCP_PHY_STATUS 0xa420
166 #define OCP_NCTL_CFG 0xa42c
167 #define OCP_POWER_CFG 0xa430
168 #define OCP_EEE_CFG 0xa432
169 #define OCP_SRAM_ADDR 0xa436
170 #define OCP_SRAM_DATA 0xa438
171 #define OCP_DOWN_SPEED 0xa442
172 #define OCP_EEE_ABLE 0xa5c4
173 #define OCP_EEE_ADV 0xa5d0
174 #define OCP_EEE_LPABLE 0xa5d2
175 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
176 #define OCP_PHY_PATCH_STAT 0xb800
177 #define OCP_PHY_PATCH_CMD 0xb820
178 #define OCP_ADC_IOFFSET 0xbcfc
179 #define OCP_ADC_CFG 0xbc06
180 #define OCP_SYSCLK_CFG 0xc416
183 #define SRAM_GREEN_CFG 0x8011
184 #define SRAM_LPF_CFG 0x8012
185 #define SRAM_10M_AMP1 0x8080
186 #define SRAM_10M_AMP2 0x8082
187 #define SRAM_IMPEDANCE 0x8084
190 #define RCR_AAP 0x00000001
191 #define RCR_APM 0x00000002
192 #define RCR_AM 0x00000004
193 #define RCR_AB 0x00000008
194 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
196 /* PLA_RXFIFO_CTRL0 */
197 #define RXFIFO_THR1_NORMAL 0x00080002
198 #define RXFIFO_THR1_OOB 0x01800003
200 /* PLA_RXFIFO_CTRL1 */
201 #define RXFIFO_THR2_FULL 0x00000060
202 #define RXFIFO_THR2_HIGH 0x00000038
203 #define RXFIFO_THR2_OOB 0x0000004a
204 #define RXFIFO_THR2_NORMAL 0x00a0
206 /* PLA_RXFIFO_CTRL2 */
207 #define RXFIFO_THR3_FULL 0x00000078
208 #define RXFIFO_THR3_HIGH 0x00000048
209 #define RXFIFO_THR3_OOB 0x0000005a
210 #define RXFIFO_THR3_NORMAL 0x0110
212 /* PLA_TXFIFO_CTRL */
213 #define TXFIFO_THR_NORMAL 0x00400008
214 #define TXFIFO_THR_NORMAL2 0x01000008
217 #define ECM_ALDPS 0x0002
220 #define FMC_FCR_MCU_EN 0x0001
223 #define EEEP_CR_EEEP_TX 0x0002
226 #define WDT6_SET_MODE 0x0010
229 #define TCR0_TX_EMPTY 0x0800
230 #define TCR0_AUTO_FIFO 0x0080
233 #define VERSION_MASK 0x7cf0
236 #define MTPS_JUMBO (12 * 1024 / 64)
237 #define MTPS_DEFAULT (6 * 1024 / 64)
240 #define TALLY_RESET 0x0001
248 #define CRWECR_NORAML 0x00
249 #define CRWECR_CONFIG 0xc0
252 #define NOW_IS_OOB 0x80
253 #define TXFIFO_EMPTY 0x20
254 #define RXFIFO_EMPTY 0x10
255 #define LINK_LIST_READY 0x02
256 #define DIS_MCU_CLROOB 0x01
257 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
260 #define RXDY_GATED_EN 0x0008
263 #define RE_INIT_LL 0x8000
264 #define MCU_BORW_EN 0x4000
267 #define CPCR_RX_VLAN 0x0040
270 #define MAGIC_EN 0x0001
273 #define TEREDO_SEL 0x8000
274 #define TEREDO_WAKE_MASK 0x7f00
275 #define TEREDO_RS_EVENT_MASK 0x00fe
276 #define OOB_TEREDO_EN 0x0001
279 #define ALDPS_PROXY_MODE 0x0001
282 #define EFUSE_READ_CMD BIT(15)
283 #define EFUSE_DATA_BIT16 BIT(7)
286 #define LINK_ON_WAKE_EN 0x0010
287 #define LINK_OFF_WAKE_EN 0x0008
290 #define BWF_EN 0x0040
291 #define MWF_EN 0x0020
292 #define UWF_EN 0x0010
293 #define LAN_WAKE_EN 0x0002
295 /* PLA_LED_FEATURE */
296 #define LED_MODE_MASK 0x0700
299 #define TX_10M_IDLE_EN 0x0080
300 #define PFM_PWM_SWITCH 0x0040
302 /* PLA_MAC_PWR_CTRL */
303 #define D3_CLK_GATED_EN 0x00004000
304 #define MCU_CLK_RATIO 0x07010f07
305 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
306 #define ALDPS_SPDWN_RATIO 0x0f87
308 /* PLA_MAC_PWR_CTRL2 */
309 #define EEE_SPDWN_RATIO 0x8007
310 #define MAC_CLK_SPDWN_EN BIT(15)
312 /* PLA_MAC_PWR_CTRL3 */
313 #define PKT_AVAIL_SPDWN_EN 0x0100
314 #define SUSPEND_SPDWN_EN 0x0004
315 #define U1U2_SPDWN_EN 0x0002
316 #define L1_SPDWN_EN 0x0001
318 /* PLA_MAC_PWR_CTRL4 */
319 #define PWRSAVE_SPDWN_EN 0x1000
320 #define RXDV_SPDWN_EN 0x0800
321 #define TX10MIDLE_EN 0x0100
322 #define TP100_SPDWN_EN 0x0020
323 #define TP500_SPDWN_EN 0x0010
324 #define TP1000_SPDWN_EN 0x0008
325 #define EEE_SPDWN_EN 0x0001
327 /* PLA_GPHY_INTR_IMR */
328 #define GPHY_STS_MSK 0x0001
329 #define SPEED_DOWN_MSK 0x0002
330 #define SPDWN_RXDV_MSK 0x0004
331 #define SPDWN_LINKCHG_MSK 0x0008
334 #define PHYAR_FLAG 0x80000000
337 #define EEE_RX_EN 0x0001
338 #define EEE_TX_EN 0x0002
341 #define AUTOLOAD_DONE 0x0002
343 /* PLA_SUSPEND_FLAG */
344 #define LINK_CHG_EVENT BIT(0)
346 /* PLA_INDICATE_FALG */
347 #define UPCOMING_RUNTIME_D3 BIT(0)
349 /* PLA_EXTRA_STATUS */
350 #define LINK_CHANGE_FLAG BIT(8)
353 #define USB2PHY_SUSPEND 0x0001
354 #define USB2PHY_L1 0x0002
357 #define pwd_dn_scale_mask 0x3ffe
358 #define pwd_dn_scale(x) ((x) << 1)
361 #define DYNAMIC_BURST 0x0001
364 #define EP4_FULL_FC 0x0001
367 #define STAT_SPEED_MASK 0x0006
368 #define STAT_SPEED_HIGH 0x0000
369 #define STAT_SPEED_FULL 0x0002
372 #define LPM_U1U2_EN BIT(0)
375 #define TX_AGG_MAX_THRESHOLD 0x03
378 #define RX_THR_SUPPER 0x0c350180
379 #define RX_THR_HIGH 0x7a120180
380 #define RX_THR_SLOW 0xffff0180
381 #define RX_THR_B 0x00010001
384 #define TEST_MODE_DISABLE 0x00000001
385 #define TX_SIZE_ADJUST1 0x00000100
388 #define BMU_RESET_EP_IN 0x01
389 #define BMU_RESET_EP_OUT 0x02
391 /* USB_UPT_RXDMA_OWN */
392 #define OWN_UPDATE BIT(0)
393 #define OWN_CLEAR BIT(1)
396 #define POWER_CUT 0x0100
398 /* USB_PM_CTRL_STATUS */
399 #define RESUME_INDICATE 0x0001
402 #define RX_AGG_DISABLE 0x0010
403 #define RX_ZERO_EN 0x0080
406 #define U2P3_ENABLE 0x0001
409 #define PWR_EN 0x0001
410 #define PHASE2_EN 0x0008
411 #define UPS_EN BIT(4)
412 #define USP_PREWAKE BIT(5)
415 #define PCUT_STATUS 0x0001
417 /* USB_RX_EARLY_TIMEOUT */
418 #define COALESCE_SUPER 85000U
419 #define COALESCE_HIGH 250000U
420 #define COALESCE_SLOW 524280U
423 #define TIMER11_EN 0x0001
426 /* bit 4 ~ 5: fifo empty boundary */
427 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
428 /* bit 2 ~ 3: LMP timer */
429 #define LPM_TIMER_MASK 0x0c
430 #define LPM_TIMER_500MS 0x04 /* 500 ms */
431 #define LPM_TIMER_500US 0x0c /* 500 us */
432 #define ROK_EXIT_LPM 0x02
435 #define SEN_VAL_MASK 0xf800
436 #define SEN_VAL_NORMAL 0xa000
437 #define SEL_RXIDLE 0x0100
440 #define SAW_CNT_1MS_MASK 0x0fff
443 #define UPS_FLAGS_R_TUNE BIT(0)
444 #define UPS_FLAGS_EN_10M_CKDIV BIT(1)
445 #define UPS_FLAGS_250M_CKDIV BIT(2)
446 #define UPS_FLAGS_EN_ALDPS BIT(3)
447 #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
448 #define UPS_FLAGS_SPEED_MASK (0xf << 16)
449 #define ups_flags_speed(x) ((x) << 16)
450 #define UPS_FLAGS_EN_EEE BIT(20)
451 #define UPS_FLAGS_EN_500M_EEE BIT(21)
452 #define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
453 #define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
454 #define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
455 #define UPS_FLAGS_EN_GREEN BIT(26)
456 #define UPS_FLAGS_EN_FLOW_CTR BIT(27)
470 /* OCP_ALDPS_CONFIG */
471 #define ENPWRSAVE 0x8000
472 #define ENPDNPS 0x0200
473 #define LINKENA 0x0100
474 #define DIS_SDSAVE 0x0010
477 #define PHY_STAT_MASK 0x0007
478 #define PHY_STAT_EXT_INIT 2
479 #define PHY_STAT_LAN_ON 3
480 #define PHY_STAT_PWRDN 5
483 #define PGA_RETURN_EN BIT(1)
486 #define EEE_CLKDIV_EN 0x8000
487 #define EN_ALDPS 0x0004
488 #define EN_10M_PLLOFF 0x0001
490 /* OCP_EEE_CONFIG1 */
491 #define RG_TXLPI_MSK_HFDUP 0x8000
492 #define RG_MATCLR_EN 0x4000
493 #define EEE_10_CAP 0x2000
494 #define EEE_NWAY_EN 0x1000
495 #define TX_QUIET_EN 0x0200
496 #define RX_QUIET_EN 0x0100
497 #define sd_rise_time_mask 0x0070
498 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
499 #define RG_RXLPI_MSK_HFDUP 0x0008
500 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
502 /* OCP_EEE_CONFIG2 */
503 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
504 #define RG_DACQUIET_EN 0x0400
505 #define RG_LDVQUIET_EN 0x0200
506 #define RG_CKRSEL 0x0020
507 #define RG_EEEPRG_EN 0x0010
509 /* OCP_EEE_CONFIG3 */
510 #define fast_snr_mask 0xff80
511 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
512 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
513 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
516 /* bit[15:14] function */
517 #define FUN_ADDR 0x0000
518 #define FUN_DATA 0x4000
519 /* bit[4:0] device addr */
522 #define CTAP_SHORT_EN 0x0040
523 #define EEE10_EN 0x0010
526 #define EN_EEE_CMODE BIT(14)
527 #define EN_EEE_1000 BIT(13)
528 #define EN_EEE_100 BIT(12)
529 #define EN_10M_CLKDIV BIT(11)
530 #define EN_10M_BGOFF 0x0080
533 #define TXDIS_STATE 0x01
534 #define ABD_STATE 0x02
536 /* OCP_PHY_PATCH_STAT */
537 #define PATCH_READY BIT(6)
539 /* OCP_PHY_PATCH_CMD */
540 #define PATCH_REQUEST BIT(4)
543 #define CKADSEL_L 0x0100
544 #define ADC_EN 0x0080
545 #define EN_EMI_L 0x0040
548 #define clk_div_expo(x) (min(x, 5) << 8)
551 #define GREEN_ETH_EN BIT(15)
552 #define R_TUNE_EN BIT(11)
555 #define LPF_AUTO_TUNE 0x8000
558 #define GDAC_IB_UPALL 0x0008
561 #define AMP_DN 0x0200
564 #define RX_DRIVING_MASK 0x6000
567 #define AD_MASK 0xfee0
568 #define BND_MASK 0x0004
569 #define BD_MASK 0x0001
571 #define PASS_THRU_MASK 0x1
573 enum rtl_register_content {
581 #define RTL8152_MAX_TX 4
582 #define RTL8152_MAX_RX 10
587 #define RTL8152_RX_MAX_PENDING 4096
588 #define RTL8152_RXFG_HEADSZ 256
590 #define INTR_LINK 0x0004
592 #define RTL8152_REQT_READ 0xc0
593 #define RTL8152_REQT_WRITE 0x40
594 #define RTL8152_REQ_GET_REGS 0x05
595 #define RTL8152_REQ_SET_REGS 0x05
597 #define BYTE_EN_DWORD 0xff
598 #define BYTE_EN_WORD 0x33
599 #define BYTE_EN_BYTE 0x11
600 #define BYTE_EN_SIX_BYTES 0x3f
601 #define BYTE_EN_START_MASK 0x0f
602 #define BYTE_EN_END_MASK 0xf0
604 #define RTL8153_MAX_PACKET 9216 /* 9K */
605 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \
607 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
608 #define RTL8153_RMS RTL8153_MAX_PACKET
609 #define RTL8152_TX_TIMEOUT (5 * HZ)
610 #define RTL8152_NAPI_WEIGHT 64
611 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \
612 sizeof(struct rx_desc) + RX_ALIGN)
627 /* Define these values to match your device */
628 #define VENDOR_ID_REALTEK 0x0bda
629 #define VENDOR_ID_MICROSOFT 0x045e
630 #define VENDOR_ID_SAMSUNG 0x04e8
631 #define VENDOR_ID_LENOVO 0x17ef
632 #define VENDOR_ID_LINKSYS 0x13b1
633 #define VENDOR_ID_NVIDIA 0x0955
634 #define VENDOR_ID_TPLINK 0x2357
636 #define MCU_TYPE_PLA 0x0100
637 #define MCU_TYPE_USB 0x0000
639 struct tally_counter {
646 __le32 tx_one_collision;
647 __le32 tx_multi_collision;
657 #define RX_LEN_MASK 0x7fff
660 #define RD_UDP_CS BIT(23)
661 #define RD_TCP_CS BIT(22)
662 #define RD_IPV6_CS BIT(20)
663 #define RD_IPV4_CS BIT(19)
666 #define IPF BIT(23) /* IP checksum fail */
667 #define UDPF BIT(22) /* UDP checksum fail */
668 #define TCPF BIT(21) /* TCP checksum fail */
669 #define RX_VLAN_TAG BIT(16)
678 #define TX_FS BIT(31) /* First segment of a packet */
679 #define TX_LS BIT(30) /* Final segment of a packet */
680 #define GTSENDV4 BIT(28)
681 #define GTSENDV6 BIT(27)
682 #define GTTCPHO_SHIFT 18
683 #define GTTCPHO_MAX 0x7fU
684 #define TX_LEN_MAX 0x3ffffU
687 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
688 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
689 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
690 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
692 #define MSS_MAX 0x7ffU
693 #define TCPHO_SHIFT 17
694 #define TCPHO_MAX 0x7ffU
695 #define TX_VLAN_TAG BIT(16)
701 struct list_head list, info_list;
703 struct r8152 *context;
709 struct list_head list;
711 struct r8152 *context;
720 struct usb_device *udev;
721 struct napi_struct napi;
722 struct usb_interface *intf;
723 struct net_device *netdev;
724 struct urb *intr_urb;
725 struct tx_agg tx_info[RTL8152_MAX_TX];
726 struct list_head rx_info, rx_used;
727 struct list_head rx_done, tx_free;
728 struct sk_buff_head tx_queue, rx_queue;
729 spinlock_t rx_lock, tx_lock;
730 struct delayed_work schedule, hw_phy_work;
731 struct mii_if_info mii;
732 struct mutex control; /* use for hw setting */
733 #ifdef CONFIG_PM_SLEEP
734 struct notifier_block pm_notifier;
736 struct tasklet_struct tx_tl;
739 void (*init)(struct r8152 *);
740 int (*enable)(struct r8152 *);
741 void (*disable)(struct r8152 *);
742 void (*up)(struct r8152 *);
743 void (*down)(struct r8152 *);
744 void (*unload)(struct r8152 *);
745 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
746 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
747 bool (*in_nway)(struct r8152 *);
748 void (*hw_phy_cfg)(struct r8152 *);
749 void (*autosuspend_en)(struct r8152 *tp, bool enable);
791 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
792 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
794 static const int multicast_filter_limit = 32;
795 static unsigned int agg_buf_sz = 16384;
797 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
798 VLAN_ETH_HLEN - ETH_FCS_LEN)
801 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
806 tmp = kmalloc(size, GFP_KERNEL);
810 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
811 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
812 value, index, tmp, size, 500);
814 memcpy(data, tmp, size);
821 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
826 tmp = kmemdup(data, size, GFP_KERNEL);
830 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
831 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
832 value, index, tmp, size, 500);
839 static void rtl_set_unplug(struct r8152 *tp)
841 if (tp->udev->state == USB_STATE_NOTATTACHED) {
842 set_bit(RTL8152_UNPLUG, &tp->flags);
843 smp_mb__after_atomic();
847 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
848 void *data, u16 type)
853 if (test_bit(RTL8152_UNPLUG, &tp->flags))
856 /* both size and indix must be 4 bytes align */
857 if ((size & 3) || !size || (index & 3) || !data)
860 if ((u32)index + (u32)size > 0xffff)
865 ret = get_registers(tp, index, type, limit, data);
873 ret = get_registers(tp, index, type, size, data);
890 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
891 u16 size, void *data, u16 type)
894 u16 byteen_start, byteen_end, byen;
897 if (test_bit(RTL8152_UNPLUG, &tp->flags))
900 /* both size and indix must be 4 bytes align */
901 if ((size & 3) || !size || (index & 3) || !data)
904 if ((u32)index + (u32)size > 0xffff)
907 byteen_start = byteen & BYTE_EN_START_MASK;
908 byteen_end = byteen & BYTE_EN_END_MASK;
910 byen = byteen_start | (byteen_start << 4);
911 ret = set_registers(tp, index, type | byen, 4, data);
924 ret = set_registers(tp, index,
925 type | BYTE_EN_DWORD,
934 ret = set_registers(tp, index,
935 type | BYTE_EN_DWORD,
947 byen = byteen_end | (byteen_end >> 4);
948 ret = set_registers(tp, index, type | byen, 4, data);
961 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
963 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
967 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
969 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
973 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
975 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
978 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
982 generic_ocp_read(tp, index, sizeof(data), &data, type);
984 return __le32_to_cpu(data);
987 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
989 __le32 tmp = __cpu_to_le32(data);
991 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
994 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
998 u16 byen = BYTE_EN_WORD;
999 u8 shift = index & 2;
1004 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
1006 data = __le32_to_cpu(tmp);
1007 data >>= (shift * 8);
1013 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
1017 u16 byen = BYTE_EN_WORD;
1018 u8 shift = index & 2;
1024 mask <<= (shift * 8);
1025 data <<= (shift * 8);
1029 tmp = __cpu_to_le32(data);
1031 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
1034 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
1038 u8 shift = index & 3;
1042 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
1044 data = __le32_to_cpu(tmp);
1045 data >>= (shift * 8);
1051 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
1055 u16 byen = BYTE_EN_BYTE;
1056 u8 shift = index & 3;
1062 mask <<= (shift * 8);
1063 data <<= (shift * 8);
1067 tmp = __cpu_to_le32(data);
1069 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
1072 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
1074 u16 ocp_base, ocp_index;
1076 ocp_base = addr & 0xf000;
1077 if (ocp_base != tp->ocp_base) {
1078 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
1079 tp->ocp_base = ocp_base;
1082 ocp_index = (addr & 0x0fff) | 0xb000;
1083 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
1086 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
1088 u16 ocp_base, ocp_index;
1090 ocp_base = addr & 0xf000;
1091 if (ocp_base != tp->ocp_base) {
1092 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
1093 tp->ocp_base = ocp_base;
1096 ocp_index = (addr & 0x0fff) | 0xb000;
1097 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
1100 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
1102 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
1105 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
1107 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
1110 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
1112 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
1113 ocp_reg_write(tp, OCP_SRAM_DATA, data);
1116 static u16 sram_read(struct r8152 *tp, u16 addr)
1118 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
1119 return ocp_reg_read(tp, OCP_SRAM_DATA);
1122 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
1124 struct r8152 *tp = netdev_priv(netdev);
1127 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1130 if (phy_id != R8152_PHY_ID)
1133 ret = r8152_mdio_read(tp, reg);
1139 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1141 struct r8152 *tp = netdev_priv(netdev);
1143 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1146 if (phy_id != R8152_PHY_ID)
1149 r8152_mdio_write(tp, reg, val);
1153 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1155 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1157 struct r8152 *tp = netdev_priv(netdev);
1158 struct sockaddr *addr = p;
1159 int ret = -EADDRNOTAVAIL;
1161 if (!is_valid_ether_addr(addr->sa_data))
1164 ret = usb_autopm_get_interface(tp->intf);
1168 mutex_lock(&tp->control);
1170 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1172 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1173 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1174 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1176 mutex_unlock(&tp->control);
1178 usb_autopm_put_interface(tp->intf);
1183 /* Devices containing proper chips can support a persistent
1184 * host system provided MAC address.
1185 * Examples of this are Dell TB15 and Dell WD15 docks
1187 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1190 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1191 union acpi_object *obj;
1194 unsigned char buf[6];
1196 /* test for -AD variant of RTL8153 */
1197 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1198 if ((ocp_data & AD_MASK) == 0x1000) {
1199 /* test for MAC address pass-through bit */
1200 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1201 if ((ocp_data & PASS_THRU_MASK) != 1) {
1202 netif_dbg(tp, probe, tp->netdev,
1203 "No efuse for RTL8153-AD MAC pass through\n");
1207 /* test for RTL8153-BND and RTL8153-BD */
1208 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_1);
1209 if ((ocp_data & BND_MASK) == 0 && (ocp_data & BD_MASK) == 0) {
1210 netif_dbg(tp, probe, tp->netdev,
1211 "Invalid variant for MAC pass through\n");
1216 /* returns _AUXMAC_#AABBCCDDEEFF# */
1217 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1218 obj = (union acpi_object *)buffer.pointer;
1219 if (!ACPI_SUCCESS(status))
1221 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1222 netif_warn(tp, probe, tp->netdev,
1223 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1224 obj->type, obj->string.length);
1227 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1228 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1229 netif_warn(tp, probe, tp->netdev,
1230 "Invalid header when reading pass-thru MAC addr\n");
1233 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1234 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1235 netif_warn(tp, probe, tp->netdev,
1236 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1241 memcpy(sa->sa_data, buf, 6);
1242 netif_info(tp, probe, tp->netdev,
1243 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1250 static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa)
1252 struct net_device *dev = tp->netdev;
1255 sa->sa_family = dev->type;
1257 if (tp->version == RTL_VER_01) {
1258 ret = pla_ocp_read(tp, PLA_IDR, 8, sa->sa_data);
1260 /* if device doesn't support MAC pass through this will
1261 * be expected to be non-zero
1263 ret = vendor_mac_passthru_addr_read(tp, sa);
1265 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa->sa_data);
1269 netif_err(tp, probe, dev, "Get ether addr fail\n");
1270 } else if (!is_valid_ether_addr(sa->sa_data)) {
1271 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1273 eth_hw_addr_random(dev);
1274 ether_addr_copy(sa->sa_data, dev->dev_addr);
1275 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1283 static int set_ethernet_addr(struct r8152 *tp)
1285 struct net_device *dev = tp->netdev;
1289 ret = determine_ethernet_addr(tp, &sa);
1293 if (tp->version == RTL_VER_01)
1294 ether_addr_copy(dev->dev_addr, sa.sa_data);
1296 ret = rtl8152_set_mac_address(dev, &sa);
1301 static void read_bulk_callback(struct urb *urb)
1303 struct net_device *netdev;
1304 int status = urb->status;
1307 unsigned long flags;
1317 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1320 if (!test_bit(WORK_ENABLE, &tp->flags))
1323 netdev = tp->netdev;
1325 /* When link down, the driver would cancel all bulks. */
1326 /* This avoid the re-submitting bulk */
1327 if (!netif_carrier_ok(netdev))
1330 usb_mark_last_busy(tp->udev);
1334 if (urb->actual_length < ETH_ZLEN)
1337 spin_lock_irqsave(&tp->rx_lock, flags);
1338 list_add_tail(&agg->list, &tp->rx_done);
1339 spin_unlock_irqrestore(&tp->rx_lock, flags);
1340 napi_schedule(&tp->napi);
1344 netif_device_detach(tp->netdev);
1347 return; /* the urb is in unlink state */
1349 if (net_ratelimit())
1350 netdev_warn(netdev, "maybe reset is needed?\n");
1353 if (net_ratelimit())
1354 netdev_warn(netdev, "Rx status %d\n", status);
1358 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1361 static void write_bulk_callback(struct urb *urb)
1363 struct net_device_stats *stats;
1364 struct net_device *netdev;
1367 unsigned long flags;
1368 int status = urb->status;
1378 netdev = tp->netdev;
1379 stats = &netdev->stats;
1381 if (net_ratelimit())
1382 netdev_warn(netdev, "Tx status %d\n", status);
1383 stats->tx_errors += agg->skb_num;
1385 stats->tx_packets += agg->skb_num;
1386 stats->tx_bytes += agg->skb_len;
1389 spin_lock_irqsave(&tp->tx_lock, flags);
1390 list_add_tail(&agg->list, &tp->tx_free);
1391 spin_unlock_irqrestore(&tp->tx_lock, flags);
1393 usb_autopm_put_interface_async(tp->intf);
1395 if (!netif_carrier_ok(netdev))
1398 if (!test_bit(WORK_ENABLE, &tp->flags))
1401 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1404 if (!skb_queue_empty(&tp->tx_queue))
1405 tasklet_schedule(&tp->tx_tl);
1408 static void intr_callback(struct urb *urb)
1412 int status = urb->status;
1419 if (!test_bit(WORK_ENABLE, &tp->flags))
1422 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1426 case 0: /* success */
1428 case -ECONNRESET: /* unlink */
1430 netif_device_detach(tp->netdev);
1434 netif_info(tp, intr, tp->netdev,
1435 "Stop submitting intr, status %d\n", status);
1438 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1440 /* -EPIPE: should clear the halt */
1442 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1446 d = urb->transfer_buffer;
1447 if (INTR_LINK & __le16_to_cpu(d[0])) {
1448 if (!netif_carrier_ok(tp->netdev)) {
1449 set_bit(RTL8152_LINK_CHG, &tp->flags);
1450 schedule_delayed_work(&tp->schedule, 0);
1453 if (netif_carrier_ok(tp->netdev)) {
1454 netif_stop_queue(tp->netdev);
1455 set_bit(RTL8152_LINK_CHG, &tp->flags);
1456 schedule_delayed_work(&tp->schedule, 0);
1461 res = usb_submit_urb(urb, GFP_ATOMIC);
1462 if (res == -ENODEV) {
1464 netif_device_detach(tp->netdev);
1466 netif_err(tp, intr, tp->netdev,
1467 "can't resubmit intr, status %d\n", res);
1471 static inline void *rx_agg_align(void *data)
1473 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1476 static inline void *tx_agg_align(void *data)
1478 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1481 static void free_rx_agg(struct r8152 *tp, struct rx_agg *agg)
1483 list_del(&agg->info_list);
1485 usb_free_urb(agg->urb);
1486 put_page(agg->page);
1489 atomic_dec(&tp->rx_count);
1492 static struct rx_agg *alloc_rx_agg(struct r8152 *tp, gfp_t mflags)
1494 struct net_device *netdev = tp->netdev;
1495 int node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1496 unsigned int order = get_order(tp->rx_buf_sz);
1497 struct rx_agg *rx_agg;
1498 unsigned long flags;
1500 rx_agg = kmalloc_node(sizeof(*rx_agg), mflags, node);
1504 rx_agg->page = alloc_pages(mflags | __GFP_COMP, order);
1508 rx_agg->buffer = page_address(rx_agg->page);
1510 rx_agg->urb = usb_alloc_urb(0, mflags);
1514 rx_agg->context = tp;
1516 INIT_LIST_HEAD(&rx_agg->list);
1517 INIT_LIST_HEAD(&rx_agg->info_list);
1518 spin_lock_irqsave(&tp->rx_lock, flags);
1519 list_add_tail(&rx_agg->info_list, &tp->rx_info);
1520 spin_unlock_irqrestore(&tp->rx_lock, flags);
1522 atomic_inc(&tp->rx_count);
1527 __free_pages(rx_agg->page, order);
1533 static void free_all_mem(struct r8152 *tp)
1535 struct rx_agg *agg, *agg_next;
1536 unsigned long flags;
1539 spin_lock_irqsave(&tp->rx_lock, flags);
1541 list_for_each_entry_safe(agg, agg_next, &tp->rx_info, info_list)
1542 free_rx_agg(tp, agg);
1544 spin_unlock_irqrestore(&tp->rx_lock, flags);
1546 WARN_ON(atomic_read(&tp->rx_count));
1548 for (i = 0; i < RTL8152_MAX_TX; i++) {
1549 usb_free_urb(tp->tx_info[i].urb);
1550 tp->tx_info[i].urb = NULL;
1552 kfree(tp->tx_info[i].buffer);
1553 tp->tx_info[i].buffer = NULL;
1554 tp->tx_info[i].head = NULL;
1557 usb_free_urb(tp->intr_urb);
1558 tp->intr_urb = NULL;
1560 kfree(tp->intr_buff);
1561 tp->intr_buff = NULL;
1564 static int alloc_all_mem(struct r8152 *tp)
1566 struct net_device *netdev = tp->netdev;
1567 struct usb_interface *intf = tp->intf;
1568 struct usb_host_interface *alt = intf->cur_altsetting;
1569 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1572 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1574 spin_lock_init(&tp->rx_lock);
1575 spin_lock_init(&tp->tx_lock);
1576 INIT_LIST_HEAD(&tp->rx_info);
1577 INIT_LIST_HEAD(&tp->tx_free);
1578 INIT_LIST_HEAD(&tp->rx_done);
1579 skb_queue_head_init(&tp->tx_queue);
1580 skb_queue_head_init(&tp->rx_queue);
1581 atomic_set(&tp->rx_count, 0);
1583 for (i = 0; i < RTL8152_MAX_RX; i++) {
1584 if (!alloc_rx_agg(tp, GFP_KERNEL))
1588 for (i = 0; i < RTL8152_MAX_TX; i++) {
1592 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1596 if (buf != tx_agg_align(buf)) {
1598 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1604 urb = usb_alloc_urb(0, GFP_KERNEL);
1610 INIT_LIST_HEAD(&tp->tx_info[i].list);
1611 tp->tx_info[i].context = tp;
1612 tp->tx_info[i].urb = urb;
1613 tp->tx_info[i].buffer = buf;
1614 tp->tx_info[i].head = tx_agg_align(buf);
1616 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1619 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1623 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1627 tp->intr_interval = (int)ep_intr->desc.bInterval;
1628 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1629 tp->intr_buff, INTBUFSIZE, intr_callback,
1630 tp, tp->intr_interval);
1639 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1641 struct tx_agg *agg = NULL;
1642 unsigned long flags;
1644 if (list_empty(&tp->tx_free))
1647 spin_lock_irqsave(&tp->tx_lock, flags);
1648 if (!list_empty(&tp->tx_free)) {
1649 struct list_head *cursor;
1651 cursor = tp->tx_free.next;
1652 list_del_init(cursor);
1653 agg = list_entry(cursor, struct tx_agg, list);
1655 spin_unlock_irqrestore(&tp->tx_lock, flags);
1660 /* r8152_csum_workaround()
1661 * The hw limites the value the transport offset. When the offset is out of the
1662 * range, calculate the checksum by sw.
1664 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1665 struct sk_buff_head *list)
1667 if (skb_shinfo(skb)->gso_size) {
1668 netdev_features_t features = tp->netdev->features;
1669 struct sk_buff_head seg_list;
1670 struct sk_buff *segs, *nskb;
1672 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1673 segs = skb_gso_segment(skb, features);
1674 if (IS_ERR(segs) || !segs)
1677 __skb_queue_head_init(&seg_list);
1683 __skb_queue_tail(&seg_list, nskb);
1686 skb_queue_splice(&seg_list, list);
1688 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1689 if (skb_checksum_help(skb) < 0)
1692 __skb_queue_head(list, skb);
1694 struct net_device_stats *stats;
1697 stats = &tp->netdev->stats;
1698 stats->tx_dropped++;
1703 /* msdn_giant_send_check()
1704 * According to the document of microsoft, the TCP Pseudo Header excludes the
1705 * packet length for IPv6 TCP large packets.
1707 static int msdn_giant_send_check(struct sk_buff *skb)
1709 const struct ipv6hdr *ipv6h;
1713 ret = skb_cow_head(skb, 0);
1717 ipv6h = ipv6_hdr(skb);
1721 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1726 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1728 if (skb_vlan_tag_present(skb)) {
1731 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1732 desc->opts2 |= cpu_to_le32(opts2);
1736 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1738 u32 opts2 = le32_to_cpu(desc->opts2);
1740 if (opts2 & RX_VLAN_TAG)
1741 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1742 swab16(opts2 & 0xffff));
1745 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1746 struct sk_buff *skb, u32 len, u32 transport_offset)
1748 u32 mss = skb_shinfo(skb)->gso_size;
1749 u32 opts1, opts2 = 0;
1750 int ret = TX_CSUM_SUCCESS;
1752 WARN_ON_ONCE(len > TX_LEN_MAX);
1754 opts1 = len | TX_FS | TX_LS;
1757 if (transport_offset > GTTCPHO_MAX) {
1758 netif_warn(tp, tx_err, tp->netdev,
1759 "Invalid transport offset 0x%x for TSO\n",
1765 switch (vlan_get_protocol(skb)) {
1766 case htons(ETH_P_IP):
1770 case htons(ETH_P_IPV6):
1771 if (msdn_giant_send_check(skb)) {
1783 opts1 |= transport_offset << GTTCPHO_SHIFT;
1784 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1785 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1788 if (transport_offset > TCPHO_MAX) {
1789 netif_warn(tp, tx_err, tp->netdev,
1790 "Invalid transport offset 0x%x\n",
1796 switch (vlan_get_protocol(skb)) {
1797 case htons(ETH_P_IP):
1799 ip_protocol = ip_hdr(skb)->protocol;
1802 case htons(ETH_P_IPV6):
1804 ip_protocol = ipv6_hdr(skb)->nexthdr;
1808 ip_protocol = IPPROTO_RAW;
1812 if (ip_protocol == IPPROTO_TCP)
1814 else if (ip_protocol == IPPROTO_UDP)
1819 opts2 |= transport_offset << TCPHO_SHIFT;
1822 desc->opts2 = cpu_to_le32(opts2);
1823 desc->opts1 = cpu_to_le32(opts1);
1829 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1831 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1835 __skb_queue_head_init(&skb_head);
1836 spin_lock(&tx_queue->lock);
1837 skb_queue_splice_init(tx_queue, &skb_head);
1838 spin_unlock(&tx_queue->lock);
1840 tx_data = agg->head;
1843 remain = agg_buf_sz;
1845 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1846 struct tx_desc *tx_desc;
1847 struct sk_buff *skb;
1851 skb = __skb_dequeue(&skb_head);
1855 len = skb->len + sizeof(*tx_desc);
1858 __skb_queue_head(&skb_head, skb);
1862 tx_data = tx_agg_align(tx_data);
1863 tx_desc = (struct tx_desc *)tx_data;
1865 offset = (u32)skb_transport_offset(skb);
1867 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1868 r8152_csum_workaround(tp, skb, &skb_head);
1872 rtl_tx_vlan_tag(tx_desc, skb);
1874 tx_data += sizeof(*tx_desc);
1877 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1878 struct net_device_stats *stats = &tp->netdev->stats;
1880 stats->tx_dropped++;
1881 dev_kfree_skb_any(skb);
1882 tx_data -= sizeof(*tx_desc);
1887 agg->skb_len += len;
1888 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1890 dev_kfree_skb_any(skb);
1892 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1894 if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags))
1898 if (!skb_queue_empty(&skb_head)) {
1899 spin_lock(&tx_queue->lock);
1900 skb_queue_splice(&skb_head, tx_queue);
1901 spin_unlock(&tx_queue->lock);
1904 netif_tx_lock(tp->netdev);
1906 if (netif_queue_stopped(tp->netdev) &&
1907 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1908 netif_wake_queue(tp->netdev);
1910 netif_tx_unlock(tp->netdev);
1912 ret = usb_autopm_get_interface_async(tp->intf);
1916 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1917 agg->head, (int)(tx_data - (u8 *)agg->head),
1918 (usb_complete_t)write_bulk_callback, agg);
1920 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1922 usb_autopm_put_interface_async(tp->intf);
1928 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1930 u8 checksum = CHECKSUM_NONE;
1933 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1936 opts2 = le32_to_cpu(rx_desc->opts2);
1937 opts3 = le32_to_cpu(rx_desc->opts3);
1939 if (opts2 & RD_IPV4_CS) {
1941 checksum = CHECKSUM_NONE;
1942 else if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1943 checksum = CHECKSUM_UNNECESSARY;
1944 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1945 checksum = CHECKSUM_UNNECESSARY;
1946 } else if (opts2 & RD_IPV6_CS) {
1947 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1948 checksum = CHECKSUM_UNNECESSARY;
1949 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1950 checksum = CHECKSUM_UNNECESSARY;
1957 static inline bool rx_count_exceed(struct r8152 *tp)
1959 return atomic_read(&tp->rx_count) > RTL8152_MAX_RX;
1962 static inline int agg_offset(struct rx_agg *agg, void *addr)
1964 return (int)(addr - agg->buffer);
1967 static struct rx_agg *rtl_get_free_rx(struct r8152 *tp, gfp_t mflags)
1969 struct rx_agg *agg, *agg_next, *agg_free = NULL;
1970 unsigned long flags;
1972 spin_lock_irqsave(&tp->rx_lock, flags);
1974 list_for_each_entry_safe(agg, agg_next, &tp->rx_used, list) {
1975 if (page_count(agg->page) == 1) {
1977 list_del_init(&agg->list);
1981 if (rx_count_exceed(tp)) {
1982 list_del_init(&agg->list);
1983 free_rx_agg(tp, agg);
1989 spin_unlock_irqrestore(&tp->rx_lock, flags);
1991 if (!agg_free && atomic_read(&tp->rx_count) < tp->rx_pending)
1992 agg_free = alloc_rx_agg(tp, mflags);
1997 static int rx_bottom(struct r8152 *tp, int budget)
1999 unsigned long flags;
2000 struct list_head *cursor, *next, rx_queue;
2001 int ret = 0, work_done = 0;
2002 struct napi_struct *napi = &tp->napi;
2004 if (!skb_queue_empty(&tp->rx_queue)) {
2005 while (work_done < budget) {
2006 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
2007 struct net_device *netdev = tp->netdev;
2008 struct net_device_stats *stats = &netdev->stats;
2009 unsigned int pkt_len;
2015 napi_gro_receive(napi, skb);
2017 stats->rx_packets++;
2018 stats->rx_bytes += pkt_len;
2022 if (list_empty(&tp->rx_done))
2025 INIT_LIST_HEAD(&rx_queue);
2026 spin_lock_irqsave(&tp->rx_lock, flags);
2027 list_splice_init(&tp->rx_done, &rx_queue);
2028 spin_unlock_irqrestore(&tp->rx_lock, flags);
2030 list_for_each_safe(cursor, next, &rx_queue) {
2031 struct rx_desc *rx_desc;
2032 struct rx_agg *agg, *agg_free;
2037 list_del_init(cursor);
2039 agg = list_entry(cursor, struct rx_agg, list);
2041 if (urb->actual_length < ETH_ZLEN)
2044 agg_free = rtl_get_free_rx(tp, GFP_ATOMIC);
2046 rx_desc = agg->buffer;
2047 rx_data = agg->buffer;
2048 len_used += sizeof(struct rx_desc);
2050 while (urb->actual_length > len_used) {
2051 struct net_device *netdev = tp->netdev;
2052 struct net_device_stats *stats = &netdev->stats;
2053 unsigned int pkt_len, rx_frag_head_sz;
2054 struct sk_buff *skb;
2056 /* limite the skb numbers for rx_queue */
2057 if (unlikely(skb_queue_len(&tp->rx_queue) >= 1000))
2060 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
2061 if (pkt_len < ETH_ZLEN)
2064 len_used += pkt_len;
2065 if (urb->actual_length < len_used)
2068 pkt_len -= ETH_FCS_LEN;
2069 rx_data += sizeof(struct rx_desc);
2071 if (!agg_free || tp->rx_copybreak > pkt_len)
2072 rx_frag_head_sz = pkt_len;
2074 rx_frag_head_sz = tp->rx_copybreak;
2076 skb = napi_alloc_skb(napi, rx_frag_head_sz);
2078 stats->rx_dropped++;
2082 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
2083 memcpy(skb->data, rx_data, rx_frag_head_sz);
2084 skb_put(skb, rx_frag_head_sz);
2085 pkt_len -= rx_frag_head_sz;
2086 rx_data += rx_frag_head_sz;
2088 skb_add_rx_frag(skb, 0, agg->page,
2089 agg_offset(agg, rx_data),
2091 SKB_DATA_ALIGN(pkt_len));
2092 get_page(agg->page);
2095 skb->protocol = eth_type_trans(skb, netdev);
2096 rtl_rx_vlan_tag(rx_desc, skb);
2097 if (work_done < budget) {
2099 stats->rx_packets++;
2100 stats->rx_bytes += skb->len;
2101 napi_gro_receive(napi, skb);
2103 __skb_queue_tail(&tp->rx_queue, skb);
2107 rx_data = rx_agg_align(rx_data + pkt_len + ETH_FCS_LEN);
2108 rx_desc = (struct rx_desc *)rx_data;
2109 len_used = agg_offset(agg, rx_data);
2110 len_used += sizeof(struct rx_desc);
2113 WARN_ON(!agg_free && page_count(agg->page) > 1);
2116 spin_lock_irqsave(&tp->rx_lock, flags);
2117 if (page_count(agg->page) == 1) {
2118 list_add(&agg_free->list, &tp->rx_used);
2120 list_add_tail(&agg->list, &tp->rx_used);
2124 spin_unlock_irqrestore(&tp->rx_lock, flags);
2129 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
2131 urb->actual_length = 0;
2132 list_add_tail(&agg->list, next);
2136 if (!list_empty(&rx_queue)) {
2137 spin_lock_irqsave(&tp->rx_lock, flags);
2138 list_splice_tail(&rx_queue, &tp->rx_done);
2139 spin_unlock_irqrestore(&tp->rx_lock, flags);
2146 static void tx_bottom(struct r8152 *tp)
2153 if (skb_queue_empty(&tp->tx_queue))
2156 agg = r8152_get_tx_agg(tp);
2160 res = r8152_tx_agg_fill(tp, agg);
2162 struct net_device *netdev = tp->netdev;
2164 if (res == -ENODEV) {
2166 netif_device_detach(netdev);
2168 struct net_device_stats *stats = &netdev->stats;
2169 unsigned long flags;
2171 netif_warn(tp, tx_err, netdev,
2172 "failed tx_urb %d\n", res);
2173 stats->tx_dropped += agg->skb_num;
2175 spin_lock_irqsave(&tp->tx_lock, flags);
2176 list_add_tail(&agg->list, &tp->tx_free);
2177 spin_unlock_irqrestore(&tp->tx_lock, flags);
2183 static void bottom_half(unsigned long data)
2187 tp = (struct r8152 *)data;
2189 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2192 if (!test_bit(WORK_ENABLE, &tp->flags))
2195 /* When link down, the driver would cancel all bulks. */
2196 /* This avoid the re-submitting bulk */
2197 if (!netif_carrier_ok(tp->netdev))
2200 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2205 static int r8152_poll(struct napi_struct *napi, int budget)
2207 struct r8152 *tp = container_of(napi, struct r8152, napi);
2210 work_done = rx_bottom(tp, budget);
2212 if (work_done < budget) {
2213 if (!napi_complete_done(napi, work_done))
2215 if (!list_empty(&tp->rx_done))
2216 napi_schedule(napi);
2224 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
2228 /* The rx would be stopped, so skip submitting */
2229 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
2230 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
2233 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
2234 agg->buffer, tp->rx_buf_sz,
2235 (usb_complete_t)read_bulk_callback, agg);
2237 ret = usb_submit_urb(agg->urb, mem_flags);
2238 if (ret == -ENODEV) {
2240 netif_device_detach(tp->netdev);
2242 struct urb *urb = agg->urb;
2243 unsigned long flags;
2245 urb->actual_length = 0;
2246 spin_lock_irqsave(&tp->rx_lock, flags);
2247 list_add_tail(&agg->list, &tp->rx_done);
2248 spin_unlock_irqrestore(&tp->rx_lock, flags);
2250 netif_err(tp, rx_err, tp->netdev,
2251 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
2253 napi_schedule(&tp->napi);
2259 static void rtl_drop_queued_tx(struct r8152 *tp)
2261 struct net_device_stats *stats = &tp->netdev->stats;
2262 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
2263 struct sk_buff *skb;
2265 if (skb_queue_empty(tx_queue))
2268 __skb_queue_head_init(&skb_head);
2269 spin_lock_bh(&tx_queue->lock);
2270 skb_queue_splice_init(tx_queue, &skb_head);
2271 spin_unlock_bh(&tx_queue->lock);
2273 while ((skb = __skb_dequeue(&skb_head))) {
2275 stats->tx_dropped++;
2279 static void rtl8152_tx_timeout(struct net_device *netdev)
2281 struct r8152 *tp = netdev_priv(netdev);
2283 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2285 usb_queue_reset_device(tp->intf);
2288 static void rtl8152_set_rx_mode(struct net_device *netdev)
2290 struct r8152 *tp = netdev_priv(netdev);
2292 if (netif_carrier_ok(netdev)) {
2293 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2294 schedule_delayed_work(&tp->schedule, 0);
2298 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2300 struct r8152 *tp = netdev_priv(netdev);
2301 u32 mc_filter[2]; /* Multicast hash filter */
2305 netif_stop_queue(netdev);
2306 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2307 ocp_data &= ~RCR_ACPT_ALL;
2308 ocp_data |= RCR_AB | RCR_APM;
2310 if (netdev->flags & IFF_PROMISC) {
2311 /* Unconditionally log net taps. */
2312 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2313 ocp_data |= RCR_AM | RCR_AAP;
2314 mc_filter[1] = 0xffffffff;
2315 mc_filter[0] = 0xffffffff;
2316 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2317 (netdev->flags & IFF_ALLMULTI)) {
2318 /* Too many to filter perfectly -- accept all multicasts. */
2320 mc_filter[1] = 0xffffffff;
2321 mc_filter[0] = 0xffffffff;
2323 struct netdev_hw_addr *ha;
2327 netdev_for_each_mc_addr(ha, netdev) {
2328 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2330 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2335 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2336 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2338 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2339 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2340 netif_wake_queue(netdev);
2343 static netdev_features_t
2344 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2345 netdev_features_t features)
2347 u32 mss = skb_shinfo(skb)->gso_size;
2348 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2349 int offset = skb_transport_offset(skb);
2351 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2352 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2353 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2354 features &= ~NETIF_F_GSO_MASK;
2359 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2360 struct net_device *netdev)
2362 struct r8152 *tp = netdev_priv(netdev);
2364 skb_tx_timestamp(skb);
2366 skb_queue_tail(&tp->tx_queue, skb);
2368 if (!list_empty(&tp->tx_free)) {
2369 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2370 set_bit(SCHEDULE_TASKLET, &tp->flags);
2371 schedule_delayed_work(&tp->schedule, 0);
2373 usb_mark_last_busy(tp->udev);
2374 tasklet_schedule(&tp->tx_tl);
2376 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2377 netif_stop_queue(netdev);
2380 return NETDEV_TX_OK;
2383 static void r8152b_reset_packet_filter(struct r8152 *tp)
2387 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2388 ocp_data &= ~FMC_FCR_MCU_EN;
2389 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2390 ocp_data |= FMC_FCR_MCU_EN;
2391 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2394 static void rtl8152_nic_reset(struct r8152 *tp)
2398 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2400 for (i = 0; i < 1000; i++) {
2401 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2403 usleep_range(100, 400);
2407 static void set_tx_qlen(struct r8152 *tp)
2409 struct net_device *netdev = tp->netdev;
2411 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN +
2412 sizeof(struct tx_desc));
2415 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2417 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2420 static void rtl_set_eee_plus(struct r8152 *tp)
2425 speed = rtl8152_get_speed(tp);
2426 if (speed & _10bps) {
2427 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2428 ocp_data |= EEEP_CR_EEEP_TX;
2429 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2431 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2432 ocp_data &= ~EEEP_CR_EEEP_TX;
2433 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2437 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2441 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2443 ocp_data |= RXDY_GATED_EN;
2445 ocp_data &= ~RXDY_GATED_EN;
2446 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2449 static int rtl_start_rx(struct r8152 *tp)
2451 struct rx_agg *agg, *agg_next;
2452 struct list_head tmp_list;
2453 unsigned long flags;
2456 INIT_LIST_HEAD(&tmp_list);
2458 spin_lock_irqsave(&tp->rx_lock, flags);
2460 INIT_LIST_HEAD(&tp->rx_done);
2461 INIT_LIST_HEAD(&tp->rx_used);
2463 list_splice_init(&tp->rx_info, &tmp_list);
2465 spin_unlock_irqrestore(&tp->rx_lock, flags);
2467 list_for_each_entry_safe(agg, agg_next, &tmp_list, info_list) {
2468 INIT_LIST_HEAD(&agg->list);
2470 /* Only RTL8152_MAX_RX rx_agg need to be submitted. */
2471 if (++i > RTL8152_MAX_RX) {
2472 spin_lock_irqsave(&tp->rx_lock, flags);
2473 list_add_tail(&agg->list, &tp->rx_used);
2474 spin_unlock_irqrestore(&tp->rx_lock, flags);
2475 } else if (unlikely(ret < 0)) {
2476 spin_lock_irqsave(&tp->rx_lock, flags);
2477 list_add_tail(&agg->list, &tp->rx_done);
2478 spin_unlock_irqrestore(&tp->rx_lock, flags);
2480 ret = r8152_submit_rx(tp, agg, GFP_KERNEL);
2484 spin_lock_irqsave(&tp->rx_lock, flags);
2485 WARN_ON(!list_empty(&tp->rx_info));
2486 list_splice(&tmp_list, &tp->rx_info);
2487 spin_unlock_irqrestore(&tp->rx_lock, flags);
2492 static int rtl_stop_rx(struct r8152 *tp)
2494 struct rx_agg *agg, *agg_next;
2495 struct list_head tmp_list;
2496 unsigned long flags;
2498 INIT_LIST_HEAD(&tmp_list);
2500 /* The usb_kill_urb() couldn't be used in atomic.
2501 * Therefore, move the list of rx_info to a tmp one.
2502 * Then, list_for_each_entry_safe could be used without
2506 spin_lock_irqsave(&tp->rx_lock, flags);
2507 list_splice_init(&tp->rx_info, &tmp_list);
2508 spin_unlock_irqrestore(&tp->rx_lock, flags);
2510 list_for_each_entry_safe(agg, agg_next, &tmp_list, info_list) {
2511 /* At least RTL8152_MAX_RX rx_agg have the page_count being
2512 * equal to 1, so the other ones could be freed safely.
2514 if (page_count(agg->page) > 1)
2515 free_rx_agg(tp, agg);
2517 usb_kill_urb(agg->urb);
2520 /* Move back the list of temp to the rx_info */
2521 spin_lock_irqsave(&tp->rx_lock, flags);
2522 WARN_ON(!list_empty(&tp->rx_info));
2523 list_splice(&tmp_list, &tp->rx_info);
2524 spin_unlock_irqrestore(&tp->rx_lock, flags);
2526 while (!skb_queue_empty(&tp->rx_queue))
2527 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2532 static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
2534 ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
2535 OWN_UPDATE | OWN_CLEAR);
2538 static int rtl_enable(struct r8152 *tp)
2542 r8152b_reset_packet_filter(tp);
2544 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2545 ocp_data |= CR_RE | CR_TE;
2546 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2548 switch (tp->version) {
2551 r8153b_rx_agg_chg_indicate(tp);
2557 rxdy_gated_en(tp, false);
2562 static int rtl8152_enable(struct r8152 *tp)
2564 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2568 rtl_set_eee_plus(tp);
2570 return rtl_enable(tp);
2573 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2575 u32 ocp_data = tp->coalesce / 8;
2577 switch (tp->version) {
2582 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
2588 /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
2589 * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
2591 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
2593 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
2602 static void r8153_set_rx_early_size(struct r8152 *tp)
2604 u32 ocp_data = tp->rx_buf_sz - rx_reserved_size(tp->netdev->mtu);
2606 switch (tp->version) {
2611 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
2616 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
2625 static int rtl8153_enable(struct r8152 *tp)
2627 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2631 rtl_set_eee_plus(tp);
2632 r8153_set_rx_early_timeout(tp);
2633 r8153_set_rx_early_size(tp);
2635 return rtl_enable(tp);
2638 static void rtl_disable(struct r8152 *tp)
2643 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2644 rtl_drop_queued_tx(tp);
2648 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2649 ocp_data &= ~RCR_ACPT_ALL;
2650 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2652 rtl_drop_queued_tx(tp);
2654 for (i = 0; i < RTL8152_MAX_TX; i++)
2655 usb_kill_urb(tp->tx_info[i].urb);
2657 rxdy_gated_en(tp, true);
2659 for (i = 0; i < 1000; i++) {
2660 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2661 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2663 usleep_range(1000, 2000);
2666 for (i = 0; i < 1000; i++) {
2667 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2669 usleep_range(1000, 2000);
2674 rtl8152_nic_reset(tp);
2677 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2681 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2683 ocp_data |= POWER_CUT;
2685 ocp_data &= ~POWER_CUT;
2686 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2688 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2689 ocp_data &= ~RESUME_INDICATE;
2690 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2693 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2697 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2699 ocp_data |= CPCR_RX_VLAN;
2701 ocp_data &= ~CPCR_RX_VLAN;
2702 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2705 static int rtl8152_set_features(struct net_device *dev,
2706 netdev_features_t features)
2708 netdev_features_t changed = features ^ dev->features;
2709 struct r8152 *tp = netdev_priv(dev);
2712 ret = usb_autopm_get_interface(tp->intf);
2716 mutex_lock(&tp->control);
2718 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2719 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2720 rtl_rx_vlan_en(tp, true);
2722 rtl_rx_vlan_en(tp, false);
2725 mutex_unlock(&tp->control);
2727 usb_autopm_put_interface(tp->intf);
2733 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2735 static u32 __rtl_get_wol(struct r8152 *tp)
2740 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2741 if (ocp_data & LINK_ON_WAKE_EN)
2742 wolopts |= WAKE_PHY;
2744 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2745 if (ocp_data & UWF_EN)
2746 wolopts |= WAKE_UCAST;
2747 if (ocp_data & BWF_EN)
2748 wolopts |= WAKE_BCAST;
2749 if (ocp_data & MWF_EN)
2750 wolopts |= WAKE_MCAST;
2752 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2753 if (ocp_data & MAGIC_EN)
2754 wolopts |= WAKE_MAGIC;
2759 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2763 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2765 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2766 ocp_data &= ~LINK_ON_WAKE_EN;
2767 if (wolopts & WAKE_PHY)
2768 ocp_data |= LINK_ON_WAKE_EN;
2769 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2771 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2772 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2773 if (wolopts & WAKE_UCAST)
2775 if (wolopts & WAKE_BCAST)
2777 if (wolopts & WAKE_MCAST)
2779 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2781 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2783 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2784 ocp_data &= ~MAGIC_EN;
2785 if (wolopts & WAKE_MAGIC)
2786 ocp_data |= MAGIC_EN;
2787 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2789 if (wolopts & WAKE_ANY)
2790 device_set_wakeup_enable(&tp->udev->dev, true);
2792 device_set_wakeup_enable(&tp->udev->dev, false);
2795 static void r8153_mac_clk_spd(struct r8152 *tp, bool enable)
2797 /* MAC clock speed down */
2799 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL,
2801 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2,
2803 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
2804 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
2805 U1U2_SPDWN_EN | L1_SPDWN_EN);
2806 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
2807 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
2808 TP100_SPDWN_EN | TP500_SPDWN_EN | EEE_SPDWN_EN |
2811 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
2812 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
2813 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
2814 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
2818 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2823 memset(u1u2, 0xff, sizeof(u1u2));
2825 memset(u1u2, 0x00, sizeof(u1u2));
2827 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2830 static void r8153b_u1u2en(struct r8152 *tp, bool enable)
2834 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
2836 ocp_data |= LPM_U1U2_EN;
2838 ocp_data &= ~LPM_U1U2_EN;
2840 ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
2843 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2847 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2849 ocp_data |= U2P3_ENABLE;
2851 ocp_data &= ~U2P3_ENABLE;
2852 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2855 static void r8153b_ups_flags_w1w0(struct r8152 *tp, u32 set, u32 clear)
2859 ocp_data = ocp_read_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS);
2862 ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ocp_data);
2865 static void r8153b_green_en(struct r8152 *tp, bool enable)
2870 sram_write(tp, 0x8045, 0); /* 10M abiq&ldvbias */
2871 sram_write(tp, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
2872 sram_write(tp, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
2874 sram_write(tp, 0x8045, 0x2444); /* 10M abiq&ldvbias */
2875 sram_write(tp, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
2876 sram_write(tp, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
2879 data = sram_read(tp, SRAM_GREEN_CFG);
2880 data |= GREEN_ETH_EN;
2881 sram_write(tp, SRAM_GREEN_CFG, data);
2883 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_GREEN, 0);
2886 static u16 r8153_phy_status(struct r8152 *tp, u16 desired)
2891 for (i = 0; i < 500; i++) {
2892 data = ocp_reg_read(tp, OCP_PHY_STATUS);
2893 data &= PHY_STAT_MASK;
2895 if (data == desired)
2897 } else if (data == PHY_STAT_LAN_ON || data == PHY_STAT_PWRDN ||
2898 data == PHY_STAT_EXT_INIT) {
2908 static void r8153b_ups_en(struct r8152 *tp, bool enable)
2910 u32 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT);
2913 ocp_data |= UPS_EN | USP_PREWAKE | PHASE2_EN;
2914 ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2916 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff);
2918 ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data);
2922 ocp_data &= ~(UPS_EN | USP_PREWAKE);
2923 ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2925 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff);
2926 ocp_data &= ~BIT(0);
2927 ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data);
2929 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2930 ocp_data &= ~PCUT_STATUS;
2931 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2933 data = r8153_phy_status(tp, 0);
2936 case PHY_STAT_PWRDN:
2937 case PHY_STAT_EXT_INIT:
2939 test_bit(GREEN_ETHERNET, &tp->flags));
2941 data = r8152_mdio_read(tp, MII_BMCR);
2942 data &= ~BMCR_PDOWN;
2944 r8152_mdio_write(tp, MII_BMCR, data);
2946 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
2950 if (data != PHY_STAT_LAN_ON)
2951 netif_warn(tp, link, tp->netdev,
2958 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2962 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2964 ocp_data |= PWR_EN | PHASE2_EN;
2966 ocp_data &= ~(PWR_EN | PHASE2_EN);
2967 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2969 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2970 ocp_data &= ~PCUT_STATUS;
2971 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2974 static void r8153b_power_cut_en(struct r8152 *tp, bool enable)
2978 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2980 ocp_data |= PWR_EN | PHASE2_EN;
2982 ocp_data &= ~PWR_EN;
2983 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2985 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2986 ocp_data &= ~PCUT_STATUS;
2987 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2990 static void r8153_queue_wake(struct r8152 *tp, bool enable)
2994 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_INDICATE_FALG);
2996 ocp_data |= UPCOMING_RUNTIME_D3;
2998 ocp_data &= ~UPCOMING_RUNTIME_D3;
2999 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_INDICATE_FALG, ocp_data);
3001 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_SUSPEND_FLAG);
3002 ocp_data &= ~LINK_CHG_EVENT;
3003 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_SUSPEND_FLAG, ocp_data);
3005 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS);
3006 ocp_data &= ~LINK_CHANGE_FLAG;
3007 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data);
3010 static bool rtl_can_wakeup(struct r8152 *tp)
3012 struct usb_device *udev = tp->udev;
3014 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
3017 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
3022 __rtl_set_wol(tp, WAKE_ANY);
3024 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
3026 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
3027 ocp_data |= LINK_OFF_WAKE_EN;
3028 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
3030 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3034 __rtl_set_wol(tp, tp->saved_wolopts);
3036 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
3038 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
3039 ocp_data &= ~LINK_OFF_WAKE_EN;
3040 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
3042 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3046 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
3049 r8153_u1u2en(tp, false);
3050 r8153_u2p3en(tp, false);
3051 r8153_mac_clk_spd(tp, true);
3052 rtl_runtime_suspend_enable(tp, true);
3054 rtl_runtime_suspend_enable(tp, false);
3055 r8153_mac_clk_spd(tp, false);
3057 switch (tp->version) {
3064 r8153_u2p3en(tp, true);
3068 r8153_u1u2en(tp, true);
3072 static void rtl8153b_runtime_enable(struct r8152 *tp, bool enable)
3075 r8153_queue_wake(tp, true);
3076 r8153b_u1u2en(tp, false);
3077 r8153_u2p3en(tp, false);
3078 rtl_runtime_suspend_enable(tp, true);
3079 r8153b_ups_en(tp, true);
3081 r8153b_ups_en(tp, false);
3082 r8153_queue_wake(tp, false);
3083 rtl_runtime_suspend_enable(tp, false);
3084 r8153_u2p3en(tp, true);
3085 r8153b_u1u2en(tp, true);
3089 static void r8153_teredo_off(struct r8152 *tp)
3093 switch (tp->version) {
3101 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3102 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK |
3104 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3109 /* The bit 0 ~ 7 are relative with teredo settings. They are
3110 * W1C (write 1 to clear), so set all 1 to disable it.
3112 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff);
3119 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
3120 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
3121 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
3124 static void rtl_reset_bmu(struct r8152 *tp)
3128 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
3129 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
3130 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
3131 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
3132 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
3135 static void r8152_aldps_en(struct r8152 *tp, bool enable)
3138 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
3139 LINKENA | DIS_SDSAVE);
3141 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
3147 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3149 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3150 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3151 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3154 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3158 r8152_mmd_indirect(tp, dev, reg);
3159 data = ocp_reg_read(tp, OCP_EEE_DATA);
3160 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3165 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3167 r8152_mmd_indirect(tp, dev, reg);
3168 ocp_reg_write(tp, OCP_EEE_DATA, data);
3169 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3172 static void r8152_eee_en(struct r8152 *tp, bool enable)
3174 u16 config1, config2, config3;
3177 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3178 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3179 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3180 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3183 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3184 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3185 config1 |= sd_rise_time(1);
3186 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3187 config3 |= fast_snr(42);
3189 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3190 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3192 config1 |= sd_rise_time(7);
3193 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3194 config3 |= fast_snr(511);
3197 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3198 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3199 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3200 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3203 static void r8152b_enable_eee(struct r8152 *tp)
3205 r8152_eee_en(tp, true);
3206 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3209 static void r8152b_enable_fc(struct r8152 *tp)
3213 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3214 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3215 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3218 static void rtl8152_disable(struct r8152 *tp)
3220 r8152_aldps_en(tp, false);
3222 r8152_aldps_en(tp, true);
3225 static void r8152b_hw_phy_cfg(struct r8152 *tp)
3227 r8152b_enable_eee(tp);
3228 r8152_aldps_en(tp, true);
3229 r8152b_enable_fc(tp);
3231 set_bit(PHY_RESET, &tp->flags);
3234 static void r8152b_exit_oob(struct r8152 *tp)
3239 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3240 ocp_data &= ~RCR_ACPT_ALL;
3241 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3243 rxdy_gated_en(tp, true);
3244 r8153_teredo_off(tp);
3245 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3246 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
3248 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3249 ocp_data &= ~NOW_IS_OOB;
3250 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3252 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3253 ocp_data &= ~MCU_BORW_EN;
3254 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3256 for (i = 0; i < 1000; i++) {
3257 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3258 if (ocp_data & LINK_LIST_READY)
3260 usleep_range(1000, 2000);
3263 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3264 ocp_data |= RE_INIT_LL;
3265 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3267 for (i = 0; i < 1000; i++) {
3268 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3269 if (ocp_data & LINK_LIST_READY)
3271 usleep_range(1000, 2000);
3274 rtl8152_nic_reset(tp);
3276 /* rx share fifo credit full threshold */
3277 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
3279 if (tp->udev->speed == USB_SPEED_FULL ||
3280 tp->udev->speed == USB_SPEED_LOW) {
3281 /* rx share fifo credit near full threshold */
3282 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
3284 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
3287 /* rx share fifo credit near full threshold */
3288 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
3290 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
3294 /* TX share fifo free credit full threshold */
3295 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
3297 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
3298 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
3299 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
3300 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
3302 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
3304 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
3306 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
3307 ocp_data |= TCR0_AUTO_FIFO;
3308 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
3311 static void r8152b_enter_oob(struct r8152 *tp)
3316 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3317 ocp_data &= ~NOW_IS_OOB;
3318 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3320 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
3321 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
3322 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
3326 for (i = 0; i < 1000; i++) {
3327 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3328 if (ocp_data & LINK_LIST_READY)
3330 usleep_range(1000, 2000);
3333 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3334 ocp_data |= RE_INIT_LL;
3335 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3337 for (i = 0; i < 1000; i++) {
3338 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3339 if (ocp_data & LINK_LIST_READY)
3341 usleep_range(1000, 2000);
3344 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
3346 rtl_rx_vlan_en(tp, true);
3348 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
3349 ocp_data |= ALDPS_PROXY_MODE;
3350 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
3352 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3353 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3354 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3356 rxdy_gated_en(tp, false);
3358 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3359 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3360 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3363 static int r8153_patch_request(struct r8152 *tp, bool request)
3368 data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);
3370 data |= PATCH_REQUEST;
3372 data &= ~PATCH_REQUEST;
3373 ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data);
3375 for (i = 0; request && i < 5000; i++) {
3376 usleep_range(1000, 2000);
3377 if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)
3381 if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
3382 netif_err(tp, drv, tp->netdev, "patch request fail\n");
3383 r8153_patch_request(tp, false);
3390 static void r8153_aldps_en(struct r8152 *tp, bool enable)
3394 data = ocp_reg_read(tp, OCP_POWER_CFG);
3397 ocp_reg_write(tp, OCP_POWER_CFG, data);
3402 ocp_reg_write(tp, OCP_POWER_CFG, data);
3403 for (i = 0; i < 20; i++) {
3404 usleep_range(1000, 2000);
3405 if (ocp_read_word(tp, MCU_TYPE_PLA, 0xe000) & 0x0100)
3411 static void r8153b_aldps_en(struct r8152 *tp, bool enable)
3413 r8153_aldps_en(tp, enable);
3416 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_ALDPS, 0);
3418 r8153b_ups_flags_w1w0(tp, 0, UPS_FLAGS_EN_ALDPS);
3421 static void r8153_eee_en(struct r8152 *tp, bool enable)
3426 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3427 config = ocp_reg_read(tp, OCP_EEE_CFG);
3430 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3433 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3434 config &= ~EEE10_EN;
3437 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3438 ocp_reg_write(tp, OCP_EEE_CFG, config);
3441 static void r8153b_eee_en(struct r8152 *tp, bool enable)
3443 r8153_eee_en(tp, enable);
3446 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_EEE, 0);
3448 r8153b_ups_flags_w1w0(tp, 0, UPS_FLAGS_EN_EEE);
3451 static void r8153b_enable_fc(struct r8152 *tp)
3453 r8152b_enable_fc(tp);
3454 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_FLOW_CTR, 0);
3457 static void r8153_hw_phy_cfg(struct r8152 *tp)
3462 /* disable ALDPS before updating the PHY parameters */
3463 r8153_aldps_en(tp, false);
3465 /* disable EEE before updating the PHY parameters */
3466 r8153_eee_en(tp, false);
3467 ocp_reg_write(tp, OCP_EEE_ADV, 0);
3469 if (tp->version == RTL_VER_03) {
3470 data = ocp_reg_read(tp, OCP_EEE_CFG);
3471 data &= ~CTAP_SHORT_EN;
3472 ocp_reg_write(tp, OCP_EEE_CFG, data);
3475 data = ocp_reg_read(tp, OCP_POWER_CFG);
3476 data |= EEE_CLKDIV_EN;
3477 ocp_reg_write(tp, OCP_POWER_CFG, data);
3479 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
3480 data |= EN_10M_BGOFF;
3481 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
3482 data = ocp_reg_read(tp, OCP_POWER_CFG);
3483 data |= EN_10M_PLLOFF;
3484 ocp_reg_write(tp, OCP_POWER_CFG, data);
3485 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
3487 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3488 ocp_data |= PFM_PWM_SWITCH;
3489 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3491 /* Enable LPF corner auto tune */
3492 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
3494 /* Adjust 10M Amplitude */
3495 sram_write(tp, SRAM_10M_AMP1, 0x00af);
3496 sram_write(tp, SRAM_10M_AMP2, 0x0208);
3498 r8153_eee_en(tp, true);
3499 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3501 r8153_aldps_en(tp, true);
3502 r8152b_enable_fc(tp);
3504 switch (tp->version) {
3511 r8153_u2p3en(tp, true);
3515 set_bit(PHY_RESET, &tp->flags);
3518 static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
3522 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
3523 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
3524 ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
3525 ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
3530 static void r8153b_hw_phy_cfg(struct r8152 *tp)
3532 u32 ocp_data, ups_flags = 0;
3535 /* disable ALDPS before updating the PHY parameters */
3536 r8153b_aldps_en(tp, false);
3538 /* disable EEE before updating the PHY parameters */
3539 r8153b_eee_en(tp, false);
3540 ocp_reg_write(tp, OCP_EEE_ADV, 0);
3542 r8153b_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags));
3544 data = sram_read(tp, SRAM_GREEN_CFG);
3546 sram_write(tp, SRAM_GREEN_CFG, data);
3547 data = ocp_reg_read(tp, OCP_NCTL_CFG);
3548 data |= PGA_RETURN_EN;
3549 ocp_reg_write(tp, OCP_NCTL_CFG, data);
3551 /* ADC Bias Calibration:
3552 * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
3553 * bit (bit3) to rebuild the real 16-bit data. Write the data to the
3556 ocp_data = r8152_efuse_read(tp, 0x7d);
3557 data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));
3559 ocp_reg_write(tp, OCP_ADC_IOFFSET, data);
3561 /* ups mode tx-link-pulse timing adjustment:
3562 * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
3563 * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
3565 ocp_data = ocp_reg_read(tp, 0xc426);
3568 u32 swr_cnt_1ms_ini;
3570 swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
3571 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
3572 ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
3573 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
3576 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3577 ocp_data |= PFM_PWM_SWITCH;
3578 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3581 if (!r8153_patch_request(tp, true)) {
3582 data = ocp_reg_read(tp, OCP_POWER_CFG);
3583 data |= EEE_CLKDIV_EN;
3584 ocp_reg_write(tp, OCP_POWER_CFG, data);
3586 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
3587 data |= EN_EEE_CMODE | EN_EEE_1000 | EN_10M_CLKDIV;
3588 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
3590 ocp_reg_write(tp, OCP_SYSCLK_CFG, 0);
3591 ocp_reg_write(tp, OCP_SYSCLK_CFG, clk_div_expo(5));
3593 ups_flags |= UPS_FLAGS_EN_10M_CKDIV | UPS_FLAGS_250M_CKDIV |
3594 UPS_FLAGS_EN_EEE_CKDIV | UPS_FLAGS_EEE_CMOD_LV_EN |
3595 UPS_FLAGS_EEE_PLLOFF_GIGA;
3597 r8153_patch_request(tp, false);
3600 r8153b_ups_flags_w1w0(tp, ups_flags, 0);
3602 r8153b_eee_en(tp, true);
3603 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3605 r8153b_aldps_en(tp, true);
3606 r8153b_enable_fc(tp);
3607 r8153_u2p3en(tp, true);
3609 set_bit(PHY_RESET, &tp->flags);
3612 static void r8153_first_init(struct r8152 *tp)
3617 r8153_mac_clk_spd(tp, false);
3618 rxdy_gated_en(tp, true);
3619 r8153_teredo_off(tp);
3621 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3622 ocp_data &= ~RCR_ACPT_ALL;
3623 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3625 rtl8152_nic_reset(tp);
3628 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3629 ocp_data &= ~NOW_IS_OOB;
3630 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3632 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3633 ocp_data &= ~MCU_BORW_EN;
3634 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3636 for (i = 0; i < 1000; i++) {
3637 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3638 if (ocp_data & LINK_LIST_READY)
3640 usleep_range(1000, 2000);
3643 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3644 ocp_data |= RE_INIT_LL;
3645 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3647 for (i = 0; i < 1000; i++) {
3648 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3649 if (ocp_data & LINK_LIST_READY)
3651 usleep_range(1000, 2000);
3654 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
3656 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3657 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3658 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
3660 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
3661 ocp_data |= TCR0_AUTO_FIFO;
3662 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
3664 rtl8152_nic_reset(tp);
3666 /* rx share fifo credit full threshold */
3667 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
3668 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
3669 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
3670 /* TX share fifo free credit full threshold */
3671 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
3674 static void r8153_enter_oob(struct r8152 *tp)
3679 r8153_mac_clk_spd(tp, true);
3681 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3682 ocp_data &= ~NOW_IS_OOB;
3683 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3688 for (i = 0; i < 1000; i++) {
3689 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3690 if (ocp_data & LINK_LIST_READY)
3692 usleep_range(1000, 2000);
3695 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3696 ocp_data |= RE_INIT_LL;
3697 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3699 for (i = 0; i < 1000; i++) {
3700 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3701 if (ocp_data & LINK_LIST_READY)
3703 usleep_range(1000, 2000);
3706 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3707 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3709 switch (tp->version) {
3714 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3715 ocp_data &= ~TEREDO_WAKE_MASK;
3716 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3721 /* Clear teredo wake event. bit[15:8] is the teredo wakeup
3722 * type. Set it to zero. bits[7:0] are the W1C bits about
3723 * the events. Set them to all 1 to clear them.
3725 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff);
3732 rtl_rx_vlan_en(tp, true);
3734 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
3735 ocp_data |= ALDPS_PROXY_MODE;
3736 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
3738 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3739 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3740 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3742 rxdy_gated_en(tp, false);
3744 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3745 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3746 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3749 static void rtl8153_disable(struct r8152 *tp)
3751 r8153_aldps_en(tp, false);
3754 r8153_aldps_en(tp, true);
3757 static void rtl8153b_disable(struct r8152 *tp)
3759 r8153b_aldps_en(tp, false);
3762 r8153b_aldps_en(tp, true);
3765 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
3767 u16 bmcr, anar, gbcr;
3768 enum spd_duplex speed_duplex;
3771 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3772 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
3773 ADVERTISE_100HALF | ADVERTISE_100FULL);
3774 if (tp->mii.supports_gmii) {
3775 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3776 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3781 if (autoneg == AUTONEG_DISABLE) {
3782 if (speed == SPEED_10) {
3784 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3785 speed_duplex = FORCE_10M_HALF;
3786 } else if (speed == SPEED_100) {
3787 bmcr = BMCR_SPEED100;
3788 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3789 speed_duplex = FORCE_100M_HALF;
3790 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3791 bmcr = BMCR_SPEED1000;
3792 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3793 speed_duplex = NWAY_1000M_FULL;
3799 if (duplex == DUPLEX_FULL) {
3800 bmcr |= BMCR_FULLDPLX;
3801 if (speed != SPEED_1000)
3805 if (speed == SPEED_10) {
3806 if (duplex == DUPLEX_FULL) {
3807 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3808 speed_duplex = NWAY_10M_FULL;
3810 anar |= ADVERTISE_10HALF;
3811 speed_duplex = NWAY_10M_HALF;
3813 } else if (speed == SPEED_100) {
3814 if (duplex == DUPLEX_FULL) {
3815 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3816 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3817 speed_duplex = NWAY_100M_FULL;
3819 anar |= ADVERTISE_10HALF;
3820 anar |= ADVERTISE_100HALF;
3821 speed_duplex = NWAY_100M_HALF;
3823 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3824 if (duplex == DUPLEX_FULL) {
3825 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3826 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3827 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3829 anar |= ADVERTISE_10HALF;
3830 anar |= ADVERTISE_100HALF;
3831 gbcr |= ADVERTISE_1000HALF;
3833 speed_duplex = NWAY_1000M_FULL;
3839 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3842 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3845 if (tp->mii.supports_gmii)
3846 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3848 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3849 r8152_mdio_write(tp, MII_BMCR, bmcr);
3851 switch (tp->version) {
3854 r8153b_ups_flags_w1w0(tp, ups_flags_speed(speed_duplex),
3855 UPS_FLAGS_SPEED_MASK);
3862 if (bmcr & BMCR_RESET) {
3865 for (i = 0; i < 50; i++) {
3867 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3876 static void rtl8152_up(struct r8152 *tp)
3878 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3881 r8152_aldps_en(tp, false);
3882 r8152b_exit_oob(tp);
3883 r8152_aldps_en(tp, true);
3886 static void rtl8152_down(struct r8152 *tp)
3888 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3889 rtl_drop_queued_tx(tp);
3893 r8152_power_cut_en(tp, false);
3894 r8152_aldps_en(tp, false);
3895 r8152b_enter_oob(tp);
3896 r8152_aldps_en(tp, true);
3899 static void rtl8153_up(struct r8152 *tp)
3901 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3904 r8153_u1u2en(tp, false);
3905 r8153_u2p3en(tp, false);
3906 r8153_aldps_en(tp, false);
3907 r8153_first_init(tp);
3908 r8153_aldps_en(tp, true);
3910 switch (tp->version) {
3917 r8153_u2p3en(tp, true);
3921 r8153_u1u2en(tp, true);
3924 static void rtl8153_down(struct r8152 *tp)
3926 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3927 rtl_drop_queued_tx(tp);
3931 r8153_u1u2en(tp, false);
3932 r8153_u2p3en(tp, false);
3933 r8153_power_cut_en(tp, false);
3934 r8153_aldps_en(tp, false);
3935 r8153_enter_oob(tp);
3936 r8153_aldps_en(tp, true);
3939 static void rtl8153b_up(struct r8152 *tp)
3941 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3944 r8153b_u1u2en(tp, false);
3945 r8153_u2p3en(tp, false);
3946 r8153b_aldps_en(tp, false);
3948 r8153_first_init(tp);
3949 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B);
3951 r8153b_aldps_en(tp, true);
3952 r8153_u2p3en(tp, true);
3953 r8153b_u1u2en(tp, true);
3956 static void rtl8153b_down(struct r8152 *tp)
3958 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3959 rtl_drop_queued_tx(tp);
3963 r8153b_u1u2en(tp, false);
3964 r8153_u2p3en(tp, false);
3965 r8153b_power_cut_en(tp, false);
3966 r8153b_aldps_en(tp, false);
3967 r8153_enter_oob(tp);
3968 r8153b_aldps_en(tp, true);
3971 static bool rtl8152_in_nway(struct r8152 *tp)
3975 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3976 tp->ocp_base = 0x2000;
3977 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3978 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3980 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3981 if (nway_state & 0xc000)
3987 static bool rtl8153_in_nway(struct r8152 *tp)
3989 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3991 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3997 static void set_carrier(struct r8152 *tp)
3999 struct net_device *netdev = tp->netdev;
4000 struct napi_struct *napi = &tp->napi;
4003 speed = rtl8152_get_speed(tp);
4005 if (speed & LINK_STATUS) {
4006 if (!netif_carrier_ok(netdev)) {
4007 tp->rtl_ops.enable(tp);
4008 netif_stop_queue(netdev);
4010 netif_carrier_on(netdev);
4012 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
4013 _rtl8152_set_rx_mode(netdev);
4014 napi_enable(&tp->napi);
4015 netif_wake_queue(netdev);
4016 netif_info(tp, link, netdev, "carrier on\n");
4017 } else if (netif_queue_stopped(netdev) &&
4018 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
4019 netif_wake_queue(netdev);
4022 if (netif_carrier_ok(netdev)) {
4023 netif_carrier_off(netdev);
4024 tasklet_disable(&tp->tx_tl);
4026 tp->rtl_ops.disable(tp);
4028 tasklet_enable(&tp->tx_tl);
4029 netif_info(tp, link, netdev, "carrier off\n");
4034 static void rtl_work_func_t(struct work_struct *work)
4036 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
4038 /* If the device is unplugged or !netif_running(), the workqueue
4039 * doesn't need to wake the device, and could return directly.
4041 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
4044 if (usb_autopm_get_interface(tp->intf) < 0)
4047 if (!test_bit(WORK_ENABLE, &tp->flags))
4050 if (!mutex_trylock(&tp->control)) {
4051 schedule_delayed_work(&tp->schedule, 0);
4055 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
4058 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
4059 _rtl8152_set_rx_mode(tp->netdev);
4061 /* don't schedule tasket before linking */
4062 if (test_and_clear_bit(SCHEDULE_TASKLET, &tp->flags) &&
4063 netif_carrier_ok(tp->netdev))
4064 tasklet_schedule(&tp->tx_tl);
4066 mutex_unlock(&tp->control);
4069 usb_autopm_put_interface(tp->intf);
4072 static void rtl_hw_phy_work_func_t(struct work_struct *work)
4074 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
4076 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4079 if (usb_autopm_get_interface(tp->intf) < 0)
4082 mutex_lock(&tp->control);
4084 tp->rtl_ops.hw_phy_cfg(tp);
4086 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
4088 mutex_unlock(&tp->control);
4090 usb_autopm_put_interface(tp->intf);
4093 #ifdef CONFIG_PM_SLEEP
4094 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
4097 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
4100 case PM_HIBERNATION_PREPARE:
4101 case PM_SUSPEND_PREPARE:
4102 usb_autopm_get_interface(tp->intf);
4105 case PM_POST_HIBERNATION:
4106 case PM_POST_SUSPEND:
4107 usb_autopm_put_interface(tp->intf);
4110 case PM_POST_RESTORE:
4111 case PM_RESTORE_PREPARE:
4120 static int rtl8152_open(struct net_device *netdev)
4122 struct r8152 *tp = netdev_priv(netdev);
4125 res = alloc_all_mem(tp);
4129 res = usb_autopm_get_interface(tp->intf);
4133 mutex_lock(&tp->control);
4137 netif_carrier_off(netdev);
4138 netif_start_queue(netdev);
4139 set_bit(WORK_ENABLE, &tp->flags);
4141 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
4144 netif_device_detach(tp->netdev);
4145 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
4149 napi_enable(&tp->napi);
4150 tasklet_enable(&tp->tx_tl);
4152 mutex_unlock(&tp->control);
4154 usb_autopm_put_interface(tp->intf);
4155 #ifdef CONFIG_PM_SLEEP
4156 tp->pm_notifier.notifier_call = rtl_notifier;
4157 register_pm_notifier(&tp->pm_notifier);
4162 mutex_unlock(&tp->control);
4163 usb_autopm_put_interface(tp->intf);
4170 static int rtl8152_close(struct net_device *netdev)
4172 struct r8152 *tp = netdev_priv(netdev);
4175 #ifdef CONFIG_PM_SLEEP
4176 unregister_pm_notifier(&tp->pm_notifier);
4178 tasklet_disable(&tp->tx_tl);
4179 if (!test_bit(RTL8152_UNPLUG, &tp->flags))
4180 napi_disable(&tp->napi);
4181 clear_bit(WORK_ENABLE, &tp->flags);
4182 usb_kill_urb(tp->intr_urb);
4183 cancel_delayed_work_sync(&tp->schedule);
4184 netif_stop_queue(netdev);
4186 res = usb_autopm_get_interface(tp->intf);
4187 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
4188 rtl_drop_queued_tx(tp);
4191 mutex_lock(&tp->control);
4193 tp->rtl_ops.down(tp);
4195 mutex_unlock(&tp->control);
4197 usb_autopm_put_interface(tp->intf);
4205 static void rtl_tally_reset(struct r8152 *tp)
4209 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
4210 ocp_data |= TALLY_RESET;
4211 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
4214 static void r8152b_init(struct r8152 *tp)
4219 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4222 data = r8152_mdio_read(tp, MII_BMCR);
4223 if (data & BMCR_PDOWN) {
4224 data &= ~BMCR_PDOWN;
4225 r8152_mdio_write(tp, MII_BMCR, data);
4228 r8152_aldps_en(tp, false);
4230 if (tp->version == RTL_VER_01) {
4231 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
4232 ocp_data &= ~LED_MODE_MASK;
4233 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
4236 r8152_power_cut_en(tp, false);
4238 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
4239 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
4240 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
4241 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
4242 ocp_data &= ~MCU_CLK_RATIO_MASK;
4243 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
4244 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
4245 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
4246 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
4247 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
4249 rtl_tally_reset(tp);
4251 /* enable rx aggregation */
4252 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4253 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4254 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4257 static void r8153_init(struct r8152 *tp)
4263 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4266 r8153_u1u2en(tp, false);
4268 for (i = 0; i < 500; i++) {
4269 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
4275 data = r8153_phy_status(tp, 0);
4277 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
4278 tp->version == RTL_VER_05)
4279 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
4281 data = r8152_mdio_read(tp, MII_BMCR);
4282 if (data & BMCR_PDOWN) {
4283 data &= ~BMCR_PDOWN;
4284 r8152_mdio_write(tp, MII_BMCR, data);
4287 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
4289 r8153_u2p3en(tp, false);
4291 if (tp->version == RTL_VER_04) {
4292 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
4293 ocp_data &= ~pwd_dn_scale_mask;
4294 ocp_data |= pwd_dn_scale(96);
4295 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
4297 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
4298 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
4299 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
4300 } else if (tp->version == RTL_VER_05) {
4301 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
4302 ocp_data &= ~ECM_ALDPS;
4303 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
4305 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
4306 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
4307 ocp_data &= ~DYNAMIC_BURST;
4309 ocp_data |= DYNAMIC_BURST;
4310 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
4311 } else if (tp->version == RTL_VER_06) {
4312 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
4313 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
4314 ocp_data &= ~DYNAMIC_BURST;
4316 ocp_data |= DYNAMIC_BURST;
4317 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
4320 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
4321 ocp_data |= EP4_FULL_FC;
4322 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
4324 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
4325 ocp_data &= ~TIMER11_EN;
4326 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
4328 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
4329 ocp_data &= ~LED_MODE_MASK;
4330 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
4332 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
4333 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
4334 ocp_data |= LPM_TIMER_500MS;
4336 ocp_data |= LPM_TIMER_500US;
4337 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
4339 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
4340 ocp_data &= ~SEN_VAL_MASK;
4341 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
4342 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
4344 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
4346 r8153_power_cut_en(tp, false);
4347 r8153_u1u2en(tp, true);
4348 r8153_mac_clk_spd(tp, false);
4349 usb_enable_lpm(tp->udev);
4351 /* rx aggregation */
4352 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4353 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4354 if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags))
4355 ocp_data |= RX_AGG_DISABLE;
4357 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4359 rtl_tally_reset(tp);
4361 switch (tp->udev->speed) {
4362 case USB_SPEED_SUPER:
4363 case USB_SPEED_SUPER_PLUS:
4364 tp->coalesce = COALESCE_SUPER;
4366 case USB_SPEED_HIGH:
4367 tp->coalesce = COALESCE_HIGH;
4370 tp->coalesce = COALESCE_SLOW;
4375 static void r8153b_init(struct r8152 *tp)
4381 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4384 r8153b_u1u2en(tp, false);
4386 for (i = 0; i < 500; i++) {
4387 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
4393 data = r8153_phy_status(tp, 0);
4395 data = r8152_mdio_read(tp, MII_BMCR);
4396 if (data & BMCR_PDOWN) {
4397 data &= ~BMCR_PDOWN;
4398 r8152_mdio_write(tp, MII_BMCR, data);
4401 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
4403 r8153_u2p3en(tp, false);
4405 /* MSC timer = 0xfff * 8ms = 32760 ms */
4406 ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
4408 /* U1/U2/L1 idle timer. 500 us */
4409 ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
4411 r8153b_power_cut_en(tp, false);
4412 r8153b_ups_en(tp, false);
4413 r8153_queue_wake(tp, false);
4414 rtl_runtime_suspend_enable(tp, false);
4415 r8153b_u1u2en(tp, true);
4416 usb_enable_lpm(tp->udev);
4418 /* MAC clock speed down */
4419 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
4420 ocp_data |= MAC_CLK_SPDWN_EN;
4421 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
4423 set_bit(GREEN_ETHERNET, &tp->flags);
4425 /* rx aggregation */
4426 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4427 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4428 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4430 rtl_tally_reset(tp);
4432 tp->coalesce = 15000; /* 15 us */
4435 static int rtl8152_pre_reset(struct usb_interface *intf)
4437 struct r8152 *tp = usb_get_intfdata(intf);
4438 struct net_device *netdev;
4443 netdev = tp->netdev;
4444 if (!netif_running(netdev))
4447 netif_stop_queue(netdev);
4448 tasklet_disable(&tp->tx_tl);
4449 napi_disable(&tp->napi);
4450 clear_bit(WORK_ENABLE, &tp->flags);
4451 usb_kill_urb(tp->intr_urb);
4452 cancel_delayed_work_sync(&tp->schedule);
4453 if (netif_carrier_ok(netdev)) {
4454 mutex_lock(&tp->control);
4455 tp->rtl_ops.disable(tp);
4456 mutex_unlock(&tp->control);
4462 static int rtl8152_post_reset(struct usb_interface *intf)
4464 struct r8152 *tp = usb_get_intfdata(intf);
4465 struct net_device *netdev;
4471 /* reset the MAC adddress in case of policy change */
4472 if (determine_ethernet_addr(tp, &sa) >= 0) {
4474 dev_set_mac_address (tp->netdev, &sa, NULL);
4478 netdev = tp->netdev;
4479 if (!netif_running(netdev))
4482 set_bit(WORK_ENABLE, &tp->flags);
4483 if (netif_carrier_ok(netdev)) {
4484 mutex_lock(&tp->control);
4485 tp->rtl_ops.enable(tp);
4487 _rtl8152_set_rx_mode(netdev);
4488 mutex_unlock(&tp->control);
4491 napi_enable(&tp->napi);
4492 tasklet_enable(&tp->tx_tl);
4493 netif_wake_queue(netdev);
4494 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
4496 if (!list_empty(&tp->rx_done))
4497 napi_schedule(&tp->napi);
4502 static bool delay_autosuspend(struct r8152 *tp)
4504 bool sw_linking = !!netif_carrier_ok(tp->netdev);
4505 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
4507 /* This means a linking change occurs and the driver doesn't detect it,
4508 * yet. If the driver has disabled tx/rx and hw is linking on, the
4509 * device wouldn't wake up by receiving any packet.
4511 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
4514 /* If the linking down is occurred by nway, the device may miss the
4515 * linking change event. And it wouldn't wake when linking on.
4517 if (!sw_linking && tp->rtl_ops.in_nway(tp))
4519 else if (!skb_queue_empty(&tp->tx_queue))
4525 static int rtl8152_runtime_resume(struct r8152 *tp)
4527 struct net_device *netdev = tp->netdev;
4529 if (netif_running(netdev) && netdev->flags & IFF_UP) {
4530 struct napi_struct *napi = &tp->napi;
4532 tp->rtl_ops.autosuspend_en(tp, false);
4534 set_bit(WORK_ENABLE, &tp->flags);
4536 if (netif_carrier_ok(netdev)) {
4537 if (rtl8152_get_speed(tp) & LINK_STATUS) {
4540 netif_carrier_off(netdev);
4541 tp->rtl_ops.disable(tp);
4542 netif_info(tp, link, netdev, "linking down\n");
4547 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4548 smp_mb__after_atomic();
4550 if (!list_empty(&tp->rx_done))
4551 napi_schedule(&tp->napi);
4553 usb_submit_urb(tp->intr_urb, GFP_NOIO);
4555 if (netdev->flags & IFF_UP)
4556 tp->rtl_ops.autosuspend_en(tp, false);
4558 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4564 static int rtl8152_system_resume(struct r8152 *tp)
4566 struct net_device *netdev = tp->netdev;
4568 netif_device_attach(netdev);
4570 if (netif_running(netdev) && netdev->flags & IFF_UP) {
4572 netif_carrier_off(netdev);
4573 set_bit(WORK_ENABLE, &tp->flags);
4574 usb_submit_urb(tp->intr_urb, GFP_NOIO);
4580 static int rtl8152_runtime_suspend(struct r8152 *tp)
4582 struct net_device *netdev = tp->netdev;
4585 set_bit(SELECTIVE_SUSPEND, &tp->flags);
4586 smp_mb__after_atomic();
4588 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
4591 if (netif_carrier_ok(netdev)) {
4594 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
4595 ocp_data = rcr & ~RCR_ACPT_ALL;
4596 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
4597 rxdy_gated_en(tp, true);
4598 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
4600 if (!(ocp_data & RXFIFO_EMPTY)) {
4601 rxdy_gated_en(tp, false);
4602 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
4603 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4604 smp_mb__after_atomic();
4610 clear_bit(WORK_ENABLE, &tp->flags);
4611 usb_kill_urb(tp->intr_urb);
4613 tp->rtl_ops.autosuspend_en(tp, true);
4615 if (netif_carrier_ok(netdev)) {
4616 struct napi_struct *napi = &tp->napi;
4620 rxdy_gated_en(tp, false);
4621 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
4625 if (delay_autosuspend(tp)) {
4626 rtl8152_runtime_resume(tp);
4635 static int rtl8152_system_suspend(struct r8152 *tp)
4637 struct net_device *netdev = tp->netdev;
4639 netif_device_detach(netdev);
4641 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
4642 struct napi_struct *napi = &tp->napi;
4644 clear_bit(WORK_ENABLE, &tp->flags);
4645 usb_kill_urb(tp->intr_urb);
4646 tasklet_disable(&tp->tx_tl);
4648 cancel_delayed_work_sync(&tp->schedule);
4649 tp->rtl_ops.down(tp);
4651 tasklet_enable(&tp->tx_tl);
4657 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
4659 struct r8152 *tp = usb_get_intfdata(intf);
4662 mutex_lock(&tp->control);
4664 if (PMSG_IS_AUTO(message))
4665 ret = rtl8152_runtime_suspend(tp);
4667 ret = rtl8152_system_suspend(tp);
4669 mutex_unlock(&tp->control);
4674 static int rtl8152_resume(struct usb_interface *intf)
4676 struct r8152 *tp = usb_get_intfdata(intf);
4679 mutex_lock(&tp->control);
4681 if (test_bit(SELECTIVE_SUSPEND, &tp->flags))
4682 ret = rtl8152_runtime_resume(tp);
4684 ret = rtl8152_system_resume(tp);
4686 mutex_unlock(&tp->control);
4691 static int rtl8152_reset_resume(struct usb_interface *intf)
4693 struct r8152 *tp = usb_get_intfdata(intf);
4695 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4696 mutex_lock(&tp->control);
4697 tp->rtl_ops.init(tp);
4698 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4699 mutex_unlock(&tp->control);
4700 return rtl8152_resume(intf);
4703 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4705 struct r8152 *tp = netdev_priv(dev);
4707 if (usb_autopm_get_interface(tp->intf) < 0)
4710 if (!rtl_can_wakeup(tp)) {
4714 mutex_lock(&tp->control);
4715 wol->supported = WAKE_ANY;
4716 wol->wolopts = __rtl_get_wol(tp);
4717 mutex_unlock(&tp->control);
4720 usb_autopm_put_interface(tp->intf);
4723 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4725 struct r8152 *tp = netdev_priv(dev);
4728 if (!rtl_can_wakeup(tp))
4731 if (wol->wolopts & ~WAKE_ANY)
4734 ret = usb_autopm_get_interface(tp->intf);
4738 mutex_lock(&tp->control);
4740 __rtl_set_wol(tp, wol->wolopts);
4741 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
4743 mutex_unlock(&tp->control);
4745 usb_autopm_put_interface(tp->intf);
4751 static u32 rtl8152_get_msglevel(struct net_device *dev)
4753 struct r8152 *tp = netdev_priv(dev);
4755 return tp->msg_enable;
4758 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
4760 struct r8152 *tp = netdev_priv(dev);
4762 tp->msg_enable = value;
4765 static void rtl8152_get_drvinfo(struct net_device *netdev,
4766 struct ethtool_drvinfo *info)
4768 struct r8152 *tp = netdev_priv(netdev);
4770 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
4771 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
4772 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
4776 int rtl8152_get_link_ksettings(struct net_device *netdev,
4777 struct ethtool_link_ksettings *cmd)
4779 struct r8152 *tp = netdev_priv(netdev);
4782 if (!tp->mii.mdio_read)
4785 ret = usb_autopm_get_interface(tp->intf);
4789 mutex_lock(&tp->control);
4791 mii_ethtool_get_link_ksettings(&tp->mii, cmd);
4793 mutex_unlock(&tp->control);
4795 usb_autopm_put_interface(tp->intf);
4801 static int rtl8152_set_link_ksettings(struct net_device *dev,
4802 const struct ethtool_link_ksettings *cmd)
4804 struct r8152 *tp = netdev_priv(dev);
4807 ret = usb_autopm_get_interface(tp->intf);
4811 mutex_lock(&tp->control);
4813 ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
4816 tp->autoneg = cmd->base.autoneg;
4817 tp->speed = cmd->base.speed;
4818 tp->duplex = cmd->base.duplex;
4821 mutex_unlock(&tp->control);
4823 usb_autopm_put_interface(tp->intf);
4829 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
4836 "tx_single_collisions",
4837 "tx_multi_collisions",
4845 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
4849 return ARRAY_SIZE(rtl8152_gstrings);
4855 static void rtl8152_get_ethtool_stats(struct net_device *dev,
4856 struct ethtool_stats *stats, u64 *data)
4858 struct r8152 *tp = netdev_priv(dev);
4859 struct tally_counter tally;
4861 if (usb_autopm_get_interface(tp->intf) < 0)
4864 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
4866 usb_autopm_put_interface(tp->intf);
4868 data[0] = le64_to_cpu(tally.tx_packets);
4869 data[1] = le64_to_cpu(tally.rx_packets);
4870 data[2] = le64_to_cpu(tally.tx_errors);
4871 data[3] = le32_to_cpu(tally.rx_errors);
4872 data[4] = le16_to_cpu(tally.rx_missed);
4873 data[5] = le16_to_cpu(tally.align_errors);
4874 data[6] = le32_to_cpu(tally.tx_one_collision);
4875 data[7] = le32_to_cpu(tally.tx_multi_collision);
4876 data[8] = le64_to_cpu(tally.rx_unicast);
4877 data[9] = le64_to_cpu(tally.rx_broadcast);
4878 data[10] = le32_to_cpu(tally.rx_multicast);
4879 data[11] = le16_to_cpu(tally.tx_aborted);
4880 data[12] = le16_to_cpu(tally.tx_underrun);
4883 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4885 switch (stringset) {
4887 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
4892 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4894 u32 ocp_data, lp, adv, supported = 0;
4897 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
4898 supported = mmd_eee_cap_to_ethtool_sup_t(val);
4900 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
4901 adv = mmd_eee_adv_to_ethtool_adv_t(val);
4903 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
4904 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4906 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4907 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4909 eee->eee_enabled = !!ocp_data;
4910 eee->eee_active = !!(supported & adv & lp);
4911 eee->supported = supported;
4912 eee->advertised = adv;
4913 eee->lp_advertised = lp;
4918 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4920 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4922 r8152_eee_en(tp, eee->eee_enabled);
4924 if (!eee->eee_enabled)
4927 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
4932 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4934 u32 ocp_data, lp, adv, supported = 0;
4937 val = ocp_reg_read(tp, OCP_EEE_ABLE);
4938 supported = mmd_eee_cap_to_ethtool_sup_t(val);
4940 val = ocp_reg_read(tp, OCP_EEE_ADV);
4941 adv = mmd_eee_adv_to_ethtool_adv_t(val);
4943 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
4944 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4946 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4947 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4949 eee->eee_enabled = !!ocp_data;
4950 eee->eee_active = !!(supported & adv & lp);
4951 eee->supported = supported;
4952 eee->advertised = adv;
4953 eee->lp_advertised = lp;
4958 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4960 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4962 r8153_eee_en(tp, eee->eee_enabled);
4964 if (!eee->eee_enabled)
4967 ocp_reg_write(tp, OCP_EEE_ADV, val);
4972 static int r8153b_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4974 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4976 r8153b_eee_en(tp, eee->eee_enabled);
4978 if (!eee->eee_enabled)
4981 ocp_reg_write(tp, OCP_EEE_ADV, val);
4987 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4989 struct r8152 *tp = netdev_priv(net);
4992 ret = usb_autopm_get_interface(tp->intf);
4996 mutex_lock(&tp->control);
4998 ret = tp->rtl_ops.eee_get(tp, edata);
5000 mutex_unlock(&tp->control);
5002 usb_autopm_put_interface(tp->intf);
5009 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
5011 struct r8152 *tp = netdev_priv(net);
5014 ret = usb_autopm_get_interface(tp->intf);
5018 mutex_lock(&tp->control);
5020 ret = tp->rtl_ops.eee_set(tp, edata);
5022 ret = mii_nway_restart(&tp->mii);
5024 mutex_unlock(&tp->control);
5026 usb_autopm_put_interface(tp->intf);
5032 static int rtl8152_nway_reset(struct net_device *dev)
5034 struct r8152 *tp = netdev_priv(dev);
5037 ret = usb_autopm_get_interface(tp->intf);
5041 mutex_lock(&tp->control);
5043 ret = mii_nway_restart(&tp->mii);
5045 mutex_unlock(&tp->control);
5047 usb_autopm_put_interface(tp->intf);
5053 static int rtl8152_get_coalesce(struct net_device *netdev,
5054 struct ethtool_coalesce *coalesce)
5056 struct r8152 *tp = netdev_priv(netdev);
5058 switch (tp->version) {
5067 coalesce->rx_coalesce_usecs = tp->coalesce;
5072 static int rtl8152_set_coalesce(struct net_device *netdev,
5073 struct ethtool_coalesce *coalesce)
5075 struct r8152 *tp = netdev_priv(netdev);
5078 switch (tp->version) {
5087 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
5090 ret = usb_autopm_get_interface(tp->intf);
5094 mutex_lock(&tp->control);
5096 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
5097 tp->coalesce = coalesce->rx_coalesce_usecs;
5099 if (netif_running(netdev) && netif_carrier_ok(netdev)) {
5100 netif_stop_queue(netdev);
5101 napi_disable(&tp->napi);
5102 tp->rtl_ops.disable(tp);
5103 tp->rtl_ops.enable(tp);
5105 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
5106 _rtl8152_set_rx_mode(netdev);
5107 napi_enable(&tp->napi);
5108 netif_wake_queue(netdev);
5112 mutex_unlock(&tp->control);
5114 usb_autopm_put_interface(tp->intf);
5119 static int rtl8152_get_tunable(struct net_device *netdev,
5120 const struct ethtool_tunable *tunable, void *d)
5122 struct r8152 *tp = netdev_priv(netdev);
5124 switch (tunable->id) {
5125 case ETHTOOL_RX_COPYBREAK:
5126 *(u32 *)d = tp->rx_copybreak;
5135 static int rtl8152_set_tunable(struct net_device *netdev,
5136 const struct ethtool_tunable *tunable,
5139 struct r8152 *tp = netdev_priv(netdev);
5142 switch (tunable->id) {
5143 case ETHTOOL_RX_COPYBREAK:
5145 if (val < ETH_ZLEN) {
5146 netif_err(tp, rx_err, netdev,
5147 "Invalid rx copy break value\n");
5151 if (tp->rx_copybreak != val) {
5152 napi_disable(&tp->napi);
5153 tp->rx_copybreak = val;
5154 napi_enable(&tp->napi);
5164 static void rtl8152_get_ringparam(struct net_device *netdev,
5165 struct ethtool_ringparam *ring)
5167 struct r8152 *tp = netdev_priv(netdev);
5169 ring->rx_max_pending = RTL8152_RX_MAX_PENDING;
5170 ring->rx_pending = tp->rx_pending;
5173 static int rtl8152_set_ringparam(struct net_device *netdev,
5174 struct ethtool_ringparam *ring)
5176 struct r8152 *tp = netdev_priv(netdev);
5178 if (ring->rx_pending < (RTL8152_MAX_RX * 2))
5181 if (tp->rx_pending != ring->rx_pending) {
5182 napi_disable(&tp->napi);
5183 tp->rx_pending = ring->rx_pending;
5184 napi_enable(&tp->napi);
5190 static const struct ethtool_ops ops = {
5191 .get_drvinfo = rtl8152_get_drvinfo,
5192 .get_link = ethtool_op_get_link,
5193 .nway_reset = rtl8152_nway_reset,
5194 .get_msglevel = rtl8152_get_msglevel,
5195 .set_msglevel = rtl8152_set_msglevel,
5196 .get_wol = rtl8152_get_wol,
5197 .set_wol = rtl8152_set_wol,
5198 .get_strings = rtl8152_get_strings,
5199 .get_sset_count = rtl8152_get_sset_count,
5200 .get_ethtool_stats = rtl8152_get_ethtool_stats,
5201 .get_coalesce = rtl8152_get_coalesce,
5202 .set_coalesce = rtl8152_set_coalesce,
5203 .get_eee = rtl_ethtool_get_eee,
5204 .set_eee = rtl_ethtool_set_eee,
5205 .get_link_ksettings = rtl8152_get_link_ksettings,
5206 .set_link_ksettings = rtl8152_set_link_ksettings,
5207 .get_tunable = rtl8152_get_tunable,
5208 .set_tunable = rtl8152_set_tunable,
5209 .get_ringparam = rtl8152_get_ringparam,
5210 .set_ringparam = rtl8152_set_ringparam,
5213 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
5215 struct r8152 *tp = netdev_priv(netdev);
5216 struct mii_ioctl_data *data = if_mii(rq);
5219 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5222 res = usb_autopm_get_interface(tp->intf);
5228 data->phy_id = R8152_PHY_ID; /* Internal PHY */
5232 mutex_lock(&tp->control);
5233 data->val_out = r8152_mdio_read(tp, data->reg_num);
5234 mutex_unlock(&tp->control);
5238 if (!capable(CAP_NET_ADMIN)) {
5242 mutex_lock(&tp->control);
5243 r8152_mdio_write(tp, data->reg_num, data->val_in);
5244 mutex_unlock(&tp->control);
5251 usb_autopm_put_interface(tp->intf);
5257 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
5259 struct r8152 *tp = netdev_priv(dev);
5262 switch (tp->version) {
5272 ret = usb_autopm_get_interface(tp->intf);
5276 mutex_lock(&tp->control);
5280 if (netif_running(dev)) {
5281 u32 rms = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5283 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
5285 if (netif_carrier_ok(dev))
5286 r8153_set_rx_early_size(tp);
5289 mutex_unlock(&tp->control);
5291 usb_autopm_put_interface(tp->intf);
5296 static const struct net_device_ops rtl8152_netdev_ops = {
5297 .ndo_open = rtl8152_open,
5298 .ndo_stop = rtl8152_close,
5299 .ndo_do_ioctl = rtl8152_ioctl,
5300 .ndo_start_xmit = rtl8152_start_xmit,
5301 .ndo_tx_timeout = rtl8152_tx_timeout,
5302 .ndo_set_features = rtl8152_set_features,
5303 .ndo_set_rx_mode = rtl8152_set_rx_mode,
5304 .ndo_set_mac_address = rtl8152_set_mac_address,
5305 .ndo_change_mtu = rtl8152_change_mtu,
5306 .ndo_validate_addr = eth_validate_addr,
5307 .ndo_features_check = rtl8152_features_check,
5310 static void rtl8152_unload(struct r8152 *tp)
5312 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5315 if (tp->version != RTL_VER_01)
5316 r8152_power_cut_en(tp, true);
5319 static void rtl8153_unload(struct r8152 *tp)
5321 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5324 r8153_power_cut_en(tp, false);
5327 static void rtl8153b_unload(struct r8152 *tp)
5329 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5332 r8153b_power_cut_en(tp, false);
5335 static int rtl_ops_init(struct r8152 *tp)
5337 struct rtl_ops *ops = &tp->rtl_ops;
5340 switch (tp->version) {
5344 ops->init = r8152b_init;
5345 ops->enable = rtl8152_enable;
5346 ops->disable = rtl8152_disable;
5347 ops->up = rtl8152_up;
5348 ops->down = rtl8152_down;
5349 ops->unload = rtl8152_unload;
5350 ops->eee_get = r8152_get_eee;
5351 ops->eee_set = r8152_set_eee;
5352 ops->in_nway = rtl8152_in_nway;
5353 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
5354 ops->autosuspend_en = rtl_runtime_suspend_enable;
5355 tp->rx_buf_sz = 16 * 1024;
5362 ops->init = r8153_init;
5363 ops->enable = rtl8153_enable;
5364 ops->disable = rtl8153_disable;
5365 ops->up = rtl8153_up;
5366 ops->down = rtl8153_down;
5367 ops->unload = rtl8153_unload;
5368 ops->eee_get = r8153_get_eee;
5369 ops->eee_set = r8153_set_eee;
5370 ops->in_nway = rtl8153_in_nway;
5371 ops->hw_phy_cfg = r8153_hw_phy_cfg;
5372 ops->autosuspend_en = rtl8153_runtime_enable;
5373 tp->rx_buf_sz = 32 * 1024;
5378 ops->init = r8153b_init;
5379 ops->enable = rtl8153_enable;
5380 ops->disable = rtl8153b_disable;
5381 ops->up = rtl8153b_up;
5382 ops->down = rtl8153b_down;
5383 ops->unload = rtl8153b_unload;
5384 ops->eee_get = r8153_get_eee;
5385 ops->eee_set = r8153b_set_eee;
5386 ops->in_nway = rtl8153_in_nway;
5387 ops->hw_phy_cfg = r8153b_hw_phy_cfg;
5388 ops->autosuspend_en = rtl8153b_runtime_enable;
5389 tp->rx_buf_sz = 32 * 1024;
5394 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
5401 static u8 rtl_get_version(struct usb_interface *intf)
5403 struct usb_device *udev = interface_to_usbdev(intf);
5409 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
5413 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
5414 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
5415 PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
5417 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
5423 version = RTL_VER_01;
5426 version = RTL_VER_02;
5429 version = RTL_VER_03;
5432 version = RTL_VER_04;
5435 version = RTL_VER_05;
5438 version = RTL_VER_06;
5441 version = RTL_VER_07;
5444 version = RTL_VER_08;
5447 version = RTL_VER_09;
5450 version = RTL_VER_UNKNOWN;
5451 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
5455 dev_dbg(&intf->dev, "Detected version 0x%04x\n", version);
5460 static int rtl8152_probe(struct usb_interface *intf,
5461 const struct usb_device_id *id)
5463 struct usb_device *udev = interface_to_usbdev(intf);
5464 u8 version = rtl_get_version(intf);
5466 struct net_device *netdev;
5469 if (version == RTL_VER_UNKNOWN)
5472 if (udev->actconfig->desc.bConfigurationValue != 1) {
5473 usb_driver_set_configuration(udev, 1);
5477 usb_reset_device(udev);
5478 netdev = alloc_etherdev(sizeof(struct r8152));
5480 dev_err(&intf->dev, "Out of memory\n");
5484 SET_NETDEV_DEV(netdev, &intf->dev);
5485 tp = netdev_priv(netdev);
5486 tp->msg_enable = 0x7FFF;
5489 tp->netdev = netdev;
5491 tp->version = version;
5497 tp->mii.supports_gmii = 0;
5500 tp->mii.supports_gmii = 1;
5504 ret = rtl_ops_init(tp);
5508 mutex_init(&tp->control);
5509 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
5510 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
5511 tasklet_init(&tp->tx_tl, bottom_half, (unsigned long)tp);
5512 tasklet_disable(&tp->tx_tl);
5514 netdev->netdev_ops = &rtl8152_netdev_ops;
5515 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
5517 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
5518 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
5519 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
5520 NETIF_F_HW_VLAN_CTAG_TX;
5521 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
5522 NETIF_F_TSO | NETIF_F_FRAGLIST |
5523 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
5524 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
5525 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
5526 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
5527 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
5529 if (tp->version == RTL_VER_01) {
5530 netdev->features &= ~NETIF_F_RXCSUM;
5531 netdev->hw_features &= ~NETIF_F_RXCSUM;
5534 if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x3011 && udev->serial &&
5535 (!strcmp(udev->serial, "000001000000") || !strcmp(udev->serial, "000002000000"))) {
5536 dev_info(&udev->dev, "Dell TB16 Dock, disable RX aggregation");
5537 set_bit(DELL_TB_RX_AGG_BUG, &tp->flags);
5540 netdev->ethtool_ops = &ops;
5541 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
5543 /* MTU range: 68 - 1500 or 9194 */
5544 netdev->min_mtu = ETH_MIN_MTU;
5545 switch (tp->version) {
5548 netdev->max_mtu = ETH_DATA_LEN;
5551 netdev->max_mtu = RTL8153_MAX_MTU;
5555 tp->mii.dev = netdev;
5556 tp->mii.mdio_read = read_mii_word;
5557 tp->mii.mdio_write = write_mii_word;
5558 tp->mii.phy_id_mask = 0x3f;
5559 tp->mii.reg_num_mask = 0x1f;
5560 tp->mii.phy_id = R8152_PHY_ID;
5562 tp->autoneg = AUTONEG_ENABLE;
5563 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
5564 tp->duplex = DUPLEX_FULL;
5566 tp->rx_copybreak = RTL8152_RXFG_HEADSZ;
5567 tp->rx_pending = 10 * RTL8152_MAX_RX;
5569 intf->needs_remote_wakeup = 1;
5571 tp->rtl_ops.init(tp);
5572 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
5573 set_ethernet_addr(tp);
5575 usb_set_intfdata(intf, tp);
5576 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
5578 ret = register_netdev(netdev);
5580 netif_err(tp, probe, netdev, "couldn't register the device\n");
5584 if (!rtl_can_wakeup(tp))
5585 __rtl_set_wol(tp, 0);
5587 tp->saved_wolopts = __rtl_get_wol(tp);
5588 if (tp->saved_wolopts)
5589 device_set_wakeup_enable(&udev->dev, true);
5591 device_set_wakeup_enable(&udev->dev, false);
5593 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
5598 netif_napi_del(&tp->napi);
5599 tasklet_kill(&tp->tx_tl);
5600 usb_set_intfdata(intf, NULL);
5602 free_netdev(netdev);
5606 static void rtl8152_disconnect(struct usb_interface *intf)
5608 struct r8152 *tp = usb_get_intfdata(intf);
5610 usb_set_intfdata(intf, NULL);
5614 netif_napi_del(&tp->napi);
5615 unregister_netdev(tp->netdev);
5616 tasklet_kill(&tp->tx_tl);
5617 cancel_delayed_work_sync(&tp->hw_phy_work);
5618 tp->rtl_ops.unload(tp);
5619 free_netdev(tp->netdev);
5623 #define REALTEK_USB_DEVICE(vend, prod) \
5624 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
5625 USB_DEVICE_ID_MATCH_INT_CLASS, \
5626 .idVendor = (vend), \
5627 .idProduct = (prod), \
5628 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
5631 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
5632 USB_DEVICE_ID_MATCH_DEVICE, \
5633 .idVendor = (vend), \
5634 .idProduct = (prod), \
5635 .bInterfaceClass = USB_CLASS_COMM, \
5636 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
5637 .bInterfaceProtocol = USB_CDC_PROTO_NONE
5639 /* table of devices that work with this driver */
5640 static const struct usb_device_id rtl8152_table[] = {
5641 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)},
5642 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
5643 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
5644 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
5645 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
5646 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
5647 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
5648 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
5649 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
5650 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
5651 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
5652 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
5653 {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
5654 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
5655 {REALTEK_USB_DEVICE(VENDOR_ID_TPLINK, 0x0601)},
5659 MODULE_DEVICE_TABLE(usb, rtl8152_table);
5661 static struct usb_driver rtl8152_driver = {
5663 .id_table = rtl8152_table,
5664 .probe = rtl8152_probe,
5665 .disconnect = rtl8152_disconnect,
5666 .suspend = rtl8152_suspend,
5667 .resume = rtl8152_resume,
5668 .reset_resume = rtl8152_reset_resume,
5669 .pre_reset = rtl8152_pre_reset,
5670 .post_reset = rtl8152_post_reset,
5671 .supports_autosuspend = 1,
5672 .disable_hub_initiated_lpm = 1,
5675 module_usb_driver(rtl8152_driver);
5677 MODULE_AUTHOR(DRIVER_AUTHOR);
5678 MODULE_DESCRIPTION(DRIVER_DESC);
5679 MODULE_LICENSE("GPL");
5680 MODULE_VERSION(DRIVER_VERSION);