2 * Clause 45 PHY support
4 #include <linux/ethtool.h>
5 #include <linux/export.h>
6 #include <linux/mdio.h>
11 * genphy_c45_setup_forced - configures a forced speed
12 * @phydev: target phy_device struct
14 int genphy_c45_pma_setup_forced(struct phy_device *phydev)
16 int ctrl1, ctrl2, ret;
18 /* Half duplex is not supported */
19 if (phydev->duplex != DUPLEX_FULL)
22 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
26 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2);
30 ctrl1 &= ~MDIO_CTRL1_SPEEDSEL;
32 * PMA/PMD type selection is 1.7.5:0 not 1.7.3:0. See 45.2.1.6.1
33 * in 802.3-2012 and 802.3-2015.
35 ctrl2 &= ~(MDIO_PMA_CTRL2_TYPE | 0x30);
37 switch (phydev->speed) {
39 ctrl2 |= MDIO_PMA_CTRL2_10BT;
42 ctrl1 |= MDIO_PMA_CTRL1_SPEED100;
43 ctrl2 |= MDIO_PMA_CTRL2_100BTX;
46 ctrl1 |= MDIO_PMA_CTRL1_SPEED1000;
47 /* Assume 1000base-T */
48 ctrl2 |= MDIO_PMA_CTRL2_1000BT;
51 ctrl1 |= MDIO_CTRL1_SPEED10G;
52 /* Assume 10Gbase-T */
53 ctrl2 |= MDIO_PMA_CTRL2_10GBT;
59 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1);
63 return phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2);
65 EXPORT_SYMBOL_GPL(genphy_c45_pma_setup_forced);
68 * genphy_c45_an_disable_aneg - disable auto-negotiation
69 * @phydev: target phy_device struct
71 * Disable auto-negotiation in the Clause 45 PHY. The link parameters
72 * parameters are controlled through the PMA/PMD MMD registers.
74 * Returns zero on success, negative errno code on failure.
76 int genphy_c45_an_disable_aneg(struct phy_device *phydev)
80 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
84 val &= ~(MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART);
86 return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val);
88 EXPORT_SYMBOL_GPL(genphy_c45_an_disable_aneg);
91 * genphy_c45_restart_aneg - Enable and restart auto-negotiation
92 * @phydev: target phy_device struct
94 * This assumes that the auto-negotiation MMD is present.
96 * Enable and restart auto-negotiation.
98 int genphy_c45_restart_aneg(struct phy_device *phydev)
102 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
106 val |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART;
108 return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val);
110 EXPORT_SYMBOL_GPL(genphy_c45_restart_aneg);
113 * genphy_c45_aneg_done - return auto-negotiation complete status
114 * @phydev: target phy_device struct
116 * This assumes that the auto-negotiation MMD is present.
118 * Reads the status register from the auto-negotiation MMD, returning:
119 * - positive if auto-negotiation is complete
120 * - negative errno code on error
123 int genphy_c45_aneg_done(struct phy_device *phydev)
125 int val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
127 return val < 0 ? val : val & MDIO_AN_STAT1_COMPLETE ? 1 : 0;
129 EXPORT_SYMBOL_GPL(genphy_c45_aneg_done);
132 * genphy_c45_read_link - read the overall link status from the MMDs
133 * @phydev: target phy_device struct
134 * @mmd_mask: MMDs to read status from
136 * Read the link status from the specified MMDs, and if they all indicate
137 * that the link is up, return positive. If an error is encountered,
138 * a negative errno will be returned, otherwise zero.
140 int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask)
146 devad = __ffs(mmd_mask);
147 mmd_mask &= ~BIT(devad);
149 /* The link state is latched low so that momentary link
150 * drops can be detected. Do not double-read the status
151 * register if the link is down.
153 val = phy_read_mmd(phydev, devad, MDIO_STAT1);
157 if (!(val & MDIO_STAT1_LSTATUS))
163 EXPORT_SYMBOL_GPL(genphy_c45_read_link);
166 * genphy_c45_read_lpa - read the link partner advertisement and pause
167 * @phydev: target phy_device struct
169 * Read the Clause 45 defined base (7.19) and 10G (7.33) status registers,
170 * filling in the link partner advertisement, pause and asym_pause members
171 * in @phydev. This assumes that the auto-negotiation MMD is present, and
172 * the backplane bit (7.48.0) is clear. Clause 45 PHY drivers are expected
173 * to fill in the remainder of the link partner advert from vendor registers.
175 int genphy_c45_read_lpa(struct phy_device *phydev)
179 /* Read the link partner's base page advertisement */
180 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA);
184 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, val);
185 phydev->pause = val & LPA_PAUSE_CAP ? 1 : 0;
186 phydev->asym_pause = val & LPA_PAUSE_ASYM ? 1 : 0;
188 /* Read the link partner's 10G advertisement */
189 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
193 if (val & MDIO_AN_10GBT_STAT_LP10G)
194 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
195 phydev->lp_advertising);
199 EXPORT_SYMBOL_GPL(genphy_c45_read_lpa);
202 * genphy_c45_read_pma - read link speed etc from PMA
203 * @phydev: target phy_device struct
205 int genphy_c45_read_pma(struct phy_device *phydev)
209 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
213 switch (val & MDIO_CTRL1_SPEEDSEL) {
215 phydev->speed = SPEED_10;
217 case MDIO_PMA_CTRL1_SPEED100:
218 phydev->speed = SPEED_100;
220 case MDIO_PMA_CTRL1_SPEED1000:
221 phydev->speed = SPEED_1000;
223 case MDIO_CTRL1_SPEED10G:
224 phydev->speed = SPEED_10000;
227 phydev->speed = SPEED_UNKNOWN;
231 phydev->duplex = DUPLEX_FULL;
235 EXPORT_SYMBOL_GPL(genphy_c45_read_pma);
238 * genphy_c45_read_mdix - read mdix status from PMA
239 * @phydev: target phy_device struct
241 int genphy_c45_read_mdix(struct phy_device *phydev)
245 if (phydev->speed == SPEED_10000) {
246 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
247 MDIO_PMA_10GBT_SWAPPOL);
252 case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:
253 phydev->mdix = ETH_TP_MDI;
257 phydev->mdix = ETH_TP_MDI_X;
261 phydev->mdix = ETH_TP_MDI_INVALID;
268 EXPORT_SYMBOL_GPL(genphy_c45_read_mdix);
270 /* The gen10g_* functions are the old Clause 45 stub */
272 int gen10g_config_aneg(struct phy_device *phydev)
276 EXPORT_SYMBOL_GPL(gen10g_config_aneg);
278 int gen10g_read_status(struct phy_device *phydev)
280 u32 mmd_mask = phydev->c45_ids.devices_in_package;
283 /* For now just lie and say it's 10G all the time */
284 phydev->speed = SPEED_10000;
285 phydev->duplex = DUPLEX_FULL;
287 /* Avoid reading the vendor MMDs */
288 mmd_mask &= ~(BIT(MDIO_MMD_VEND1) | BIT(MDIO_MMD_VEND2));
290 ret = genphy_c45_read_link(phydev, mmd_mask);
292 phydev->link = ret > 0 ? 1 : 0;
296 EXPORT_SYMBOL_GPL(gen10g_read_status);
298 int gen10g_no_soft_reset(struct phy_device *phydev)
300 /* Do nothing for now */
303 EXPORT_SYMBOL_GPL(gen10g_no_soft_reset);
305 int gen10g_config_init(struct phy_device *phydev)
307 /* Temporarily just say we support everything */
308 linkmode_zero(phydev->supported);
310 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
312 linkmode_copy(phydev->advertising, phydev->supported);
316 EXPORT_SYMBOL_GPL(gen10g_config_init);
318 int gen10g_suspend(struct phy_device *phydev)
322 EXPORT_SYMBOL_GPL(gen10g_suspend);
324 int gen10g_resume(struct phy_device *phydev)
328 EXPORT_SYMBOL_GPL(gen10g_resume);
330 struct phy_driver genphy_10g_driver = {
331 .phy_id = 0xffffffff,
332 .phy_id_mask = 0xffffffff,
333 .name = "Generic 10G PHY",
334 .soft_reset = gen10g_no_soft_reset,
335 .config_init = gen10g_config_init,
336 .features = PHY_10GBIT_FEATURES,
337 .config_aneg = gen10g_config_aneg,
338 .read_status = gen10g_read_status,
339 .suspend = gen10g_suspend,
340 .resume = gen10g_resume,