2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
41 #include <linux/uaccess.h>
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
133 #define MII_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135 #define MII_88E1510_PHY_LED_DEF 0x1177
137 #define MII_M1011_PHY_STATUS 0x11
138 #define MII_M1011_PHY_STATUS_1000 0x8000
139 #define MII_M1011_PHY_STATUS_100 0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
143 #define MII_M1011_PHY_STATUS_LINK 0x0400
145 #define MII_88E3016_PHY_SPEC_CTRL 0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
149 #define MII_88E1510_GEN_CTRL_REG_1 0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
154 #define LPA_FIBER_1000HALF 0x40
155 #define LPA_FIBER_1000FULL 0x20
157 #define LPA_PAUSE_FIBER 0x180
158 #define LPA_PAUSE_ASYM_FIBER 0x100
160 #define ADVERTISE_FIBER_1000HALF 0x40
161 #define ADVERTISE_FIBER_1000FULL 0x20
163 #define ADVERTISE_PAUSE_FIBER 0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
166 #define REGISTER_LINK_STATUS 0x400
167 #define NB_FIBER_STATS 1
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
173 struct marvell_hw_stat {
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 { "phy_receive_errors_copper", 0, 21, 16},
182 { "phy_idle_errors", 0, 10, 8 },
183 { "phy_receive_errors_fiber", 1, 21, 16},
186 struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
189 struct device *hwmon_dev;
192 static int marvell_read_page(struct phy_device *phydev)
194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
197 static int marvell_write_page(struct phy_device *phydev, int page)
199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
202 static int marvell_set_page(struct phy_device *phydev, int page)
204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
207 static int marvell_ack_interrupt(struct phy_device *phydev)
211 /* Clear the interrupts by reading the reg */
212 err = phy_read(phydev, MII_M1011_IEVENT);
220 static int marvell_config_intr(struct phy_device *phydev)
224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 err = phy_write(phydev, MII_M1011_IMASK,
226 MII_M1011_IMASK_INIT);
228 err = phy_write(phydev, MII_M1011_IMASK,
229 MII_M1011_IMASK_CLEAR);
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
240 /* get the current settings */
241 reg = phy_read(phydev, MII_M1011_PHY_SCR);
246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
249 val |= MII_M1011_PHY_SCR_MDI;
252 val |= MII_M1011_PHY_SCR_MDI_X;
254 case ETH_TP_MDI_AUTO:
255 case ETH_TP_MDI_INVALID:
257 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
262 /* Set the new polarity value in the register */
263 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
276 reg = phy_read(phydev, MII_M1011_PHY_SCR);
280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
285 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
288 static int marvell_config_aneg(struct phy_device *phydev)
293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
300 MII_M1111_PHY_LED_DIRECT);
304 err = genphy_config_aneg(phydev);
308 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
309 /* A write to speed/duplex bits (that is performed by
310 * genphy_config_aneg() call above) must be followed by
311 * a software reset. Otherwise, the write has no effect.
313 err = genphy_soft_reset(phydev);
321 static int m88e1101_config_aneg(struct phy_device *phydev)
325 /* This Marvell PHY has an errata which requires
326 * that certain registers get written in order
327 * to restart autonegotiation
329 err = genphy_soft_reset(phydev);
333 err = phy_write(phydev, 0x1d, 0x1f);
337 err = phy_write(phydev, 0x1e, 0x200c);
341 err = phy_write(phydev, 0x1d, 0x5);
345 err = phy_write(phydev, 0x1e, 0);
349 err = phy_write(phydev, 0x1e, 0x100);
353 return marvell_config_aneg(phydev);
356 #ifdef CONFIG_OF_MDIO
357 /* Set and/or override some configuration registers based on the
358 * marvell,reg-init property stored in the of_node for the phydev.
360 * marvell,reg-init = <reg-page reg mask value>,...;
362 * There may be one or more sets of <reg-page reg mask value>:
364 * reg-page: which register bank to use.
366 * mask: if non-zero, ANDed with existing register value.
367 * value: ORed with the masked value and written to the regiser.
370 static int marvell_of_reg_init(struct phy_device *phydev)
373 int len, i, saved_page, current_page, ret = 0;
375 if (!phydev->mdio.dev.of_node)
378 paddr = of_get_property(phydev->mdio.dev.of_node,
379 "marvell,reg-init", &len);
380 if (!paddr || len < (4 * sizeof(*paddr)))
383 saved_page = phy_save_page(phydev);
386 current_page = saved_page;
388 len /= sizeof(*paddr);
389 for (i = 0; i < len - 3; i += 4) {
390 u16 page = be32_to_cpup(paddr + i);
391 u16 reg = be32_to_cpup(paddr + i + 1);
392 u16 mask = be32_to_cpup(paddr + i + 2);
393 u16 val_bits = be32_to_cpup(paddr + i + 3);
396 if (page != current_page) {
398 ret = marvell_write_page(phydev, page);
405 val = __phy_read(phydev, reg);
414 ret = __phy_write(phydev, reg, val);
419 return phy_restore_page(phydev, saved_page, ret);
422 static int marvell_of_reg_init(struct phy_device *phydev)
426 #endif /* CONFIG_OF_MDIO */
428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
434 MII_88E1121_PHY_MSCR_TX_DELAY;
435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
443 MII_88E1121_PHY_MSCR_REG,
444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
447 static int m88e1121_config_aneg(struct phy_device *phydev)
452 if (phy_interface_is_rgmii(phydev)) {
453 err = m88e1121_config_aneg_rgmii_delays(phydev);
458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
464 err = genphy_config_aneg(phydev);
468 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
469 /* A software reset is used to ensure a "commit" of the
472 err = genphy_soft_reset(phydev);
480 static int m88e1318_config_aneg(struct phy_device *phydev)
484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
485 MII_88E1318S_PHY_MSCR1_REG,
486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
490 return m88e1121_config_aneg(phydev);
494 * ethtool_adv_to_fiber_adv_t
495 * @ethadv: the ethtool advertisement settings
497 * A small helper function that translates ethtool advertisement
498 * settings to phy autonegotiation advertisements for the
499 * MII_ADV register for fiber link.
501 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
505 if (ethadv & ADVERTISED_1000baseT_Half)
506 result |= ADVERTISE_FIBER_1000HALF;
507 if (ethadv & ADVERTISED_1000baseT_Full)
508 result |= ADVERTISE_FIBER_1000FULL;
510 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
511 result |= LPA_PAUSE_ASYM_FIBER;
512 else if (ethadv & ADVERTISE_PAUSE_CAP)
513 result |= (ADVERTISE_PAUSE_FIBER
514 & (~ADVERTISE_PAUSE_ASYM_FIBER));
520 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
521 * @phydev: target phy_device struct
523 * Description: If auto-negotiation is enabled, we configure the
524 * advertising, and then restart auto-negotiation. If it is not
525 * enabled, then we write the BMCR. Adapted for fiber link in
526 * some Marvell's devices.
528 static int marvell_config_aneg_fiber(struct phy_device *phydev)
535 if (phydev->autoneg != AUTONEG_ENABLE)
536 return genphy_setup_forced(phydev);
538 /* Only allow advertising what this PHY supports */
539 phydev->advertising &= phydev->supported;
540 advertise = phydev->advertising;
542 /* Setup fiber advertisement */
543 adv = phy_read(phydev, MII_ADVERTISE);
548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
550 adv |= ethtool_adv_to_fiber_adv_t(advertise);
553 err = phy_write(phydev, MII_ADVERTISE, adv);
561 /* Advertisement hasn't changed, but maybe aneg was never on to
562 * begin with? Or maybe phy was isolated?
564 int ctl = phy_read(phydev, MII_BMCR);
569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
570 changed = 1; /* do restart aneg */
573 /* Only restart aneg if we are advertising something different
574 * than we were before.
577 changed = genphy_restart_aneg(phydev);
582 static int m88e1510_config_aneg(struct phy_device *phydev)
586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
590 /* Configure the copper link first */
591 err = m88e1318_config_aneg(phydev);
595 /* Do not touch the fiber page if we're in copper->sgmii mode */
596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
599 /* Then the fiber link */
600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
604 err = marvell_config_aneg_fiber(phydev);
608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
615 static void marvell_config_led(struct phy_device *phydev)
620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
624 def_config = MII_88E1121_PHY_LED_DEF;
626 /* Default PHY LED config:
627 * LED[0] .. 1000Mbps Link
628 * LED[1] .. 100Mbps Link
629 * LED[2] .. Blink, Activity
631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
632 def_config = MII_88E1510_PHY_LED_DEF;
638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
641 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
644 static int marvell_config_init(struct phy_device *phydev)
646 /* Set defalut LED */
647 marvell_config_led(phydev);
649 /* Set registers from marvell,reg-init DT property */
650 return marvell_of_reg_init(phydev);
653 static int m88e1116r_config_init(struct phy_device *phydev)
657 err = genphy_soft_reset(phydev);
663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
671 err = marvell_set_downshift(phydev, true, 8);
675 if (phy_interface_is_rgmii(phydev)) {
676 err = m88e1121_config_aneg_rgmii_delays(phydev);
681 err = genphy_soft_reset(phydev);
685 return marvell_config_init(phydev);
688 static int m88e3016_config_init(struct phy_device *phydev)
692 /* Enable Scrambler and Auto-Crossover */
693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
694 MII_88E3016_DISABLE_SCRAMBLER,
695 MII_88E3016_AUTO_MDIX_CROSSOVER);
699 return marvell_config_init(phydev);
702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
704 int fibre_copper_auto)
706 if (fibre_copper_auto)
707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
710 MII_M1111_HWCFG_MODE_MASK |
711 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
712 MII_M1111_HWCFG_FIBER_COPPER_RES,
716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
723 delay = MII_M1111_RGMII_RX_DELAY;
724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
725 delay = MII_M1111_RGMII_TX_DELAY;
730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
735 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
740 err = m88e1111_config_init_rgmii_delays(phydev);
744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
748 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
758 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
762 err = m88e1111_config_init_hwcfg_mode(
764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
765 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
769 /* make sure copper is selected */
770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
773 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
777 err = m88e1111_config_init_rgmii_delays(phydev);
781 err = m88e1111_config_init_hwcfg_mode(
783 MII_M1111_HWCFG_MODE_RTBI,
784 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
789 err = genphy_soft_reset(phydev);
793 return m88e1111_config_init_hwcfg_mode(
795 MII_M1111_HWCFG_MODE_RTBI,
796 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
799 static int m88e1111_config_init(struct phy_device *phydev)
803 if (phy_interface_is_rgmii(phydev)) {
804 err = m88e1111_config_init_rgmii(phydev);
809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
810 err = m88e1111_config_init_sgmii(phydev);
815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
816 err = m88e1111_config_init_rtbi(phydev);
821 err = marvell_of_reg_init(phydev);
825 return genphy_soft_reset(phydev);
828 static int m88e1318_config_init(struct phy_device *phydev)
830 if (phy_interrupt_is_valid(phydev)) {
831 int err = phy_modify_paged(
832 phydev, MII_MARVELL_LED_PAGE,
833 MII_88E1318S_PHY_LED_TCR,
834 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
841 return marvell_config_init(phydev);
844 static int m88e1510_config_init(struct phy_device *phydev)
848 /* SGMII-to-Copper mode initialization */
849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
853 err = marvell_set_page(phydev, 18);
857 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
858 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
859 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
860 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
864 /* PHY reset is necessary after changing MODE[2:0] */
865 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
866 MII_88E1510_GEN_CTRL_REG_1_RESET);
870 /* Reset page selection */
871 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
875 /* There appears to be a bug in the 88e1512 when used in
876 * SGMII to copper mode, where the AN advertisement register
877 * clears the pause bits each time a negotiation occurs.
878 * This means we can never be truely sure what was advertised,
879 * so disable Pause support.
881 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
882 phydev->supported &= ~pause;
883 phydev->advertising &= ~pause;
886 return m88e1318_config_init(phydev);
889 static int m88e1118_config_aneg(struct phy_device *phydev)
893 err = genphy_soft_reset(phydev);
897 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
901 err = genphy_config_aneg(phydev);
905 static int m88e1118_config_init(struct phy_device *phydev)
910 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
914 /* Enable 1000 Mbit */
915 err = phy_write(phydev, 0x15, 0x1070);
920 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
924 /* Adjust LED Control */
925 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
926 err = phy_write(phydev, 0x10, 0x1100);
928 err = phy_write(phydev, 0x10, 0x021e);
932 err = marvell_of_reg_init(phydev);
937 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
941 return genphy_soft_reset(phydev);
944 static int m88e1149_config_init(struct phy_device *phydev)
949 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
953 /* Enable 1000 Mbit */
954 err = phy_write(phydev, 0x15, 0x1048);
958 err = marvell_of_reg_init(phydev);
963 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
967 return genphy_soft_reset(phydev);
970 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
974 err = m88e1111_config_init_rgmii_delays(phydev);
978 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
979 err = phy_write(phydev, 0x1d, 0x0012);
983 err = phy_modify(phydev, 0x1e, 0x0fc0,
984 2 << 9 | /* 36 ohm */
985 2 << 6); /* 39 ohm */
989 err = phy_write(phydev, 0x1d, 0x3);
993 err = phy_write(phydev, 0x1e, 0x8000);
998 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1000 return m88e1111_config_init_hwcfg_mode(
1001 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1002 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1005 static int m88e1145_config_init(struct phy_device *phydev)
1009 /* Take care of errata E0 & E1 */
1010 err = phy_write(phydev, 0x1d, 0x001b);
1014 err = phy_write(phydev, 0x1e, 0x418f);
1018 err = phy_write(phydev, 0x1d, 0x0016);
1022 err = phy_write(phydev, 0x1e, 0xa2da);
1026 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1027 err = m88e1145_config_init_rgmii(phydev);
1032 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1033 err = m88e1145_config_init_sgmii(phydev);
1038 err = marvell_of_reg_init(phydev);
1046 * fiber_lpa_to_ethtool_lpa_t
1047 * @lpa: value of the MII_LPA register for fiber link
1049 * A small helper function that translates MII_LPA
1050 * bits to ethtool LP advertisement settings.
1052 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1056 if (lpa & LPA_FIBER_1000HALF)
1057 result |= ADVERTISED_1000baseT_Half;
1058 if (lpa & LPA_FIBER_1000FULL)
1059 result |= ADVERTISED_1000baseT_Full;
1065 * marvell_update_link - update link status in real time in @phydev
1066 * @phydev: target phy_device struct
1068 * Description: Update the value in phydev->link to reflect the
1069 * current link value.
1071 static int marvell_update_link(struct phy_device *phydev, int fiber)
1075 /* Use the generic register for copper link, or specific
1076 * register for fiber case
1079 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1083 if ((status & REGISTER_LINK_STATUS) == 0)
1088 return genphy_update_link(phydev);
1094 static int marvell_read_status_page_an(struct phy_device *phydev,
1101 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1105 lpa = phy_read(phydev, MII_LPA);
1109 lpagb = phy_read(phydev, MII_STAT1000);
1113 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1114 phydev->duplex = DUPLEX_FULL;
1116 phydev->duplex = DUPLEX_HALF;
1118 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1120 phydev->asym_pause = 0;
1123 case MII_M1011_PHY_STATUS_1000:
1124 phydev->speed = SPEED_1000;
1127 case MII_M1011_PHY_STATUS_100:
1128 phydev->speed = SPEED_100;
1132 phydev->speed = SPEED_10;
1137 phydev->lp_advertising =
1138 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1139 mii_lpa_to_ethtool_lpa_t(lpa);
1141 if (phydev->duplex == DUPLEX_FULL) {
1142 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1143 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1146 /* The fiber link is only 1000M capable */
1147 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1149 if (phydev->duplex == DUPLEX_FULL) {
1150 if (!(lpa & LPA_PAUSE_FIBER)) {
1152 phydev->asym_pause = 0;
1153 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1155 phydev->asym_pause = 1;
1158 phydev->asym_pause = 0;
1165 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1167 int bmcr = phy_read(phydev, MII_BMCR);
1172 if (bmcr & BMCR_FULLDPLX)
1173 phydev->duplex = DUPLEX_FULL;
1175 phydev->duplex = DUPLEX_HALF;
1177 if (bmcr & BMCR_SPEED1000)
1178 phydev->speed = SPEED_1000;
1179 else if (bmcr & BMCR_SPEED100)
1180 phydev->speed = SPEED_100;
1182 phydev->speed = SPEED_10;
1185 phydev->asym_pause = 0;
1186 phydev->lp_advertising = 0;
1191 /* marvell_read_status_page
1194 * Check the link, then figure out the current state
1195 * by comparing what we advertise with what the link partner
1196 * advertises. Start by checking the gigabit possibilities,
1197 * then move on to 10/100.
1199 static int marvell_read_status_page(struct phy_device *phydev, int page)
1204 /* Detect and update the link, but return if there
1207 if (page == MII_MARVELL_FIBER_PAGE)
1212 err = marvell_update_link(phydev, fiber);
1216 if (phydev->autoneg == AUTONEG_ENABLE)
1217 err = marvell_read_status_page_an(phydev, fiber);
1219 err = marvell_read_status_page_fixed(phydev);
1224 /* marvell_read_status
1226 * Some Marvell's phys have two modes: fiber and copper.
1227 * Both need status checked.
1229 * First, check the fiber link and status.
1230 * If the fiber link is down, check the copper link and status which
1231 * will be the default value if both link are down.
1233 static int marvell_read_status(struct phy_device *phydev)
1237 /* Check the fiber mode first */
1238 if (phydev->supported & SUPPORTED_FIBRE &&
1239 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1240 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1244 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1248 /* If the fiber link is up, it is the selected and
1249 * used link. In this case, we need to stay in the
1250 * fiber page. Please to be careful about that, avoid
1251 * to restore Copper page in other functions which
1252 * could break the behaviour for some fiber phy like
1258 /* If fiber link is down, check and save copper mode state */
1259 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1264 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1267 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1273 * Some Marvell's phys have two modes: fiber and copper.
1274 * Both need to be suspended
1276 static int marvell_suspend(struct phy_device *phydev)
1280 /* Suspend the fiber mode first */
1281 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1282 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1286 /* With the page set, use the generic suspend */
1287 err = genphy_suspend(phydev);
1291 /* Then, the copper link */
1292 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1297 /* With the page set, use the generic suspend */
1298 return genphy_suspend(phydev);
1301 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1307 * Some Marvell's phys have two modes: fiber and copper.
1308 * Both need to be resumed
1310 static int marvell_resume(struct phy_device *phydev)
1314 /* Resume the fiber mode first */
1315 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1316 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1320 /* With the page set, use the generic resume */
1321 err = genphy_resume(phydev);
1325 /* Then, the copper link */
1326 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1331 /* With the page set, use the generic resume */
1332 return genphy_resume(phydev);
1335 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1339 static int marvell_aneg_done(struct phy_device *phydev)
1341 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1343 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1346 static int m88e1121_did_interrupt(struct phy_device *phydev)
1350 imask = phy_read(phydev, MII_M1011_IEVENT);
1352 if (imask & MII_M1011_IMASK_INIT)
1358 static void m88e1318_get_wol(struct phy_device *phydev,
1359 struct ethtool_wolinfo *wol)
1361 int oldpage, ret = 0;
1363 wol->supported = WAKE_MAGIC;
1366 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1370 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1371 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1372 wol->wolopts |= WAKE_MAGIC;
1375 phy_restore_page(phydev, oldpage, ret);
1378 static int m88e1318_set_wol(struct phy_device *phydev,
1379 struct ethtool_wolinfo *wol)
1381 int err = 0, oldpage;
1383 oldpage = phy_save_page(phydev);
1387 if (wol->wolopts & WAKE_MAGIC) {
1388 /* Explicitly switch to page 0x00, just to be sure */
1389 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1393 /* If WOL event happened once, the LED[2] interrupt pin
1394 * will not be cleared unless we reading the interrupt status
1395 * register. If interrupts are in use, the normal interrupt
1396 * handling will clear the WOL event. Clear the WOL event
1397 * before enabling it if !phy_interrupt_is_valid()
1399 if (!phy_interrupt_is_valid(phydev))
1400 phy_read(phydev, MII_M1011_IEVENT);
1402 /* Enable the WOL interrupt */
1403 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1404 MII_88E1318S_PHY_CSIER_WOL_EIE);
1408 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1412 /* Setup LED[2] as interrupt pin (active low) */
1413 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1414 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1415 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1416 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1420 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1424 /* Store the device address for the magic packet */
1425 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1426 ((phydev->attached_dev->dev_addr[5] << 8) |
1427 phydev->attached_dev->dev_addr[4]));
1430 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1431 ((phydev->attached_dev->dev_addr[3] << 8) |
1432 phydev->attached_dev->dev_addr[2]));
1435 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1436 ((phydev->attached_dev->dev_addr[1] << 8) |
1437 phydev->attached_dev->dev_addr[0]));
1441 /* Clear WOL status and enable magic packet matching */
1442 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1443 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1444 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1448 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1452 /* Clear WOL status and disable magic packet matching */
1453 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1454 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1455 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1461 return phy_restore_page(phydev, oldpage, err);
1464 static int marvell_get_sset_count(struct phy_device *phydev)
1466 if (phydev->supported & SUPPORTED_FIBRE)
1467 return ARRAY_SIZE(marvell_hw_stats);
1469 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1472 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1476 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1477 strlcpy(data + i * ETH_GSTRING_LEN,
1478 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1482 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1484 struct marvell_hw_stat stat = marvell_hw_stats[i];
1485 struct marvell_priv *priv = phydev->priv;
1489 val = phy_read_paged(phydev, stat.page, stat.reg);
1493 val = val & ((1 << stat.bits) - 1);
1494 priv->stats[i] += val;
1495 ret = priv->stats[i];
1501 static void marvell_get_stats(struct phy_device *phydev,
1502 struct ethtool_stats *stats, u64 *data)
1506 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1507 data[i] = marvell_get_stat(phydev, i);
1511 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1519 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1523 /* Enable temperature sensor */
1524 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1528 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1529 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1533 /* Wait for temperature to stabilize */
1534 usleep_range(10000, 12000);
1536 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1542 /* Disable temperature sensor */
1543 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1544 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1548 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1551 return phy_restore_page(phydev, oldpage, ret);
1554 static int m88e1121_hwmon_read(struct device *dev,
1555 enum hwmon_sensor_types type,
1556 u32 attr, int channel, long *temp)
1558 struct phy_device *phydev = dev_get_drvdata(dev);
1562 case hwmon_temp_input:
1563 err = m88e1121_get_temp(phydev, temp);
1572 static umode_t m88e1121_hwmon_is_visible(const void *data,
1573 enum hwmon_sensor_types type,
1574 u32 attr, int channel)
1576 if (type != hwmon_temp)
1580 case hwmon_temp_input:
1587 static u32 m88e1121_hwmon_chip_config[] = {
1588 HWMON_C_REGISTER_TZ,
1592 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1594 .config = m88e1121_hwmon_chip_config,
1597 static u32 m88e1121_hwmon_temp_config[] = {
1602 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1604 .config = m88e1121_hwmon_temp_config,
1607 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1608 &m88e1121_hwmon_chip,
1609 &m88e1121_hwmon_temp,
1613 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1614 .is_visible = m88e1121_hwmon_is_visible,
1615 .read = m88e1121_hwmon_read,
1618 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1619 .ops = &m88e1121_hwmon_hwmon_ops,
1620 .info = m88e1121_hwmon_info,
1623 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1629 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1630 MII_88E1510_TEMP_SENSOR);
1634 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1639 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1645 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1646 MII_88E1121_MISC_TEST);
1650 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1651 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1658 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1661 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1663 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1664 MII_88E1121_MISC_TEST,
1665 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1666 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1669 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1675 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1676 MII_88E1121_MISC_TEST);
1680 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1685 static int m88e1510_hwmon_read(struct device *dev,
1686 enum hwmon_sensor_types type,
1687 u32 attr, int channel, long *temp)
1689 struct phy_device *phydev = dev_get_drvdata(dev);
1693 case hwmon_temp_input:
1694 err = m88e1510_get_temp(phydev, temp);
1696 case hwmon_temp_crit:
1697 err = m88e1510_get_temp_critical(phydev, temp);
1699 case hwmon_temp_max_alarm:
1700 err = m88e1510_get_temp_alarm(phydev, temp);
1709 static int m88e1510_hwmon_write(struct device *dev,
1710 enum hwmon_sensor_types type,
1711 u32 attr, int channel, long temp)
1713 struct phy_device *phydev = dev_get_drvdata(dev);
1717 case hwmon_temp_crit:
1718 err = m88e1510_set_temp_critical(phydev, temp);
1726 static umode_t m88e1510_hwmon_is_visible(const void *data,
1727 enum hwmon_sensor_types type,
1728 u32 attr, int channel)
1730 if (type != hwmon_temp)
1734 case hwmon_temp_input:
1735 case hwmon_temp_max_alarm:
1737 case hwmon_temp_crit:
1744 static u32 m88e1510_hwmon_temp_config[] = {
1745 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1749 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1751 .config = m88e1510_hwmon_temp_config,
1754 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1755 &m88e1121_hwmon_chip,
1756 &m88e1510_hwmon_temp,
1760 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1761 .is_visible = m88e1510_hwmon_is_visible,
1762 .read = m88e1510_hwmon_read,
1763 .write = m88e1510_hwmon_write,
1766 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1767 .ops = &m88e1510_hwmon_hwmon_ops,
1768 .info = m88e1510_hwmon_info,
1771 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1780 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1784 /* Enable temperature sensor */
1785 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1789 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1790 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1791 MII_88E6390_MISC_TEST_SAMPLE_1S;
1793 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1797 /* Wait for temperature to stabilize */
1798 usleep_range(10000, 12000);
1800 /* Reading the temperature sense has an errata. You need to read
1801 * a number of times and take an average.
1803 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1804 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1807 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1810 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1811 *temp = (sum - 75) * 1000;
1813 /* Disable temperature sensor */
1814 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1818 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1819 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1821 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1824 phy_restore_page(phydev, oldpage, ret);
1829 static int m88e6390_hwmon_read(struct device *dev,
1830 enum hwmon_sensor_types type,
1831 u32 attr, int channel, long *temp)
1833 struct phy_device *phydev = dev_get_drvdata(dev);
1837 case hwmon_temp_input:
1838 err = m88e6390_get_temp(phydev, temp);
1847 static umode_t m88e6390_hwmon_is_visible(const void *data,
1848 enum hwmon_sensor_types type,
1849 u32 attr, int channel)
1851 if (type != hwmon_temp)
1855 case hwmon_temp_input:
1862 static u32 m88e6390_hwmon_temp_config[] = {
1867 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1869 .config = m88e6390_hwmon_temp_config,
1872 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1873 &m88e1121_hwmon_chip,
1874 &m88e6390_hwmon_temp,
1878 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1879 .is_visible = m88e6390_hwmon_is_visible,
1880 .read = m88e6390_hwmon_read,
1883 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1884 .ops = &m88e6390_hwmon_hwmon_ops,
1885 .info = m88e6390_hwmon_info,
1888 static int marvell_hwmon_name(struct phy_device *phydev)
1890 struct marvell_priv *priv = phydev->priv;
1891 struct device *dev = &phydev->mdio.dev;
1892 const char *devname = dev_name(dev);
1893 size_t len = strlen(devname);
1896 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1897 if (!priv->hwmon_name)
1900 for (i = j = 0; i < len && devname[i]; i++) {
1901 if (isalnum(devname[i]))
1902 priv->hwmon_name[j++] = devname[i];
1908 static int marvell_hwmon_probe(struct phy_device *phydev,
1909 const struct hwmon_chip_info *chip)
1911 struct marvell_priv *priv = phydev->priv;
1912 struct device *dev = &phydev->mdio.dev;
1915 err = marvell_hwmon_name(phydev);
1919 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1920 dev, priv->hwmon_name, phydev, chip, NULL);
1922 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1925 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1927 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1930 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1932 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1935 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1937 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1940 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1945 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1950 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1956 static int marvell_probe(struct phy_device *phydev)
1958 struct marvell_priv *priv;
1960 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1964 phydev->priv = priv;
1969 static int m88e1121_probe(struct phy_device *phydev)
1973 err = marvell_probe(phydev);
1977 return m88e1121_hwmon_probe(phydev);
1980 static int m88e1510_probe(struct phy_device *phydev)
1984 err = marvell_probe(phydev);
1988 return m88e1510_hwmon_probe(phydev);
1991 static int m88e6390_probe(struct phy_device *phydev)
1995 err = marvell_probe(phydev);
1999 return m88e6390_hwmon_probe(phydev);
2002 static struct phy_driver marvell_drivers[] = {
2004 .phy_id = MARVELL_PHY_ID_88E1101,
2005 .phy_id_mask = MARVELL_PHY_ID_MASK,
2006 .name = "Marvell 88E1101",
2007 .features = PHY_GBIT_FEATURES,
2008 .flags = PHY_HAS_INTERRUPT,
2009 .probe = marvell_probe,
2010 .config_init = &marvell_config_init,
2011 .config_aneg = &m88e1101_config_aneg,
2012 .ack_interrupt = &marvell_ack_interrupt,
2013 .config_intr = &marvell_config_intr,
2014 .resume = &genphy_resume,
2015 .suspend = &genphy_suspend,
2016 .read_page = marvell_read_page,
2017 .write_page = marvell_write_page,
2018 .get_sset_count = marvell_get_sset_count,
2019 .get_strings = marvell_get_strings,
2020 .get_stats = marvell_get_stats,
2023 .phy_id = MARVELL_PHY_ID_88E1112,
2024 .phy_id_mask = MARVELL_PHY_ID_MASK,
2025 .name = "Marvell 88E1112",
2026 .features = PHY_GBIT_FEATURES,
2027 .flags = PHY_HAS_INTERRUPT,
2028 .probe = marvell_probe,
2029 .config_init = &m88e1111_config_init,
2030 .config_aneg = &marvell_config_aneg,
2031 .ack_interrupt = &marvell_ack_interrupt,
2032 .config_intr = &marvell_config_intr,
2033 .resume = &genphy_resume,
2034 .suspend = &genphy_suspend,
2035 .read_page = marvell_read_page,
2036 .write_page = marvell_write_page,
2037 .get_sset_count = marvell_get_sset_count,
2038 .get_strings = marvell_get_strings,
2039 .get_stats = marvell_get_stats,
2042 .phy_id = MARVELL_PHY_ID_88E1111,
2043 .phy_id_mask = MARVELL_PHY_ID_MASK,
2044 .name = "Marvell 88E1111",
2045 .features = PHY_GBIT_FEATURES,
2046 .flags = PHY_HAS_INTERRUPT,
2047 .probe = marvell_probe,
2048 .config_init = &m88e1111_config_init,
2049 .config_aneg = &marvell_config_aneg,
2050 .read_status = &marvell_read_status,
2051 .ack_interrupt = &marvell_ack_interrupt,
2052 .config_intr = &marvell_config_intr,
2053 .resume = &genphy_resume,
2054 .suspend = &genphy_suspend,
2055 .read_page = marvell_read_page,
2056 .write_page = marvell_write_page,
2057 .get_sset_count = marvell_get_sset_count,
2058 .get_strings = marvell_get_strings,
2059 .get_stats = marvell_get_stats,
2062 .phy_id = MARVELL_PHY_ID_88E1118,
2063 .phy_id_mask = MARVELL_PHY_ID_MASK,
2064 .name = "Marvell 88E1118",
2065 .features = PHY_GBIT_FEATURES,
2066 .flags = PHY_HAS_INTERRUPT,
2067 .probe = marvell_probe,
2068 .config_init = &m88e1118_config_init,
2069 .config_aneg = &m88e1118_config_aneg,
2070 .ack_interrupt = &marvell_ack_interrupt,
2071 .config_intr = &marvell_config_intr,
2072 .resume = &genphy_resume,
2073 .suspend = &genphy_suspend,
2074 .read_page = marvell_read_page,
2075 .write_page = marvell_write_page,
2076 .get_sset_count = marvell_get_sset_count,
2077 .get_strings = marvell_get_strings,
2078 .get_stats = marvell_get_stats,
2081 .phy_id = MARVELL_PHY_ID_88E1121R,
2082 .phy_id_mask = MARVELL_PHY_ID_MASK,
2083 .name = "Marvell 88E1121R",
2084 .features = PHY_GBIT_FEATURES,
2085 .flags = PHY_HAS_INTERRUPT,
2086 .probe = &m88e1121_probe,
2087 .config_init = &marvell_config_init,
2088 .config_aneg = &m88e1121_config_aneg,
2089 .read_status = &marvell_read_status,
2090 .ack_interrupt = &marvell_ack_interrupt,
2091 .config_intr = &marvell_config_intr,
2092 .did_interrupt = &m88e1121_did_interrupt,
2093 .resume = &genphy_resume,
2094 .suspend = &genphy_suspend,
2095 .read_page = marvell_read_page,
2096 .write_page = marvell_write_page,
2097 .get_sset_count = marvell_get_sset_count,
2098 .get_strings = marvell_get_strings,
2099 .get_stats = marvell_get_stats,
2102 .phy_id = MARVELL_PHY_ID_88E1318S,
2103 .phy_id_mask = MARVELL_PHY_ID_MASK,
2104 .name = "Marvell 88E1318S",
2105 .features = PHY_GBIT_FEATURES,
2106 .flags = PHY_HAS_INTERRUPT,
2107 .probe = marvell_probe,
2108 .config_init = &m88e1318_config_init,
2109 .config_aneg = &m88e1318_config_aneg,
2110 .read_status = &marvell_read_status,
2111 .ack_interrupt = &marvell_ack_interrupt,
2112 .config_intr = &marvell_config_intr,
2113 .did_interrupt = &m88e1121_did_interrupt,
2114 .get_wol = &m88e1318_get_wol,
2115 .set_wol = &m88e1318_set_wol,
2116 .resume = &genphy_resume,
2117 .suspend = &genphy_suspend,
2118 .read_page = marvell_read_page,
2119 .write_page = marvell_write_page,
2120 .get_sset_count = marvell_get_sset_count,
2121 .get_strings = marvell_get_strings,
2122 .get_stats = marvell_get_stats,
2125 .phy_id = MARVELL_PHY_ID_88E1145,
2126 .phy_id_mask = MARVELL_PHY_ID_MASK,
2127 .name = "Marvell 88E1145",
2128 .features = PHY_GBIT_FEATURES,
2129 .flags = PHY_HAS_INTERRUPT,
2130 .probe = marvell_probe,
2131 .config_init = &m88e1145_config_init,
2132 .config_aneg = &m88e1101_config_aneg,
2133 .read_status = &genphy_read_status,
2134 .ack_interrupt = &marvell_ack_interrupt,
2135 .config_intr = &marvell_config_intr,
2136 .resume = &genphy_resume,
2137 .suspend = &genphy_suspend,
2138 .read_page = marvell_read_page,
2139 .write_page = marvell_write_page,
2140 .get_sset_count = marvell_get_sset_count,
2141 .get_strings = marvell_get_strings,
2142 .get_stats = marvell_get_stats,
2145 .phy_id = MARVELL_PHY_ID_88E1149R,
2146 .phy_id_mask = MARVELL_PHY_ID_MASK,
2147 .name = "Marvell 88E1149R",
2148 .features = PHY_GBIT_FEATURES,
2149 .flags = PHY_HAS_INTERRUPT,
2150 .probe = marvell_probe,
2151 .config_init = &m88e1149_config_init,
2152 .config_aneg = &m88e1118_config_aneg,
2153 .ack_interrupt = &marvell_ack_interrupt,
2154 .config_intr = &marvell_config_intr,
2155 .resume = &genphy_resume,
2156 .suspend = &genphy_suspend,
2157 .read_page = marvell_read_page,
2158 .write_page = marvell_write_page,
2159 .get_sset_count = marvell_get_sset_count,
2160 .get_strings = marvell_get_strings,
2161 .get_stats = marvell_get_stats,
2164 .phy_id = MARVELL_PHY_ID_88E1240,
2165 .phy_id_mask = MARVELL_PHY_ID_MASK,
2166 .name = "Marvell 88E1240",
2167 .features = PHY_GBIT_FEATURES,
2168 .flags = PHY_HAS_INTERRUPT,
2169 .probe = marvell_probe,
2170 .config_init = &m88e1111_config_init,
2171 .config_aneg = &marvell_config_aneg,
2172 .ack_interrupt = &marvell_ack_interrupt,
2173 .config_intr = &marvell_config_intr,
2174 .resume = &genphy_resume,
2175 .suspend = &genphy_suspend,
2176 .read_page = marvell_read_page,
2177 .write_page = marvell_write_page,
2178 .get_sset_count = marvell_get_sset_count,
2179 .get_strings = marvell_get_strings,
2180 .get_stats = marvell_get_stats,
2183 .phy_id = MARVELL_PHY_ID_88E1116R,
2184 .phy_id_mask = MARVELL_PHY_ID_MASK,
2185 .name = "Marvell 88E1116R",
2186 .features = PHY_GBIT_FEATURES,
2187 .flags = PHY_HAS_INTERRUPT,
2188 .probe = marvell_probe,
2189 .config_init = &m88e1116r_config_init,
2190 .ack_interrupt = &marvell_ack_interrupt,
2191 .config_intr = &marvell_config_intr,
2192 .resume = &genphy_resume,
2193 .suspend = &genphy_suspend,
2194 .read_page = marvell_read_page,
2195 .write_page = marvell_write_page,
2196 .get_sset_count = marvell_get_sset_count,
2197 .get_strings = marvell_get_strings,
2198 .get_stats = marvell_get_stats,
2201 .phy_id = MARVELL_PHY_ID_88E1510,
2202 .phy_id_mask = MARVELL_PHY_ID_MASK,
2203 .name = "Marvell 88E1510",
2204 .features = PHY_GBIT_FIBRE_FEATURES,
2205 .flags = PHY_HAS_INTERRUPT,
2206 .probe = &m88e1510_probe,
2207 .config_init = &m88e1510_config_init,
2208 .config_aneg = &m88e1510_config_aneg,
2209 .read_status = &marvell_read_status,
2210 .ack_interrupt = &marvell_ack_interrupt,
2211 .config_intr = &marvell_config_intr,
2212 .did_interrupt = &m88e1121_did_interrupt,
2213 .get_wol = &m88e1318_get_wol,
2214 .set_wol = &m88e1318_set_wol,
2215 .resume = &marvell_resume,
2216 .suspend = &marvell_suspend,
2217 .read_page = marvell_read_page,
2218 .write_page = marvell_write_page,
2219 .get_sset_count = marvell_get_sset_count,
2220 .get_strings = marvell_get_strings,
2221 .get_stats = marvell_get_stats,
2222 .set_loopback = genphy_loopback,
2225 .phy_id = MARVELL_PHY_ID_88E1540,
2226 .phy_id_mask = MARVELL_PHY_ID_MASK,
2227 .name = "Marvell 88E1540",
2228 .features = PHY_GBIT_FEATURES,
2229 .flags = PHY_HAS_INTERRUPT,
2230 .probe = m88e1510_probe,
2231 .config_init = &marvell_config_init,
2232 .config_aneg = &m88e1510_config_aneg,
2233 .read_status = &marvell_read_status,
2234 .ack_interrupt = &marvell_ack_interrupt,
2235 .config_intr = &marvell_config_intr,
2236 .did_interrupt = &m88e1121_did_interrupt,
2237 .resume = &genphy_resume,
2238 .suspend = &genphy_suspend,
2239 .read_page = marvell_read_page,
2240 .write_page = marvell_write_page,
2241 .get_sset_count = marvell_get_sset_count,
2242 .get_strings = marvell_get_strings,
2243 .get_stats = marvell_get_stats,
2246 .phy_id = MARVELL_PHY_ID_88E1545,
2247 .phy_id_mask = MARVELL_PHY_ID_MASK,
2248 .name = "Marvell 88E1545",
2249 .probe = m88e1510_probe,
2250 .features = PHY_GBIT_FEATURES,
2251 .flags = PHY_HAS_INTERRUPT,
2252 .config_init = &marvell_config_init,
2253 .config_aneg = &m88e1510_config_aneg,
2254 .read_status = &marvell_read_status,
2255 .ack_interrupt = &marvell_ack_interrupt,
2256 .config_intr = &marvell_config_intr,
2257 .did_interrupt = &m88e1121_did_interrupt,
2258 .resume = &genphy_resume,
2259 .suspend = &genphy_suspend,
2260 .read_page = marvell_read_page,
2261 .write_page = marvell_write_page,
2262 .get_sset_count = marvell_get_sset_count,
2263 .get_strings = marvell_get_strings,
2264 .get_stats = marvell_get_stats,
2267 .phy_id = MARVELL_PHY_ID_88E3016,
2268 .phy_id_mask = MARVELL_PHY_ID_MASK,
2269 .name = "Marvell 88E3016",
2270 .features = PHY_BASIC_FEATURES,
2271 .flags = PHY_HAS_INTERRUPT,
2272 .probe = marvell_probe,
2273 .config_init = &m88e3016_config_init,
2274 .aneg_done = &marvell_aneg_done,
2275 .read_status = &marvell_read_status,
2276 .ack_interrupt = &marvell_ack_interrupt,
2277 .config_intr = &marvell_config_intr,
2278 .did_interrupt = &m88e1121_did_interrupt,
2279 .resume = &genphy_resume,
2280 .suspend = &genphy_suspend,
2281 .read_page = marvell_read_page,
2282 .write_page = marvell_write_page,
2283 .get_sset_count = marvell_get_sset_count,
2284 .get_strings = marvell_get_strings,
2285 .get_stats = marvell_get_stats,
2288 .phy_id = MARVELL_PHY_ID_88E6390,
2289 .phy_id_mask = MARVELL_PHY_ID_MASK,
2290 .name = "Marvell 88E6390",
2291 .features = PHY_GBIT_FEATURES,
2292 .flags = PHY_HAS_INTERRUPT,
2293 .probe = m88e6390_probe,
2294 .config_init = &marvell_config_init,
2295 .config_aneg = &m88e1510_config_aneg,
2296 .read_status = &marvell_read_status,
2297 .ack_interrupt = &marvell_ack_interrupt,
2298 .config_intr = &marvell_config_intr,
2299 .did_interrupt = &m88e1121_did_interrupt,
2300 .resume = &genphy_resume,
2301 .suspend = &genphy_suspend,
2302 .read_page = marvell_read_page,
2303 .write_page = marvell_write_page,
2304 .get_sset_count = marvell_get_sset_count,
2305 .get_strings = marvell_get_strings,
2306 .get_stats = marvell_get_stats,
2310 module_phy_driver(marvell_drivers);
2312 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2313 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2314 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2315 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2316 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2317 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2318 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2319 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2320 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2321 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2322 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2323 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2324 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2325 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2326 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2327 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2331 MODULE_DEVICE_TABLE(mdio, marvell_tbl);