1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Lynx PCS MDIO helpers
6 #include <linux/mdio.h>
7 #include <linux/phylink.h>
8 #include <linux/pcs-lynx.h>
10 #define SGMII_CLOCK_PERIOD_NS 8 /* PCS is clocked at 125 MHz */
11 #define LINK_TIMER_VAL(ns) ((u32)((ns) / SGMII_CLOCK_PERIOD_NS))
13 #define SGMII_AN_LINK_TIMER_NS 1600000 /* defined by SGMII spec */
14 #define IEEE8023_LINK_TIMER_NS 10000000
16 #define LINK_TIMER_LO 0x12
17 #define LINK_TIMER_HI 0x13
19 #define IF_MODE_SGMII_EN BIT(0)
20 #define IF_MODE_USE_SGMII_AN BIT(1)
21 #define IF_MODE_SPEED(x) (((x) << 2) & GENMASK(3, 2))
22 #define IF_MODE_SPEED_MSK GENMASK(3, 2)
23 #define IF_MODE_HALF_DUPLEX BIT(4)
26 struct phylink_pcs pcs;
27 struct mdio_device *mdio;
37 #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
38 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
40 struct mdio_device *lynx_get_mdio_device(struct phylink_pcs *pcs)
42 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
46 EXPORT_SYMBOL(lynx_get_mdio_device);
48 static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs,
49 struct phylink_link_state *state)
51 struct mii_bus *bus = pcs->bus;
55 status = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_BMSR);
59 state->link = !!(status & MDIO_STAT1_LSTATUS);
60 state->an_complete = !!(status & MDIO_AN_STAT1_COMPLETE);
61 if (!state->link || !state->an_complete)
64 lpa = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_LPA);
68 phylink_decode_usxgmii_word(state, lpa);
71 static void lynx_pcs_get_state_2500basex(struct mdio_device *pcs,
72 struct phylink_link_state *state)
76 bmsr = mdiodev_read(pcs, MII_BMSR);
77 lpa = mdiodev_read(pcs, MII_LPA);
78 if (bmsr < 0 || lpa < 0) {
83 state->link = !!(bmsr & BMSR_LSTATUS);
84 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
88 state->speed = SPEED_2500;
89 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
90 state->duplex = DUPLEX_FULL;
93 static void lynx_pcs_get_state(struct phylink_pcs *pcs,
94 struct phylink_link_state *state)
96 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
98 switch (state->interface) {
99 case PHY_INTERFACE_MODE_1000BASEX:
100 case PHY_INTERFACE_MODE_SGMII:
101 case PHY_INTERFACE_MODE_QSGMII:
102 phylink_mii_c22_pcs_get_state(lynx->mdio, state);
104 case PHY_INTERFACE_MODE_2500BASEX:
105 lynx_pcs_get_state_2500basex(lynx->mdio, state);
107 case PHY_INTERFACE_MODE_USXGMII:
108 lynx_pcs_get_state_usxgmii(lynx->mdio, state);
110 case PHY_INTERFACE_MODE_10GBASER:
111 phylink_mii_c45_pcs_get_state(lynx->mdio, state);
117 dev_dbg(&lynx->mdio->dev,
118 "mode=%s/%s/%s link=%u an_enabled=%u an_complete=%u\n",
119 phy_modes(state->interface),
120 phy_speed_to_str(state->speed),
121 phy_duplex_to_str(state->duplex),
122 state->link, state->an_enabled, state->an_complete);
125 static int lynx_pcs_config_giga(struct mdio_device *pcs, unsigned int mode,
126 phy_interface_t interface,
127 const unsigned long *advertising)
133 if (interface == PHY_INTERFACE_MODE_1000BASEX) {
134 link_timer = LINK_TIMER_VAL(IEEE8023_LINK_TIMER_NS);
135 mdiodev_write(pcs, LINK_TIMER_LO, link_timer & 0xffff);
136 mdiodev_write(pcs, LINK_TIMER_HI, link_timer >> 16);
140 if_mode = IF_MODE_SGMII_EN;
141 if (mode == MLO_AN_INBAND) {
142 if_mode |= IF_MODE_USE_SGMII_AN;
144 /* Adjust link timer for SGMII */
145 link_timer = LINK_TIMER_VAL(SGMII_AN_LINK_TIMER_NS);
146 mdiodev_write(pcs, LINK_TIMER_LO, link_timer & 0xffff);
147 mdiodev_write(pcs, LINK_TIMER_HI, link_timer >> 16);
151 err = mdiodev_modify(pcs, IF_MODE,
152 IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN,
157 return phylink_mii_c22_pcs_config(pcs, mode, interface, advertising);
160 static int lynx_pcs_config_usxgmii(struct mdio_device *pcs, unsigned int mode,
161 const unsigned long *advertising)
163 struct mii_bus *bus = pcs->bus;
164 int addr = pcs->addr;
166 if (!phylink_autoneg_inband(mode)) {
167 dev_err(&pcs->dev, "USXGMII only supports in-band AN for now\n");
171 /* Configure device ability for the USXGMII Replicator */
172 return mdiobus_c45_write(bus, addr, MDIO_MMD_VEND2, MII_ADVERTISE,
173 MDIO_USXGMII_10G | MDIO_USXGMII_LINK |
174 MDIO_USXGMII_FULL_DUPLEX |
175 ADVERTISE_SGMII | ADVERTISE_LPACK);
178 static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
179 phy_interface_t ifmode,
180 const unsigned long *advertising,
183 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
186 case PHY_INTERFACE_MODE_1000BASEX:
187 case PHY_INTERFACE_MODE_SGMII:
188 case PHY_INTERFACE_MODE_QSGMII:
189 return lynx_pcs_config_giga(lynx->mdio, mode, ifmode,
191 case PHY_INTERFACE_MODE_2500BASEX:
192 if (phylink_autoneg_inband(mode)) {
193 dev_err(&lynx->mdio->dev,
194 "AN not supported on 3.125GHz SerDes lane\n");
198 case PHY_INTERFACE_MODE_USXGMII:
199 return lynx_pcs_config_usxgmii(lynx->mdio, mode, advertising);
200 case PHY_INTERFACE_MODE_10GBASER:
201 /* Nothing to do here for 10GBASER */
210 static void lynx_pcs_an_restart(struct phylink_pcs *pcs)
212 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
214 phylink_mii_c22_pcs_an_restart(lynx->mdio);
217 static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, unsigned int mode,
218 int speed, int duplex)
220 u16 if_mode = 0, sgmii_speed;
222 /* The PCS needs to be configured manually only
223 * when not operating on in-band mode
225 if (mode == MLO_AN_INBAND)
228 if (duplex == DUPLEX_HALF)
229 if_mode |= IF_MODE_HALF_DUPLEX;
233 sgmii_speed = SGMII_SPEED_1000;
236 sgmii_speed = SGMII_SPEED_100;
239 sgmii_speed = SGMII_SPEED_10;
242 /* Silently don't do anything */
245 dev_err(&pcs->dev, "Invalid PCS speed %d\n", speed);
248 if_mode |= IF_MODE_SPEED(sgmii_speed);
250 mdiodev_modify(pcs, IF_MODE,
251 IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK,
255 /* 2500Base-X is SerDes protocol 7 on Felix and 6 on ENETC. It is a SerDes lane
256 * clocked at 3.125 GHz which encodes symbols with 8b/10b and does not have
257 * auto-negotiation of any link parameters. Electrically it is compatible with
258 * a single lane of XAUI.
259 * The hardware reference manual wants to call this mode SGMII, but it isn't
260 * really, since the fundamental features of SGMII:
261 * - Downgrading the link speed by duplicating symbols
264 * The speed is configured at 1000 in the IF_MODE because the clock frequency
265 * is actually given by a PLL configured in the Reset Configuration Word (RCW).
266 * Since there is no difference between fixed speed SGMII w/o AN and 802.3z w/o
267 * AN, we call this PHY interface type 2500Base-X. In case a PHY negotiates a
268 * lower link speed on line side, the system-side interface remains fixed at
269 * 2500 Mbps and we do rate adaptation through pause frames.
271 static void lynx_pcs_link_up_2500basex(struct mdio_device *pcs,
273 int speed, int duplex)
277 if (mode == MLO_AN_INBAND) {
278 dev_err(&pcs->dev, "AN not supported for 2500BaseX\n");
282 if (duplex == DUPLEX_HALF)
283 if_mode |= IF_MODE_HALF_DUPLEX;
284 if_mode |= IF_MODE_SPEED(SGMII_SPEED_2500);
286 mdiodev_modify(pcs, IF_MODE,
287 IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK,
291 static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
292 phy_interface_t interface,
293 int speed, int duplex)
295 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
298 case PHY_INTERFACE_MODE_SGMII:
299 case PHY_INTERFACE_MODE_QSGMII:
300 lynx_pcs_link_up_sgmii(lynx->mdio, mode, speed, duplex);
302 case PHY_INTERFACE_MODE_2500BASEX:
303 lynx_pcs_link_up_2500basex(lynx->mdio, mode, speed, duplex);
305 case PHY_INTERFACE_MODE_USXGMII:
306 /* At the moment, only in-band AN is supported for USXGMII
307 * so nothing to do in link_up
315 static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {
316 .pcs_get_state = lynx_pcs_get_state,
317 .pcs_config = lynx_pcs_config,
318 .pcs_an_restart = lynx_pcs_an_restart,
319 .pcs_link_up = lynx_pcs_link_up,
322 struct phylink_pcs *lynx_pcs_create(struct mdio_device *mdio)
324 struct lynx_pcs *lynx;
326 lynx = kzalloc(sizeof(*lynx), GFP_KERNEL);
331 lynx->pcs.ops = &lynx_pcs_phylink_ops;
332 lynx->pcs.poll = true;
334 return lynx_to_phylink_pcs(lynx);
336 EXPORT_SYMBOL(lynx_pcs_create);
338 void lynx_pcs_destroy(struct phylink_pcs *pcs)
340 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
344 EXPORT_SYMBOL(lynx_pcs_destroy);
346 MODULE_LICENSE("Dual BSD/GPL");