1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@lxorguk.ukuu.org.uk>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cisreg.h>
150 #include <pcmcia/cistpl.h>
151 #include <pcmcia/ds.h>
153 #include <asm/uaccess.h>
155 #include <asm/system.h>
157 /* ----------------------------------------------------------------------------
159 ---------------------------------------------------------------------------- */
161 #define ETHER_ADDR_LEN ETH_ALEN
162 /* 6 bytes in an Ethernet Address */
163 #define MACE_LADRF_LEN 8
164 /* 8 bytes in Logical Address Filter */
166 /* Loop Control Defines */
167 #define MACE_MAX_IR_ITERATIONS 10
168 #define MACE_MAX_RX_ITERATIONS 12
170 TBD: Dean brought this up, and I assumed the hardware would
173 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
174 non-zero when the isr exits. We may not get another interrupt
175 to process the remaining packets for some time.
179 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
180 which manages the interface between the MACE and the PCMCIA bus. It
181 also includes buffer management for the 32K x 8 SRAM to control up to
182 four transmit and 12 receive frames at a time.
184 #define AM2150_MAX_TX_FRAMES 4
185 #define AM2150_MAX_RX_FRAMES 12
187 /* Am2150 Ethernet Card I/O Mapping */
188 #define AM2150_RCV 0x00
189 #define AM2150_XMT 0x04
190 #define AM2150_XMT_SKIP 0x09
191 #define AM2150_RCV_NEXT 0x0A
192 #define AM2150_RCV_FRAME_COUNT 0x0B
193 #define AM2150_MACE_BANK 0x0C
194 #define AM2150_MACE_BASE 0x10
197 #define MACE_RCVFIFO 0
198 #define MACE_XMTFIFO 1
204 #define MACE_FIFOFC 7
208 #define MACE_BIUCC 11
209 #define MACE_FIFOCC 12
210 #define MACE_MACCC 13
211 #define MACE_PLSCC 14
212 #define MACE_PHYCC 15
213 #define MACE_CHIPIDL 16
214 #define MACE_CHIPIDH 17
217 #define MACE_LADRF 20
223 #define MACE_RNTPC 26
224 #define MACE_RCVCC 27
231 #define MACE_XMTRC_EXDEF 0x80
232 #define MACE_XMTRC_XMTRC 0x0F
234 #define MACE_XMTFS_XMTSV 0x80
235 #define MACE_XMTFS_UFLO 0x40
236 #define MACE_XMTFS_LCOL 0x20
237 #define MACE_XMTFS_MORE 0x10
238 #define MACE_XMTFS_ONE 0x08
239 #define MACE_XMTFS_DEFER 0x04
240 #define MACE_XMTFS_LCAR 0x02
241 #define MACE_XMTFS_RTRY 0x01
243 #define MACE_RCVFS_RCVSTS 0xF000
244 #define MACE_RCVFS_OFLO 0x8000
245 #define MACE_RCVFS_CLSN 0x4000
246 #define MACE_RCVFS_FRAM 0x2000
247 #define MACE_RCVFS_FCS 0x1000
249 #define MACE_FIFOFC_RCVFC 0xF0
250 #define MACE_FIFOFC_XMTFC 0x0F
252 #define MACE_IR_JAB 0x80
253 #define MACE_IR_BABL 0x40
254 #define MACE_IR_CERR 0x20
255 #define MACE_IR_RCVCCO 0x10
256 #define MACE_IR_RNTPCO 0x08
257 #define MACE_IR_MPCO 0x04
258 #define MACE_IR_RCVINT 0x02
259 #define MACE_IR_XMTINT 0x01
261 #define MACE_MACCC_PROM 0x80
262 #define MACE_MACCC_DXMT2PD 0x40
263 #define MACE_MACCC_EMBA 0x20
264 #define MACE_MACCC_RESERVED 0x10
265 #define MACE_MACCC_DRCVPA 0x08
266 #define MACE_MACCC_DRCVBC 0x04
267 #define MACE_MACCC_ENXMT 0x02
268 #define MACE_MACCC_ENRCV 0x01
270 #define MACE_PHYCC_LNKFL 0x80
271 #define MACE_PHYCC_DLNKTST 0x40
272 #define MACE_PHYCC_REVPOL 0x20
273 #define MACE_PHYCC_DAPC 0x10
274 #define MACE_PHYCC_LRT 0x08
275 #define MACE_PHYCC_ASEL 0x04
276 #define MACE_PHYCC_RWAKE 0x02
277 #define MACE_PHYCC_AWAKE 0x01
279 #define MACE_IAC_ADDRCHG 0x80
280 #define MACE_IAC_PHYADDR 0x04
281 #define MACE_IAC_LOGADDR 0x02
283 #define MACE_UTR_RTRE 0x80
284 #define MACE_UTR_RTRD 0x40
285 #define MACE_UTR_RPA 0x20
286 #define MACE_UTR_FCOLL 0x10
287 #define MACE_UTR_RCVFCSE 0x08
288 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
289 #define MACE_UTR_LOOP_NO_MENDEC 0x04
290 #define MACE_UTR_LOOP_EXTERNAL 0x02
291 #define MACE_UTR_LOOP_NONE 0x00
292 #define MACE_UTR_RESERVED 0x01
294 /* Switch MACE register bank (only 0 and 1 are valid) */
295 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
297 #define MACE_IMR_DEFAULT \
308 #undef MACE_IMR_DEFAULT
309 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
311 #define TX_TIMEOUT ((400*HZ)/1000)
313 /* ----------------------------------------------------------------------------
315 ---------------------------------------------------------------------------- */
317 typedef struct _mace_statistics {
332 /* RFS1--Receive Status (RCVSTS) */
338 /* RFS2--Runt Packet Count (RNTPC) */
341 /* RFS3--Receive Collision Count (RCVCC) */
362 typedef struct _mace_private {
363 struct pcmcia_device *p_dev;
364 struct net_device_stats linux_stats; /* Linux statistics counters */
365 mace_statistics mace_stats; /* MACE chip statistics counters */
367 /* restore_multicast_list() state variables */
368 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
369 int multicast_num_addrs;
371 char tx_free_frames; /* Number of free transmit frame buffers */
372 char tx_irq_disabled; /* MACE TX interrupt disabled */
374 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
377 /* ----------------------------------------------------------------------------
378 Private Global Variables
379 ---------------------------------------------------------------------------- */
381 static const char *if_names[]={
382 "Auto", "10baseT", "BNC",
385 /* ----------------------------------------------------------------------------
387 These are the parameters that can be set during loading with
389 ---------------------------------------------------------------------------- */
391 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
392 MODULE_LICENSE("GPL");
394 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
396 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
397 INT_MODULE_PARM(if_port, 0);
400 /* ----------------------------------------------------------------------------
402 ---------------------------------------------------------------------------- */
404 static int nmclan_config(struct pcmcia_device *link);
405 static void nmclan_release(struct pcmcia_device *link);
407 static void nmclan_reset(struct net_device *dev);
408 static int mace_config(struct net_device *dev, struct ifmap *map);
409 static int mace_open(struct net_device *dev);
410 static int mace_close(struct net_device *dev);
411 static netdev_tx_t mace_start_xmit(struct sk_buff *skb,
412 struct net_device *dev);
413 static void mace_tx_timeout(struct net_device *dev);
414 static irqreturn_t mace_interrupt(int irq, void *dev_id);
415 static struct net_device_stats *mace_get_stats(struct net_device *dev);
416 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
417 static void restore_multicast_list(struct net_device *dev);
418 static void set_multicast_list(struct net_device *dev);
419 static const struct ethtool_ops netdev_ethtool_ops;
422 static void nmclan_detach(struct pcmcia_device *p_dev);
424 static const struct net_device_ops mace_netdev_ops = {
425 .ndo_open = mace_open,
426 .ndo_stop = mace_close,
427 .ndo_start_xmit = mace_start_xmit,
428 .ndo_tx_timeout = mace_tx_timeout,
429 .ndo_set_config = mace_config,
430 .ndo_get_stats = mace_get_stats,
431 .ndo_set_multicast_list = set_multicast_list,
432 .ndo_change_mtu = eth_change_mtu,
433 .ndo_set_mac_address = eth_mac_addr,
434 .ndo_validate_addr = eth_validate_addr,
437 static int nmclan_probe(struct pcmcia_device *link)
440 struct net_device *dev;
442 dev_dbg(&link->dev, "nmclan_attach()\n");
444 /* Create new ethernet device */
445 dev = alloc_etherdev(sizeof(mace_private));
448 lp = netdev_priv(dev);
452 spin_lock_init(&lp->bank_lock);
453 link->resource[0]->end = 32;
454 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
455 link->config_flags |= CONF_ENABLE_IRQ;
456 link->config_index = 1;
457 link->config_regs = PRESENT_OPTION;
459 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
461 dev->netdev_ops = &mace_netdev_ops;
462 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
463 dev->watchdog_timeo = TX_TIMEOUT;
465 return nmclan_config(link);
466 } /* nmclan_attach */
468 static void nmclan_detach(struct pcmcia_device *link)
470 struct net_device *dev = link->priv;
472 dev_dbg(&link->dev, "nmclan_detach\n");
474 unregister_netdev(dev);
476 nmclan_release(link);
479 } /* nmclan_detach */
481 /* ----------------------------------------------------------------------------
483 Reads a MACE register. This is bank independent; however, the
484 caller must ensure that this call is not interruptable. We are
485 assuming that during normal operation, the MACE is always in
487 ---------------------------------------------------------------------------- */
488 static int mace_read(mace_private *lp, unsigned int ioaddr, int reg)
494 case 0: /* register 0-15 */
495 data = inb(ioaddr + AM2150_MACE_BASE + reg);
497 case 1: /* register 16-31 */
498 spin_lock_irqsave(&lp->bank_lock, flags);
500 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
502 spin_unlock_irqrestore(&lp->bank_lock, flags);
505 return (data & 0xFF);
508 /* ----------------------------------------------------------------------------
510 Writes to a MACE register. This is bank independent; however,
511 the caller must ensure that this call is not interruptable. We
512 are assuming that during normal operation, the MACE is always in
514 ---------------------------------------------------------------------------- */
515 static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,
521 case 0: /* register 0-15 */
522 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
524 case 1: /* register 16-31 */
525 spin_lock_irqsave(&lp->bank_lock, flags);
527 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
529 spin_unlock_irqrestore(&lp->bank_lock, flags);
534 /* ----------------------------------------------------------------------------
536 Resets the MACE chip.
537 ---------------------------------------------------------------------------- */
538 static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)
543 /* MACE Software reset */
544 mace_write(lp, ioaddr, MACE_BIUCC, 1);
545 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
546 /* Wait for reset bit to be cleared automatically after <= 200ns */;
549 printk(KERN_ERR "mace: reset failed, card removed ?\n");
554 mace_write(lp, ioaddr, MACE_BIUCC, 0);
556 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
557 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
559 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
560 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
563 * Bit 2-1 PORTSEL[1-0] Port Select.
566 * 10 DAI Port (reserved in Am2150)
568 * For this card, only the first two are valid.
569 * So, PLSCC should be set to
572 * Or just set ASEL in PHYCC below!
576 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
579 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
582 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
583 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
584 and the MACE device will automatically select the operating media
589 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
590 /* Poll ADDRCHG bit */
592 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
596 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
600 /* Set PADR register */
601 for (i = 0; i < ETHER_ADDR_LEN; i++)
602 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
604 /* MAC Configuration Control Register should be written last */
605 /* Let set_multicast_list set this. */
606 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
607 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
611 static int nmclan_config(struct pcmcia_device *link)
613 struct net_device *dev = link->priv;
614 mace_private *lp = netdev_priv(dev);
620 dev_dbg(&link->dev, "nmclan_config\n");
623 ret = pcmcia_request_io(link);
626 ret = pcmcia_request_exclusive_irq(link, mace_interrupt);
629 ret = pcmcia_enable_device(link);
633 dev->irq = link->irq;
634 dev->base_addr = link->resource[0]->start;
636 ioaddr = dev->base_addr;
638 /* Read the ethernet address from the CIS. */
639 len = pcmcia_get_tuple(link, 0x80, &buf);
640 if (!buf || len < ETHER_ADDR_LEN) {
644 memcpy(dev->dev_addr, buf, ETHER_ADDR_LEN);
647 /* Verify configuration by reading the MACE ID. */
651 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
652 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
653 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
654 dev_dbg(&link->dev, "nmclan_cs configured: mace id=%x %x\n",
657 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
658 " be 0x40 0x?9\n", sig[0], sig[1]);
663 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
666 /* The if_port symbol can be set when the module is loaded */
668 dev->if_port = if_port;
670 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
672 SET_NETDEV_DEV(dev, &link->dev);
674 i = register_netdev(dev);
676 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
680 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port,"
682 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port],
687 nmclan_release(link);
689 } /* nmclan_config */
691 static void nmclan_release(struct pcmcia_device *link)
693 dev_dbg(&link->dev, "nmclan_release\n");
694 pcmcia_disable_device(link);
697 static int nmclan_suspend(struct pcmcia_device *link)
699 struct net_device *dev = link->priv;
702 netif_device_detach(dev);
707 static int nmclan_resume(struct pcmcia_device *link)
709 struct net_device *dev = link->priv;
713 netif_device_attach(dev);
720 /* ----------------------------------------------------------------------------
722 Reset and restore all of the Xilinx and MACE registers.
723 ---------------------------------------------------------------------------- */
724 static void nmclan_reset(struct net_device *dev)
726 mace_private *lp = netdev_priv(dev);
729 struct pcmcia_device *link = &lp->link;
732 /* Save original COR value */
733 pcmcia_read_config_byte(link, CISREG_COR, &OrigCorValue);
736 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%x, resetting...\n",
738 pcmcia_write_config_byte(link, CISREG_COR, COR_SOFT_RESET);
739 /* Need to wait for 20 ms for PCMCIA to finish reset. */
741 /* Restore original COR configuration index */
742 pcmcia_write_config_byte(link, CISREG_COR,
743 (COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK)));
744 /* Xilinx is now completely reset along with the MACE chip. */
745 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
747 #endif /* #if RESET_XILINX */
749 /* Xilinx is now completely reset along with the MACE chip. */
750 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
752 /* Reinitialize the MACE chip for operation. */
753 mace_init(lp, dev->base_addr, dev->dev_addr);
754 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
756 /* Restore the multicast list and enable TX and RX. */
757 restore_multicast_list(dev);
760 /* ----------------------------------------------------------------------------
762 [Someone tell me what this is supposed to do? Is if_port a defined
763 standard? If so, there should be defines to indicate 1=10Base-T,
764 2=10Base-2, etc. including limited automatic detection.]
765 ---------------------------------------------------------------------------- */
766 static int mace_config(struct net_device *dev, struct ifmap *map)
768 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
769 if (map->port <= 2) {
770 dev->if_port = map->port;
771 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
772 if_names[dev->if_port]);
779 /* ----------------------------------------------------------------------------
782 ---------------------------------------------------------------------------- */
783 static int mace_open(struct net_device *dev)
785 unsigned int ioaddr = dev->base_addr;
786 mace_private *lp = netdev_priv(dev);
787 struct pcmcia_device *link = lp->p_dev;
789 if (!pcmcia_dev_present(link))
796 netif_start_queue(dev);
799 return 0; /* Always succeed */
802 /* ----------------------------------------------------------------------------
804 Closes device driver.
805 ---------------------------------------------------------------------------- */
806 static int mace_close(struct net_device *dev)
808 unsigned int ioaddr = dev->base_addr;
809 mace_private *lp = netdev_priv(dev);
810 struct pcmcia_device *link = lp->p_dev;
812 dev_dbg(&link->dev, "%s: shutting down ethercard.\n", dev->name);
814 /* Mask off all interrupts from the MACE chip. */
815 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
818 netif_stop_queue(dev);
823 static void netdev_get_drvinfo(struct net_device *dev,
824 struct ethtool_drvinfo *info)
826 strcpy(info->driver, DRV_NAME);
827 strcpy(info->version, DRV_VERSION);
828 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
831 static const struct ethtool_ops netdev_ethtool_ops = {
832 .get_drvinfo = netdev_get_drvinfo,
835 /* ----------------------------------------------------------------------------
837 This routine begins the packet transmit function. When completed,
838 it will generate a transmit interrupt.
840 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
841 returns 0, the "packet is now solely the responsibility of the
842 driver." If _start_xmit returns non-zero, the "transmission
843 failed, put skb back into a list."
844 ---------------------------------------------------------------------------- */
846 static void mace_tx_timeout(struct net_device *dev)
848 mace_private *lp = netdev_priv(dev);
849 struct pcmcia_device *link = lp->p_dev;
851 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
853 printk("resetting card\n");
854 pcmcia_reset_card(link->socket);
855 #else /* #if RESET_ON_TIMEOUT */
856 printk("NOT resetting card\n");
857 #endif /* #if RESET_ON_TIMEOUT */
858 dev->trans_start = jiffies; /* prevent tx timeout */
859 netif_wake_queue(dev);
862 static netdev_tx_t mace_start_xmit(struct sk_buff *skb,
863 struct net_device *dev)
865 mace_private *lp = netdev_priv(dev);
866 unsigned int ioaddr = dev->base_addr;
868 netif_stop_queue(dev);
870 pr_debug("%s: mace_start_xmit(length = %ld) called.\n",
871 dev->name, (long)skb->len);
873 #if (!TX_INTERRUPTABLE)
874 /* Disable MACE TX interrupts. */
875 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
876 ioaddr + AM2150_MACE_BASE + MACE_IMR);
877 lp->tx_irq_disabled=1;
878 #endif /* #if (!TX_INTERRUPTABLE) */
881 /* This block must not be interrupted by another transmit request!
882 mace_tx_timeout will take care of timer-based retransmissions from
883 the upper layers. The interrupt handler is guaranteed never to
884 service a transmit interrupt while we are in here.
887 lp->linux_stats.tx_bytes += skb->len;
888 lp->tx_free_frames--;
890 /* WARNING: Write the _exact_ number of bytes written in the header! */
891 /* Put out the word header [must be an outw()] . . . */
892 outw(skb->len, ioaddr + AM2150_XMT);
893 /* . . . and the packet [may be any combination of outw() and outb()] */
894 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
896 /* Odd byte transfer */
897 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
901 if (lp->tx_free_frames > 0)
902 netif_start_queue(dev);
903 #endif /* #if MULTI_TX */
906 #if (!TX_INTERRUPTABLE)
907 /* Re-enable MACE TX interrupts. */
908 lp->tx_irq_disabled=0;
909 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
910 #endif /* #if (!TX_INTERRUPTABLE) */
915 } /* mace_start_xmit */
917 /* ----------------------------------------------------------------------------
919 The interrupt handler.
920 ---------------------------------------------------------------------------- */
921 static irqreturn_t mace_interrupt(int irq, void *dev_id)
923 struct net_device *dev = (struct net_device *) dev_id;
924 mace_private *lp = netdev_priv(dev);
927 int IntrCnt = MACE_MAX_IR_ITERATIONS;
930 pr_debug("mace_interrupt(): irq 0x%X for unknown device.\n",
935 ioaddr = dev->base_addr;
937 if (lp->tx_irq_disabled) {
939 (lp->tx_irq_disabled?
940 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
941 "[isr=%02X, imr=%02X]\n":
942 KERN_NOTICE "%s: Re-entering the interrupt handler "
943 "[isr=%02X, imr=%02X]\n"),
945 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
946 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
948 /* WARNING: MACE_IR has been read! */
952 if (!netif_device_present(dev)) {
953 pr_debug("%s: interrupt from dead card\n", dev->name);
958 /* WARNING: MACE_IR is a READ/CLEAR port! */
959 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
961 pr_debug("mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
963 if (status & MACE_IR_RCVINT) {
964 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
967 if (status & MACE_IR_XMTINT) {
968 unsigned char fifofc;
972 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
973 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
974 lp->linux_stats.tx_errors++;
975 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
978 /* Transmit Retry Count (XMTRC, reg 4) */
979 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
980 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
981 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
984 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
985 MACE_XMTFS_XMTSV /* Transmit Status Valid */
987 lp->mace_stats.xmtsv++;
989 if (xmtfs & ~MACE_XMTFS_XMTSV) {
990 if (xmtfs & MACE_XMTFS_UFLO) {
991 /* Underflow. Indicates that the Transmit FIFO emptied before
992 the end of frame was reached. */
993 lp->mace_stats.uflo++;
995 if (xmtfs & MACE_XMTFS_LCOL) {
997 lp->mace_stats.lcol++;
999 if (xmtfs & MACE_XMTFS_MORE) {
1000 /* MORE than one retry was needed */
1001 lp->mace_stats.more++;
1003 if (xmtfs & MACE_XMTFS_ONE) {
1004 /* Exactly ONE retry occurred */
1005 lp->mace_stats.one++;
1007 if (xmtfs & MACE_XMTFS_DEFER) {
1008 /* Transmission was defered */
1009 lp->mace_stats.defer++;
1011 if (xmtfs & MACE_XMTFS_LCAR) {
1012 /* Loss of carrier */
1013 lp->mace_stats.lcar++;
1015 if (xmtfs & MACE_XMTFS_RTRY) {
1016 /* Retry error: transmit aborted after 16 attempts */
1017 lp->mace_stats.rtry++;
1019 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1021 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1023 lp->linux_stats.tx_packets++;
1024 lp->tx_free_frames++;
1025 netif_wake_queue(dev);
1026 } /* if (status & MACE_IR_XMTINT) */
1028 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1029 if (status & MACE_IR_JAB) {
1030 /* Jabber Error. Excessive transmit duration (20-150ms). */
1031 lp->mace_stats.jab++;
1033 if (status & MACE_IR_BABL) {
1034 /* Babble Error. >1518 bytes transmitted. */
1035 lp->mace_stats.babl++;
1037 if (status & MACE_IR_CERR) {
1038 /* Collision Error. CERR indicates the absence of the
1039 Signal Quality Error Test message after a packet
1041 lp->mace_stats.cerr++;
1043 if (status & MACE_IR_RCVCCO) {
1044 /* Receive Collision Count Overflow; */
1045 lp->mace_stats.rcvcco++;
1047 if (status & MACE_IR_RNTPCO) {
1048 /* Runt Packet Count Overflow */
1049 lp->mace_stats.rntpco++;
1051 if (status & MACE_IR_MPCO) {
1052 /* Missed Packet Count Overflow */
1053 lp->mace_stats.mpco++;
1055 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1057 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1060 } /* mace_interrupt */
1062 /* ----------------------------------------------------------------------------
1065 ---------------------------------------------------------------------------- */
1066 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1068 mace_private *lp = netdev_priv(dev);
1069 unsigned int ioaddr = dev->base_addr;
1070 unsigned char rx_framecnt;
1071 unsigned short rx_status;
1074 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1075 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1078 rx_status = inw(ioaddr + AM2150_RCV);
1080 pr_debug("%s: in mace_rx(), framecnt 0x%X, rx_status"
1081 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1083 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1084 lp->linux_stats.rx_errors++;
1085 if (rx_status & MACE_RCVFS_OFLO) {
1086 lp->mace_stats.oflo++;
1088 if (rx_status & MACE_RCVFS_CLSN) {
1089 lp->mace_stats.clsn++;
1091 if (rx_status & MACE_RCVFS_FRAM) {
1092 lp->mace_stats.fram++;
1094 if (rx_status & MACE_RCVFS_FCS) {
1095 lp->mace_stats.fcs++;
1098 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1099 /* Auto Strip is off, always subtract 4 */
1100 struct sk_buff *skb;
1102 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1103 /* runt packet count */
1104 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1105 /* rcv collision count */
1107 pr_debug(" receiving packet size 0x%X rx_status"
1108 " 0x%X.\n", pkt_len, rx_status);
1110 skb = dev_alloc_skb(pkt_len+2);
1113 skb_reserve(skb, 2);
1114 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1116 *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV);
1117 skb->protocol = eth_type_trans(skb, dev);
1119 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1121 lp->linux_stats.rx_packets++;
1122 lp->linux_stats.rx_bytes += pkt_len;
1123 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1126 pr_debug("%s: couldn't allocate a sk_buff of size"
1127 " %d.\n", dev->name, pkt_len);
1128 lp->linux_stats.rx_dropped++;
1131 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1137 /* ----------------------------------------------------------------------------
1139 ---------------------------------------------------------------------------- */
1140 static void pr_linux_stats(struct net_device_stats *pstats)
1142 pr_debug("pr_linux_stats\n");
1143 pr_debug(" rx_packets=%-7ld tx_packets=%ld\n",
1144 (long)pstats->rx_packets, (long)pstats->tx_packets);
1145 pr_debug(" rx_errors=%-7ld tx_errors=%ld\n",
1146 (long)pstats->rx_errors, (long)pstats->tx_errors);
1147 pr_debug(" rx_dropped=%-7ld tx_dropped=%ld\n",
1148 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1149 pr_debug(" multicast=%-7ld collisions=%ld\n",
1150 (long)pstats->multicast, (long)pstats->collisions);
1152 pr_debug(" rx_length_errors=%-7ld rx_over_errors=%ld\n",
1153 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1154 pr_debug(" rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1155 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1156 pr_debug(" rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1157 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1159 pr_debug(" tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1160 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1161 pr_debug(" tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1162 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1163 pr_debug(" tx_window_errors=%ld\n",
1164 (long)pstats->tx_window_errors);
1165 } /* pr_linux_stats */
1167 /* ----------------------------------------------------------------------------
1169 ---------------------------------------------------------------------------- */
1170 static void pr_mace_stats(mace_statistics *pstats)
1172 pr_debug("pr_mace_stats\n");
1174 pr_debug(" xmtsv=%-7d uflo=%d\n",
1175 pstats->xmtsv, pstats->uflo);
1176 pr_debug(" lcol=%-7d more=%d\n",
1177 pstats->lcol, pstats->more);
1178 pr_debug(" one=%-7d defer=%d\n",
1179 pstats->one, pstats->defer);
1180 pr_debug(" lcar=%-7d rtry=%d\n",
1181 pstats->lcar, pstats->rtry);
1184 pr_debug(" exdef=%-7d xmtrc=%d\n",
1185 pstats->exdef, pstats->xmtrc);
1187 /* RFS1--Receive Status (RCVSTS) */
1188 pr_debug(" oflo=%-7d clsn=%d\n",
1189 pstats->oflo, pstats->clsn);
1190 pr_debug(" fram=%-7d fcs=%d\n",
1191 pstats->fram, pstats->fcs);
1193 /* RFS2--Runt Packet Count (RNTPC) */
1194 /* RFS3--Receive Collision Count (RCVCC) */
1195 pr_debug(" rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1196 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1199 pr_debug(" jab=%-7d babl=%d\n",
1200 pstats->jab, pstats->babl);
1201 pr_debug(" cerr=%-7d rcvcco=%d\n",
1202 pstats->cerr, pstats->rcvcco);
1203 pr_debug(" rntpco=%-7d mpco=%d\n",
1204 pstats->rntpco, pstats->mpco);
1207 pr_debug(" mpc=%d\n", pstats->mpc);
1210 pr_debug(" rntpc=%d\n", pstats->rntpc);
1213 pr_debug(" rcvcc=%d\n", pstats->rcvcc);
1215 } /* pr_mace_stats */
1217 /* ----------------------------------------------------------------------------
1219 Update statistics. We change to register window 1, so this
1220 should be run single-threaded if the device is active. This is
1221 expected to be a rare operation, and it's simpler for the rest
1222 of the driver to assume that window 0 is always valid rather
1223 than use a special window-state variable.
1225 oflo & uflo should _never_ occur since it would mean the Xilinx
1226 was not able to transfer data between the MACE FIFO and the
1227 card's SRAM fast enough. If this happens, something is
1228 seriously wrong with the hardware.
1229 ---------------------------------------------------------------------------- */
1230 static void update_stats(unsigned int ioaddr, struct net_device *dev)
1232 mace_private *lp = netdev_priv(dev);
1234 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1235 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1236 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1237 /* At this point, mace_stats is fully updated for this call.
1238 We may now update the linux_stats. */
1240 /* The MACE has no equivalent for linux_stats field which are commented
1243 /* lp->linux_stats.multicast; */
1244 lp->linux_stats.collisions =
1245 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1246 /* Collision: The MACE may retry sending a packet 15 times
1247 before giving up. The retry count is in XMTRC.
1248 Does each retry constitute a collision?
1249 If so, why doesn't the RCVCC record these collisions? */
1251 /* detailed rx_errors: */
1252 lp->linux_stats.rx_length_errors =
1253 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1254 /* lp->linux_stats.rx_over_errors */
1255 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1256 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1257 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1258 lp->linux_stats.rx_missed_errors =
1259 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1261 /* detailed tx_errors */
1262 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1263 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1264 /* LCAR usually results from bad cabling. */
1265 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1266 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1267 /* lp->linux_stats.tx_window_errors; */
1268 } /* update_stats */
1270 /* ----------------------------------------------------------------------------
1272 Gathers ethernet statistics from the MACE chip.
1273 ---------------------------------------------------------------------------- */
1274 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1276 mace_private *lp = netdev_priv(dev);
1278 update_stats(dev->base_addr, dev);
1280 pr_debug("%s: updating the statistics.\n", dev->name);
1281 pr_linux_stats(&lp->linux_stats);
1282 pr_mace_stats(&lp->mace_stats);
1284 return &lp->linux_stats;
1285 } /* net_device_stats */
1287 /* ----------------------------------------------------------------------------
1289 Modified from Am79C90 data sheet.
1290 ---------------------------------------------------------------------------- */
1292 #ifdef BROKEN_MULTICAST
1294 static void updateCRC(int *CRC, int bit)
1301 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1302 CRC generator polynomial. */
1306 /* shift CRC and control bit (CRC[32]) */
1307 for (j = 32; j > 0; j--)
1311 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1313 for (j = 0; j < 32; j++)
1317 /* ----------------------------------------------------------------------------
1319 Build logical address filter.
1320 Modified from Am79C90 data sheet.
1323 ladrf: logical address filter (contents initialized to 0)
1324 adr: ethernet address
1325 ---------------------------------------------------------------------------- */
1326 static void BuildLAF(int *ladrf, int *adr)
1328 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1330 int i, byte; /* temporary array indices */
1331 int hashcode; /* the output object */
1335 for (byte = 0; byte < 6; byte++)
1336 for (i = 0; i < 8; i++)
1337 updateCRC(CRC, (adr[byte] >> i) & 1);
1340 for (i = 0; i < 6; i++)
1341 hashcode = (hashcode << 1) + CRC[i];
1343 byte = hashcode >> 3;
1344 ladrf[byte] |= (1 << (hashcode & 7));
1348 printk(KERN_DEBUG " adr =%pM\n", adr);
1349 printk(KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63] =", hashcode);
1350 for (i = 0; i < 8; i++)
1351 printk(KERN_CONT " %02X", ladrf[i]);
1352 printk(KERN_CONT "\n");
1356 /* ----------------------------------------------------------------------------
1357 restore_multicast_list
1358 Restores the multicast filter for MACE chip to the last
1359 set_multicast_list() call.
1364 ---------------------------------------------------------------------------- */
1365 static void restore_multicast_list(struct net_device *dev)
1367 mace_private *lp = netdev_priv(dev);
1368 int num_addrs = lp->multicast_num_addrs;
1369 int *ladrf = lp->multicast_ladrf;
1370 unsigned int ioaddr = dev->base_addr;
1373 pr_debug("%s: restoring Rx mode to %d addresses.\n",
1374 dev->name, num_addrs);
1376 if (num_addrs > 0) {
1378 pr_debug("Attempt to restore multicast list detected.\n");
1380 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1381 /* Poll ADDRCHG bit */
1382 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1384 /* Set LADRF register */
1385 for (i = 0; i < MACE_LADRF_LEN; i++)
1386 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1388 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1389 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1391 } else if (num_addrs < 0) {
1393 /* Promiscuous mode: receive all packets */
1394 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1395 mace_write(lp, ioaddr, MACE_MACCC,
1396 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1402 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1403 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1406 } /* restore_multicast_list */
1408 /* ----------------------------------------------------------------------------
1410 Set or clear the multicast filter for this adaptor.
1413 num_addrs == -1 Promiscuous mode, receive all packets
1414 num_addrs == 0 Normal mode, clear multicast list
1415 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1416 best-effort filtering.
1420 ---------------------------------------------------------------------------- */
1422 static void set_multicast_list(struct net_device *dev)
1424 mace_private *lp = netdev_priv(dev);
1425 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1426 struct netdev_hw_addr *ha;
1431 if (netdev_mc_count(dev) != old) {
1432 old = netdev_mc_count(dev);
1433 pr_debug("%s: setting Rx mode to %d addresses.\n",
1439 /* Set multicast_num_addrs. */
1440 lp->multicast_num_addrs = netdev_mc_count(dev);
1442 /* Set multicast_ladrf. */
1443 if (num_addrs > 0) {
1444 /* Calculate multicast logical address filter */
1445 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1446 netdev_for_each_mc_addr(ha, dev) {
1447 memcpy(adr, ha->addr, ETHER_ADDR_LEN);
1448 BuildLAF(lp->multicast_ladrf, adr);
1452 restore_multicast_list(dev);
1454 } /* set_multicast_list */
1456 #endif /* BROKEN_MULTICAST */
1458 static void restore_multicast_list(struct net_device *dev)
1460 unsigned int ioaddr = dev->base_addr;
1461 mace_private *lp = netdev_priv(dev);
1463 pr_debug("%s: restoring Rx mode to %d addresses.\n", dev->name,
1464 lp->multicast_num_addrs);
1466 if (dev->flags & IFF_PROMISC) {
1467 /* Promiscuous mode: receive all packets */
1468 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1469 mace_write(lp, ioaddr, MACE_MACCC,
1470 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1474 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1475 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1477 } /* restore_multicast_list */
1479 static void set_multicast_list(struct net_device *dev)
1481 mace_private *lp = netdev_priv(dev);
1486 if (netdev_mc_count(dev) != old) {
1487 old = netdev_mc_count(dev);
1488 pr_debug("%s: setting Rx mode to %d addresses.\n",
1494 lp->multicast_num_addrs = netdev_mc_count(dev);
1495 restore_multicast_list(dev);
1497 } /* set_multicast_list */
1499 static struct pcmcia_device_id nmclan_ids[] = {
1500 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1501 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1504 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1506 static struct pcmcia_driver nmclan_cs_driver = {
1507 .owner = THIS_MODULE,
1508 .name = "nmclan_cs",
1509 .probe = nmclan_probe,
1510 .remove = nmclan_detach,
1511 .id_table = nmclan_ids,
1512 .suspend = nmclan_suspend,
1513 .resume = nmclan_resume,
1516 static int __init init_nmclan_cs(void)
1518 return pcmcia_register_driver(&nmclan_cs_driver);
1521 static void __exit exit_nmclan_cs(void)
1523 pcmcia_unregister_driver(&nmclan_cs_driver);
1526 module_init(init_nmclan_cs);
1527 module_exit(exit_nmclan_cs);