1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
7 #include <linux/types.h>
8 #include <linux/atomic.h>
9 #include <linux/bitfield.h>
10 #include <linux/device.h>
11 #include <linux/bug.h>
13 #include <linux/firmware.h>
14 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/of_address.h>
18 #include <linux/remoteproc.h>
19 #include <linux/qcom_scm.h>
20 #include <linux/soc/qcom/mdt_loader.h>
23 #include "ipa_clock.h"
25 #include "ipa_endpoint.h"
29 #include "ipa_table.h"
30 #include "ipa_modem.h"
32 #include "ipa_interrupt.h"
33 #include "gsi_trans.h"
36 * DOC: The IP Accelerator
38 * This driver supports the Qualcomm IP Accelerator (IPA), which is a
39 * networking component found in many Qualcomm SoCs. The IPA is connected
40 * to the application processor (AP), but is also connected (and partially
41 * controlled by) other "execution environments" (EEs), such as a modem.
43 * The IPA is the conduit between the AP and the modem that carries network
44 * traffic. This driver presents a network interface representing the
45 * connection of the modem to external (e.g. LTE) networks.
47 * The IPA provides protocol checksum calculation, offloading this work
48 * from the AP. The IPA offers additional functionality, including routing,
49 * filtering, and NAT support, but that more advanced functionality is not
50 * currently supported. Despite that, some resources--including routing
51 * tables and filter tables--are defined in this driver because they must
52 * be initialized even when the advanced hardware features are not used.
54 * There are two distinct layers that implement the IPA hardware, and this
55 * is reflected in the organization of the driver. The generic software
56 * interface (GSI) is an integral component of the IPA, providing a
57 * well-defined communication layer between the AP subsystem and the IPA
58 * core. The GSI implements a set of "channels" used for communication
59 * between the AP and the IPA.
61 * The IPA layer uses GSI channels to implement its "endpoints". And while
62 * a GSI channel carries data between the AP and the IPA, a pair of IPA
63 * endpoints is used to carry traffic between two EEs. Specifically, the main
64 * modem network interface is implemented by two pairs of endpoints: a TX
65 * endpoint on the AP coupled with an RX endpoint on the modem; and another
66 * RX endpoint on the AP receiving data from a TX endpoint on the modem.
69 /* The name of the GSI firmware file relative to /lib/firmware */
70 #define IPA_FWS_PATH "ipa_fws.mdt"
73 /* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */
74 #define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */
75 #define TAG_TIMESTAMP_SHIFT 14
76 #define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */
78 /* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */
79 #define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */
82 * ipa_suspend_handler() - Handle the suspend IPA interrupt
84 * @irq_id: IPA interrupt type (unused)
86 * If an RX endpoint is in suspend state, and the IPA has a packet
87 * destined for that endpoint, the IPA generates a SUSPEND interrupt
88 * to inform the AP that it should resume the endpoint. If we get
89 * one of these interrupts we just resume everything.
91 static void ipa_suspend_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
93 /* Just report the event, and let system resume handle the rest.
94 * More than one endpoint could signal this; if so, ignore
97 if (!test_and_set_bit(IPA_FLAG_RESUMED, ipa->flags))
98 pm_wakeup_dev_event(&ipa->pdev->dev, 0, true);
100 /* Acknowledge/clear the suspend interrupt on all endpoints */
101 ipa_interrupt_suspend_clear_all(ipa->interrupt);
105 * ipa_setup() - Set up IPA hardware
108 * Perform initialization that requires issuing immediate commands on
109 * the command TX endpoint. If the modem is doing GSI firmware load
110 * and initialization, this function will be called when an SMP2P
111 * interrupt has been signaled by the modem. Otherwise it will be
112 * called from ipa_probe() after GSI firmware has been successfully
113 * loaded, authenticated, and started by Trust Zone.
115 int ipa_setup(struct ipa *ipa)
117 struct ipa_endpoint *exception_endpoint;
118 struct ipa_endpoint *command_endpoint;
119 struct device *dev = &ipa->pdev->dev;
122 ret = gsi_setup(&ipa->gsi);
126 ipa->interrupt = ipa_interrupt_setup(ipa);
127 if (IS_ERR(ipa->interrupt)) {
128 ret = PTR_ERR(ipa->interrupt);
129 goto err_gsi_teardown;
131 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_TX_SUSPEND,
132 ipa_suspend_handler);
136 ret = device_init_wakeup(dev, true);
138 goto err_uc_teardown;
140 ipa_endpoint_setup(ipa);
142 /* We need to use the AP command TX endpoint to perform other
143 * initialization, so we enable first.
145 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];
146 ret = ipa_endpoint_enable_one(command_endpoint);
148 goto err_endpoint_teardown;
150 ret = ipa_mem_setup(ipa);
152 goto err_command_disable;
154 ret = ipa_table_setup(ipa);
156 goto err_mem_teardown;
158 /* Enable the exception handling endpoint, and tell the hardware
159 * to use it by default.
161 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];
162 ret = ipa_endpoint_enable_one(exception_endpoint);
164 goto err_table_teardown;
166 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id);
168 /* We're all set. Now prepare for communication with the modem */
169 ret = ipa_modem_setup(ipa);
171 goto err_default_route_clear;
173 ipa->setup_complete = true;
175 dev_info(dev, "IPA driver setup completed successfully\n");
179 err_default_route_clear:
180 ipa_endpoint_default_route_clear(ipa);
181 ipa_endpoint_disable_one(exception_endpoint);
183 ipa_table_teardown(ipa);
185 ipa_mem_teardown(ipa);
187 ipa_endpoint_disable_one(command_endpoint);
188 err_endpoint_teardown:
189 ipa_endpoint_teardown(ipa);
190 (void)device_init_wakeup(dev, false);
192 ipa_uc_teardown(ipa);
193 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND);
194 ipa_interrupt_teardown(ipa->interrupt);
196 gsi_teardown(&ipa->gsi);
202 * ipa_teardown() - Inverse of ipa_setup()
205 static void ipa_teardown(struct ipa *ipa)
207 struct ipa_endpoint *exception_endpoint;
208 struct ipa_endpoint *command_endpoint;
210 ipa_modem_teardown(ipa);
211 ipa_endpoint_default_route_clear(ipa);
212 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];
213 ipa_endpoint_disable_one(exception_endpoint);
214 ipa_table_teardown(ipa);
215 ipa_mem_teardown(ipa);
216 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];
217 ipa_endpoint_disable_one(command_endpoint);
218 ipa_endpoint_teardown(ipa);
219 (void)device_init_wakeup(&ipa->pdev->dev, false);
220 ipa_uc_teardown(ipa);
221 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND);
222 ipa_interrupt_teardown(ipa->interrupt);
223 gsi_teardown(&ipa->gsi);
226 /* Configure QMB Core Master Port selection */
227 static void ipa_hardware_config_comp(struct ipa *ipa)
231 /* Nothing to configure for IPA v3.5.1 */
232 if (ipa->version == IPA_VERSION_3_5_1)
235 val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET);
237 if (ipa->version == IPA_VERSION_4_0) {
238 val &= ~IPA_QMB_SELECT_CONS_EN_FMASK;
239 val &= ~IPA_QMB_SELECT_PROD_EN_FMASK;
240 val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK;
241 } else if (ipa->version < IPA_VERSION_4_5) {
242 val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK;
244 /* For IPA v4.5 IPA_FULL_FLUSH_WAIT_RSC_CLOSE_EN is 0 */
247 val |= GSI_MULTI_INORDER_RD_DIS_FMASK;
248 val |= GSI_MULTI_INORDER_WR_DIS_FMASK;
250 iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET);
253 /* Configure DDR and PCIe max read/write QSB values */
254 static void ipa_hardware_config_qsb(struct ipa *ipa)
256 enum ipa_version version = ipa->version;
261 /* QMB_0 represents DDR; QMB_1 represents PCIe */
262 val = u32_encode_bits(8, GEN_QMB_0_MAX_WRITES_FMASK);
264 case IPA_VERSION_4_2:
265 max1 = 0; /* PCIe not present */
267 case IPA_VERSION_4_5:
274 val |= u32_encode_bits(max1, GEN_QMB_1_MAX_WRITES_FMASK);
275 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET);
279 case IPA_VERSION_3_5_1:
282 case IPA_VERSION_4_0:
283 case IPA_VERSION_4_1:
286 case IPA_VERSION_4_2:
288 max1 = 0; /* PCIe not present */
290 case IPA_VERSION_4_5:
291 max0 = 0; /* No limit (hardware maximum) */
294 val = u32_encode_bits(max0, GEN_QMB_0_MAX_READS_FMASK);
295 val |= u32_encode_bits(max1, GEN_QMB_1_MAX_READS_FMASK);
296 if (version != IPA_VERSION_3_5_1) {
297 /* GEN_QMB_0_MAX_READS_BEATS is 0 */
298 /* GEN_QMB_1_MAX_READS_BEATS is 0 */
300 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET);
303 /* IPA uses unified Qtime starting at IPA v4.5, implementing various
304 * timestamps and timers independent of the IPA core clock rate. The
305 * Qtimer is based on a 56-bit timestamp incremented at each tick of
306 * a 19.2 MHz SoC crystal oscillator (XO clock).
308 * For IPA timestamps (tag, NAT, data path logging) a lower resolution
309 * timestamp is achieved by shifting the Qtimer timestamp value right
310 * some number of bits to produce the low-order bits of the coarser
311 * granularity timestamp.
313 * For timers, a common timer clock is derived from the XO clock using
314 * a divider (we use 192, to produce a 100kHz timer clock). From
315 * this common clock, three "pulse generators" are used to produce
316 * timer ticks at a configurable frequency. IPA timers (such as
317 * those used for aggregation or head-of-line block handling) now
318 * define their period based on one of these pulse generators.
320 static void ipa_qtime_config(struct ipa *ipa)
324 /* Timer clock divider must be disabled when we change the rate */
325 iowrite32(0, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET);
327 /* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */
328 val = u32_encode_bits(DPL_TIMESTAMP_SHIFT, DPL_TIMESTAMP_LSB_FMASK);
329 val |= u32_encode_bits(1, DPL_TIMESTAMP_SEL_FMASK);
330 /* Configure tag and NAT Qtime timestamp resolution as well */
331 val |= u32_encode_bits(TAG_TIMESTAMP_SHIFT, TAG_TIMESTAMP_LSB_FMASK);
332 val |= u32_encode_bits(NAT_TIMESTAMP_SHIFT, NAT_TIMESTAMP_LSB_FMASK);
333 iowrite32(val, ipa->reg_virt + IPA_REG_QTIME_TIMESTAMP_CFG_OFFSET);
335 /* Set granularity of pulse generators used for other timers */
336 val = u32_encode_bits(IPA_GRAN_100_US, GRAN_0_FMASK);
337 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_1_FMASK);
338 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_2_FMASK);
339 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_PULSE_GRAN_CFG_OFFSET);
341 /* Actual divider is 1 more than value supplied here */
342 val = u32_encode_bits(IPA_XO_CLOCK_DIVIDER - 1, DIV_VALUE_FMASK);
343 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET);
345 /* Divider value is set; re-enable the common timer clock divider */
346 val |= u32_encode_bits(1, DIV_ENABLE_FMASK);
347 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET);
350 static void ipa_idle_indication_cfg(struct ipa *ipa,
351 u32 enter_idle_debounce_thresh,
352 bool const_non_idle_enable)
357 val = u32_encode_bits(enter_idle_debounce_thresh,
358 ENTER_IDLE_DEBOUNCE_THRESH_FMASK);
359 if (const_non_idle_enable)
360 val |= CONST_NON_IDLE_ENABLE_FMASK;
362 offset = ipa_reg_idle_indication_cfg_offset(ipa->version);
363 iowrite32(val, ipa->reg_virt + offset);
367 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA
370 * Configures when the IPA signals it is idle to the global clock
371 * controller, which can respond by scalling down the clock to
374 static void ipa_hardware_dcd_config(struct ipa *ipa)
376 /* Recommended values for IPA 3.5 and later according to IPA HPG */
377 ipa_idle_indication_cfg(ipa, 256, false);
380 static void ipa_hardware_dcd_deconfig(struct ipa *ipa)
382 /* Power-on reset values */
383 ipa_idle_indication_cfg(ipa, 0, true);
387 * ipa_hardware_config() - Primitive hardware initialization
390 static void ipa_hardware_config(struct ipa *ipa)
392 enum ipa_version version = ipa->version;
396 /* IPA v4.5 has no backward compatibility register */
397 if (version < IPA_VERSION_4_5) {
398 val = ipa_reg_bcr_val(version);
399 iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET);
402 /* Implement some hardware workarounds */
403 if (version != IPA_VERSION_3_5_1 && version < IPA_VERSION_4_5) {
404 /* Enable open global clocks (not needed for IPA v4.5) */
406 val |= GLOBAL_2X_CLK_FMASK;
407 iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET);
409 /* Disable PA mask to allow HOLB drop */
410 val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET);
411 val &= ~PA_MASK_EN_FMASK;
412 iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET);
415 ipa_hardware_config_comp(ipa);
417 /* Configure system bus limits */
418 ipa_hardware_config_qsb(ipa);
420 if (version < IPA_VERSION_4_5) {
421 /* Configure aggregation timer granularity */
422 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY);
423 val = u32_encode_bits(granularity, AGGR_GRANULARITY_FMASK);
424 iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET);
426 ipa_qtime_config(ipa);
429 /* IPA v4.2 does not support hashed tables, so disable them */
430 if (version == IPA_VERSION_4_2) {
431 u32 offset = ipa_reg_filt_rout_hash_en_offset(version);
433 iowrite32(0, ipa->reg_virt + offset);
436 /* Enable dynamic clock division */
437 ipa_hardware_dcd_config(ipa);
441 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config()
444 * This restores the power-on reset values (even if they aren't different)
446 static void ipa_hardware_deconfig(struct ipa *ipa)
448 /* Mostly we just leave things as we set them. */
449 ipa_hardware_dcd_deconfig(ipa);
452 #ifdef IPA_VALIDATION
454 static bool ipa_resource_limits_valid(struct ipa *ipa,
455 const struct ipa_resource_data *data)
461 /* We program at most 6 source or destination resource group limits */
462 BUILD_BUG_ON(IPA_RESOURCE_GROUP_SRC_MAX > 6);
464 group_count = ipa_resource_group_src_count(ipa->version);
465 if (!group_count || group_count > IPA_RESOURCE_GROUP_SRC_MAX)
468 /* Return an error if a non-zero resource limit is specified
469 * for a resource group not supported by hardware.
471 for (i = 0; i < data->resource_src_count; i++) {
472 const struct ipa_resource_src *resource;
474 resource = &data->resource_src[i];
475 for (j = group_count; j < IPA_RESOURCE_GROUP_SRC_MAX; j++)
476 if (resource->limits[j].min || resource->limits[j].max)
480 group_count = ipa_resource_group_dst_count(ipa->version);
481 if (!group_count || group_count > IPA_RESOURCE_GROUP_DST_MAX)
484 for (i = 0; i < data->resource_dst_count; i++) {
485 const struct ipa_resource_dst *resource;
487 resource = &data->resource_dst[i];
488 for (j = group_count; j < IPA_RESOURCE_GROUP_DST_MAX; j++)
489 if (resource->limits[j].min || resource->limits[j].max)
496 #else /* !IPA_VALIDATION */
498 static bool ipa_resource_limits_valid(struct ipa *ipa,
499 const struct ipa_resource_data *data)
504 #endif /* !IPA_VALIDATION */
507 ipa_resource_config_common(struct ipa *ipa, u32 offset,
508 const struct ipa_resource_limits *xlimits,
509 const struct ipa_resource_limits *ylimits)
513 val = u32_encode_bits(xlimits->min, X_MIN_LIM_FMASK);
514 val |= u32_encode_bits(xlimits->max, X_MAX_LIM_FMASK);
516 val |= u32_encode_bits(ylimits->min, Y_MIN_LIM_FMASK);
517 val |= u32_encode_bits(ylimits->max, Y_MAX_LIM_FMASK);
520 iowrite32(val, ipa->reg_virt + offset);
523 static void ipa_resource_config_src(struct ipa *ipa,
524 const struct ipa_resource_src *resource)
526 u32 group_count = ipa_resource_group_src_count(ipa->version);
527 const struct ipa_resource_limits *ylimits;
530 offset = IPA_REG_SRC_RSRC_GRP_01_RSRC_TYPE_N_OFFSET(resource->type);
531 ylimits = group_count == 1 ? NULL : &resource->limits[1];
532 ipa_resource_config_common(ipa, offset, &resource->limits[0], ylimits);
537 offset = IPA_REG_SRC_RSRC_GRP_23_RSRC_TYPE_N_OFFSET(resource->type);
538 ylimits = group_count == 3 ? NULL : &resource->limits[3];
539 ipa_resource_config_common(ipa, offset, &resource->limits[2], ylimits);
544 offset = IPA_REG_SRC_RSRC_GRP_45_RSRC_TYPE_N_OFFSET(resource->type);
545 ylimits = group_count == 5 ? NULL : &resource->limits[5];
546 ipa_resource_config_common(ipa, offset, &resource->limits[4], ylimits);
549 static void ipa_resource_config_dst(struct ipa *ipa,
550 const struct ipa_resource_dst *resource)
552 u32 group_count = ipa_resource_group_dst_count(ipa->version);
553 const struct ipa_resource_limits *ylimits;
556 offset = IPA_REG_DST_RSRC_GRP_01_RSRC_TYPE_N_OFFSET(resource->type);
557 ylimits = group_count == 1 ? NULL : &resource->limits[1];
558 ipa_resource_config_common(ipa, offset, &resource->limits[0], ylimits);
563 offset = IPA_REG_DST_RSRC_GRP_23_RSRC_TYPE_N_OFFSET(resource->type);
564 ylimits = group_count == 3 ? NULL : &resource->limits[3];
565 ipa_resource_config_common(ipa, offset, &resource->limits[2], ylimits);
570 offset = IPA_REG_DST_RSRC_GRP_45_RSRC_TYPE_N_OFFSET(resource->type);
571 ylimits = group_count == 5 ? NULL : &resource->limits[5];
572 ipa_resource_config_common(ipa, offset, &resource->limits[4], ylimits);
576 ipa_resource_config(struct ipa *ipa, const struct ipa_resource_data *data)
580 if (!ipa_resource_limits_valid(ipa, data))
583 for (i = 0; i < data->resource_src_count; i++)
584 ipa_resource_config_src(ipa, data->resource_src);
586 for (i = 0; i < data->resource_dst_count; i++)
587 ipa_resource_config_dst(ipa, data->resource_dst);
592 static void ipa_resource_deconfig(struct ipa *ipa)
598 * ipa_config() - Configure IPA hardware
600 * @data: IPA configuration data
602 * Perform initialization requiring IPA clock to be enabled.
604 static int ipa_config(struct ipa *ipa, const struct ipa_data *data)
608 /* Get a clock reference to allow initialization. This reference
609 * is held after initialization completes, and won't get dropped
610 * unless/until a system suspend request arrives.
614 ipa_hardware_config(ipa);
616 ret = ipa_endpoint_config(ipa);
618 goto err_hardware_deconfig;
620 ret = ipa_mem_config(ipa);
622 goto err_endpoint_deconfig;
624 ipa_table_config(ipa);
626 /* Assign resource limitation to each group */
627 ret = ipa_resource_config(ipa, data->resource_data);
629 goto err_table_deconfig;
631 ret = ipa_modem_config(ipa);
633 goto err_resource_deconfig;
637 err_resource_deconfig:
638 ipa_resource_deconfig(ipa);
640 ipa_table_deconfig(ipa);
641 ipa_mem_deconfig(ipa);
642 err_endpoint_deconfig:
643 ipa_endpoint_deconfig(ipa);
644 err_hardware_deconfig:
645 ipa_hardware_deconfig(ipa);
652 * ipa_deconfig() - Inverse of ipa_config()
655 static void ipa_deconfig(struct ipa *ipa)
657 ipa_modem_deconfig(ipa);
658 ipa_resource_deconfig(ipa);
659 ipa_table_deconfig(ipa);
660 ipa_mem_deconfig(ipa);
661 ipa_endpoint_deconfig(ipa);
662 ipa_hardware_deconfig(ipa);
666 static int ipa_firmware_load(struct device *dev)
668 const struct firmware *fw;
669 struct device_node *node;
676 node = of_parse_phandle(dev->of_node, "memory-region", 0);
678 dev_err(dev, "DT error getting \"memory-region\" property\n");
682 ret = of_address_to_resource(node, 0, &res);
684 dev_err(dev, "error %d getting \"memory-region\" resource\n",
689 ret = request_firmware(&fw, IPA_FWS_PATH, dev);
691 dev_err(dev, "error %d requesting \"%s\"\n", ret, IPA_FWS_PATH);
696 size = (size_t)resource_size(&res);
697 virt = memremap(phys, size, MEMREMAP_WC);
699 dev_err(dev, "unable to remap firmware memory\n");
701 goto out_release_firmware;
704 ret = qcom_mdt_load(dev, fw, IPA_FWS_PATH, IPA_PAS_ID,
705 virt, phys, size, NULL);
707 dev_err(dev, "error %d loading \"%s\"\n", ret, IPA_FWS_PATH);
708 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID)))
709 dev_err(dev, "error %d authenticating \"%s\"\n", ret,
713 out_release_firmware:
714 release_firmware(fw);
719 static const struct of_device_id ipa_match[] = {
721 .compatible = "qcom,sdm845-ipa",
722 .data = &ipa_data_sdm845,
725 .compatible = "qcom,sc7180-ipa",
726 .data = &ipa_data_sc7180,
730 MODULE_DEVICE_TABLE(of, ipa_match);
732 static phandle of_property_read_phandle(const struct device_node *np,
735 struct property *prop;
738 prop = of_find_property(np, name, &len);
739 if (!prop || len != sizeof(__be32))
742 return be32_to_cpup(prop->value);
745 /* Check things that can be validated at build time. This just
746 * groups these things BUILD_BUG_ON() calls don't clutter the rest
749 static void ipa_validate_build(void)
752 /* We assume we're working on 64-bit hardware */
753 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT));
755 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */
756 BUILD_BUG_ON(GSI_EE_AP != 0);
758 /* There's no point if we have no channels or event rings */
759 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX);
760 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX);
762 /* GSI hardware design limits */
763 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32);
764 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31);
766 /* The number of TREs in a transaction is limited by the channel's
767 * TLV FIFO size. A transaction structure uses 8-bit fields
768 * to represents the number of TREs it has allocated and used.
770 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX);
772 /* This is used as a divisor */
773 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY);
775 /* Aggregation granularity value can't be 0, and must fit */
776 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY));
777 BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) >
778 field_max(AGGR_GRANULARITY_FMASK));
779 #endif /* IPA_VALIDATE */
783 * ipa_probe() - IPA platform driver probe function
784 * @pdev: Platform device pointer
786 * Return: 0 if successful, or a negative error code (possibly
789 * This is the main entry point for the IPA driver. Initialization proceeds
791 * - The "init" stage involves activities that can be initialized without
792 * access to the IPA hardware.
793 * - The "config" stage requires the IPA clock to be active so IPA registers
794 * can be accessed, but does not require the use of IPA immediate commands.
795 * - The "setup" stage uses IPA immediate commands, and so requires the GSI
796 * layer to be initialized.
798 * A Boolean Device Tree "modem-init" property determines whether GSI
799 * initialization will be performed by the AP (Trust Zone) or the modem.
800 * If the AP does GSI initialization, the setup phase is entered after
801 * this has completed successfully. Otherwise the modem initializes
802 * the GSI layer and signals it has finished by sending an SMP2P interrupt
803 * to the AP; this triggers the start if IPA setup.
805 static int ipa_probe(struct platform_device *pdev)
807 struct device *dev = &pdev->dev;
808 const struct ipa_data *data;
809 struct ipa_clock *clock;
816 ipa_validate_build();
818 /* Get configuration data early; needed for clock initialization */
819 data = of_device_get_match_data(dev);
821 /* This is really IPA_VALIDATE (should never happen) */
822 dev_err(dev, "matched hardware not supported\n");
826 /* If we need Trust Zone, make sure it's available */
827 modem_init = of_property_read_bool(dev->of_node, "modem-init");
829 if (!qcom_scm_is_available())
830 return -EPROBE_DEFER;
832 /* We rely on remoteproc to tell us about modem state changes */
833 ph = of_property_read_phandle(dev->of_node, "modem-remoteproc");
835 dev_err(dev, "DT missing \"modem-remoteproc\" property\n");
839 rproc = rproc_get_by_phandle(ph);
841 return -EPROBE_DEFER;
843 /* The clock and interconnects might not be ready when we're
844 * probed, so might return -EPROBE_DEFER.
846 clock = ipa_clock_init(dev, data->clock_data);
848 ret = PTR_ERR(clock);
852 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */
853 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL);
860 dev_set_drvdata(dev, ipa);
861 ipa->modem_rproc = rproc;
863 ipa->version = data->version;
865 ret = ipa_reg_init(ipa);
869 ret = ipa_mem_init(ipa, data->mem_data);
873 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count,
874 data->endpoint_data);
878 /* Result is a non-zero mask of endpoints that support filtering */
879 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count,
880 data->endpoint_data);
881 if (!ipa->filter_map) {
886 ret = ipa_table_init(ipa);
888 goto err_endpoint_exit;
890 ret = ipa_modem_init(ipa, modem_init);
894 ret = ipa_config(ipa, data);
898 dev_info(dev, "IPA driver initialized");
900 /* If the modem is doing early initialization, it will trigger a
901 * call to ipa_setup() call when it has finished. In that case
907 /* Otherwise we need to load the firmware and have Trust Zone validate
908 * and install it. If that succeeds we can proceed with setup.
910 ret = ipa_firmware_load(dev);
914 ret = ipa_setup(ipa);
927 ipa_endpoint_exit(ipa);
937 ipa_clock_exit(clock);
944 static int ipa_remove(struct platform_device *pdev)
946 struct ipa *ipa = dev_get_drvdata(&pdev->dev);
947 struct rproc *rproc = ipa->modem_rproc;
948 struct ipa_clock *clock = ipa->clock;
951 if (ipa->setup_complete) {
952 ret = ipa_modem_stop(ipa);
953 /* If starting or stopping is in progress, try once more */
955 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);
956 ret = ipa_modem_stop(ipa);
967 ipa_endpoint_exit(ipa);
972 ipa_clock_exit(clock);
978 static void ipa_shutdown(struct platform_device *pdev)
982 ret = ipa_remove(pdev);
984 dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret);
988 * ipa_suspend() - Power management system suspend callback
989 * @dev: IPA device structure
991 * Return: Always returns zero
993 * Called by the PM framework when a system suspend operation is invoked.
994 * Suspends endpoints and releases the clock reference held to keep
995 * the IPA clock running until this point.
997 static int ipa_suspend(struct device *dev)
999 struct ipa *ipa = dev_get_drvdata(dev);
1001 /* When a suspended RX endpoint has a packet ready to receive, we
1002 * get an IPA SUSPEND interrupt. We trigger a system resume in
1003 * that case, but only on the first such interrupt since suspend.
1005 __clear_bit(IPA_FLAG_RESUMED, ipa->flags);
1007 ipa_endpoint_suspend(ipa);
1015 * ipa_resume() - Power management system resume callback
1016 * @dev: IPA device structure
1018 * Return: Always returns 0
1020 * Called by the PM framework when a system resume operation is invoked.
1021 * Takes an IPA clock reference to keep the clock running until suspend,
1022 * and resumes endpoints.
1024 static int ipa_resume(struct device *dev)
1026 struct ipa *ipa = dev_get_drvdata(dev);
1028 /* This clock reference will keep the IPA out of suspend
1029 * until we get a power management suspend request.
1033 ipa_endpoint_resume(ipa);
1038 static const struct dev_pm_ops ipa_pm_ops = {
1039 .suspend = ipa_suspend,
1040 .resume = ipa_resume,
1043 static struct platform_driver ipa_driver = {
1045 .remove = ipa_remove,
1046 .shutdown = ipa_shutdown,
1050 .of_match_table = ipa_match,
1054 module_platform_driver(ipa_driver);
1056 MODULE_LICENSE("GPL v2");
1057 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver");