1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
9 * The IPA has an interrupt line distinct from the interrupt used by the GSI
10 * code. Whereas GSI interrupts are generally related to channel events (like
11 * transfer completions), IPA interrupts are related to other events related
12 * to the IPA. Some of the IPA interrupts come from a microcontroller
13 * embedded in the IPA. Each IPA interrupt type can be both masked and
14 * acknowledged independent of the others.
16 * Two of the IPA interrupts are initiated by the microcontroller. A third
17 * can be generated to signal the need for a wakeup/resume when an IPA
18 * endpoint has been suspended. There are other IPA events, but at this
19 * time only these three are supported.
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
26 #include "ipa_clock.h"
28 #include "ipa_endpoint.h"
29 #include "ipa_interrupt.h"
32 * struct ipa_interrupt - IPA interrupt information
34 * @irq: Linux IRQ number used for IPA interrupts
35 * @enabled: Mask indicating which interrupts are enabled
36 * @handler: Array of handlers indexed by IPA interrupt ID
38 struct ipa_interrupt {
42 ipa_irq_handler_t handler[IPA_IRQ_COUNT];
45 /* Returns true if the interrupt type is associated with the microcontroller */
46 static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id)
48 return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1;
51 /* Process a particular interrupt type that has been received */
52 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
54 bool uc_irq = ipa_interrupt_uc(interrupt, irq_id);
55 struct ipa *ipa = interrupt->ipa;
56 u32 mask = BIT(irq_id);
59 /* For microcontroller interrupts, clear the interrupt right away,
60 * "to avoid clearing unhandled interrupts."
62 offset = ipa_reg_irq_clr_offset(ipa->version);
64 iowrite32(mask, ipa->reg_virt + offset);
66 if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id])
67 interrupt->handler[irq_id](interrupt->ipa, irq_id);
69 /* Clearing the SUSPEND_TX interrupt also clears the register
70 * that tells us which suspended endpoint(s) caused the interrupt,
71 * so defer clearing until after the handler has been called.
74 iowrite32(mask, ipa->reg_virt + offset);
77 /* Process all IPA interrupt types that have been signaled */
78 static void ipa_interrupt_process_all(struct ipa_interrupt *interrupt)
80 struct ipa *ipa = interrupt->ipa;
81 u32 enabled = interrupt->enabled;
85 /* The status register indicates which conditions are present,
86 * including conditions whose interrupt is not enabled. Handle
87 * only the enabled ones.
89 offset = ipa_reg_irq_stts_offset(ipa->version);
90 mask = ioread32(ipa->reg_virt + offset);
91 while ((mask &= enabled)) {
93 u32 irq_id = __ffs(mask);
97 ipa_interrupt_process(interrupt, irq_id);
99 mask = ioread32(ipa->reg_virt + offset);
103 /* Threaded part of the IPA IRQ handler */
104 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
106 struct ipa_interrupt *interrupt = dev_id;
108 ipa_clock_get(interrupt->ipa);
110 ipa_interrupt_process_all(interrupt);
112 ipa_clock_put(interrupt->ipa);
117 /* Hard part (i.e., "real" IRQ handler) of the IRQ handler */
118 static irqreturn_t ipa_isr(int irq, void *dev_id)
120 struct ipa_interrupt *interrupt = dev_id;
121 struct ipa *ipa = interrupt->ipa;
125 offset = ipa_reg_irq_stts_offset(ipa->version);
126 mask = ioread32(ipa->reg_virt + offset);
127 if (mask & interrupt->enabled)
128 return IRQ_WAKE_THREAD;
130 /* Nothing in the mask was supposed to cause an interrupt */
131 offset = ipa_reg_irq_clr_offset(ipa->version);
132 iowrite32(mask, ipa->reg_virt + offset);
134 dev_err(&ipa->pdev->dev, "%s: unexpected interrupt, mask 0x%08x\n",
140 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
141 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
142 u32 endpoint_id, bool enable)
144 struct ipa *ipa = interrupt->ipa;
145 u32 mask = BIT(endpoint_id);
149 /* assert(mask & ipa->available); */
151 /* IPA version 3.0 does not support TX_SUSPEND interrupt control */
152 if (ipa->version == IPA_VERSION_3_0)
155 offset = ipa_reg_irq_suspend_en_offset(ipa->version);
156 val = ioread32(ipa->reg_virt + offset);
161 iowrite32(val, ipa->reg_virt + offset);
164 /* Enable TX_SUSPEND for an endpoint */
166 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
168 ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
171 /* Disable TX_SUSPEND for an endpoint */
173 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
175 ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
178 /* Clear the suspend interrupt for all endpoints that signaled it */
179 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
181 struct ipa *ipa = interrupt->ipa;
185 offset = ipa_reg_irq_suspend_info_offset(ipa->version);
186 val = ioread32(ipa->reg_virt + offset);
188 /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
189 if (ipa->version == IPA_VERSION_3_0)
192 offset = ipa_reg_irq_suspend_clr_offset(ipa->version);
193 iowrite32(val, ipa->reg_virt + offset);
196 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
197 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
199 ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
202 /* Add a handler for an IPA interrupt */
203 void ipa_interrupt_add(struct ipa_interrupt *interrupt,
204 enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler)
206 struct ipa *ipa = interrupt->ipa;
209 /* assert(ipa_irq < IPA_IRQ_COUNT); */
210 interrupt->handler[ipa_irq] = handler;
212 /* Update the IPA interrupt mask to enable it */
213 interrupt->enabled |= BIT(ipa_irq);
214 offset = ipa_reg_irq_en_offset(ipa->version);
215 iowrite32(interrupt->enabled, ipa->reg_virt + offset);
218 /* Remove the handler for an IPA interrupt type */
220 ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq)
222 struct ipa *ipa = interrupt->ipa;
225 /* assert(ipa_irq < IPA_IRQ_COUNT); */
226 /* Update the IPA interrupt mask to disable it */
227 interrupt->enabled &= ~BIT(ipa_irq);
228 offset = ipa_reg_irq_en_offset(ipa->version);
229 iowrite32(interrupt->enabled, ipa->reg_virt + offset);
231 interrupt->handler[ipa_irq] = NULL;
234 /* Set up the IPA interrupt framework */
235 struct ipa_interrupt *ipa_interrupt_setup(struct ipa *ipa)
237 struct device *dev = &ipa->pdev->dev;
238 struct ipa_interrupt *interrupt;
243 ret = platform_get_irq_byname(ipa->pdev, "ipa");
245 dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
247 return ERR_PTR(ret ? : -EINVAL);
251 interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
253 return ERR_PTR(-ENOMEM);
254 interrupt->ipa = ipa;
255 interrupt->irq = irq;
257 /* Start with all IPA interrupts disabled */
258 offset = ipa_reg_irq_en_offset(ipa->version);
259 iowrite32(0, ipa->reg_virt + offset);
261 ret = request_threaded_irq(irq, ipa_isr, ipa_isr_thread, IRQF_ONESHOT,
264 dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
268 ret = enable_irq_wake(irq);
270 dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
277 free_irq(interrupt->irq, interrupt);
284 /* Tear down the IPA interrupt framework */
285 void ipa_interrupt_teardown(struct ipa_interrupt *interrupt)
287 struct device *dev = &interrupt->ipa->pdev->dev;
290 ret = disable_irq_wake(interrupt->irq);
292 dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
293 free_irq(interrupt->irq, interrupt);