1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2019-2021 Linaro Ltd. */
5 #include <linux/log2.h>
9 #include "ipa_endpoint.h"
12 /** enum ipa_resource_type - IPA resource types for an SoC having IPA v4.2 */
13 enum ipa_resource_type {
14 /* Source resource types; first must have value 0 */
15 IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0,
16 IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
17 IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
18 IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
19 IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
21 /* Destination resource types; first must have value 0 */
22 IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0,
23 IPA_RESOURCE_TYPE_DST_DPS_DMARS,
26 /* Resource groups used for an SoC having IPA v4.2 */
27 enum ipa_rsrc_group_id {
28 /* Source resource group identifiers */
29 IPA_RSRC_GROUP_SRC_UL_DL = 0,
30 IPA_RSRC_GROUP_SRC_COUNT, /* Last in set; not a source group */
32 /* Destination resource group identifiers */
33 IPA_RSRC_GROUP_DST_UL_DL_DPL = 0,
34 IPA_RSRC_GROUP_DST_COUNT, /* Last; not a destination group */
37 /* QSB configuration data for an SoC having IPA v4.2 */
38 static const struct ipa_qsb_data ipa_qsb_data[] = {
39 [IPA_QSB_MASTER_DDR] = {
42 /* no outstanding read byte (beat) limit */
46 /* Endpoint configuration data for an SoC having IPA v4.2 */
47 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
48 [IPA_ENDPOINT_AP_COMMAND_TX] = {
60 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
62 .dma_endpoint = IPA_ENDPOINT_AP_LAN_RX,
64 .seq_type = IPA_SEQ_DMA,
69 [IPA_ENDPOINT_AP_LAN_RX] = {
81 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
83 .status_enable = true,
85 .pad_align = ilog2(sizeof(u32)),
90 [IPA_ENDPOINT_AP_MODEM_TX] = {
101 .filter_support = true,
103 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
106 .status_enable = true,
108 .seq_type = IPA_SEQ_1_PASS_SKIP_LAST_UC,
109 .seq_rep_type = IPA_SEQ_REP_DMA_PARSER,
111 IPA_ENDPOINT_MODEM_AP_RX,
116 [IPA_ENDPOINT_AP_MODEM_RX] = {
128 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
133 .aggr_close_eof = true,
138 [IPA_ENDPOINT_MODEM_COMMAND_TX] = {
139 .ee_id = GSI_EE_MODEM,
144 [IPA_ENDPOINT_MODEM_LAN_RX] = {
145 .ee_id = GSI_EE_MODEM,
150 [IPA_ENDPOINT_MODEM_AP_TX] = {
151 .ee_id = GSI_EE_MODEM,
156 .filter_support = true,
159 [IPA_ENDPOINT_MODEM_AP_RX] = {
160 .ee_id = GSI_EE_MODEM,
167 /* Source resource configuration data for an SoC having IPA v4.2 */
168 static const struct ipa_resource ipa_resource_src[] = {
169 [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
170 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
174 [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
175 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
179 [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
180 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
181 .min = 10, .max = 10,
184 [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
185 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
189 [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
190 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
196 /* Destination resource configuration data for an SoC having IPA v4.2 */
197 static const struct ipa_resource ipa_resource_dst[] = {
198 [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
199 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
203 [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
204 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
210 /* Resource configuration data for an SoC having IPA v4.2 */
211 static const struct ipa_resource_data ipa_resource_data = {
212 .rsrc_group_src_count = IPA_RSRC_GROUP_SRC_COUNT,
213 .rsrc_group_dst_count = IPA_RSRC_GROUP_DST_COUNT,
214 .resource_src_count = ARRAY_SIZE(ipa_resource_src),
215 .resource_src = ipa_resource_src,
216 .resource_dst_count = ARRAY_SIZE(ipa_resource_dst),
217 .resource_dst = ipa_resource_dst,
220 /* IPA-resident memory region data for an SoC having IPA v4.2 */
221 static const struct ipa_mem ipa_mem_local_data[] = {
223 .id = IPA_MEM_UC_SHARED,
229 .id = IPA_MEM_UC_INFO,
235 .id = IPA_MEM_V4_FILTER_HASHED,
241 .id = IPA_MEM_V4_FILTER,
247 .id = IPA_MEM_V6_FILTER_HASHED,
253 .id = IPA_MEM_V6_FILTER,
259 .id = IPA_MEM_V4_ROUTE_HASHED,
265 .id = IPA_MEM_V4_ROUTE,
271 .id = IPA_MEM_V6_ROUTE_HASHED,
277 .id = IPA_MEM_V6_ROUTE,
283 .id = IPA_MEM_MODEM_HEADER,
289 .id = IPA_MEM_MODEM_PROC_CTX,
295 .id = IPA_MEM_AP_PROC_CTX,
301 .id = IPA_MEM_PDN_CONFIG,
307 .id = IPA_MEM_STATS_QUOTA_MODEM,
313 .id = IPA_MEM_STATS_TETHERING,
325 .id = IPA_MEM_END_MARKER,
332 /* Memory configuration data for an SoC having IPA v4.2 */
333 static const struct ipa_mem_data ipa_mem_data = {
334 .local_count = ARRAY_SIZE(ipa_mem_local_data),
335 .local = ipa_mem_local_data,
336 .imem_addr = 0x146a8000,
337 .imem_size = 0x00002000,
339 .smem_size = 0x00002000,
342 /* Interconnect rates are in 1000 byte/second units */
343 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
346 .peak_bandwidth = 465000, /* 465 MBps */
347 .average_bandwidth = 80000, /* 80 MBps */
349 /* Average bandwidth is unused for the next two interconnects */
352 .peak_bandwidth = 68570, /* 68.570 MBps */
353 .average_bandwidth = 0, /* unused */
357 .peak_bandwidth = 30000, /* 30 MBps */
358 .average_bandwidth = 0, /* unused */
362 /* Clock and interconnect configuration data for an SoC having IPA v4.2 */
363 static const struct ipa_clock_data ipa_clock_data = {
364 .core_clock_rate = 100 * 1000 * 1000, /* Hz */
365 .interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
366 .interconnect_data = ipa_interconnect_data,
369 /* Configuration data for an SoC having IPA v4.2 */
370 const struct ipa_data ipa_data_v4_2 = {
371 .version = IPA_VERSION_4_2,
372 /* backward_compat value is 0 */
373 .qsb_count = ARRAY_SIZE(ipa_qsb_data),
374 .qsb_data = ipa_qsb_data,
375 .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
376 .endpoint_data = ipa_gsi_endpoint_data,
377 .resource_data = &ipa_resource_data,
378 .mem_data = &ipa_mem_data,
379 .clock_data = &ipa_clock_data,