drivers/net/ipa/ipa_data-sdm845.c

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
   4  * Copyright (C) 2019-2020 Linaro Ltd.
   5  */
   6
   7 #include <linux/log2.h>
   8
   9 #include "gsi.h"
  10 #include "ipa_data.h"
  11 #include "ipa_endpoint.h"
  12 #include "ipa_mem.h"
  13
  14 /* Endpoint configuration for the SDM845 SoC. */
  15 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
  16         [IPA_ENDPOINT_AP_COMMAND_TX] = {
  17                 .ee_id          = GSI_EE_AP,
  18                 .channel_id     = 4,
  19                 .endpoint_id    = 5,
  20                 .toward_ipa     = true,
  21                 .channel = {
  22                         .tre_count      = 512,
  23                         .event_count    = 256,
  24                         .tlv_count      = 20,
  25                 },
  26                 .endpoint = {
  27                         .seq_type       = IPA_SEQ_DMA_ONLY,
  28                         .config = {
  29                                 .resource_group = 1,
  30                                 .dma_mode       = true,
  31                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
  32                         },
  33                 },
  34         },
  35         [IPA_ENDPOINT_AP_LAN_RX] = {
  36                 .ee_id          = GSI_EE_AP,
  37                 .channel_id     = 5,
  38                 .endpoint_id    = 9,
  39                 .toward_ipa     = false,
  40                 .channel = {
  41                         .tre_count      = 256,
  42                         .event_count    = 256,
  43                         .tlv_count      = 8,
  44                 },
  45                 .endpoint = {
  46                         .seq_type       = IPA_SEQ_INVALID,
  47                         .config = {
  48                                 .resource_group = 1,
  49                                 .aggregation    = true,
  50                                 .status_enable  = true,
  51                                 .rx = {
  52                                         .pad_align      = ilog2(sizeof(u32)),
  53                                 },
  54                         },
  55                 },
  56         },
  57         [IPA_ENDPOINT_AP_MODEM_TX] = {
  58                 .ee_id          = GSI_EE_AP,
  59                 .channel_id     = 3,
  60                 .endpoint_id    = 2,
  61                 .toward_ipa     = true,
  62                 .channel = {
  63                         .tre_count      = 512,
  64                         .event_count    = 512,
  65                         .tlv_count      = 16,
  66                 },
  67                 .endpoint = {
  68                         .filter_support = true,
  69                         .seq_type       =
  70                                 IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
  71                         .config = {
  72                                 .resource_group = 1,
  73                                 .checksum       = true,
  74                                 .qmap           = true,
  75                                 .status_enable  = true,
  76                                 .tx = {
  77                                         .status_endpoint =
  78                                                 IPA_ENDPOINT_MODEM_AP_RX,
  79                                 },
  80                         },
  81                 },
  82         },
  83         [IPA_ENDPOINT_AP_MODEM_RX] = {
  84                 .ee_id          = GSI_EE_AP,
  85                 .channel_id     = 6,
  86                 .endpoint_id    = 10,
  87                 .toward_ipa     = false,
  88                 .channel = {
  89                         .tre_count      = 256,
  90                         .event_count    = 256,
  91                         .tlv_count      = 8,
  92                 },
  93                 .endpoint = {
  94                         .seq_type       = IPA_SEQ_INVALID,
  95                         .config = {
  96                                 .resource_group = 1,
  97                                 .checksum       = true,
  98                                 .qmap           = true,
  99                                 .aggregation    = true,
 100                                 .rx = {
 101                                         .aggr_close_eof = true,
 102                                 },
 103                         },
 104                 },
 105         },
 106         [IPA_ENDPOINT_MODEM_COMMAND_TX] = {
 107                 .ee_id          = GSI_EE_MODEM,
 108                 .channel_id     = 1,
 109                 .endpoint_id    = 4,
 110                 .toward_ipa     = true,
 111         },
 112         [IPA_ENDPOINT_MODEM_LAN_TX] = {
 113                 .ee_id          = GSI_EE_MODEM,
 114                 .channel_id     = 0,
 115                 .endpoint_id    = 3,
 116                 .toward_ipa     = true,
 117                 .endpoint = {
 118                         .filter_support = true,
 119                 },
 120         },
 121         [IPA_ENDPOINT_MODEM_LAN_RX] = {
 122                 .ee_id          = GSI_EE_MODEM,
 123                 .channel_id     = 3,
 124                 .endpoint_id    = 13,
 125                 .toward_ipa     = false,
 126         },
 127         [IPA_ENDPOINT_MODEM_AP_TX] = {
 128                 .ee_id          = GSI_EE_MODEM,
 129                 .channel_id     = 4,
 130                 .endpoint_id    = 6,
 131                 .toward_ipa     = true,
 132                 .endpoint = {
 133                         .filter_support = true,
 134                 },
 135         },
 136         [IPA_ENDPOINT_MODEM_AP_RX] = {
 137                 .ee_id          = GSI_EE_MODEM,
 138                 .channel_id     = 2,
 139                 .endpoint_id    = 12,
 140                 .toward_ipa     = false,
 141         },
 142 };
 143
 144 /* For the SDM845, resource groups are allocated this way:
 145  *   group 0:   LWA_DL
 146  *   group 1:   UL_DL
 147  */
 148 static const struct ipa_resource_src ipa_resource_src[] = {
 149         {
 150                 .type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
 151                 .limits[0] = {
 152                         .min = 1,
 153                         .max = 255,
 154                 },
 155                 .limits[1] = {
 156                         .min = 1,
 157                         .max = 255,
 158                 },
 159         },
 160         {
 161                 .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
 162                 .limits[0] = {
 163                         .min = 10,
 164                         .max = 10,
 165                 },
 166                 .limits[1] = {
 167                         .min = 10,
 168                         .max = 10,
 169                 },
 170         },
 171         {
 172                 .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
 173                 .limits[0] = {
 174                         .min = 12,
 175                         .max = 12,
 176                 },
 177                 .limits[1] = {
 178                         .min = 14,
 179                         .max = 14,
 180                 },
 181         },
 182         {
 183                 .type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
 184                 .limits[0] = {
 185                         .min = 0,
 186                         .max = 63,
 187                 },
 188                 .limits[1] = {
 189                         .min = 0,
 190                         .max = 63,
 191                 },
 192         },
 193         {
 194                 .type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
 195                 .limits[0] = {
 196                         .min = 14,
 197                         .max = 14,
 198                 },
 199                 .limits[1] = {
 200                         .min = 20,
 201                         .max = 20,
 202                 },
 203         },
 204 };
 205
 206 static const struct ipa_resource_dst ipa_resource_dst[] = {
 207         {
 208                 .type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
 209                 .limits[0] = {
 210                         .min = 4,
 211                         .max = 4,
 212                 },
 213                 .limits[1] = {
 214                         .min = 4,
 215                         .max = 4,
 216                 },
 217         },
 218         {
 219                 .type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
 220                 .limits[0] = {
 221                         .min = 2,
 222                         .max = 63,
 223                 },
 224                 .limits[1] = {
 225                         .min = 1,
 226                         .max = 63,
 227                 },
 228         },
 229 };
 230
 231 /* Resource configuration for the SDM845 SoC. */
 232 static const struct ipa_resource_data ipa_resource_data = {
 233         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
 234         .resource_src           = ipa_resource_src,
 235         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
 236         .resource_dst           = ipa_resource_dst,
 237 };
 238
 239 /* IPA-resident memory region configuration for the SDM845 SoC. */
 240 static const struct ipa_mem ipa_mem_local_data[] = {
 241         [IPA_MEM_UC_SHARED] = {
 242                 .offset         = 0x0000,
 243                 .size           = 0x0080,
 244                 .canary_count   = 0,
 245         },
 246         [IPA_MEM_UC_INFO] = {
 247                 .offset         = 0x0080,
 248                 .size           = 0x0200,
 249                 .canary_count   = 0,
 250         },
 251         [IPA_MEM_V4_FILTER_HASHED] = {
 252                 .offset         = 0x0288,
 253                 .size           = 0x0078,
 254                 .canary_count   = 2,
 255         },
 256         [IPA_MEM_V4_FILTER] = {
 257                 .offset         = 0x0308,
 258                 .size           = 0x0078,
 259                 .canary_count   = 2,
 260         },
 261         [IPA_MEM_V6_FILTER_HASHED] = {
 262                 .offset         = 0x0388,
 263                 .size           = 0x0078,
 264                 .canary_count   = 2,
 265         },
 266         [IPA_MEM_V6_FILTER] = {
 267                 .offset         = 0x0408,
 268                 .size           = 0x0078,
 269                 .canary_count   = 2,
 270         },
 271         [IPA_MEM_V4_ROUTE_HASHED] = {
 272                 .offset         = 0x0488,
 273                 .size           = 0x0078,
 274                 .canary_count   = 2,
 275         },
 276         [IPA_MEM_V4_ROUTE] = {
 277                 .offset         = 0x0508,
 278                 .size           = 0x0078,
 279                 .canary_count   = 2,
 280         },
 281         [IPA_MEM_V6_ROUTE_HASHED] = {
 282                 .offset         = 0x0588,
 283                 .size           = 0x0078,
 284                 .canary_count   = 2,
 285         },
 286         [IPA_MEM_V6_ROUTE] = {
 287                 .offset         = 0x0608,
 288                 .size           = 0x0078,
 289                 .canary_count   = 2,
 290         },
 291         [IPA_MEM_MODEM_HEADER] = {
 292                 .offset         = 0x0688,
 293                 .size           = 0x0140,
 294                 .canary_count   = 2,
 295         },
 296         [IPA_MEM_AP_HEADER] = {
 297                 .offset         = 0x07c8,
 298                 .size           = 0x0000,
 299                 .canary_count   = 0,
 300         },
 301         [IPA_MEM_MODEM_PROC_CTX] = {
 302                 .offset         = 0x07d0,
 303                 .size           = 0x0200,
 304                 .canary_count   = 2,
 305         },
 306         [IPA_MEM_AP_PROC_CTX] = {
 307                 .offset         = 0x09d0,
 308                 .size           = 0x0200,
 309                 .canary_count   = 0,
 310         },
 311         [IPA_MEM_MODEM] = {
 312                 .offset         = 0x0bd8,
 313                 .size           = 0x1024,
 314                 .canary_count   = 0,
 315         },
 316         [IPA_MEM_UC_EVENT_RING] = {
 317                 .offset         = 0x1c00,
 318                 .size           = 0x0400,
 319                 .canary_count   = 1,
 320         },
 321 };
 322
 323 static struct ipa_mem_data ipa_mem_data = {
 324         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
 325         .local          = ipa_mem_local_data,
 326         .imem_addr      = 0x146bd000,
 327         .imem_size      = 0x00002000,
 328         .smem_id        = 497,
 329         .smem_size      = 0x00002000,
 330 };
 331
 332 static struct ipa_clock_data ipa_clock_data = {
 333         .core_clock_rate        = 75 * 1000 * 1000,     /* Hz */
 334         /* Interconnect rates are in 1000 byte/second units */
 335         .interconnect = {
 336                 [IPA_INTERCONNECT_MEMORY] = {
 337                         .peak_rate      = 600000,       /* 600 MBps */
 338                         .average_rate   = 80000,        /* 80 MBps */
 339                 },
 340                 /* Average rate is unused for the next two interconnects */
 341                 [IPA_INTERCONNECT_IMEM] = {
 342                         .peak_rate      = 350000,       /* 350 MBps */
 343                         .average_rate   = 0,            /* unused */
 344                 },
 345                 [IPA_INTERCONNECT_CONFIG] = {
 346                         .peak_rate      = 40000,        /* 40 MBps */
 347                         .average_rate   = 0,            /* unused */
 348                 },
 349         },
 350 };
 351
 352 /* Configuration data for the SDM845 SoC. */
 353 const struct ipa_data ipa_data_sdm845 = {
 354         .version        = IPA_VERSION_3_5_1,
 355         .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
 356         .endpoint_data  = ipa_gsi_endpoint_data,
 357         .resource_data  = &ipa_resource_data,
 358         .mem_data       = &ipa_mem_data,
 359         .clock_data     = &ipa_clock_data,
 360 };