drivers/net/ipa/ipa_data-sdm845.c

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
   4  * Copyright (C) 2019-2021 Linaro Ltd.
   5  */
   6
   7 #include <linux/log2.h>
   8
   9 #include "gsi.h"
  10 #include "ipa_data.h"
  11 #include "ipa_endpoint.h"
  12 #include "ipa_mem.h"
  13
  14 /* Resource groups used for the SDM845 SoC */
  15 enum ipa_rsrc_group_id {
  16         /* Source resource group identifiers */
  17         IPA_RSRC_GROUP_SRC_LWA_DL       = 0,
  18         IPA_RSRC_GROUP_SRC_UL_DL,
  19         IPA_RSRC_GROUP_SRC_MHI_DMA,
  20         IPA_RSRC_GROUP_SRC_UC_RX_Q,
  21
  22         /* Destination resource group identifiers */
  23         IPA_RSRC_GROUP_DST_LWA_DL       = 0,
  24         IPA_RSRC_GROUP_DST_UL_DL_DPL,
  25         IPA_RSRC_GROUP_DST_UNUSED_2,
  26 };
  27
  28 /* QSB configuration for the SDM845 SoC. */
  29 static const struct ipa_qsb_data ipa_qsb_data[] = {
  30         [IPA_QSB_MASTER_DDR] = {
  31                 .max_writes     = 8,
  32                 .max_reads      = 8,
  33         },
  34         [IPA_QSB_MASTER_PCIE] = {
  35                 .max_writes     = 4,
  36                 .max_reads      = 12,
  37         },
  38 };
  39
  40 /* Endpoint configuration for the SDM845 SoC. */
  41 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
  42         [IPA_ENDPOINT_AP_COMMAND_TX] = {
  43                 .ee_id          = GSI_EE_AP,
  44                 .channel_id     = 4,
  45                 .endpoint_id    = 5,
  46                 .toward_ipa     = true,
  47                 .channel = {
  48                         .tre_count      = 512,
  49                         .event_count    = 256,
  50                         .tlv_count      = 20,
  51                 },
  52                 .endpoint = {
  53                         .config = {
  54                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
  55                                 .dma_mode       = true,
  56                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
  57                                 .tx = {
  58                                         .seq_type = IPA_SEQ_DMA,
  59                                 },
  60                         },
  61                 },
  62         },
  63         [IPA_ENDPOINT_AP_LAN_RX] = {
  64                 .ee_id          = GSI_EE_AP,
  65                 .channel_id     = 5,
  66                 .endpoint_id    = 9,
  67                 .toward_ipa     = false,
  68                 .channel = {
  69                         .tre_count      = 256,
  70                         .event_count    = 256,
  71                         .tlv_count      = 8,
  72                 },
  73                 .endpoint = {
  74                         .config = {
  75                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
  76                                 .aggregation    = true,
  77                                 .status_enable  = true,
  78                                 .rx = {
  79                                         .pad_align      = ilog2(sizeof(u32)),
  80                                 },
  81                         },
  82                 },
  83         },
  84         [IPA_ENDPOINT_AP_MODEM_TX] = {
  85                 .ee_id          = GSI_EE_AP,
  86                 .channel_id     = 3,
  87                 .endpoint_id    = 2,
  88                 .toward_ipa     = true,
  89                 .channel = {
  90                         .tre_count      = 512,
  91                         .event_count    = 512,
  92                         .tlv_count      = 16,
  93                 },
  94                 .endpoint = {
  95                         .filter_support = true,
  96                         .config = {
  97                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
  98                                 .checksum       = true,
  99                                 .qmap           = true,
 100                                 .status_enable  = true,
 101                                 .tx = {
 102                                         .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC,
 103                                         .status_endpoint =
 104                                                 IPA_ENDPOINT_MODEM_AP_RX,
 105                                 },
 106                         },
 107                 },
 108         },
 109         [IPA_ENDPOINT_AP_MODEM_RX] = {
 110                 .ee_id          = GSI_EE_AP,
 111                 .channel_id     = 6,
 112                 .endpoint_id    = 10,
 113                 .toward_ipa     = false,
 114                 .channel = {
 115                         .tre_count      = 256,
 116                         .event_count    = 256,
 117                         .tlv_count      = 8,
 118                 },
 119                 .endpoint = {
 120                         .config = {
 121                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
 122                                 .checksum       = true,
 123                                 .qmap           = true,
 124                                 .aggregation    = true,
 125                                 .rx = {
 126                                         .aggr_close_eof = true,
 127                                 },
 128                         },
 129                 },
 130         },
 131         [IPA_ENDPOINT_MODEM_COMMAND_TX] = {
 132                 .ee_id          = GSI_EE_MODEM,
 133                 .channel_id     = 1,
 134                 .endpoint_id    = 4,
 135                 .toward_ipa     = true,
 136         },
 137         [IPA_ENDPOINT_MODEM_LAN_TX] = {
 138                 .ee_id          = GSI_EE_MODEM,
 139                 .channel_id     = 0,
 140                 .endpoint_id    = 3,
 141                 .toward_ipa     = true,
 142                 .endpoint = {
 143                         .filter_support = true,
 144                 },
 145         },
 146         [IPA_ENDPOINT_MODEM_LAN_RX] = {
 147                 .ee_id          = GSI_EE_MODEM,
 148                 .channel_id     = 3,
 149                 .endpoint_id    = 13,
 150                 .toward_ipa     = false,
 151         },
 152         [IPA_ENDPOINT_MODEM_AP_TX] = {
 153                 .ee_id          = GSI_EE_MODEM,
 154                 .channel_id     = 4,
 155                 .endpoint_id    = 6,
 156                 .toward_ipa     = true,
 157                 .endpoint = {
 158                         .filter_support = true,
 159                 },
 160         },
 161         [IPA_ENDPOINT_MODEM_AP_RX] = {
 162                 .ee_id          = GSI_EE_MODEM,
 163                 .channel_id     = 2,
 164                 .endpoint_id    = 12,
 165                 .toward_ipa     = false,
 166         },
 167 };
 168
 169 /* Source resource configuration data for the SDM845 SoC */
 170 static const struct ipa_resource_src ipa_resource_src[] = {
 171         {
 172                 .type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
 173                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 174                         .min = 1,
 175                         .max = 255,
 176                 },
 177                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 178                         .min = 1,
 179                         .max = 255,
 180                 },
 181         },
 182         {
 183                 .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
 184                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 185                         .min = 10,
 186                         .max = 10,
 187                 },
 188                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 189                         .min = 10,
 190                         .max = 10,
 191                 },
 192         },
 193         {
 194                 .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
 195                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 196                         .min = 12,
 197                         .max = 12,
 198                 },
 199                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 200                         .min = 14,
 201                         .max = 14,
 202                 },
 203         },
 204         {
 205                 .type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
 206                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 207                         .min = 0,
 208                         .max = 63,
 209                 },
 210                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 211                         .min = 0,
 212                         .max = 63,
 213                 },
 214         },
 215         {
 216                 .type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
 217                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 218                         .min = 14,
 219                         .max = 14,
 220                 },
 221                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 222                         .min = 20,
 223                         .max = 20,
 224                 },
 225         },
 226 };
 227
 228 /* Destination resource configuration data for the SDM845 SoC */
 229 static const struct ipa_resource_dst ipa_resource_dst[] = {
 230         {
 231                 .type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
 232                 .limits[IPA_RSRC_GROUP_DST_LWA_DL] = {
 233                         .min = 4,
 234                         .max = 4,
 235                 },
 236                 .limits[1] = {
 237                         .min = 4,
 238                         .max = 4,
 239                 },
 240         },
 241         {
 242                 .type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
 243                 .limits[IPA_RSRC_GROUP_DST_LWA_DL] = {
 244                         .min = 2,
 245                         .max = 63,
 246                 },
 247                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
 248                         .min = 1,
 249                         .max = 63,
 250                 },
 251         },
 252 };
 253
 254 /* Resource configuration for the SDM845 SoC. */
 255 static const struct ipa_resource_data ipa_resource_data = {
 256         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
 257         .resource_src           = ipa_resource_src,
 258         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
 259         .resource_dst           = ipa_resource_dst,
 260 };
 261
 262 /* IPA-resident memory region configuration for the SDM845 SoC. */
 263 static const struct ipa_mem ipa_mem_local_data[] = {
 264         [IPA_MEM_UC_SHARED] = {
 265                 .offset         = 0x0000,
 266                 .size           = 0x0080,
 267                 .canary_count   = 0,
 268         },
 269         [IPA_MEM_UC_INFO] = {
 270                 .offset         = 0x0080,
 271                 .size           = 0x0200,
 272                 .canary_count   = 0,
 273         },
 274         [IPA_MEM_V4_FILTER_HASHED] = {
 275                 .offset         = 0x0288,
 276                 .size           = 0x0078,
 277                 .canary_count   = 2,
 278         },
 279         [IPA_MEM_V4_FILTER] = {
 280                 .offset         = 0x0308,
 281                 .size           = 0x0078,
 282                 .canary_count   = 2,
 283         },
 284         [IPA_MEM_V6_FILTER_HASHED] = {
 285                 .offset         = 0x0388,
 286                 .size           = 0x0078,
 287                 .canary_count   = 2,
 288         },
 289         [IPA_MEM_V6_FILTER] = {
 290                 .offset         = 0x0408,
 291                 .size           = 0x0078,
 292                 .canary_count   = 2,
 293         },
 294         [IPA_MEM_V4_ROUTE_HASHED] = {
 295                 .offset         = 0x0488,
 296                 .size           = 0x0078,
 297                 .canary_count   = 2,
 298         },
 299         [IPA_MEM_V4_ROUTE] = {
 300                 .offset         = 0x0508,
 301                 .size           = 0x0078,
 302                 .canary_count   = 2,
 303         },
 304         [IPA_MEM_V6_ROUTE_HASHED] = {
 305                 .offset         = 0x0588,
 306                 .size           = 0x0078,
 307                 .canary_count   = 2,
 308         },
 309         [IPA_MEM_V6_ROUTE] = {
 310                 .offset         = 0x0608,
 311                 .size           = 0x0078,
 312                 .canary_count   = 2,
 313         },
 314         [IPA_MEM_MODEM_HEADER] = {
 315                 .offset         = 0x0688,
 316                 .size           = 0x0140,
 317                 .canary_count   = 2,
 318         },
 319         [IPA_MEM_MODEM_PROC_CTX] = {
 320                 .offset         = 0x07d0,
 321                 .size           = 0x0200,
 322                 .canary_count   = 2,
 323         },
 324         [IPA_MEM_AP_PROC_CTX] = {
 325                 .offset         = 0x09d0,
 326                 .size           = 0x0200,
 327                 .canary_count   = 0,
 328         },
 329         [IPA_MEM_MODEM] = {
 330                 .offset         = 0x0bd8,
 331                 .size           = 0x1024,
 332                 .canary_count   = 0,
 333         },
 334         [IPA_MEM_UC_EVENT_RING] = {
 335                 .offset         = 0x1c00,
 336                 .size           = 0x0400,
 337                 .canary_count   = 1,
 338         },
 339 };
 340
 341 static const struct ipa_mem_data ipa_mem_data = {
 342         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
 343         .local          = ipa_mem_local_data,
 344         .imem_addr      = 0x146bd000,
 345         .imem_size      = 0x00002000,
 346         .smem_id        = 497,
 347         .smem_size      = 0x00002000,
 348 };
 349
 350 /* Interconnect bandwidths are in 1000 byte/second units */
 351 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
 352         {
 353                 .name                   = "memory",
 354                 .peak_bandwidth         = 600000,       /* 600 MBps */
 355                 .average_bandwidth      = 80000,        /* 80 MBps */
 356         },
 357         /* Average bandwidth is unused for the next two interconnects */
 358         {
 359                 .name                   = "imem",
 360                 .peak_bandwidth         = 350000,       /* 350 MBps */
 361                 .average_bandwidth      = 0,            /* unused */
 362         },
 363         {
 364                 .name                   = "config",
 365                 .peak_bandwidth         = 40000,        /* 40 MBps */
 366                 .average_bandwidth      = 0,            /* unused */
 367         },
 368 };
 369
 370 static const struct ipa_clock_data ipa_clock_data = {
 371         .core_clock_rate        = 75 * 1000 * 1000,     /* Hz */
 372         .interconnect_count     = ARRAY_SIZE(ipa_interconnect_data),
 373         .interconnect_data      = ipa_interconnect_data,
 374 };
 375
 376 /* Configuration data for the SDM845 SoC. */
 377 const struct ipa_data ipa_data_sdm845 = {
 378         .version        = IPA_VERSION_3_5_1,
 379         .qsb_count      = ARRAY_SIZE(ipa_qsb_data),
 380         .qsb_data       = ipa_qsb_data,
 381         .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
 382         .endpoint_data  = ipa_gsi_endpoint_data,
 383         .resource_data  = &ipa_resource_data,
 384         .mem_data       = &ipa_mem_data,
 385         .clock_data     = &ipa_clock_data,
 386 };