631b50fc8d53423d7dd38857e83f96a1c52e6fe9
[linux-2.6-microblaze.git] / drivers / net / ipa / ipa_data-sc7180.c
1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (C) 2019-2021 Linaro Ltd. */
4
5 #include <linux/log2.h>
6
7 #include "gsi.h"
8 #include "ipa_data.h"
9 #include "ipa_endpoint.h"
10 #include "ipa_mem.h"
11
12 /** enum ipa_resource_type - IPA resource types */
13 enum ipa_resource_type {
14         /* Source resource types; first must have value 0 */
15         IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS              = 0,
16         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
17         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
18         IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
19         IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
20
21         /* Destination resource types; first must have value 0 */
22         IPA_RESOURCE_TYPE_DST_DATA_SECTORS              = 0,
23         IPA_RESOURCE_TYPE_DST_DPS_DMARS,
24 };
25
26 /* Resource groups used for the SC7180 SoC */
27 enum ipa_rsrc_group_id {
28         /* Source resource group identifiers */
29         IPA_RSRC_GROUP_SRC_UL_DL        = 0,
30
31         /* Destination resource group identifiers */
32         IPA_RSRC_GROUP_DST_UL_DL_DPL    = 0,
33 };
34
35 /* QSB configuration for the SC7180 SoC. */
36 static const struct ipa_qsb_data ipa_qsb_data[] = {
37         [IPA_QSB_MASTER_DDR] = {
38                 .max_writes     = 8,
39                 .max_reads      = 12,
40                 /* no outstanding read byte (beat) limit */
41         },
42 };
43
44 /* Endpoint configuration for the SC7180 SoC. */
45 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
46         [IPA_ENDPOINT_AP_COMMAND_TX] = {
47                 .ee_id          = GSI_EE_AP,
48                 .channel_id     = 1,
49                 .endpoint_id    = 6,
50                 .toward_ipa     = true,
51                 .channel = {
52                         .tre_count      = 256,
53                         .event_count    = 256,
54                         .tlv_count      = 20,
55                 },
56                 .endpoint = {
57                         .config = {
58                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
59                                 .dma_mode       = true,
60                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
61                                 .tx = {
62                                         .seq_type = IPA_SEQ_DMA,
63                                 },
64                         },
65                 },
66         },
67         [IPA_ENDPOINT_AP_LAN_RX] = {
68                 .ee_id          = GSI_EE_AP,
69                 .channel_id     = 2,
70                 .endpoint_id    = 8,
71                 .toward_ipa     = false,
72                 .channel = {
73                         .tre_count      = 256,
74                         .event_count    = 256,
75                         .tlv_count      = 6,
76                 },
77                 .endpoint = {
78                         .config = {
79                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
80                                 .aggregation    = true,
81                                 .status_enable  = true,
82                                 .rx = {
83                                         .pad_align      = ilog2(sizeof(u32)),
84                                 },
85                         },
86                 },
87         },
88         [IPA_ENDPOINT_AP_MODEM_TX] = {
89                 .ee_id          = GSI_EE_AP,
90                 .channel_id     = 0,
91                 .endpoint_id    = 1,
92                 .toward_ipa     = true,
93                 .channel = {
94                         .tre_count      = 512,
95                         .event_count    = 512,
96                         .tlv_count      = 8,
97                 },
98                 .endpoint = {
99                         .filter_support = true,
100                         .config = {
101                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
102                                 .checksum       = true,
103                                 .qmap           = true,
104                                 .status_enable  = true,
105                                 .tx = {
106                                         .seq_type = IPA_SEQ_1_PASS_SKIP_LAST_UC,
107                                         .seq_rep_type = IPA_SEQ_REP_DMA_PARSER,
108                                         .status_endpoint =
109                                                 IPA_ENDPOINT_MODEM_AP_RX,
110                                 },
111                         },
112                 },
113         },
114         [IPA_ENDPOINT_AP_MODEM_RX] = {
115                 .ee_id          = GSI_EE_AP,
116                 .channel_id     = 3,
117                 .endpoint_id    = 9,
118                 .toward_ipa     = false,
119                 .channel = {
120                         .tre_count      = 256,
121                         .event_count    = 256,
122                         .tlv_count      = 6,
123                 },
124                 .endpoint = {
125                         .config = {
126                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
127                                 .checksum       = true,
128                                 .qmap           = true,
129                                 .aggregation    = true,
130                                 .rx = {
131                                         .aggr_close_eof = true,
132                                 },
133                         },
134                 },
135         },
136         [IPA_ENDPOINT_MODEM_COMMAND_TX] = {
137                 .ee_id          = GSI_EE_MODEM,
138                 .channel_id     = 1,
139                 .endpoint_id    = 5,
140                 .toward_ipa     = true,
141         },
142         [IPA_ENDPOINT_MODEM_LAN_RX] = {
143                 .ee_id          = GSI_EE_MODEM,
144                 .channel_id     = 3,
145                 .endpoint_id    = 11,
146                 .toward_ipa     = false,
147         },
148         [IPA_ENDPOINT_MODEM_AP_TX] = {
149                 .ee_id          = GSI_EE_MODEM,
150                 .channel_id     = 0,
151                 .endpoint_id    = 4,
152                 .toward_ipa     = true,
153                 .endpoint = {
154                         .filter_support = true,
155                 },
156         },
157         [IPA_ENDPOINT_MODEM_AP_RX] = {
158                 .ee_id          = GSI_EE_MODEM,
159                 .channel_id     = 2,
160                 .endpoint_id    = 10,
161                 .toward_ipa     = false,
162         },
163 };
164
165 /* Source resource configuration data for the SC7180 SoC */
166 static const struct ipa_resource ipa_resource_src[] = {
167         [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
168                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
169                         .min = 3,       .max = 63,
170                 },
171         },
172         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
173                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
174                         .min = 3,       .max = 3,
175                 },
176         },
177         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
178                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
179                         .min = 10,      .max = 10,
180                 },
181         },
182         [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
183                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
184                         .min = 1,       .max = 1,
185                 },
186         },
187         [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
188                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
189                         .min = 5,       .max = 5,
190                 },
191         },
192 };
193
194 /* Destination resource configuration data for the SC7180 SoC */
195 static const struct ipa_resource ipa_resource_dst[] = {
196         [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
197                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
198                         .min = 3,       .max = 3,
199                 },
200         },
201         [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
202                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
203                         .min = 1,       .max = 63,
204                 },
205         },
206 };
207
208 /* Resource configuration for the SC7180 SoC. */
209 static const struct ipa_resource_data ipa_resource_data = {
210         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
211         .resource_src           = ipa_resource_src,
212         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
213         .resource_dst           = ipa_resource_dst,
214 };
215
216 /* IPA-resident memory region configuration for the SC7180 SoC. */
217 static const struct ipa_mem ipa_mem_local_data[] = {
218         [IPA_MEM_UC_SHARED] = {
219                 .offset         = 0x0000,
220                 .size           = 0x0080,
221                 .canary_count   = 0,
222         },
223         [IPA_MEM_UC_INFO] = {
224                 .offset         = 0x0080,
225                 .size           = 0x0200,
226                 .canary_count   = 0,
227         },
228         [IPA_MEM_V4_FILTER_HASHED] = {
229                 .offset         = 0x0288,
230                 .size           = 0,
231                 .canary_count   = 2,
232         },
233         [IPA_MEM_V4_FILTER] = {
234                 .offset         = 0x0290,
235                 .size           = 0x0078,
236                 .canary_count   = 2,
237         },
238         [IPA_MEM_V6_FILTER_HASHED] = {
239                 .offset         = 0x0310,
240                 .size           = 0,
241                 .canary_count   = 2,
242         },
243         [IPA_MEM_V6_FILTER] = {
244                 .offset         = 0x0318,
245                 .size           = 0x0078,
246                 .canary_count   = 2,
247         },
248         [IPA_MEM_V4_ROUTE_HASHED] = {
249                 .offset         = 0x0398,
250                 .size           = 0,
251                 .canary_count   = 2,
252         },
253         [IPA_MEM_V4_ROUTE] = {
254                 .offset         = 0x03a0,
255                 .size           = 0x0078,
256                 .canary_count   = 2,
257         },
258         [IPA_MEM_V6_ROUTE_HASHED] = {
259                 .offset         = 0x0420,
260                 .size           = 0,
261                 .canary_count   = 2,
262         },
263         [IPA_MEM_V6_ROUTE] = {
264                 .offset         = 0x0428,
265                 .size           = 0x0078,
266                 .canary_count   = 2,
267         },
268         [IPA_MEM_MODEM_HEADER] = {
269                 .offset         = 0x04a8,
270                 .size           = 0x0140,
271                 .canary_count   = 2,
272         },
273         [IPA_MEM_MODEM_PROC_CTX] = {
274                 .offset         = 0x05f0,
275                 .size           = 0x0200,
276                 .canary_count   = 2,
277         },
278         [IPA_MEM_AP_PROC_CTX] = {
279                 .offset         = 0x07f0,
280                 .size           = 0x0200,
281                 .canary_count   = 0,
282         },
283         [IPA_MEM_PDN_CONFIG] = {
284                 .offset         = 0x09f8,
285                 .size           = 0x0050,
286                 .canary_count   = 2,
287         },
288         [IPA_MEM_STATS_QUOTA_MODEM] = {
289                 .offset         = 0x0a50,
290                 .size           = 0x0060,
291                 .canary_count   = 2,
292         },
293         [IPA_MEM_STATS_TETHERING] = {
294                 .offset         = 0x0ab0,
295                 .size           = 0x0140,
296                 .canary_count   = 0,
297         },
298         [IPA_MEM_MODEM] = {
299                 .offset         = 0x0bf0,
300                 .size           = 0x140c,
301                 .canary_count   = 0,
302         },
303         [IPA_MEM_UC_EVENT_RING] = {
304                 .offset         = 0x2000,
305                 .size           = 0,
306                 .canary_count   = 1,
307         },
308 };
309
310 static const struct ipa_mem_data ipa_mem_data = {
311         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
312         .local          = ipa_mem_local_data,
313         .imem_addr      = 0x146a8000,
314         .imem_size      = 0x00002000,
315         .smem_id        = 497,
316         .smem_size      = 0x00002000,
317 };
318
319 /* Interconnect bandwidths are in 1000 byte/second units */
320 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
321         {
322                 .name                   = "memory",
323                 .peak_bandwidth         = 465000,       /* 465 MBps */
324                 .average_bandwidth      = 80000,        /* 80 MBps */
325         },
326         /* Average bandwidth is unused for the next two interconnects */
327         {
328                 .name                   = "imem",
329                 .peak_bandwidth         = 68570,        /* 68.570 MBps */
330                 .average_bandwidth      = 0,            /* unused */
331         },
332         {
333                 .name                   = "config",
334                 .peak_bandwidth         = 30000,        /* 30 MBps */
335                 .average_bandwidth      = 0,            /* unused */
336         },
337 };
338
339 static const struct ipa_clock_data ipa_clock_data = {
340         .core_clock_rate        = 100 * 1000 * 1000,    /* Hz */
341         .interconnect_count     = ARRAY_SIZE(ipa_interconnect_data),
342         .interconnect_data      = ipa_interconnect_data,
343 };
344
345 /* Configuration data for the SC7180 SoC. */
346 const struct ipa_data ipa_data_sc7180 = {
347         .version        = IPA_VERSION_4_2,
348         .qsb_count      = ARRAY_SIZE(ipa_qsb_data),
349         .qsb_data       = ipa_qsb_data,
350         .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
351         .endpoint_data  = ipa_gsi_endpoint_data,
352         .resource_data  = &ipa_resource_data,
353         .mem_data       = &ipa_mem_data,
354         .clock_data     = &ipa_clock_data,
355 };