1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2019-2021 Linaro Ltd. */
5 #include <linux/log2.h>
9 #include "ipa_endpoint.h"
12 /** enum ipa_resource_type - IPA resource types */
13 enum ipa_resource_type {
14 /* Source resource types; first must have value 0 */
15 IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0,
16 IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
17 IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
18 IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
19 IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
21 /* Destination resource types; first must have value 0 */
22 IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0,
23 IPA_RESOURCE_TYPE_DST_DPS_DMARS,
26 /* Resource groups used for the SC7180 SoC */
27 enum ipa_rsrc_group_id {
28 /* Source resource group identifiers */
29 IPA_RSRC_GROUP_SRC_UL_DL = 0,
31 /* Destination resource group identifiers */
32 IPA_RSRC_GROUP_DST_UL_DL_DPL = 0,
35 /* QSB configuration for the SC7180 SoC. */
36 static const struct ipa_qsb_data ipa_qsb_data[] = {
37 [IPA_QSB_MASTER_DDR] = {
40 /* no outstanding read byte (beat) limit */
44 /* Endpoint configuration for the SC7180 SoC. */
45 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
46 [IPA_ENDPOINT_AP_COMMAND_TX] = {
58 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
60 .dma_endpoint = IPA_ENDPOINT_AP_LAN_RX,
62 .seq_type = IPA_SEQ_DMA,
67 [IPA_ENDPOINT_AP_LAN_RX] = {
79 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
81 .status_enable = true,
83 .pad_align = ilog2(sizeof(u32)),
88 [IPA_ENDPOINT_AP_MODEM_TX] = {
99 .filter_support = true,
101 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
104 .status_enable = true,
106 .seq_type = IPA_SEQ_1_PASS_SKIP_LAST_UC,
107 .seq_rep_type = IPA_SEQ_REP_DMA_PARSER,
109 IPA_ENDPOINT_MODEM_AP_RX,
114 [IPA_ENDPOINT_AP_MODEM_RX] = {
126 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
131 .aggr_close_eof = true,
136 [IPA_ENDPOINT_MODEM_COMMAND_TX] = {
137 .ee_id = GSI_EE_MODEM,
142 [IPA_ENDPOINT_MODEM_LAN_RX] = {
143 .ee_id = GSI_EE_MODEM,
148 [IPA_ENDPOINT_MODEM_AP_TX] = {
149 .ee_id = GSI_EE_MODEM,
154 .filter_support = true,
157 [IPA_ENDPOINT_MODEM_AP_RX] = {
158 .ee_id = GSI_EE_MODEM,
165 /* Source resource configuration data for the SC7180 SoC */
166 static const struct ipa_resource ipa_resource_src[] = {
167 [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
168 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
172 [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
173 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
177 [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
178 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
179 .min = 10, .max = 10,
182 [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
183 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
187 [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
188 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
194 /* Destination resource configuration data for the SC7180 SoC */
195 static const struct ipa_resource ipa_resource_dst[] = {
196 [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
197 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
201 [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
202 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
208 /* Resource configuration for the SC7180 SoC. */
209 static const struct ipa_resource_data ipa_resource_data = {
210 .resource_src_count = ARRAY_SIZE(ipa_resource_src),
211 .resource_src = ipa_resource_src,
212 .resource_dst_count = ARRAY_SIZE(ipa_resource_dst),
213 .resource_dst = ipa_resource_dst,
216 /* IPA-resident memory region configuration for the SC7180 SoC. */
217 static const struct ipa_mem ipa_mem_local_data[] = {
218 [IPA_MEM_UC_SHARED] = {
223 [IPA_MEM_UC_INFO] = {
228 [IPA_MEM_V4_FILTER_HASHED] = {
233 [IPA_MEM_V4_FILTER] = {
238 [IPA_MEM_V6_FILTER_HASHED] = {
243 [IPA_MEM_V6_FILTER] = {
248 [IPA_MEM_V4_ROUTE_HASHED] = {
253 [IPA_MEM_V4_ROUTE] = {
258 [IPA_MEM_V6_ROUTE_HASHED] = {
263 [IPA_MEM_V6_ROUTE] = {
268 [IPA_MEM_MODEM_HEADER] = {
273 [IPA_MEM_MODEM_PROC_CTX] = {
278 [IPA_MEM_AP_PROC_CTX] = {
283 [IPA_MEM_PDN_CONFIG] = {
288 [IPA_MEM_STATS_QUOTA_MODEM] = {
293 [IPA_MEM_STATS_TETHERING] = {
303 [IPA_MEM_UC_EVENT_RING] = {
310 static const struct ipa_mem_data ipa_mem_data = {
311 .local_count = ARRAY_SIZE(ipa_mem_local_data),
312 .local = ipa_mem_local_data,
313 .imem_addr = 0x146a8000,
314 .imem_size = 0x00002000,
316 .smem_size = 0x00002000,
319 /* Interconnect bandwidths are in 1000 byte/second units */
320 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
323 .peak_bandwidth = 465000, /* 465 MBps */
324 .average_bandwidth = 80000, /* 80 MBps */
326 /* Average bandwidth is unused for the next two interconnects */
329 .peak_bandwidth = 68570, /* 68.570 MBps */
330 .average_bandwidth = 0, /* unused */
334 .peak_bandwidth = 30000, /* 30 MBps */
335 .average_bandwidth = 0, /* unused */
339 static const struct ipa_clock_data ipa_clock_data = {
340 .core_clock_rate = 100 * 1000 * 1000, /* Hz */
341 .interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
342 .interconnect_data = ipa_interconnect_data,
345 /* Configuration data for the SC7180 SoC. */
346 const struct ipa_data ipa_data_sc7180 = {
347 .version = IPA_VERSION_4_2,
348 .qsb_count = ARRAY_SIZE(ipa_qsb_data),
349 .qsb_data = ipa_qsb_data,
350 .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
351 .endpoint_data = ipa_gsi_endpoint_data,
352 .resource_data = &ipa_resource_data,
353 .mem_data = &ipa_mem_data,
354 .clock_data = &ipa_clock_data,