drivers/net/ipa/ipa_data-sc7180.c

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /* Copyright (C) 2019-2020 Linaro Ltd. */
   4
   5 #include <linux/log2.h>
   6
   7 #include "gsi.h"
   8 #include "ipa_data.h"
   9 #include "ipa_endpoint.h"
  10 #include "ipa_mem.h"
  11
  12 /* Endpoint configuration for the SC7180 SoC. */
  13 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
  14         [IPA_ENDPOINT_AP_COMMAND_TX] = {
  15                 .ee_id          = GSI_EE_AP,
  16                 .channel_id     = 1,
  17                 .endpoint_id    = 6,
  18                 .toward_ipa     = true,
  19                 .channel = {
  20                         .tre_count      = 256,
  21                         .event_count    = 256,
  22                         .tlv_count      = 20,
  23                 },
  24                 .endpoint = {
  25                         .seq_type       = IPA_SEQ_DMA_ONLY,
  26                         .config = {
  27                                 .resource_group = 0,
  28                                 .dma_mode       = true,
  29                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
  30                         },
  31                 },
  32         },
  33         [IPA_ENDPOINT_AP_LAN_RX] = {
  34                 .ee_id          = GSI_EE_AP,
  35                 .channel_id     = 2,
  36                 .endpoint_id    = 8,
  37                 .toward_ipa     = false,
  38                 .channel = {
  39                         .tre_count      = 256,
  40                         .event_count    = 256,
  41                         .tlv_count      = 6,
  42                 },
  43                 .endpoint = {
  44                         .seq_type       = IPA_SEQ_INVALID,
  45                         .config = {
  46                                 .resource_group = 0,
  47                                 .aggregation    = true,
  48                                 .status_enable  = true,
  49                                 .rx = {
  50                                         .pad_align      = ilog2(sizeof(u32)),
  51                                 },
  52                         },
  53                 },
  54         },
  55         [IPA_ENDPOINT_AP_MODEM_TX] = {
  56                 .ee_id          = GSI_EE_AP,
  57                 .channel_id     = 0,
  58                 .endpoint_id    = 1,
  59                 .toward_ipa     = true,
  60                 .channel = {
  61                         .tre_count      = 512,
  62                         .event_count    = 512,
  63                         .tlv_count      = 8,
  64                 },
  65                 .endpoint = {
  66                         .filter_support = true,
  67                         .seq_type       =
  68                                 IPA_SEQ_PKT_PROCESS_NO_DEC_NO_UCP_DMAP,
  69                         .config = {
  70                                 .resource_group = 0,
  71                                 .checksum       = true,
  72                                 .qmap           = true,
  73                                 .status_enable  = true,
  74                                 .tx = {
  75                                         .status_endpoint =
  76                                                 IPA_ENDPOINT_MODEM_AP_RX,
  77                                 },
  78                         },
  79                 },
  80         },
  81         [IPA_ENDPOINT_AP_MODEM_RX] = {
  82                 .ee_id          = GSI_EE_AP,
  83                 .channel_id     = 3,
  84                 .endpoint_id    = 9,
  85                 .toward_ipa     = false,
  86                 .channel = {
  87                         .tre_count      = 256,
  88                         .event_count    = 256,
  89                         .tlv_count      = 6,
  90                 },
  91                 .endpoint = {
  92                         .seq_type       = IPA_SEQ_INVALID,
  93                         .config = {
  94                                 .resource_group = 0,
  95                                 .checksum       = true,
  96                                 .qmap           = true,
  97                                 .aggregation    = true,
  98                                 .rx = {
  99                                         .aggr_close_eof = true,
 100                                 },
 101                         },
 102                 },
 103         },
 104         [IPA_ENDPOINT_MODEM_COMMAND_TX] = {
 105                 .ee_id          = GSI_EE_MODEM,
 106                 .channel_id     = 1,
 107                 .endpoint_id    = 5,
 108                 .toward_ipa     = true,
 109         },
 110         [IPA_ENDPOINT_MODEM_LAN_RX] = {
 111                 .ee_id          = GSI_EE_MODEM,
 112                 .channel_id     = 3,
 113                 .endpoint_id    = 11,
 114                 .toward_ipa     = false,
 115         },
 116         [IPA_ENDPOINT_MODEM_AP_TX] = {
 117                 .ee_id          = GSI_EE_MODEM,
 118                 .channel_id     = 0,
 119                 .endpoint_id    = 4,
 120                 .toward_ipa     = true,
 121                 .endpoint = {
 122                         .filter_support = true,
 123                 },
 124         },
 125         [IPA_ENDPOINT_MODEM_AP_RX] = {
 126                 .ee_id          = GSI_EE_MODEM,
 127                 .channel_id     = 2,
 128                 .endpoint_id    = 10,
 129                 .toward_ipa     = false,
 130         },
 131 };
 132
 133 /* For the SC7180, resource groups are allocated this way:
 134  *   group 0:   UL_DL
 135  */
 136 static const struct ipa_resource_src ipa_resource_src[] = {
 137         {
 138                 .type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
 139                 .limits[0] = {
 140                         .min = 3,
 141                         .max = 63,
 142                 },
 143         },
 144         {
 145                 .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
 146                 .limits[0] = {
 147                         .min = 3,
 148                         .max = 3,
 149                 },
 150         },
 151         {
 152                 .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
 153                 .limits[0] = {
 154                         .min = 10,
 155                         .max = 10,
 156                 },
 157         },
 158         {
 159                 .type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
 160                 .limits[0] = {
 161                         .min = 1,
 162                         .max = 1,
 163                 },
 164         },
 165         {
 166                 .type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
 167                 .limits[0] = {
 168                         .min = 5,
 169                         .max = 5,
 170                 },
 171         },
 172 };
 173
 174 static const struct ipa_resource_dst ipa_resource_dst[] = {
 175         {
 176                 .type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
 177                 .limits[0] = {
 178                         .min = 3,
 179                         .max = 3,
 180                 },
 181         },
 182         {
 183                 .type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
 184                 .limits[0] = {
 185                         .min = 1,
 186                         .max = 63,
 187                 },
 188         },
 189 };
 190
 191 /* Resource configuration for the SC7180 SoC. */
 192 static const struct ipa_resource_data ipa_resource_data = {
 193         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
 194         .resource_src           = ipa_resource_src,
 195         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
 196         .resource_dst           = ipa_resource_dst,
 197 };
 198
 199 /* IPA-resident memory region configuration for the SC7180 SoC. */
 200 static const struct ipa_mem ipa_mem_local_data[] = {
 201         [IPA_MEM_UC_SHARED] = {
 202                 .offset         = 0x0000,
 203                 .size           = 0x0080,
 204                 .canary_count   = 0,
 205         },
 206         [IPA_MEM_UC_INFO] = {
 207                 .offset         = 0x0080,
 208                 .size           = 0x0200,
 209                 .canary_count   = 2,
 210         },
 211         [IPA_MEM_V4_FILTER_HASHED] = {
 212                 .offset         = 0x0288,
 213                 .size           = 0,
 214                 .canary_count   = 2,
 215         },
 216         [IPA_MEM_V4_FILTER] = {
 217                 .offset         = 0x0290,
 218                 .size           = 0x0078,
 219                 .canary_count   = 2,
 220         },
 221         [IPA_MEM_V6_FILTER_HASHED] = {
 222                 .offset         = 0x0310,
 223                 .size           = 0,
 224                 .canary_count   = 2,
 225         },
 226         [IPA_MEM_V6_FILTER] = {
 227                 .offset         = 0x0318,
 228                 .size           = 0x0078,
 229                 .canary_count   = 2,
 230         },
 231         [IPA_MEM_V4_ROUTE_HASHED] = {
 232                 .offset         = 0x0398,
 233                 .size           = 0,
 234                 .canary_count   = 2,
 235         },
 236         [IPA_MEM_V4_ROUTE] = {
 237                 .offset         = 0x03a0,
 238                 .size           = 0x0078,
 239                 .canary_count   = 2,
 240         },
 241         [IPA_MEM_V6_ROUTE_HASHED] = {
 242                 .offset         = 0x0420,
 243                 .size           = 0,
 244                 .canary_count   = 2,
 245         },
 246         [IPA_MEM_V6_ROUTE] = {
 247                 .offset         = 0x0428,
 248                 .size           = 0x0078,
 249                 .canary_count   = 2,
 250         },
 251         [IPA_MEM_MODEM_HEADER] = {
 252                 .offset         = 0x04a8,
 253                 .size           = 0x0140,
 254                 .canary_count   = 2,
 255         },
 256         [IPA_MEM_AP_HEADER] = {
 257                 .offset         = 0x05e8,
 258                 .size           = 0x0000,
 259                 .canary_count   = 0,
 260         },
 261         [IPA_MEM_MODEM_PROC_CTX] = {
 262                 .offset         = 0x05f0,
 263                 .size           = 0x0200,
 264                 .canary_count   = 2,
 265         },
 266         [IPA_MEM_AP_PROC_CTX] = {
 267                 .offset         = 0x07f0,
 268                 .size           = 0x0200,
 269                 .canary_count   = 0,
 270         },
 271         [IPA_MEM_PDN_CONFIG] = {
 272                 .offset         = 0x09f8,
 273                 .size           = 0x0050,
 274                 .canary_count   = 2,
 275         },
 276         [IPA_MEM_STATS_QUOTA] = {
 277                 .offset         = 0x0a50,
 278                 .size           = 0x0060,
 279                 .canary_count   = 2,
 280         },
 281         [IPA_MEM_STATS_TETHERING] = {
 282                 .offset         = 0x0ab0,
 283                 .size           = 0x0140,
 284                 .canary_count   = 0,
 285         },
 286         [IPA_MEM_STATS_DROP] = {
 287                 .offset         = 0x0bf0,
 288                 .size           = 0,
 289                 .canary_count   = 0,
 290         },
 291         [IPA_MEM_MODEM] = {
 292                 .offset         = 0x0bf0,
 293                 .size           = 0x140c,
 294                 .canary_count   = 0,
 295         },
 296         [IPA_MEM_UC_EVENT_RING] = {
 297                 .offset         = 0x2000,
 298                 .size           = 0,
 299                 .canary_count   = 1,
 300         },
 301 };
 302
 303 static struct ipa_mem_data ipa_mem_data = {
 304         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
 305         .local          = ipa_mem_local_data,
 306         .imem_addr      = 0x146a8000,
 307         .imem_size      = 0x00002000,
 308         .smem_id        = 497,
 309         .smem_size      = 0x00002000,
 310 };
 311
 312 static struct ipa_clock_data ipa_clock_data = {
 313         .core_clock_rate        = 100 * 1000 * 1000,    /* Hz */
 314         /* Interconnect rates are in 1000 byte/second units */
 315         .interconnect = {
 316                 [IPA_INTERCONNECT_MEMORY] = {
 317                         .peak_rate      = 465000,       /* 465 MBps */
 318                         .average_rate   = 80000,        /* 80 MBps */
 319                 },
 320                 /* Average rate is unused for the next two interconnects */
 321                 [IPA_INTERCONNECT_IMEM] = {
 322                         .peak_rate      = 68570,        /* 68.570 MBps */
 323                         .average_rate   = 0,            /* unused */
 324                 },
 325                 [IPA_INTERCONNECT_CONFIG] = {
 326                         .peak_rate      = 30000,        /* 30 MBps */
 327                         .average_rate   = 0,            /* unused */
 328                 },
 329         },
 330 };
 331
 332 /* Configuration data for the SC7180 SoC. */
 333 const struct ipa_data ipa_data_sc7180 = {
 334         .version        = IPA_VERSION_4_2,
 335         .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
 336         .endpoint_data  = ipa_gsi_endpoint_data,
 337         .resource_data  = &ipa_resource_data,
 338         .mem_data       = &ipa_mem_data,
 339         .clock_data     = &ipa_clock_data,
 340 };