1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2020 Linaro Ltd.
7 #include <linux/types.h>
8 #include <linux/bits.h>
9 #include <linux/bitfield.h>
10 #include <linux/refcount.h>
11 #include <linux/scatterlist.h>
12 #include <linux/dma-direction.h>
15 #include "gsi_private.h"
16 #include "gsi_trans.h"
22 * DOC: GSI Transactions
24 * A GSI transaction abstracts the behavior of a GSI channel by representing
25 * everything about a related group of IPA commands in a single structure.
26 * (A "command" in this sense is either a data transfer or an IPA immediate
27 * command.) Most details of interaction with the GSI hardware are managed
28 * by the GSI transaction core, allowing users to simply describe commands
29 * to be performed. When a transaction has completed a callback function
30 * (dependent on the type of endpoint associated with the channel) allows
31 * cleanup of resources associated with the transaction.
33 * To perform a command (or set of them), a user of the GSI transaction
34 * interface allocates a transaction, indicating the number of TREs required
35 * (one per command). If sufficient TREs are available, they are reserved
36 * for use in the transaction and the allocation succeeds. This way
37 * exhaustion of the available TREs in a channel ring is detected
38 * as early as possible. All resources required to complete a transaction
39 * are allocated at transaction allocation time.
41 * Commands performed as part of a transaction are represented in an array
42 * of Linux scatterlist structures. This array is allocated with the
43 * transaction, and its entries are initialized using standard scatterlist
44 * functions (such as sg_set_buf() or skb_to_sgvec()).
46 * Once a transaction's scatterlist structures have been initialized, the
47 * transaction is committed. The caller is responsible for mapping buffers
48 * for DMA if necessary, and this should be done *before* allocating
49 * the transaction. Between a successful allocation and commit of a
50 * transaction no errors should occur.
52 * Committing transfers ownership of the entire transaction to the GSI
53 * transaction core. The GSI transaction code formats the content of
54 * the scatterlist array into the channel ring buffer and informs the
55 * hardware that new TREs are available to process.
57 * The last TRE in each transaction is marked to interrupt the AP when the
58 * GSI hardware has completed it. Because transfers described by TREs are
59 * performed strictly in order, signaling the completion of just the last
60 * TRE in the transaction is sufficient to indicate the full transaction
63 * When a transaction is complete, ipa_gsi_trans_complete() is called by the
64 * GSI code into the IPA layer, allowing it to perform any final cleanup
65 * required before the transaction is freed.
68 /* Hardware values representing a transfer element type */
71 GSI_RE_IMMD_CMD = 0x3,
74 /* An entry in a channel ring */
76 __le64 addr; /* DMA address */
77 __le16 len_opcode; /* length in bytes or enum IPA_CMD_* */
79 __le32 flags; /* TRE_FLAGS_* */
82 /* gsi_tre->flags mask values (in CPU byte order) */
83 #define TRE_FLAGS_CHAIN_FMASK GENMASK(0, 0)
84 #define TRE_FLAGS_IEOT_FMASK GENMASK(9, 9)
85 #define TRE_FLAGS_BEI_FMASK GENMASK(10, 10)
86 #define TRE_FLAGS_TYPE_FMASK GENMASK(23, 16)
88 int gsi_trans_pool_init(struct gsi_trans_pool *pool, size_t size, u32 count,
94 if (!size || size % 8)
96 if (count < max_alloc)
100 #endif /* IPA_VALIDATE */
102 /* By allocating a few extra entries in our pool (one less
103 * than the maximum number that will be requested in a
104 * single allocation), we can always satisfy requests without
105 * ever worrying about straddling the end of the pool array.
106 * If there aren't enough entries starting at the free index,
107 * we just allocate free entries from the beginning of the pool.
109 virt = kcalloc(count + max_alloc - 1, size, GFP_KERNEL);
114 /* If the allocator gave us any extra memory, use it */
115 pool->count = ksize(pool->base) / size;
117 pool->max_alloc = max_alloc;
119 pool->addr = 0; /* Only used for DMA pools */
124 void gsi_trans_pool_exit(struct gsi_trans_pool *pool)
127 memset(pool, 0, sizeof(*pool));
130 /* Allocate the requested number of (zeroed) entries from the pool */
131 /* Home-grown DMA pool. This way we can preallocate and use the tre_count
132 * to guarantee allocations will succeed. Even though we specify max_alloc
133 * (and it can be more than one), we only allow allocation of a single
134 * element from a DMA pool.
136 int gsi_trans_pool_init_dma(struct device *dev, struct gsi_trans_pool *pool,
137 size_t size, u32 count, u32 max_alloc)
144 if (!size || size % 8)
146 if (count < max_alloc)
150 #endif /* IPA_VALIDATE */
152 /* Don't let allocations cross a power-of-two boundary */
153 size = __roundup_pow_of_two(size);
154 total_size = (count + max_alloc - 1) * size;
156 /* The allocator will give us a power-of-2 number of pages. But we
157 * can't guarantee that, so request it. That way we won't waste any
158 * memory that would be available beyond the required space.
160 * Note that gsi_trans_pool_exit_dma() assumes the total allocated
161 * size is exactly (count * size).
163 total_size = get_order(total_size) << PAGE_SHIFT;
165 virt = dma_alloc_coherent(dev, total_size, &addr, GFP_KERNEL);
170 pool->count = total_size / size;
173 pool->max_alloc = max_alloc;
179 void gsi_trans_pool_exit_dma(struct device *dev, struct gsi_trans_pool *pool)
181 size_t total_size = pool->count * pool->size;
183 dma_free_coherent(dev, total_size, pool->base, pool->addr);
184 memset(pool, 0, sizeof(*pool));
187 /* Return the byte offset of the next free entry in the pool */
188 static u32 gsi_trans_pool_alloc_common(struct gsi_trans_pool *pool, u32 count)
192 /* assert(count > 0); */
193 /* assert(count <= pool->max_alloc); */
195 /* Allocate from beginning if wrap would occur */
196 if (count > pool->count - pool->free)
199 offset = pool->free * pool->size;
201 memset(pool->base + offset, 0, count * pool->size);
206 /* Allocate a contiguous block of zeroed entries from a pool */
207 void *gsi_trans_pool_alloc(struct gsi_trans_pool *pool, u32 count)
209 return pool->base + gsi_trans_pool_alloc_common(pool, count);
212 /* Allocate a single zeroed entry from a DMA pool */
213 void *gsi_trans_pool_alloc_dma(struct gsi_trans_pool *pool, dma_addr_t *addr)
215 u32 offset = gsi_trans_pool_alloc_common(pool, 1);
217 *addr = pool->addr + offset;
219 return pool->base + offset;
222 /* Return the pool element that immediately follows the one given.
223 * This only works done if elements are allocated one at a time.
225 void *gsi_trans_pool_next(struct gsi_trans_pool *pool, void *element)
227 void *end = pool->base + pool->count * pool->size;
229 /* assert(element >= pool->base); */
230 /* assert(element < end); */
231 /* assert(pool->max_alloc == 1); */
232 element += pool->size;
234 return element < end ? element : pool->base;
237 /* Map a given ring entry index to the transaction associated with it */
238 static void gsi_channel_trans_map(struct gsi_channel *channel, u32 index,
239 struct gsi_trans *trans)
241 /* Note: index *must* be used modulo the ring count here */
242 channel->trans_info.map[index % channel->tre_ring.count] = trans;
245 /* Return the transaction mapped to a given ring entry */
247 gsi_channel_trans_mapped(struct gsi_channel *channel, u32 index)
249 /* Note: index *must* be used modulo the ring count here */
250 return channel->trans_info.map[index % channel->tre_ring.count];
253 /* Return the oldest completed transaction for a channel (or null) */
254 struct gsi_trans *gsi_channel_trans_complete(struct gsi_channel *channel)
256 return list_first_entry_or_null(&channel->trans_info.complete,
257 struct gsi_trans, links);
260 /* Move a transaction from the allocated list to the pending list */
261 static void gsi_trans_move_pending(struct gsi_trans *trans)
263 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
264 struct gsi_trans_info *trans_info = &channel->trans_info;
266 spin_lock_bh(&trans_info->spinlock);
268 list_move_tail(&trans->links, &trans_info->pending);
270 spin_unlock_bh(&trans_info->spinlock);
273 /* Move a transaction and all of its predecessors from the pending list
274 * to the completed list.
276 void gsi_trans_move_complete(struct gsi_trans *trans)
278 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
279 struct gsi_trans_info *trans_info = &channel->trans_info;
280 struct list_head list;
282 spin_lock_bh(&trans_info->spinlock);
284 /* Move this transaction and all predecessors to completed list */
285 list_cut_position(&list, &trans_info->pending, &trans->links);
286 list_splice_tail(&list, &trans_info->complete);
288 spin_unlock_bh(&trans_info->spinlock);
291 /* Move a transaction from the completed list to the polled list */
292 void gsi_trans_move_polled(struct gsi_trans *trans)
294 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
295 struct gsi_trans_info *trans_info = &channel->trans_info;
297 spin_lock_bh(&trans_info->spinlock);
299 list_move_tail(&trans->links, &trans_info->polled);
301 spin_unlock_bh(&trans_info->spinlock);
304 /* Reserve some number of TREs on a channel. Returns true if successful */
306 gsi_trans_tre_reserve(struct gsi_trans_info *trans_info, u32 tre_count)
308 int avail = atomic_read(&trans_info->tre_avail);
312 new = avail - (int)tre_count;
313 if (unlikely(new < 0))
315 } while (!atomic_try_cmpxchg(&trans_info->tre_avail, &avail, new));
320 /* Release previously-reserved TRE entries to a channel */
322 gsi_trans_tre_release(struct gsi_trans_info *trans_info, u32 tre_count)
324 atomic_add(tre_count, &trans_info->tre_avail);
327 /* Allocate a GSI transaction on a channel */
328 struct gsi_trans *gsi_channel_trans_alloc(struct gsi *gsi, u32 channel_id,
330 enum dma_data_direction direction)
332 struct gsi_channel *channel = &gsi->channel[channel_id];
333 struct gsi_trans_info *trans_info;
334 struct gsi_trans *trans;
336 /* assert(tre_count <= gsi_channel_trans_tre_max(gsi, channel_id)); */
338 trans_info = &channel->trans_info;
340 /* We reserve the TREs now, but consume them at commit time.
341 * If there aren't enough available, we're done.
343 if (!gsi_trans_tre_reserve(trans_info, tre_count))
346 /* Allocate and initialize non-zero fields in the the transaction */
347 trans = gsi_trans_pool_alloc(&trans_info->pool, 1);
349 trans->channel_id = channel_id;
350 trans->tre_count = tre_count;
351 init_completion(&trans->completion);
353 /* Allocate the scatterlist and (if requested) info entries. */
354 trans->sgl = gsi_trans_pool_alloc(&trans_info->sg_pool, tre_count);
355 sg_init_marker(trans->sgl, tre_count);
357 trans->direction = direction;
359 spin_lock_bh(&trans_info->spinlock);
361 list_add_tail(&trans->links, &trans_info->alloc);
363 spin_unlock_bh(&trans_info->spinlock);
365 refcount_set(&trans->refcount, 1);
370 /* Free a previously-allocated transaction */
371 void gsi_trans_free(struct gsi_trans *trans)
373 refcount_t *refcount = &trans->refcount;
374 struct gsi_trans_info *trans_info;
377 /* We must hold the lock to release the last reference */
378 if (refcount_dec_not_one(refcount))
381 trans_info = &trans->gsi->channel[trans->channel_id].trans_info;
383 spin_lock_bh(&trans_info->spinlock);
385 /* Reference might have been added before we got the lock */
386 last = refcount_dec_and_test(refcount);
388 list_del(&trans->links);
390 spin_unlock_bh(&trans_info->spinlock);
395 ipa_gsi_trans_release(trans);
397 /* Releasing the reserved TREs implicitly frees the sgl[] and
398 * (if present) info[] arrays, plus the transaction itself.
400 gsi_trans_tre_release(trans_info, trans->tre_count);
403 /* Add an immediate command to a transaction */
404 void gsi_trans_cmd_add(struct gsi_trans *trans, void *buf, u32 size,
405 dma_addr_t addr, enum dma_data_direction direction,
406 enum ipa_cmd_opcode opcode)
408 struct ipa_cmd_info *info;
409 u32 which = trans->used++;
410 struct scatterlist *sg;
412 /* assert(which < trans->tre_count); */
414 /* Commands are quite different from data transfer requests.
415 * Their payloads come from a pool whose memory is allocated
416 * using dma_alloc_coherent(). We therefore do *not* map them
417 * for DMA (unlike what we do for pages and skbs).
419 * When a transaction completes, the SGL is normally unmapped.
420 * A command transaction has direction DMA_NONE, which tells
421 * gsi_trans_complete() to skip the unmapping step.
423 * The only things we use directly in a command scatter/gather
424 * entry are the DMA address and length. We still need the SG
425 * table flags to be maintained though, so assign a NULL page
426 * pointer for that purpose.
428 sg = &trans->sgl[which];
429 sg_assign_page(sg, NULL);
430 sg_dma_address(sg) = addr;
431 sg_dma_len(sg) = size;
433 info = &trans->info[which];
434 info->opcode = opcode;
435 info->direction = direction;
438 /* Add a page transfer to a transaction. It will fill the only TRE. */
439 int gsi_trans_page_add(struct gsi_trans *trans, struct page *page, u32 size,
442 struct scatterlist *sg = &trans->sgl[0];
445 /* assert(trans->tre_count == 1); */
446 /* assert(!trans->used); */
448 sg_set_page(sg, page, size, offset);
449 ret = dma_map_sg(trans->gsi->dev, sg, 1, trans->direction);
453 trans->used++; /* Transaction now owns the (DMA mapped) page */
458 /* Add an SKB transfer to a transaction. No other TREs will be used. */
459 int gsi_trans_skb_add(struct gsi_trans *trans, struct sk_buff *skb)
461 struct scatterlist *sg = &trans->sgl[0];
465 /* assert(trans->tre_count == 1); */
466 /* assert(!trans->used); */
468 /* skb->len will not be 0 (checked early) */
469 ret = skb_to_sgvec(skb, sg, 0, skb->len);
474 ret = dma_map_sg(trans->gsi->dev, sg, used, trans->direction);
478 trans->used += used; /* Transaction now owns the (DMA mapped) skb */
483 /* Compute the length/opcode value to use for a TRE */
484 static __le16 gsi_tre_len_opcode(enum ipa_cmd_opcode opcode, u32 len)
486 return opcode == IPA_CMD_NONE ? cpu_to_le16((u16)len)
487 : cpu_to_le16((u16)opcode);
490 /* Compute the flags value to use for a given TRE */
491 static __le32 gsi_tre_flags(bool last_tre, bool bei, enum ipa_cmd_opcode opcode)
493 enum gsi_tre_type tre_type;
496 tre_type = opcode == IPA_CMD_NONE ? GSI_RE_XFER : GSI_RE_IMMD_CMD;
497 tre_flags = u32_encode_bits(tre_type, TRE_FLAGS_TYPE_FMASK);
499 /* Last TRE contains interrupt flags */
501 /* All transactions end in a transfer completion interrupt */
502 tre_flags |= TRE_FLAGS_IEOT_FMASK;
503 /* Don't interrupt when outbound commands are acknowledged */
505 tre_flags |= TRE_FLAGS_BEI_FMASK;
506 } else { /* All others indicate there's more to come */
507 tre_flags |= TRE_FLAGS_CHAIN_FMASK;
510 return cpu_to_le32(tre_flags);
513 static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr,
514 u32 len, bool last_tre, bool bei,
515 enum ipa_cmd_opcode opcode)
519 tre.addr = cpu_to_le64(addr);
520 tre.len_opcode = gsi_tre_len_opcode(opcode, len);
522 tre.flags = gsi_tre_flags(last_tre, bei, opcode);
524 /* ARM64 can write 16 bytes as a unit with a single instruction.
525 * Doing the assignment this way is an attempt to make that happen.
531 * __gsi_trans_commit() - Common GSI transaction commit code
532 * @trans: Transaction to commit
533 * @ring_db: Whether to tell the hardware about these queued transfers
535 * Formats channel ring TRE entries based on the content of the scatterlist.
536 * Maps a transaction pointer to the last ring entry used for the transaction,
537 * so it can be recovered when it completes. Moves the transaction to the
538 * pending list. Finally, updates the channel ring pointer and optionally
539 * rings the doorbell.
541 static void __gsi_trans_commit(struct gsi_trans *trans, bool ring_db)
543 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
544 struct gsi_ring *ring = &channel->tre_ring;
545 enum ipa_cmd_opcode opcode = IPA_CMD_NONE;
546 bool bei = channel->toward_ipa;
547 struct ipa_cmd_info *info;
548 struct gsi_tre *dest_tre;
549 struct scatterlist *sg;
554 /* assert(trans->used > 0); */
556 /* Consume the entries. If we cross the end of the ring while
557 * filling them we'll switch to the beginning to finish.
558 * If there is no info array we're doing a simple data
559 * transfer request, whose opcode is IPA_CMD_NONE.
561 info = trans->info ? &trans->info[0] : NULL;
562 avail = ring->count - ring->index % ring->count;
563 dest_tre = gsi_ring_virt(ring, ring->index);
564 for_each_sg(trans->sgl, sg, trans->used, i) {
565 bool last_tre = i == trans->used - 1;
566 dma_addr_t addr = sg_dma_address(sg);
567 u32 len = sg_dma_len(sg);
571 dest_tre = gsi_ring_virt(ring, 0);
573 opcode = info++->opcode;
575 gsi_trans_tre_fill(dest_tre, addr, len, last_tre, bei, opcode);
578 ring->index += trans->used;
580 if (channel->toward_ipa) {
581 /* We record TX bytes when they are sent */
582 trans->len = byte_count;
583 trans->trans_count = channel->trans_count;
584 trans->byte_count = channel->byte_count;
585 channel->trans_count++;
586 channel->byte_count += byte_count;
589 /* Associate the last TRE with the transaction */
590 gsi_channel_trans_map(channel, ring->index - 1, trans);
592 gsi_trans_move_pending(trans);
594 /* Ring doorbell if requested, or if all TREs are allocated */
595 if (ring_db || !atomic_read(&channel->trans_info.tre_avail)) {
596 /* Report what we're handing off to hardware for TX channels */
597 if (channel->toward_ipa)
598 gsi_channel_tx_queued(channel);
599 gsi_channel_doorbell(channel);
603 /* Commit a GSI transaction */
604 void gsi_trans_commit(struct gsi_trans *trans, bool ring_db)
607 __gsi_trans_commit(trans, ring_db);
609 gsi_trans_free(trans);
612 /* Commit a GSI transaction and wait for it to complete */
613 void gsi_trans_commit_wait(struct gsi_trans *trans)
618 refcount_inc(&trans->refcount);
620 __gsi_trans_commit(trans, true);
622 wait_for_completion(&trans->completion);
625 gsi_trans_free(trans);
628 /* Commit a GSI transaction and wait for it to complete, with timeout */
629 int gsi_trans_commit_wait_timeout(struct gsi_trans *trans,
630 unsigned long timeout)
632 unsigned long timeout_jiffies = msecs_to_jiffies(timeout);
633 unsigned long remaining = 1; /* In case of empty transaction */
638 refcount_inc(&trans->refcount);
640 __gsi_trans_commit(trans, true);
642 remaining = wait_for_completion_timeout(&trans->completion,
645 gsi_trans_free(trans);
647 return remaining ? 0 : -ETIMEDOUT;
650 /* Process the completion of a transaction; called while polling */
651 void gsi_trans_complete(struct gsi_trans *trans)
653 /* If the entire SGL was mapped when added, unmap it now */
654 if (trans->direction != DMA_NONE)
655 dma_unmap_sg(trans->gsi->dev, trans->sgl, trans->used,
658 ipa_gsi_trans_complete(trans);
660 complete(&trans->completion);
662 gsi_trans_free(trans);
665 /* Cancel a channel's pending transactions */
666 void gsi_channel_trans_cancel_pending(struct gsi_channel *channel)
668 struct gsi_trans_info *trans_info = &channel->trans_info;
669 struct gsi_trans *trans;
672 /* channel->gsi->mutex is held by caller */
673 spin_lock_bh(&trans_info->spinlock);
675 cancelled = !list_empty(&trans_info->pending);
676 list_for_each_entry(trans, &trans_info->pending, links)
677 trans->cancelled = true;
679 list_splice_tail_init(&trans_info->pending, &trans_info->complete);
681 spin_unlock_bh(&trans_info->spinlock);
683 /* Schedule NAPI polling to complete the cancelled transactions */
685 napi_schedule(&channel->napi);
688 /* Issue a command to read a single byte from a channel */
689 int gsi_trans_read_byte(struct gsi *gsi, u32 channel_id, dma_addr_t addr)
691 struct gsi_channel *channel = &gsi->channel[channel_id];
692 struct gsi_ring *ring = &channel->tre_ring;
693 struct gsi_trans_info *trans_info;
694 struct gsi_tre *dest_tre;
696 trans_info = &channel->trans_info;
698 /* First reserve the TRE, if possible */
699 if (!gsi_trans_tre_reserve(trans_info, 1))
702 /* Now fill the the reserved TRE and tell the hardware */
704 dest_tre = gsi_ring_virt(ring, ring->index);
705 gsi_trans_tre_fill(dest_tre, addr, 1, true, false, IPA_CMD_NONE);
708 gsi_channel_doorbell(channel);
713 /* Mark a gsi_trans_read_byte() request done */
714 void gsi_trans_read_byte_done(struct gsi *gsi, u32 channel_id)
716 struct gsi_channel *channel = &gsi->channel[channel_id];
718 gsi_trans_tre_release(&channel->trans_info, 1);
721 /* Initialize a channel's GSI transaction info */
722 int gsi_channel_trans_init(struct gsi *gsi, u32 channel_id)
724 struct gsi_channel *channel = &gsi->channel[channel_id];
725 struct gsi_trans_info *trans_info;
729 /* Ensure the size of a channel element is what's expected */
730 BUILD_BUG_ON(sizeof(struct gsi_tre) != GSI_RING_ELEMENT_SIZE);
732 /* The map array is used to determine what transaction is associated
733 * with a TRE that the hardware reports has completed. We need one
736 trans_info = &channel->trans_info;
737 trans_info->map = kcalloc(channel->tre_count, sizeof(*trans_info->map),
739 if (!trans_info->map)
742 /* We can't use more TREs than there are available in the ring.
743 * This limits the number of transactions that can be oustanding.
744 * Worst case is one TRE per transaction (but we actually limit
745 * it to something a little less than that). We allocate resources
746 * for transactions (including transaction structures) based on
747 * this maximum number.
749 tre_max = gsi_channel_tre_max(channel->gsi, channel_id);
751 /* Transactions are allocated one at a time. */
752 ret = gsi_trans_pool_init(&trans_info->pool, sizeof(struct gsi_trans),
757 /* A transaction uses a scatterlist array to represent the data
758 * transfers implemented by the transaction. Each scatterlist
759 * element is used to fill a single TRE when the transaction is
760 * committed. So we need as many scatterlist elements as the
761 * maximum number of TREs that can be outstanding.
763 * All TREs in a transaction must fit within the channel's TLV FIFO.
764 * A transaction on a channel can allocate as many TREs as that but
767 ret = gsi_trans_pool_init(&trans_info->sg_pool,
768 sizeof(struct scatterlist),
769 tre_max, channel->tlv_count);
771 goto err_trans_pool_exit;
773 /* Finally, the tre_avail field is what ultimately limits the number
774 * of outstanding transactions and their resources. A transaction
775 * allocation succeeds only if the TREs available are sufficient for
776 * what the transaction might need. Transaction resource pools are
777 * sized based on the maximum number of outstanding TREs, so there
778 * will always be resources available if there are TREs available.
780 atomic_set(&trans_info->tre_avail, tre_max);
782 spin_lock_init(&trans_info->spinlock);
783 INIT_LIST_HEAD(&trans_info->alloc);
784 INIT_LIST_HEAD(&trans_info->pending);
785 INIT_LIST_HEAD(&trans_info->complete);
786 INIT_LIST_HEAD(&trans_info->polled);
791 gsi_trans_pool_exit(&trans_info->pool);
793 kfree(trans_info->map);
795 dev_err(gsi->dev, "error %d initializing channel %u transactions\n",
801 /* Inverse of gsi_channel_trans_init() */
802 void gsi_channel_trans_exit(struct gsi_channel *channel)
804 struct gsi_trans_info *trans_info = &channel->trans_info;
806 gsi_trans_pool_exit(&trans_info->sg_pool);
807 gsi_trans_pool_exit(&trans_info->pool);
808 kfree(trans_info->map);