1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
9 #include <linux/types.h>
10 #include <linux/spinlock.h>
11 #include <linux/mutex.h>
12 #include <linux/completion.h>
13 #include <linux/platform_device.h>
14 #include <linux/netdevice.h>
16 /* Maximum number of channels and event rings supported by the driver */
17 #define GSI_CHANNEL_COUNT_MAX 17
18 #define GSI_EVT_RING_COUNT_MAX 13
20 /* Maximum TLV FIFO size for a channel; 64 here is arbitrary (and high) */
21 #define GSI_TLV_MAX 64
25 struct platform_device;
29 struct gsi_channel_data;
30 struct ipa_gsi_endpoint_data;
32 /* Execution environment IDs */
41 void *virt; /* ring array base address */
42 dma_addr_t addr; /* primarily low 32 bits used */
43 u32 count; /* number of elements in ring */
45 /* The ring index value indicates the next "open" entry in the ring.
47 * A channel ring consists of TRE entries filled by the AP and passed
48 * to the hardware for processing. For a channel ring, the ring index
49 * identifies the next unused entry to be filled by the AP.
51 * An event ring consists of event structures filled by the hardware
52 * and passed to the AP. For event rings, the ring index identifies
53 * the next ring entry that is not known to have been filled by the
59 /* Transactions use several resources that can be allocated dynamically
60 * but taken from a fixed-size pool. The number of elements required for
61 * the pool is limited by the total number of TREs that can be outstanding.
63 * If sufficient TREs are available to reserve for a transaction,
64 * allocation from these pools is guaranteed to succeed. Furthermore,
65 * these resources are implicitly freed whenever the TREs in the
66 * transaction they're associated with are released.
68 * The result of a pool allocation of multiple elements is always
71 struct gsi_trans_pool {
72 void *base; /* base address of element pool */
73 u32 count; /* # elements in the pool */
74 u32 free; /* next free element in pool (modulo) */
75 u32 size; /* size (bytes) of an element */
76 u32 max_alloc; /* max allocation request */
77 dma_addr_t addr; /* DMA address if DMA pool (or 0) */
80 struct gsi_trans_info {
81 atomic_t tre_avail; /* TREs available for allocation */
82 struct gsi_trans_pool pool; /* transaction pool */
83 struct gsi_trans_pool sg_pool; /* scatterlist pool */
84 struct gsi_trans_pool cmd_pool; /* command payload DMA pool */
85 struct gsi_trans_pool info_pool;/* command information pool */
86 struct gsi_trans **map; /* TRE -> transaction map */
88 spinlock_t spinlock; /* protects updates to the lists */
89 struct list_head alloc; /* allocated, not committed */
90 struct list_head pending; /* committed, awaiting completion */
91 struct list_head complete; /* completed, awaiting poll */
92 struct list_head polled; /* returned by gsi_channel_poll_one() */
95 /* Hardware values signifying the state of a channel */
96 enum gsi_channel_state {
97 GSI_CHANNEL_STATE_NOT_ALLOCATED = 0x0,
98 GSI_CHANNEL_STATE_ALLOCATED = 0x1,
99 GSI_CHANNEL_STATE_STARTED = 0x2,
100 GSI_CHANNEL_STATE_STOPPED = 0x3,
101 GSI_CHANNEL_STATE_STOP_IN_PROC = 0x4,
102 GSI_CHANNEL_STATE_ERROR = 0xf,
105 /* We only care about channels between IPA and AP */
109 bool command; /* AP command TX channel or not */
110 bool use_prefetch; /* use prefetch (else escape buf) */
112 u8 tlv_count; /* # entries in TLV FIFO */
116 struct completion completion; /* signals channel state changes */
117 enum gsi_channel_state state;
119 struct gsi_ring tre_ring;
122 u64 byte_count; /* total # bytes transferred */
123 u64 trans_count; /* total # transactions */
124 /* The following counts are used only for TX endpoints */
125 u64 queued_byte_count; /* last reported queued byte count */
126 u64 queued_trans_count; /* ...and queued trans count */
127 u64 compl_byte_count; /* last reported completed byte count */
128 u64 compl_trans_count; /* ...and completed trans count */
130 struct gsi_trans_info trans_info;
132 struct napi_struct napi;
135 /* Hardware values signifying the state of an event ring */
136 enum gsi_evt_ring_state {
137 GSI_EVT_RING_STATE_NOT_ALLOCATED = 0x0,
138 GSI_EVT_RING_STATE_ALLOCATED = 0x1,
139 GSI_EVT_RING_STATE_ERROR = 0xf,
142 struct gsi_evt_ring {
143 struct gsi_channel *channel;
144 struct completion completion; /* signals event ring state changes */
145 enum gsi_evt_ring_state state;
146 struct gsi_ring ring;
150 struct device *dev; /* Same as IPA device */
151 struct net_device dummy_dev; /* needed for NAPI */
154 bool irq_wake_enabled;
157 struct gsi_channel channel[GSI_CHANNEL_COUNT_MAX];
158 struct gsi_evt_ring evt_ring[GSI_EVT_RING_COUNT_MAX];
160 u32 event_enable_bitmap;
161 u32 modem_channel_bitmap;
162 struct completion completion; /* for global EE commands */
163 struct mutex mutex; /* protects commands, programming */
167 * gsi_setup() - Set up the GSI subsystem
168 * @gsi: Address of GSI structure embedded in an IPA structure
169 * @db_enable: Whether to use the GSI doorbell engine
171 * @Return: 0 if successful, or a negative error code
173 * Performs initialization that must wait until the GSI hardware is
174 * ready (including firmware loaded).
176 int gsi_setup(struct gsi *gsi, bool db_enable);
179 * gsi_teardown() - Tear down GSI subsystem
180 * @gsi: GSI address previously passed to a successful gsi_setup() call
182 void gsi_teardown(struct gsi *gsi);
185 * gsi_channel_tre_max() - Channel maximum number of in-flight TREs
187 * @channel_id: Channel whose limit is to be returned
189 * @Return: The maximum number of TREs oustanding on the channel
191 u32 gsi_channel_tre_max(struct gsi *gsi, u32 channel_id);
194 * gsi_channel_trans_tre_max() - Maximum TREs in a single transaction
196 * @channel_id: Channel whose limit is to be returned
198 * @Return: The maximum TRE count per transaction on the channel
200 u32 gsi_channel_trans_tre_max(struct gsi *gsi, u32 channel_id);
203 * gsi_channel_start() - Start an allocated GSI channel
205 * @channel_id: Channel to start
207 * @Return: 0 if successful, or a negative error code
209 int gsi_channel_start(struct gsi *gsi, u32 channel_id);
212 * gsi_channel_stop() - Stop a started GSI channel
213 * @gsi: GSI pointer returned by gsi_setup()
214 * @channel_id: Channel to stop
216 * @Return: 0 if successful, or a negative error code
218 int gsi_channel_stop(struct gsi *gsi, u32 channel_id);
221 * gsi_channel_reset() - Reset an allocated GSI channel
223 * @channel_id: Channel to be reset
224 * @db_enable: Whether doorbell engine should be enabled
226 * Reset a channel and reconfigure it. The @db_enable flag indicates
227 * whether the doorbell engine will be enabled following reconfiguration.
229 * GSI hardware relinquishes ownership of all pending receive buffer
230 * transactions and they will complete with their cancelled flag set.
232 void gsi_channel_reset(struct gsi *gsi, u32 channel_id, bool db_enable);
234 int gsi_channel_suspend(struct gsi *gsi, u32 channel_id, bool stop);
235 int gsi_channel_resume(struct gsi *gsi, u32 channel_id, bool start);
238 * gsi_init() - Initialize the GSI subsystem
239 * @gsi: Address of GSI structure embedded in an IPA structure
240 * @pdev: IPA platform device
242 * @Return: 0 if successful, or a negative error code
244 * Early stage initialization of the GSI subsystem, performing tasks
245 * that can be done before the GSI hardware is ready to use.
247 int gsi_init(struct gsi *gsi, struct platform_device *pdev, bool prefetch,
248 u32 count, const struct ipa_gsi_endpoint_data *data,
252 * gsi_exit() - Exit the GSI subsystem
253 * @gsi: GSI address previously passed to a successful gsi_init() call
255 void gsi_exit(struct gsi *gsi);