drivers/net/ipa/data/ipa_data-v4.7.c

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /* Copyright (C) 2022-2024 Linaro Ltd. */
   4
   5 #include <linux/array_size.h>
   6 #include <linux/log2.h>
   7
   8 #include "../ipa_data.h"
   9 #include "../ipa_endpoint.h"
  10 #include "../ipa_mem.h"
  11 #include "../ipa_version.h"
  12
  13 /** enum ipa_resource_type - IPA resource types for an SoC having IPA v4.7 */
  14 enum ipa_resource_type {
  15         /* Source resource types; first must have value 0 */
  16         IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS              = 0,
  17         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
  18         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
  19         IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
  20         IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
  21
  22         /* Destination resource types; first must have value 0 */
  23         IPA_RESOURCE_TYPE_DST_DATA_SECTORS              = 0,
  24         IPA_RESOURCE_TYPE_DST_DPS_DMARS,
  25 };
  26
  27 /* Resource groups used for an SoC having IPA v4.7 */
  28 enum ipa_rsrc_group_id {
  29         /* Source resource group identifiers */
  30         IPA_RSRC_GROUP_SRC_UL_DL                        = 0,
  31         IPA_RSRC_GROUP_SRC_UC_RX_Q,
  32         IPA_RSRC_GROUP_SRC_COUNT,       /* Last in set; not a source group */
  33
  34         /* Destination resource group identifiers */
  35         IPA_RSRC_GROUP_DST_UL_DL_DPL                    = 0,
  36         IPA_RSRC_GROUP_DST_UNUSED_1,
  37         IPA_RSRC_GROUP_DST_COUNT,       /* Last; not a destination group */
  38 };
  39
  40 /* QSB configuration data for an SoC having IPA v4.7 */
  41 static const struct ipa_qsb_data ipa_qsb_data[] = {
  42         [IPA_QSB_MASTER_DDR] = {
  43                 .max_writes             = 8,
  44                 .max_reads              = 0,    /* no limit (hardware max) */
  45                 .max_reads_beats        = 120,
  46         },
  47 };
  48
  49 /* Endpoint configuration data for an SoC having IPA v4.7 */
  50 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
  51         [IPA_ENDPOINT_AP_COMMAND_TX] = {
  52                 .ee_id          = GSI_EE_AP,
  53                 .channel_id     = 5,
  54                 .endpoint_id    = 7,
  55                 .toward_ipa     = true,
  56                 .channel = {
  57                         .tre_count      = 256,
  58                         .event_count    = 256,
  59                         .tlv_count      = 20,
  60                 },
  61                 .endpoint = {
  62                         .config = {
  63                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
  64                                 .dma_mode       = true,
  65                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
  66                                 .tx = {
  67                                         .seq_type = IPA_SEQ_DMA,
  68                                 },
  69                         },
  70                 },
  71         },
  72         [IPA_ENDPOINT_AP_LAN_RX] = {
  73                 .ee_id          = GSI_EE_AP,
  74                 .channel_id     = 14,
  75                 .endpoint_id    = 9,
  76                 .toward_ipa     = false,
  77                 .channel = {
  78                         .tre_count      = 256,
  79                         .event_count    = 256,
  80                         .tlv_count      = 9,
  81                 },
  82                 .endpoint = {
  83                         .config = {
  84                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
  85                                 .aggregation    = true,
  86                                 .status_enable  = true,
  87                                 .rx = {
  88                                         .buffer_size    = 8192,
  89                                         .pad_align      = ilog2(sizeof(u32)),
  90                                         .aggr_time_limit = 500,
  91                                 },
  92                         },
  93                 },
  94         },
  95         [IPA_ENDPOINT_AP_MODEM_TX] = {
  96                 .ee_id          = GSI_EE_AP,
  97                 .channel_id     = 2,
  98                 .endpoint_id    = 2,
  99                 .toward_ipa     = true,
 100                 .channel = {
 101                         .tre_count      = 512,
 102                         .event_count    = 512,
 103                         .tlv_count      = 16,
 104                 },
 105                 .endpoint = {
 106                         .filter_support = true,
 107                         .config = {
 108                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
 109                                 .qmap           = true,
 110                                 .status_enable  = true,
 111                                 .tx = {
 112                                         .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC,
 113                                         .status_endpoint =
 114                                                 IPA_ENDPOINT_MODEM_AP_RX,
 115                                 },
 116                         },
 117                 },
 118         },
 119         [IPA_ENDPOINT_AP_MODEM_RX] = {
 120                 .ee_id          = GSI_EE_AP,
 121                 .channel_id     = 7,
 122                 .endpoint_id    = 16,
 123                 .toward_ipa     = false,
 124                 .channel = {
 125                         .tre_count      = 256,
 126                         .event_count    = 256,
 127                         .tlv_count      = 9,
 128                 },
 129                 .endpoint = {
 130                         .config = {
 131                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
 132                                 .qmap           = true,
 133                                 .aggregation    = true,
 134                                 .rx = {
 135                                         .buffer_size    = 8192,
 136                                         .aggr_time_limit = 500,
 137                                         .aggr_close_eof = true,
 138                                 },
 139                         },
 140                 },
 141         },
 142         [IPA_ENDPOINT_MODEM_AP_TX] = {
 143                 .ee_id          = GSI_EE_MODEM,
 144                 .channel_id     = 0,
 145                 .endpoint_id    = 5,
 146                 .toward_ipa     = true,
 147                 .endpoint = {
 148                         .filter_support = true,
 149                 },
 150         },
 151         [IPA_ENDPOINT_MODEM_AP_RX] = {
 152                 .ee_id          = GSI_EE_MODEM,
 153                 .channel_id     = 7,
 154                 .endpoint_id    = 14,
 155                 .toward_ipa     = false,
 156         },
 157         [IPA_ENDPOINT_MODEM_DL_NLO_TX] = {
 158                 .ee_id          = GSI_EE_MODEM,
 159                 .channel_id     = 2,
 160                 .endpoint_id    = 8,
 161                 .toward_ipa     = true,
 162                 .endpoint = {
 163                         .filter_support = true,
 164                 },
 165         },
 166 };
 167
 168 /* Source resource configuration data for an SoC having IPA v4.7 */
 169 static const struct ipa_resource ipa_resource_src[] = {
 170         [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
 171                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 172                         .min = 8,       .max = 8,
 173                 },
 174         },
 175         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
 176                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 177                         .min = 8,       .max = 8,
 178                 },
 179         },
 180         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
 181                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 182                         .min = 18,      .max = 18,
 183                 },
 184         },
 185         [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
 186                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 187                         .min = 2,       .max = 2,
 188                 },
 189         },
 190         [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
 191                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 192                         .min = 15,      .max = 15,
 193                 },
 194         },
 195 };
 196
 197 /* Destination resource configuration data for an SoC having IPA v4.7 */
 198 static const struct ipa_resource ipa_resource_dst[] = {
 199         [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
 200                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
 201                         .min = 7,       .max = 7,
 202                 },
 203         },
 204         [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
 205                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
 206                         .min = 2,       .max = 2,
 207                 },
 208         },
 209 };
 210
 211 /* Resource configuration data for an SoC having IPA v4.7 */
 212 static const struct ipa_resource_data ipa_resource_data = {
 213         .rsrc_group_dst_count   = IPA_RSRC_GROUP_DST_COUNT,
 214         .rsrc_group_src_count   = IPA_RSRC_GROUP_SRC_COUNT,
 215         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
 216         .resource_src           = ipa_resource_src,
 217         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
 218         .resource_dst           = ipa_resource_dst,
 219 };
 220
 221 /* IPA-resident memory region data for an SoC having IPA v4.7 */
 222 static const struct ipa_mem ipa_mem_local_data[] = {
 223         {
 224                 .id             = IPA_MEM_UC_SHARED,
 225                 .offset         = 0x0000,
 226                 .size           = 0x0080,
 227                 .canary_count   = 0,
 228         },
 229         {
 230                 .id             = IPA_MEM_UC_INFO,
 231                 .offset         = 0x0080,
 232                 .size           = 0x0200,
 233                 .canary_count   = 0,
 234         },
 235         {
 236                 .id             = IPA_MEM_V4_FILTER_HASHED,
 237                 .offset         = 0x0288,
 238                 .size           = 0x0078,
 239                 .canary_count   = 2,
 240         },
 241         {
 242                 .id             = IPA_MEM_V4_FILTER,
 243                 .offset         = 0x0308,
 244                 .size           = 0x0078,
 245                 .canary_count   = 2,
 246         },
 247         {
 248                 .id             = IPA_MEM_V6_FILTER_HASHED,
 249                 .offset         = 0x0388,
 250                 .size           = 0x0078,
 251                 .canary_count   = 2,
 252         },
 253         {
 254                 .id             = IPA_MEM_V6_FILTER,
 255                 .offset         = 0x0408,
 256                 .size           = 0x0078,
 257                 .canary_count   = 2,
 258         },
 259         {
 260                 .id             = IPA_MEM_V4_ROUTE_HASHED,
 261                 .offset         = 0x0488,
 262                 .size           = 0x0078,
 263                 .canary_count   = 2,
 264         },
 265         {
 266                 .id             = IPA_MEM_V4_ROUTE,
 267                 .offset         = 0x0508,
 268                 .size           = 0x0078,
 269                 .canary_count   = 2,
 270         },
 271         {
 272                 .id             = IPA_MEM_V6_ROUTE_HASHED,
 273                 .offset         = 0x0588,
 274                 .size           = 0x0078,
 275                 .canary_count   = 2,
 276         },
 277         {
 278                 .id             = IPA_MEM_V6_ROUTE,
 279                 .offset         = 0x0608,
 280                 .size           = 0x0078,
 281                 .canary_count   = 2,
 282         },
 283         {
 284                 .id             = IPA_MEM_MODEM_HEADER,
 285                 .offset         = 0x0688,
 286                 .size           = 0x0240,
 287                 .canary_count   = 2,
 288         },
 289         {
 290                 .id             = IPA_MEM_AP_HEADER,
 291                 .offset         = 0x08c8,
 292                 .size           = 0x0200,
 293                 .canary_count   = 0,
 294         },
 295         {
 296                 .id             = IPA_MEM_MODEM_PROC_CTX,
 297                 .offset         = 0x0ad0,
 298                 .size           = 0x0200,
 299                 .canary_count   = 2,
 300         },
 301         {
 302                 .id             = IPA_MEM_AP_PROC_CTX,
 303                 .offset         = 0x0cd0,
 304                 .size           = 0x0200,
 305                 .canary_count   = 0,
 306         },
 307         {
 308                 .id             = IPA_MEM_NAT_TABLE,
 309                 .offset         = 0x0ee0,
 310                 .size           = 0x0d00,
 311                 .canary_count   = 4,
 312         },
 313         {
 314                 .id             = IPA_MEM_PDN_CONFIG,
 315                 .offset         = 0x1be8,
 316                 .size           = 0x0050,
 317                 .canary_count   = 0,
 318         },
 319         {
 320                 .id             = IPA_MEM_STATS_QUOTA_MODEM,
 321                 .offset         = 0x1c40,
 322                 .size           = 0x0030,
 323                 .canary_count   = 4,
 324         },
 325         {
 326                 .id             = IPA_MEM_STATS_QUOTA_AP,
 327                 .offset         = 0x1c70,
 328                 .size           = 0x0048,
 329                 .canary_count   = 0,
 330         },
 331         {
 332                 .id             = IPA_MEM_STATS_TETHERING,
 333                 .offset         = 0x1cb8,
 334                 .size           = 0x0238,
 335                 .canary_count   = 0,
 336         },
 337         {
 338                 .id             = IPA_MEM_STATS_DROP,
 339                 .offset         = 0x1ef0,
 340                 .size           = 0x0020,
 341                 .canary_count   = 0,
 342         },
 343         {
 344                 .id             = IPA_MEM_MODEM,
 345                 .offset         = 0x1f18,
 346                 .size           = 0x100c,
 347                 .canary_count   = 2,
 348         },
 349         {
 350                 .id             = IPA_MEM_END_MARKER,
 351                 .offset         = 0x3000,
 352                 .size           = 0x0000,
 353                 .canary_count   = 1,
 354         },
 355 };
 356
 357 /* Memory configuration data for an SoC having IPA v4.7 */
 358 static const struct ipa_mem_data ipa_mem_data = {
 359         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
 360         .local          = ipa_mem_local_data,
 361         .imem_addr      = 0x146a8000,
 362         .imem_size      = 0x00002000,
 363         .smem_id        = 497,
 364         .smem_size      = 0x00009000,
 365 };
 366
 367 /* Interconnect rates are in 1000 byte/second units */
 368 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
 369         {
 370                 .name                   = "memory",
 371                 .peak_bandwidth         = 600000,       /* 600 MBps */
 372                 .average_bandwidth      = 150000,       /* 150 MBps */
 373         },
 374         /* Average rate is unused for the next two interconnects */
 375         {
 376                 .name                   = "imem",
 377                 .peak_bandwidth         = 450000,       /* 450 MBps */
 378                 .average_bandwidth      = 75000,        /* 75 MBps (unused?) */
 379         },
 380         {
 381                 .name                   = "config",
 382                 .peak_bandwidth         = 171400,       /* 171.4 MBps */
 383                 .average_bandwidth      = 0,            /* unused */
 384         },
 385 };
 386
 387 /* Clock and interconnect configuration data for an SoC having IPA v4.7 */
 388 static const struct ipa_power_data ipa_power_data = {
 389         /* XXX Downstream code says 150 MHz (DT SVS2), 60 MHz (code) */
 390         .core_clock_rate        = 100 * 1000 * 1000,    /* Hz (150?  60?) */
 391         .interconnect_count     = ARRAY_SIZE(ipa_interconnect_data),
 392         .interconnect_data      = ipa_interconnect_data,
 393 };
 394
 395 /* Configuration data for an SoC having IPA v4.7 */
 396 const struct ipa_data ipa_data_v4_7 = {
 397         .version                = IPA_VERSION_4_7,
 398         .qsb_count              = ARRAY_SIZE(ipa_qsb_data),
 399         .qsb_data               = ipa_qsb_data,
 400         .modem_route_count      = 8,
 401         .endpoint_count         = ARRAY_SIZE(ipa_gsi_endpoint_data),
 402         .endpoint_data          = ipa_gsi_endpoint_data,
 403         .resource_data          = &ipa_resource_data,
 404         .mem_data               = &ipa_mem_data,
 405         .power_data             = &ipa_power_data,
 406 };