1 // SPDX-License-Identifier: GPL-2.0-only
3 * FUJITSU Extended Socket Network Device driver
4 * Copyright (c) 2015 FUJITSU LIMITED
9 #include "fjes_trace.h"
11 static void fjes_hw_update_zone_task(struct work_struct *);
12 static void fjes_hw_epstop_task(struct work_struct *);
14 /* supported MTU list */
15 const u32 fjes_support_mtu[] = {
16 FJES_MTU_DEFINE(8 * 1024),
17 FJES_MTU_DEFINE(16 * 1024),
18 FJES_MTU_DEFINE(32 * 1024),
19 FJES_MTU_DEFINE(64 * 1024),
23 u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg)
28 value = readl(&base[reg]);
33 static u8 *fjes_hw_iomap(struct fjes_hw *hw)
37 if (!request_mem_region(hw->hw_res.start, hw->hw_res.size,
39 pr_err("request_mem_region failed\n");
43 base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size);
48 static void fjes_hw_iounmap(struct fjes_hw *hw)
51 release_mem_region(hw->hw_res.start, hw->hw_res.size);
54 int fjes_hw_reset(struct fjes_hw *hw)
61 wr32(XSCT_DCTL, dctl.reg);
63 timeout = FJES_DEVICE_RESET_TIMEOUT * 1000;
64 dctl.reg = rd32(XSCT_DCTL);
65 while ((dctl.bits.reset == 1) && (timeout > 0)) {
67 dctl.reg = rd32(XSCT_DCTL);
71 return timeout > 0 ? 0 : -EIO;
74 static int fjes_hw_get_max_epid(struct fjes_hw *hw)
76 union REG_MAX_EP info;
78 info.reg = rd32(XSCT_MAX_EP);
80 return info.bits.maxep;
83 static int fjes_hw_get_my_epid(struct fjes_hw *hw)
85 union REG_OWNER_EPID info;
87 info.reg = rd32(XSCT_OWNER_EPID);
89 return info.bits.epid;
92 static int fjes_hw_alloc_shared_status_region(struct fjes_hw *hw)
96 size = sizeof(struct fjes_device_shared_info) +
97 (sizeof(u8) * hw->max_epid);
98 hw->hw_info.share = kzalloc(size, GFP_KERNEL);
99 if (!hw->hw_info.share)
102 hw->hw_info.share->epnum = hw->max_epid;
107 static void fjes_hw_free_shared_status_region(struct fjes_hw *hw)
109 kfree(hw->hw_info.share);
110 hw->hw_info.share = NULL;
113 static int fjes_hw_alloc_epbuf(struct epbuf_handler *epbh)
117 mem = vzalloc(EP_BUFFER_SIZE);
122 epbh->size = EP_BUFFER_SIZE;
124 epbh->info = (union ep_buffer_info *)mem;
125 epbh->ring = (u8 *)(mem + sizeof(union ep_buffer_info));
130 static void fjes_hw_free_epbuf(struct epbuf_handler *epbh)
140 void fjes_hw_setup_epbuf(struct epbuf_handler *epbh, const u8 *mac_addr,
143 union ep_buffer_info *info = epbh->info;
144 u16 vlan_id[EP_BUFFER_SUPPORT_VLAN_MAX];
147 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
148 vlan_id[i] = info->v1i.vlan_id[i];
150 memset(info, 0, sizeof(union ep_buffer_info));
152 info->v1i.version = 0; /* version 0 */
154 for (i = 0; i < ETH_ALEN; i++)
155 info->v1i.mac_addr[i] = mac_addr[i];
160 info->v1i.info_size = sizeof(union ep_buffer_info);
161 info->v1i.buffer_size = epbh->size - info->v1i.info_size;
163 info->v1i.frame_max = FJES_MTU_TO_FRAME_SIZE(mtu);
164 info->v1i.count_max =
165 EP_RING_NUM(info->v1i.buffer_size, info->v1i.frame_max);
167 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
168 info->v1i.vlan_id[i] = vlan_id[i];
170 info->v1i.rx_status |= FJES_RX_MTU_CHANGING_DONE;
174 fjes_hw_init_command_registers(struct fjes_hw *hw,
175 struct fjes_device_command_param *param)
177 /* Request Buffer length */
178 wr32(XSCT_REQBL, (__le32)(param->req_len));
179 /* Response Buffer Length */
180 wr32(XSCT_RESPBL, (__le32)(param->res_len));
182 /* Request Buffer Address */
184 (__le32)(param->req_start & GENMASK_ULL(31, 0)));
186 (__le32)((param->req_start & GENMASK_ULL(63, 32)) >> 32));
188 /* Response Buffer Address */
190 (__le32)(param->res_start & GENMASK_ULL(31, 0)));
192 (__le32)((param->res_start & GENMASK_ULL(63, 32)) >> 32));
194 /* Share status address */
196 (__le32)(param->share_start & GENMASK_ULL(31, 0)));
198 (__le32)((param->share_start & GENMASK_ULL(63, 32)) >> 32));
201 static int fjes_hw_setup(struct fjes_hw *hw)
203 u8 mac[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
204 struct fjes_device_command_param param;
205 struct ep_share_mem_info *buf_pair;
212 hw->hw_info.max_epid = &hw->max_epid;
213 hw->hw_info.my_epid = &hw->my_epid;
215 buf = kcalloc(hw->max_epid, sizeof(struct ep_share_mem_info),
220 hw->ep_shm_info = (struct ep_share_mem_info *)buf;
222 mem_size = FJES_DEV_REQ_BUF_SIZE(hw->max_epid);
223 hw->hw_info.req_buf = kzalloc(mem_size, GFP_KERNEL);
224 if (!(hw->hw_info.req_buf))
227 hw->hw_info.req_buf_size = mem_size;
229 mem_size = FJES_DEV_RES_BUF_SIZE(hw->max_epid);
230 hw->hw_info.res_buf = kzalloc(mem_size, GFP_KERNEL);
231 if (!(hw->hw_info.res_buf))
234 hw->hw_info.res_buf_size = mem_size;
236 result = fjes_hw_alloc_shared_status_region(hw);
240 hw->hw_info.buffer_share_bit = 0;
241 hw->hw_info.buffer_unshare_reserve_bit = 0;
243 for (epidx = 0; epidx < hw->max_epid; epidx++) {
244 if (epidx != hw->my_epid) {
245 buf_pair = &hw->ep_shm_info[epidx];
247 result = fjes_hw_alloc_epbuf(&buf_pair->tx);
251 result = fjes_hw_alloc_epbuf(&buf_pair->rx);
255 spin_lock_irqsave(&hw->rx_status_lock, flags);
256 fjes_hw_setup_epbuf(&buf_pair->tx, mac,
257 fjes_support_mtu[0]);
258 fjes_hw_setup_epbuf(&buf_pair->rx, mac,
259 fjes_support_mtu[0]);
260 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
264 memset(¶m, 0, sizeof(param));
266 param.req_len = hw->hw_info.req_buf_size;
267 param.req_start = __pa(hw->hw_info.req_buf);
268 param.res_len = hw->hw_info.res_buf_size;
269 param.res_start = __pa(hw->hw_info.res_buf);
271 param.share_start = __pa(hw->hw_info.share->ep_status);
273 fjes_hw_init_command_registers(hw, ¶m);
278 static void fjes_hw_cleanup(struct fjes_hw *hw)
282 if (!hw->ep_shm_info)
285 fjes_hw_free_shared_status_region(hw);
287 kfree(hw->hw_info.req_buf);
288 hw->hw_info.req_buf = NULL;
290 kfree(hw->hw_info.res_buf);
291 hw->hw_info.res_buf = NULL;
293 for (epidx = 0; epidx < hw->max_epid ; epidx++) {
294 if (epidx == hw->my_epid)
296 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].tx);
297 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].rx);
300 kfree(hw->ep_shm_info);
301 hw->ep_shm_info = NULL;
304 int fjes_hw_init(struct fjes_hw *hw)
308 hw->base = fjes_hw_iomap(hw);
312 ret = fjes_hw_reset(hw);
316 fjes_hw_set_irqmask(hw, REG_ICTL_MASK_ALL, true);
318 INIT_WORK(&hw->update_zone_task, fjes_hw_update_zone_task);
319 INIT_WORK(&hw->epstop_task, fjes_hw_epstop_task);
321 mutex_init(&hw->hw_info.lock);
322 spin_lock_init(&hw->rx_status_lock);
324 hw->max_epid = fjes_hw_get_max_epid(hw);
325 hw->my_epid = fjes_hw_get_my_epid(hw);
327 if ((hw->max_epid == 0) || (hw->my_epid >= hw->max_epid))
330 ret = fjes_hw_setup(hw);
332 hw->hw_info.trace = vzalloc(FJES_DEBUG_BUFFER_SIZE);
333 hw->hw_info.trace_size = FJES_DEBUG_BUFFER_SIZE;
338 void fjes_hw_exit(struct fjes_hw *hw)
344 if (hw->debug_mode) {
345 /* disable debug mode */
346 mutex_lock(&hw->hw_info.lock);
347 fjes_hw_stop_debug(hw);
348 mutex_unlock(&hw->hw_info.lock);
350 vfree(hw->hw_info.trace);
351 hw->hw_info.trace = NULL;
352 hw->hw_info.trace_size = 0;
355 ret = fjes_hw_reset(hw);
357 pr_err("%s: reset error", __func__);
365 cancel_work_sync(&hw->update_zone_task);
366 cancel_work_sync(&hw->epstop_task);
369 static enum fjes_dev_command_response_e
370 fjes_hw_issue_request_command(struct fjes_hw *hw,
371 enum fjes_dev_command_request_type type)
373 enum fjes_dev_command_response_e ret = FJES_CMD_STATUS_UNKNOWN;
376 int timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
379 cr.bits.req_start = 1;
380 cr.bits.req_code = type;
381 wr32(XSCT_CR, cr.reg);
382 cr.reg = rd32(XSCT_CR);
384 if (cr.bits.error == 0) {
385 timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
386 cs.reg = rd32(XSCT_CS);
388 while ((cs.bits.complete != 1) && timeout > 0) {
390 cs.reg = rd32(XSCT_CS);
394 if (cs.bits.complete == 1)
395 ret = FJES_CMD_STATUS_NORMAL;
396 else if (timeout <= 0)
397 ret = FJES_CMD_STATUS_TIMEOUT;
400 switch (cr.bits.err_info) {
401 case FJES_CMD_REQ_ERR_INFO_PARAM:
402 ret = FJES_CMD_STATUS_ERROR_PARAM;
404 case FJES_CMD_REQ_ERR_INFO_STATUS:
405 ret = FJES_CMD_STATUS_ERROR_STATUS;
408 ret = FJES_CMD_STATUS_UNKNOWN;
413 trace_fjes_hw_issue_request_command(&cr, &cs, timeout, ret);
418 int fjes_hw_request_info(struct fjes_hw *hw)
420 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
421 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
422 enum fjes_dev_command_response_e ret;
425 memset(req_buf, 0, hw->hw_info.req_buf_size);
426 memset(res_buf, 0, hw->hw_info.res_buf_size);
428 req_buf->info.length = FJES_DEV_COMMAND_INFO_REQ_LEN;
430 res_buf->info.length = 0;
431 res_buf->info.code = 0;
433 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_INFO);
434 trace_fjes_hw_request_info(hw, res_buf);
438 if (FJES_DEV_COMMAND_INFO_RES_LEN((*hw->hw_info.max_epid)) !=
439 res_buf->info.length) {
440 trace_fjes_hw_request_info_err("Invalid res_buf");
442 } else if (ret == FJES_CMD_STATUS_NORMAL) {
443 switch (res_buf->info.code) {
444 case FJES_CMD_REQ_RES_CODE_NORMAL:
453 case FJES_CMD_STATUS_UNKNOWN:
456 case FJES_CMD_STATUS_TIMEOUT:
457 trace_fjes_hw_request_info_err("Timeout");
460 case FJES_CMD_STATUS_ERROR_PARAM:
463 case FJES_CMD_STATUS_ERROR_STATUS:
475 int fjes_hw_register_buff_addr(struct fjes_hw *hw, int dest_epid,
476 struct ep_share_mem_info *buf_pair)
478 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
479 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
480 enum fjes_dev_command_response_e ret;
487 if (test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
490 memset(req_buf, 0, hw->hw_info.req_buf_size);
491 memset(res_buf, 0, hw->hw_info.res_buf_size);
493 req_buf->share_buffer.length = FJES_DEV_COMMAND_SHARE_BUFFER_REQ_LEN(
496 req_buf->share_buffer.epid = dest_epid;
499 req_buf->share_buffer.buffer[idx++] = buf_pair->tx.size;
500 page_count = buf_pair->tx.size / EP_BUFFER_INFO_SIZE;
501 for (i = 0; i < page_count; i++) {
502 addr = ((u8 *)(buf_pair->tx.buffer)) +
503 (i * EP_BUFFER_INFO_SIZE);
504 req_buf->share_buffer.buffer[idx++] =
505 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
506 offset_in_page(addr));
509 req_buf->share_buffer.buffer[idx++] = buf_pair->rx.size;
510 page_count = buf_pair->rx.size / EP_BUFFER_INFO_SIZE;
511 for (i = 0; i < page_count; i++) {
512 addr = ((u8 *)(buf_pair->rx.buffer)) +
513 (i * EP_BUFFER_INFO_SIZE);
514 req_buf->share_buffer.buffer[idx++] =
515 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
516 offset_in_page(addr));
519 res_buf->share_buffer.length = 0;
520 res_buf->share_buffer.code = 0;
522 trace_fjes_hw_register_buff_addr_req(req_buf, buf_pair);
524 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_SHARE_BUFFER);
526 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
527 while ((ret == FJES_CMD_STATUS_NORMAL) &&
528 (res_buf->share_buffer.length ==
529 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) &&
530 (res_buf->share_buffer.code == FJES_CMD_REQ_RES_CODE_BUSY) &&
532 msleep(200 + hw->my_epid * 20);
533 timeout -= (200 + hw->my_epid * 20);
535 res_buf->share_buffer.length = 0;
536 res_buf->share_buffer.code = 0;
538 ret = fjes_hw_issue_request_command(
539 hw, FJES_CMD_REQ_SHARE_BUFFER);
544 trace_fjes_hw_register_buff_addr(res_buf, timeout);
546 if (res_buf->share_buffer.length !=
547 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) {
548 trace_fjes_hw_register_buff_addr_err("Invalid res_buf");
550 } else if (ret == FJES_CMD_STATUS_NORMAL) {
551 switch (res_buf->share_buffer.code) {
552 case FJES_CMD_REQ_RES_CODE_NORMAL:
554 set_bit(dest_epid, &hw->hw_info.buffer_share_bit);
556 case FJES_CMD_REQ_RES_CODE_BUSY:
557 trace_fjes_hw_register_buff_addr_err("Busy Timeout");
566 case FJES_CMD_STATUS_UNKNOWN:
569 case FJES_CMD_STATUS_TIMEOUT:
570 trace_fjes_hw_register_buff_addr_err("Timeout");
573 case FJES_CMD_STATUS_ERROR_PARAM:
574 case FJES_CMD_STATUS_ERROR_STATUS:
584 int fjes_hw_unregister_buff_addr(struct fjes_hw *hw, int dest_epid)
586 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
587 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
588 struct fjes_device_shared_info *share = hw->hw_info.share;
589 enum fjes_dev_command_response_e ret;
596 if (!req_buf || !res_buf || !share)
599 if (!test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
602 memset(req_buf, 0, hw->hw_info.req_buf_size);
603 memset(res_buf, 0, hw->hw_info.res_buf_size);
605 req_buf->unshare_buffer.length =
606 FJES_DEV_COMMAND_UNSHARE_BUFFER_REQ_LEN;
607 req_buf->unshare_buffer.epid = dest_epid;
609 res_buf->unshare_buffer.length = 0;
610 res_buf->unshare_buffer.code = 0;
612 trace_fjes_hw_unregister_buff_addr_req(req_buf);
613 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
615 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
616 while ((ret == FJES_CMD_STATUS_NORMAL) &&
617 (res_buf->unshare_buffer.length ==
618 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) &&
619 (res_buf->unshare_buffer.code ==
620 FJES_CMD_REQ_RES_CODE_BUSY) &&
622 msleep(200 + hw->my_epid * 20);
623 timeout -= (200 + hw->my_epid * 20);
625 res_buf->unshare_buffer.length = 0;
626 res_buf->unshare_buffer.code = 0;
629 fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
634 trace_fjes_hw_unregister_buff_addr(res_buf, timeout);
636 if (res_buf->unshare_buffer.length !=
637 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) {
638 trace_fjes_hw_unregister_buff_addr_err("Invalid res_buf");
640 } else if (ret == FJES_CMD_STATUS_NORMAL) {
641 switch (res_buf->unshare_buffer.code) {
642 case FJES_CMD_REQ_RES_CODE_NORMAL:
644 clear_bit(dest_epid, &hw->hw_info.buffer_share_bit);
646 case FJES_CMD_REQ_RES_CODE_BUSY:
647 trace_fjes_hw_unregister_buff_addr_err("Busy Timeout");
656 case FJES_CMD_STATUS_UNKNOWN:
659 case FJES_CMD_STATUS_TIMEOUT:
660 trace_fjes_hw_unregister_buff_addr_err("Timeout");
663 case FJES_CMD_STATUS_ERROR_PARAM:
664 case FJES_CMD_STATUS_ERROR_STATUS:
674 int fjes_hw_raise_interrupt(struct fjes_hw *hw, int dest_epid,
675 enum REG_ICTL_MASK mask)
677 u32 ig = mask | dest_epid;
679 wr32(XSCT_IG, cpu_to_le32(ig));
684 u32 fjes_hw_capture_interrupt_status(struct fjes_hw *hw)
688 cur_is = rd32(XSCT_IS);
693 void fjes_hw_set_irqmask(struct fjes_hw *hw,
694 enum REG_ICTL_MASK intr_mask, bool mask)
697 wr32(XSCT_IMS, intr_mask);
699 wr32(XSCT_IMC, intr_mask);
702 bool fjes_hw_epid_is_same_zone(struct fjes_hw *hw, int epid)
704 if (epid >= hw->max_epid)
707 if ((hw->ep_shm_info[epid].es_status !=
708 FJES_ZONING_STATUS_ENABLE) ||
709 (hw->ep_shm_info[hw->my_epid].zone ==
710 FJES_ZONING_ZONE_TYPE_NONE))
713 return (hw->ep_shm_info[epid].zone ==
714 hw->ep_shm_info[hw->my_epid].zone);
717 int fjes_hw_epid_is_shared(struct fjes_device_shared_info *share,
722 if (dest_epid < share->epnum)
723 value = share->ep_status[dest_epid];
728 static bool fjes_hw_epid_is_stop_requested(struct fjes_hw *hw, int src_epid)
730 return test_bit(src_epid, &hw->txrx_stop_req_bit);
733 static bool fjes_hw_epid_is_stop_process_done(struct fjes_hw *hw, int src_epid)
735 return (hw->ep_shm_info[src_epid].tx.info->v1i.rx_status &
736 FJES_RX_STOP_REQ_DONE);
739 enum ep_partner_status
740 fjes_hw_get_partner_ep_status(struct fjes_hw *hw, int epid)
742 enum ep_partner_status status;
744 if (fjes_hw_epid_is_shared(hw->hw_info.share, epid)) {
745 if (fjes_hw_epid_is_stop_requested(hw, epid)) {
746 status = EP_PARTNER_WAITING;
748 if (fjes_hw_epid_is_stop_process_done(hw, epid))
749 status = EP_PARTNER_COMPLETE;
751 status = EP_PARTNER_SHARED;
754 status = EP_PARTNER_UNSHARE;
760 void fjes_hw_raise_epstop(struct fjes_hw *hw)
762 enum ep_partner_status status;
766 for (epidx = 0; epidx < hw->max_epid; epidx++) {
767 if (epidx == hw->my_epid)
770 status = fjes_hw_get_partner_ep_status(hw, epidx);
772 case EP_PARTNER_SHARED:
773 fjes_hw_raise_interrupt(hw, epidx,
774 REG_ICTL_MASK_TXRX_STOP_REQ);
775 hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
781 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
782 set_bit(epidx, &hw->txrx_stop_req_bit);
784 spin_lock_irqsave(&hw->rx_status_lock, flags);
785 hw->ep_shm_info[epidx].tx.info->v1i.rx_status |=
786 FJES_RX_STOP_REQ_REQUEST;
787 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
791 int fjes_hw_wait_epstop(struct fjes_hw *hw)
793 enum ep_partner_status status;
794 union ep_buffer_info *info;
798 while (hw->hw_info.buffer_unshare_reserve_bit &&
799 (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)) {
800 for (epidx = 0; epidx < hw->max_epid; epidx++) {
801 if (epidx == hw->my_epid)
803 status = fjes_hw_epid_is_shared(hw->hw_info.share,
805 info = hw->ep_shm_info[epidx].rx.info;
807 (info->v1i.rx_status &
808 FJES_RX_STOP_REQ_DONE)) &&
810 &hw->hw_info.buffer_unshare_reserve_bit)) {
812 &hw->hw_info.buffer_unshare_reserve_bit);
820 for (epidx = 0; epidx < hw->max_epid; epidx++) {
821 if (epidx == hw->my_epid)
823 if (test_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit))
825 &hw->hw_info.buffer_unshare_reserve_bit);
828 return (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)
832 bool fjes_hw_check_epbuf_version(struct epbuf_handler *epbh, u32 version)
834 union ep_buffer_info *info = epbh->info;
836 return (info->common.version == version);
839 bool fjes_hw_check_mtu(struct epbuf_handler *epbh, u32 mtu)
841 union ep_buffer_info *info = epbh->info;
843 return ((info->v1i.frame_max == FJES_MTU_TO_FRAME_SIZE(mtu)) &&
844 info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE);
847 bool fjes_hw_check_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
849 union ep_buffer_info *info = epbh->info;
856 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
857 if (vlan_id == info->v1i.vlan_id[i]) {
866 bool fjes_hw_set_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
868 union ep_buffer_info *info = epbh->info;
871 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
872 if (info->v1i.vlan_id[i] == 0) {
873 info->v1i.vlan_id[i] = vlan_id;
880 void fjes_hw_del_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
882 union ep_buffer_info *info = epbh->info;
886 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
887 if (vlan_id == info->v1i.vlan_id[i])
888 info->v1i.vlan_id[i] = 0;
893 bool fjes_hw_epbuf_rx_is_empty(struct epbuf_handler *epbh)
895 union ep_buffer_info *info = epbh->info;
897 if (!(info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE))
900 if (info->v1i.count_max == 0)
903 return EP_RING_EMPTY(info->v1i.head, info->v1i.tail,
904 info->v1i.count_max);
907 void *fjes_hw_epbuf_rx_curpkt_get_addr(struct epbuf_handler *epbh,
910 union ep_buffer_info *info = epbh->info;
911 struct esmem_frame *ring_frame;
914 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
916 info->v1i.count_max) *
917 info->v1i.frame_max]);
919 *psize = (size_t)ring_frame->frame_size;
921 frame = ring_frame->frame_data;
926 void fjes_hw_epbuf_rx_curpkt_drop(struct epbuf_handler *epbh)
928 union ep_buffer_info *info = epbh->info;
930 if (fjes_hw_epbuf_rx_is_empty(epbh))
933 EP_RING_INDEX_INC(epbh->info->v1i.head, info->v1i.count_max);
936 int fjes_hw_epbuf_tx_pkt_send(struct epbuf_handler *epbh,
937 void *frame, size_t size)
939 union ep_buffer_info *info = epbh->info;
940 struct esmem_frame *ring_frame;
942 if (EP_RING_FULL(info->v1i.head, info->v1i.tail, info->v1i.count_max))
945 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
947 info->v1i.count_max) *
948 info->v1i.frame_max]);
950 ring_frame->frame_size = size;
951 memcpy((void *)(ring_frame->frame_data), (void *)frame, size);
953 EP_RING_INDEX_INC(epbh->info->v1i.tail, info->v1i.count_max);
958 static void fjes_hw_update_zone_task(struct work_struct *work)
960 struct fjes_hw *hw = container_of(work,
961 struct fjes_hw, update_zone_task);
963 struct my_s {u8 es_status; u8 zone; } *info;
964 union fjes_device_command_res *res_buf;
965 enum ep_partner_status pstatus;
967 struct fjes_adapter *adapter;
968 struct net_device *netdev;
971 ulong unshare_bit = 0;
978 adapter = (struct fjes_adapter *)hw->back;
979 netdev = adapter->netdev;
980 res_buf = hw->hw_info.res_buf;
981 info = (struct my_s *)&res_buf->info.info;
983 mutex_lock(&hw->hw_info.lock);
985 ret = fjes_hw_request_info(hw);
990 if (!work_pending(&adapter->force_close_task)) {
991 adapter->force_reset = true;
992 schedule_work(&adapter->force_close_task);
998 for (epidx = 0; epidx < hw->max_epid; epidx++) {
999 if (epidx == hw->my_epid) {
1000 hw->ep_shm_info[epidx].es_status =
1001 info[epidx].es_status;
1002 hw->ep_shm_info[epidx].zone =
1007 pstatus = fjes_hw_get_partner_ep_status(hw, epidx);
1009 case EP_PARTNER_UNSHARE:
1011 if ((info[epidx].zone !=
1012 FJES_ZONING_ZONE_TYPE_NONE) &&
1013 (info[epidx].es_status ==
1014 FJES_ZONING_STATUS_ENABLE) &&
1015 (info[epidx].zone ==
1016 info[hw->my_epid].zone))
1017 set_bit(epidx, &share_bit);
1019 set_bit(epidx, &unshare_bit);
1022 case EP_PARTNER_COMPLETE:
1023 case EP_PARTNER_WAITING:
1024 if ((info[epidx].zone ==
1025 FJES_ZONING_ZONE_TYPE_NONE) ||
1026 (info[epidx].es_status !=
1027 FJES_ZONING_STATUS_ENABLE) ||
1028 (info[epidx].zone !=
1029 info[hw->my_epid].zone)) {
1031 &adapter->unshare_watch_bitmask);
1033 &hw->hw_info.buffer_unshare_reserve_bit);
1037 case EP_PARTNER_SHARED:
1038 if ((info[epidx].zone ==
1039 FJES_ZONING_ZONE_TYPE_NONE) ||
1040 (info[epidx].es_status !=
1041 FJES_ZONING_STATUS_ENABLE) ||
1042 (info[epidx].zone !=
1043 info[hw->my_epid].zone))
1044 set_bit(epidx, &irq_bit);
1048 hw->ep_shm_info[epidx].es_status =
1049 info[epidx].es_status;
1050 hw->ep_shm_info[epidx].zone = info[epidx].zone;
1055 mutex_unlock(&hw->hw_info.lock);
1057 for (epidx = 0; epidx < hw->max_epid; epidx++) {
1058 if (epidx == hw->my_epid)
1061 if (test_bit(epidx, &share_bit)) {
1062 spin_lock_irqsave(&hw->rx_status_lock, flags);
1063 fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
1064 netdev->dev_addr, netdev->mtu);
1065 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1067 mutex_lock(&hw->hw_info.lock);
1069 ret = fjes_hw_register_buff_addr(
1070 hw, epidx, &hw->ep_shm_info[epidx]);
1078 if (!work_pending(&adapter->force_close_task)) {
1079 adapter->force_reset = true;
1081 &adapter->force_close_task);
1085 mutex_unlock(&hw->hw_info.lock);
1087 hw->ep_shm_info[epidx].ep_stats
1088 .com_regist_buf_exec += 1;
1091 if (test_bit(epidx, &unshare_bit)) {
1092 mutex_lock(&hw->hw_info.lock);
1094 ret = fjes_hw_unregister_buff_addr(hw, epidx);
1102 if (!work_pending(&adapter->force_close_task)) {
1103 adapter->force_reset = true;
1105 &adapter->force_close_task);
1110 mutex_unlock(&hw->hw_info.lock);
1112 hw->ep_shm_info[epidx].ep_stats
1113 .com_unregist_buf_exec += 1;
1116 spin_lock_irqsave(&hw->rx_status_lock, flags);
1117 fjes_hw_setup_epbuf(
1118 &hw->ep_shm_info[epidx].tx,
1119 netdev->dev_addr, netdev->mtu);
1120 spin_unlock_irqrestore(&hw->rx_status_lock,
1125 if (test_bit(epidx, &irq_bit)) {
1126 fjes_hw_raise_interrupt(hw, epidx,
1127 REG_ICTL_MASK_TXRX_STOP_REQ);
1129 hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
1131 set_bit(epidx, &hw->txrx_stop_req_bit);
1132 spin_lock_irqsave(&hw->rx_status_lock, flags);
1133 hw->ep_shm_info[epidx].tx.
1134 info->v1i.rx_status |=
1135 FJES_RX_STOP_REQ_REQUEST;
1136 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1137 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
1141 if (irq_bit || adapter->unshare_watch_bitmask) {
1142 if (!work_pending(&adapter->unshare_watch_task))
1143 queue_work(adapter->control_wq,
1144 &adapter->unshare_watch_task);
1148 static void fjes_hw_epstop_task(struct work_struct *work)
1150 struct fjes_hw *hw = container_of(work, struct fjes_hw, epstop_task);
1151 struct fjes_adapter *adapter = (struct fjes_adapter *)hw->back;
1152 unsigned long flags;
1157 while ((remain_bit = hw->epstop_req_bit)) {
1158 for (epid_bit = 0; remain_bit; remain_bit >>= 1, epid_bit++) {
1159 if (remain_bit & 1) {
1160 spin_lock_irqsave(&hw->rx_status_lock, flags);
1161 hw->ep_shm_info[epid_bit].
1162 tx.info->v1i.rx_status |=
1163 FJES_RX_STOP_REQ_DONE;
1164 spin_unlock_irqrestore(&hw->rx_status_lock,
1167 clear_bit(epid_bit, &hw->epstop_req_bit);
1169 &adapter->unshare_watch_bitmask);
1171 if (!work_pending(&adapter->unshare_watch_task))
1173 adapter->control_wq,
1174 &adapter->unshare_watch_task);
1180 int fjes_hw_start_debug(struct fjes_hw *hw)
1182 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
1183 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
1184 enum fjes_dev_command_response_e ret;
1190 if (!hw->hw_info.trace)
1192 memset(hw->hw_info.trace, 0, FJES_DEBUG_BUFFER_SIZE);
1194 memset(req_buf, 0, hw->hw_info.req_buf_size);
1195 memset(res_buf, 0, hw->hw_info.res_buf_size);
1197 req_buf->start_trace.length =
1198 FJES_DEV_COMMAND_START_DBG_REQ_LEN(hw->hw_info.trace_size);
1199 req_buf->start_trace.mode = hw->debug_mode;
1200 req_buf->start_trace.buffer_len = hw->hw_info.trace_size;
1201 page_count = hw->hw_info.trace_size / FJES_DEBUG_PAGE_SIZE;
1202 for (i = 0; i < page_count; i++) {
1203 addr = ((u8 *)hw->hw_info.trace) + i * FJES_DEBUG_PAGE_SIZE;
1204 req_buf->start_trace.buffer[i] =
1205 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
1206 offset_in_page(addr));
1209 res_buf->start_trace.length = 0;
1210 res_buf->start_trace.code = 0;
1212 trace_fjes_hw_start_debug_req(req_buf);
1213 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_START_DEBUG);
1214 trace_fjes_hw_start_debug(res_buf);
1216 if (res_buf->start_trace.length !=
1217 FJES_DEV_COMMAND_START_DBG_RES_LEN) {
1219 trace_fjes_hw_start_debug_err("Invalid res_buf");
1220 } else if (ret == FJES_CMD_STATUS_NORMAL) {
1221 switch (res_buf->start_trace.code) {
1222 case FJES_CMD_REQ_RES_CODE_NORMAL:
1231 case FJES_CMD_STATUS_UNKNOWN:
1234 case FJES_CMD_STATUS_TIMEOUT:
1235 trace_fjes_hw_start_debug_err("Busy Timeout");
1238 case FJES_CMD_STATUS_ERROR_PARAM:
1239 case FJES_CMD_STATUS_ERROR_STATUS:
1249 int fjes_hw_stop_debug(struct fjes_hw *hw)
1251 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
1252 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
1253 enum fjes_dev_command_response_e ret;
1256 if (!hw->hw_info.trace)
1259 memset(req_buf, 0, hw->hw_info.req_buf_size);
1260 memset(res_buf, 0, hw->hw_info.res_buf_size);
1261 req_buf->stop_trace.length = FJES_DEV_COMMAND_STOP_DBG_REQ_LEN;
1263 res_buf->stop_trace.length = 0;
1264 res_buf->stop_trace.code = 0;
1266 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_STOP_DEBUG);
1267 trace_fjes_hw_stop_debug(res_buf);
1269 if (res_buf->stop_trace.length != FJES_DEV_COMMAND_STOP_DBG_RES_LEN) {
1270 trace_fjes_hw_stop_debug_err("Invalid res_buf");
1272 } else if (ret == FJES_CMD_STATUS_NORMAL) {
1273 switch (res_buf->stop_trace.code) {
1274 case FJES_CMD_REQ_RES_CODE_NORMAL:
1284 case FJES_CMD_STATUS_UNKNOWN:
1287 case FJES_CMD_STATUS_TIMEOUT:
1289 trace_fjes_hw_stop_debug_err("Busy Timeout");
1291 case FJES_CMD_STATUS_ERROR_PARAM:
1292 case FJES_CMD_STATUS_ERROR_STATUS: