1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock using the IXP46X
5 * Copyright (C) 2010 OMICRON electronics GmbH
7 #include <linux/device.h>
9 #include <linux/gpio.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/kernel.h>
15 #include <linux/ptp_clock_kernel.h>
16 #include <linux/soc/ixp4xx/cpu.h>
17 #include <linux/module.h>
18 #include <mach/ixp4xx-regs.h>
20 #include "ixp46x_ts.h"
22 #define DRIVER "ptp_ixp46x"
30 struct ixp46x_ts_regs *regs;
31 struct ptp_clock *ptp_clock;
32 struct ptp_clock_info caps;
37 DEFINE_SPINLOCK(register_lock);
40 * Register access functions
43 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs)
48 lo = __raw_readl(®s->systime_lo);
49 hi = __raw_readl(®s->systime_hi);
51 ns = ((u64) hi) << 32;
53 ns <<= TICKS_NS_SHIFT;
58 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns)
62 ns >>= TICKS_NS_SHIFT;
66 __raw_writel(lo, ®s->systime_lo);
67 __raw_writel(hi, ®s->systime_hi);
71 * Interrupt service routine
74 static irqreturn_t isr(int irq, void *priv)
76 struct ixp_clock *ixp_clock = priv;
77 struct ixp46x_ts_regs *regs = ixp_clock->regs;
78 struct ptp_clock_event event;
79 u32 ack = 0, lo, hi, val;
81 val = __raw_readl(®s->event);
85 if (ixp_clock->exts0_enabled) {
86 hi = __raw_readl(®s->asms_hi);
87 lo = __raw_readl(®s->asms_lo);
88 event.type = PTP_CLOCK_EXTTS;
90 event.timestamp = ((u64) hi) << 32;
91 event.timestamp |= lo;
92 event.timestamp <<= TICKS_NS_SHIFT;
93 ptp_clock_event(ixp_clock->ptp_clock, &event);
99 if (ixp_clock->exts1_enabled) {
100 hi = __raw_readl(®s->amms_hi);
101 lo = __raw_readl(®s->amms_lo);
102 event.type = PTP_CLOCK_EXTTS;
104 event.timestamp = ((u64) hi) << 32;
105 event.timestamp |= lo;
106 event.timestamp <<= TICKS_NS_SHIFT;
107 ptp_clock_event(ixp_clock->ptp_clock, &event);
112 ack |= TTIPEND; /* this bit seems to be always set */
115 __raw_writel(ack, ®s->event);
122 * PTP clock operations
125 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
130 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
131 struct ixp46x_ts_regs *regs = ixp_clock->regs;
137 addend = DEFAULT_ADDEND;
140 diff = div_u64(adj, 1000000000ULL);
142 addend = neg_adj ? addend - diff : addend + diff;
144 __raw_writel(addend, ®s->addend);
149 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta)
153 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
154 struct ixp46x_ts_regs *regs = ixp_clock->regs;
156 spin_lock_irqsave(®ister_lock, flags);
158 now = ixp_systime_read(regs);
160 ixp_systime_write(regs, now);
162 spin_unlock_irqrestore(®ister_lock, flags);
167 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
171 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
172 struct ixp46x_ts_regs *regs = ixp_clock->regs;
174 spin_lock_irqsave(®ister_lock, flags);
176 ns = ixp_systime_read(regs);
178 spin_unlock_irqrestore(®ister_lock, flags);
180 *ts = ns_to_timespec64(ns);
184 static int ptp_ixp_settime(struct ptp_clock_info *ptp,
185 const struct timespec64 *ts)
189 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
190 struct ixp46x_ts_regs *regs = ixp_clock->regs;
192 ns = timespec64_to_ns(ts);
194 spin_lock_irqsave(®ister_lock, flags);
196 ixp_systime_write(regs, ns);
198 spin_unlock_irqrestore(®ister_lock, flags);
203 static int ptp_ixp_enable(struct ptp_clock_info *ptp,
204 struct ptp_clock_request *rq, int on)
206 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
209 case PTP_CLK_REQ_EXTTS:
210 switch (rq->extts.index) {
212 ixp_clock->exts0_enabled = on ? 1 : 0;
215 ixp_clock->exts1_enabled = on ? 1 : 0;
228 static const struct ptp_clock_info ptp_ixp_caps = {
229 .owner = THIS_MODULE,
230 .name = "IXP46X timer",
232 .n_ext_ts = N_EXT_TS,
235 .adjfreq = ptp_ixp_adjfreq,
236 .adjtime = ptp_ixp_adjtime,
237 .gettime64 = ptp_ixp_gettime,
238 .settime64 = ptp_ixp_settime,
239 .enable = ptp_ixp_enable,
242 /* module operations */
244 static struct ixp_clock ixp_clock;
246 static int setup_interrupt(int gpio)
251 err = gpio_request(gpio, "ixp4-ptp");
255 err = gpio_direction_input(gpio);
259 irq = gpio_to_irq(gpio);
263 err = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
265 pr_err("cannot set trigger type for irq %d\n", irq);
269 err = request_irq(irq, isr, 0, DRIVER, &ixp_clock);
271 pr_err("request_irq failed for irq %d\n", irq);
278 static void __exit ptp_ixp_exit(void)
280 free_irq(MASTER_IRQ, &ixp_clock);
281 free_irq(SLAVE_IRQ, &ixp_clock);
282 ixp46x_phc_index = -1;
283 ptp_clock_unregister(ixp_clock.ptp_clock);
286 static int __init ptp_ixp_init(void)
288 if (!cpu_is_ixp46x())
292 (struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
294 ixp_clock.caps = ptp_ixp_caps;
296 ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL);
298 if (IS_ERR(ixp_clock.ptp_clock))
299 return PTR_ERR(ixp_clock.ptp_clock);
301 ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock);
303 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
304 __raw_writel(1, &ixp_clock.regs->trgt_lo);
305 __raw_writel(0, &ixp_clock.regs->trgt_hi);
306 __raw_writel(TTIPEND, &ixp_clock.regs->event);
308 if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) {
309 pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO);
312 if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) {
313 pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO);
319 free_irq(MASTER_IRQ, &ixp_clock);
321 ptp_clock_unregister(ixp_clock.ptp_clock);
325 module_init(ptp_ixp_init);
326 module_exit(ptp_ixp_exit);
328 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
329 MODULE_DESCRIPTION("PTP clock using the IXP46X timer");
330 MODULE_LICENSE("GPL");