2 * DaVinci MDIO Module driver
4 * Copyright (C) 2010 Texas Instruments.
6 * Shamelessly ripped out of davinci_emac.c, original copyrights follow:
8 * Copyright (C) 2009 Texas Instruments.
10 * ---------------------------------------------------------------------------
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * ---------------------------------------------------------------------------
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/platform_device.h>
30 #include <linux/delay.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <linux/phy.h>
34 #include <linux/clk.h>
35 #include <linux/err.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/davinci_emac.h>
40 #include <linux/of_device.h>
41 #include <linux/of_mdio.h>
42 #include <linux/pinctrl/consumer.h>
45 * This timeout definition is a worst-case ultra defensive measure against
46 * unexpected controller lock ups. Ideally, we should never ever hit this
47 * scenario in practice.
49 #define MDIO_TIMEOUT 100 /* msecs */
51 #define PHY_REG_MASK 0x1f
52 #define PHY_ID_MASK 0x1f
54 #define DEF_OUT_FREQ 2200000 /* 2.2 MHz */
56 struct davinci_mdio_regs {
59 #define CONTROL_IDLE BIT(31)
60 #define CONTROL_ENABLE BIT(30)
61 #define CONTROL_MAX_DIV (0xffff)
76 #define USERACCESS_GO BIT(31)
77 #define USERACCESS_WRITE BIT(30)
78 #define USERACCESS_ACK BIT(29)
79 #define USERACCESS_READ (0)
80 #define USERACCESS_DATA (0xffff)
86 static const struct mdio_platform_data default_pdata = {
87 .bus_freq = DEF_OUT_FREQ,
90 struct davinci_mdio_data {
91 struct mdio_platform_data pdata;
92 struct davinci_mdio_regs __iomem *regs;
96 bool active_in_suspend;
97 unsigned long access_time; /* jiffies */
98 /* Indicates that driver shouldn't modify phy_mask in case
99 * if MDIO bus is registered from DT.
105 static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
107 u32 mdio_in, div, mdio_out_khz, access_time;
109 mdio_in = clk_get_rate(data->clk);
110 div = (mdio_in / data->pdata.bus_freq) - 1;
111 if (div > CONTROL_MAX_DIV)
112 div = CONTROL_MAX_DIV;
116 * One mdio transaction consists of:
117 * 32 bits of preamble
118 * 32 bits of transferred data
119 * 24 bits of bus yield (not needed unless shared?)
121 mdio_out_khz = mdio_in / (1000 * (div + 1));
122 access_time = (88 * 1000) / mdio_out_khz;
125 * In the worst case, we could be kicking off a user-access immediately
126 * after the mdio bus scan state-machine triggered its own read. If
127 * so, our request could get deferred by one access cycle. We
128 * defensively allow for 4 access cycles.
130 data->access_time = usecs_to_jiffies(access_time * 4);
131 if (!data->access_time)
132 data->access_time = 1;
135 static void davinci_mdio_enable(struct davinci_mdio_data *data)
137 /* set enable and clock divider */
138 __raw_writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
141 static int davinci_mdio_reset(struct mii_bus *bus)
143 struct davinci_mdio_data *data = bus->priv;
147 ret = pm_runtime_get_sync(data->dev);
149 pm_runtime_put_noidle(data->dev);
153 /* wait for scan logic to settle */
154 msleep(PHY_MAX_ADDR * data->access_time);
156 /* dump hardware version info */
157 ver = __raw_readl(&data->regs->version);
158 dev_info(data->dev, "davinci mdio revision %d.%d\n",
159 (ver >> 8) & 0xff, ver & 0xff);
164 /* get phy mask from the alive register */
165 phy_mask = __raw_readl(&data->regs->alive);
167 /* restrict mdio bus to live phys only */
168 dev_info(data->dev, "detected phy mask %x\n", ~phy_mask);
169 phy_mask = ~phy_mask;
171 /* desperately scan all phys */
172 dev_warn(data->dev, "no live phy, scanning all\n");
175 data->bus->phy_mask = phy_mask;
178 pm_runtime_mark_last_busy(data->dev);
179 pm_runtime_put_autosuspend(data->dev);
184 /* wait until hardware is ready for another user access */
185 static inline int wait_for_user_access(struct davinci_mdio_data *data)
187 struct davinci_mdio_regs __iomem *regs = data->regs;
188 unsigned long timeout = jiffies + msecs_to_jiffies(MDIO_TIMEOUT);
191 while (time_after(timeout, jiffies)) {
192 reg = __raw_readl(®s->user[0].access);
193 if ((reg & USERACCESS_GO) == 0)
196 reg = __raw_readl(®s->control);
197 if ((reg & CONTROL_IDLE) == 0)
201 * An emac soft_reset may have clobbered the mdio controller's
202 * state machine. We need to reset and retry the current
205 dev_warn(data->dev, "resetting idled controller\n");
206 davinci_mdio_enable(data);
210 reg = __raw_readl(®s->user[0].access);
211 if ((reg & USERACCESS_GO) == 0)
214 dev_err(data->dev, "timed out waiting for user access\n");
218 /* wait until hardware state machine is idle */
219 static inline int wait_for_idle(struct davinci_mdio_data *data)
221 struct davinci_mdio_regs __iomem *regs = data->regs;
222 unsigned long timeout = jiffies + msecs_to_jiffies(MDIO_TIMEOUT);
224 while (time_after(timeout, jiffies)) {
225 if (__raw_readl(®s->control) & CONTROL_IDLE)
228 dev_err(data->dev, "timed out waiting for idle\n");
232 static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)
234 struct davinci_mdio_data *data = bus->priv;
238 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
241 ret = pm_runtime_get_sync(data->dev);
243 pm_runtime_put_noidle(data->dev);
247 reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) |
251 ret = wait_for_user_access(data);
257 __raw_writel(reg, &data->regs->user[0].access);
259 ret = wait_for_user_access(data);
265 reg = __raw_readl(&data->regs->user[0].access);
266 ret = (reg & USERACCESS_ACK) ? (reg & USERACCESS_DATA) : -EIO;
270 pm_runtime_mark_last_busy(data->dev);
271 pm_runtime_put_autosuspend(data->dev);
275 static int davinci_mdio_write(struct mii_bus *bus, int phy_id,
276 int phy_reg, u16 phy_data)
278 struct davinci_mdio_data *data = bus->priv;
282 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
285 ret = pm_runtime_get_sync(data->dev);
287 pm_runtime_put_noidle(data->dev);
291 reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) |
292 (phy_id << 16) | (phy_data & USERACCESS_DATA));
295 ret = wait_for_user_access(data);
301 __raw_writel(reg, &data->regs->user[0].access);
303 ret = wait_for_user_access(data);
309 pm_runtime_mark_last_busy(data->dev);
310 pm_runtime_put_autosuspend(data->dev);
315 #if IS_ENABLED(CONFIG_OF)
316 static int davinci_mdio_probe_dt(struct mdio_platform_data *data,
317 struct platform_device *pdev)
319 struct device_node *node = pdev->dev.of_node;
325 if (of_property_read_u32(node, "bus_freq", &prop)) {
326 dev_err(&pdev->dev, "Missing bus_freq property in the DT.\n");
329 data->bus_freq = prop;
335 static int davinci_mdio_probe(struct platform_device *pdev)
337 struct mdio_platform_data *pdata = dev_get_platdata(&pdev->dev);
338 struct device *dev = &pdev->dev;
339 struct davinci_mdio_data *data;
340 struct resource *res;
341 struct phy_device *phy;
344 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
348 data->bus = devm_mdiobus_alloc(dev);
350 dev_err(dev, "failed to alloc mii bus\n");
355 if (davinci_mdio_probe_dt(&data->pdata, pdev))
356 data->pdata = default_pdata;
357 snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
359 data->pdata = pdata ? (*pdata) : default_pdata;
360 snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s-%x",
361 pdev->name, pdev->id);
364 data->bus->name = dev_name(dev);
365 data->bus->read = davinci_mdio_read,
366 data->bus->write = davinci_mdio_write,
367 data->bus->reset = davinci_mdio_reset,
368 data->bus->parent = dev;
369 data->bus->priv = data;
371 data->clk = devm_clk_get(dev, "fck");
372 if (IS_ERR(data->clk)) {
373 dev_err(dev, "failed to get device clock\n");
374 return PTR_ERR(data->clk);
377 dev_set_drvdata(dev, data);
380 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
381 data->regs = devm_ioremap_resource(dev, res);
382 if (IS_ERR(data->regs))
383 return PTR_ERR(data->regs);
385 davinci_mdio_init_clk(data);
387 pm_runtime_set_autosuspend_delay(&pdev->dev, -1);
388 pm_runtime_use_autosuspend(&pdev->dev);
389 pm_runtime_enable(&pdev->dev);
391 /* register the mii bus
392 * Create PHYs from DT only in case if PHY child nodes are explicitly
393 * defined to support backward compatibility with DTs which assume that
394 * Davinci MDIO will always scan the bus for PHYs detection.
396 if (dev->of_node && of_get_child_count(dev->of_node)) {
397 data->skip_scan = true;
398 ret = of_mdiobus_register(data->bus, dev->of_node);
400 ret = mdiobus_register(data->bus);
405 /* scan and dump the bus */
406 for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
407 phy = mdiobus_get_phy(data->bus, addr);
409 dev_info(dev, "phy[%d]: device %s, driver %s\n",
410 phy->mdio.addr, phydev_name(phy),
411 phy->drv ? phy->drv->name : "unknown");
418 pm_runtime_dont_use_autosuspend(&pdev->dev);
419 pm_runtime_disable(&pdev->dev);
423 static int davinci_mdio_remove(struct platform_device *pdev)
425 struct davinci_mdio_data *data = platform_get_drvdata(pdev);
428 mdiobus_unregister(data->bus);
430 pm_runtime_dont_use_autosuspend(&pdev->dev);
431 pm_runtime_disable(&pdev->dev);
437 static int davinci_mdio_runtime_suspend(struct device *dev)
439 struct davinci_mdio_data *data = dev_get_drvdata(dev);
442 /* shutdown the scan state machine */
443 ctrl = __raw_readl(&data->regs->control);
444 ctrl &= ~CONTROL_ENABLE;
445 __raw_writel(ctrl, &data->regs->control);
451 static int davinci_mdio_runtime_resume(struct device *dev)
453 struct davinci_mdio_data *data = dev_get_drvdata(dev);
455 davinci_mdio_enable(data);
460 #ifdef CONFIG_PM_SLEEP
461 static int davinci_mdio_suspend(struct device *dev)
463 struct davinci_mdio_data *data = dev_get_drvdata(dev);
466 data->active_in_suspend = !pm_runtime_status_suspended(dev);
467 if (data->active_in_suspend)
468 ret = pm_runtime_force_suspend(dev);
472 /* Select sleep pin state */
473 pinctrl_pm_select_sleep_state(dev);
478 static int davinci_mdio_resume(struct device *dev)
480 struct davinci_mdio_data *data = dev_get_drvdata(dev);
482 /* Select default pin state */
483 pinctrl_pm_select_default_state(dev);
485 if (data->active_in_suspend)
486 pm_runtime_force_resume(dev);
492 static const struct dev_pm_ops davinci_mdio_pm_ops = {
493 SET_RUNTIME_PM_OPS(davinci_mdio_runtime_suspend,
494 davinci_mdio_runtime_resume, NULL)
495 SET_LATE_SYSTEM_SLEEP_PM_OPS(davinci_mdio_suspend, davinci_mdio_resume)
498 #if IS_ENABLED(CONFIG_OF)
499 static const struct of_device_id davinci_mdio_of_mtable[] = {
500 { .compatible = "ti,davinci_mdio", },
503 MODULE_DEVICE_TABLE(of, davinci_mdio_of_mtable);
506 static struct platform_driver davinci_mdio_driver = {
508 .name = "davinci_mdio",
509 .pm = &davinci_mdio_pm_ops,
510 .of_match_table = of_match_ptr(davinci_mdio_of_mtable),
512 .probe = davinci_mdio_probe,
513 .remove = davinci_mdio_remove,
516 static int __init davinci_mdio_init(void)
518 return platform_driver_register(&davinci_mdio_driver);
520 device_initcall(davinci_mdio_init);
522 static void __exit davinci_mdio_exit(void)
524 platform_driver_unregister(&davinci_mdio_driver);
526 module_exit(davinci_mdio_exit);
528 MODULE_LICENSE("GPL");
529 MODULE_DESCRIPTION("DaVinci MDIO driver");