1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
9 #include <linux/etherdevice.h>
10 #include <linux/if_vlan.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/kmemleak.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/net_tstamp.h>
18 #include <linux/of_mdio.h>
19 #include <linux/of_net.h>
20 #include <linux/of_device.h>
21 #include <linux/phy.h>
22 #include <linux/phy/phy.h>
23 #include <linux/platform_device.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/regmap.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/sys_soc.h>
28 #include <linux/dma/ti-cppi5.h>
29 #include <linux/dma/k3-udma-glue.h>
33 #include "am65-cpsw-nuss.h"
34 #include "am65-cpsw-switchdev.h"
35 #include "k3-cppi-desc-pool.h"
36 #include "am65-cpts.h"
38 #define AM65_CPSW_SS_BASE 0x0
39 #define AM65_CPSW_SGMII_BASE 0x100
40 #define AM65_CPSW_XGMII_BASE 0x2100
41 #define AM65_CPSW_CPSW_NU_BASE 0x20000
42 #define AM65_CPSW_NU_PORTS_BASE 0x1000
43 #define AM65_CPSW_NU_FRAM_BASE 0x12000
44 #define AM65_CPSW_NU_STATS_BASE 0x1a000
45 #define AM65_CPSW_NU_ALE_BASE 0x1e000
46 #define AM65_CPSW_NU_CPTS_BASE 0x1d000
48 #define AM65_CPSW_NU_PORTS_OFFSET 0x1000
49 #define AM65_CPSW_NU_STATS_PORT_OFFSET 0x200
50 #define AM65_CPSW_NU_FRAM_PORT_OFFSET 0x200
52 #define AM65_CPSW_MAX_PORTS 8
54 #define AM65_CPSW_MIN_PACKET_SIZE VLAN_ETH_ZLEN
55 #define AM65_CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
57 #define AM65_CPSW_REG_CTL 0x004
58 #define AM65_CPSW_REG_STAT_PORT_EN 0x014
59 #define AM65_CPSW_REG_PTYPE 0x018
61 #define AM65_CPSW_P0_REG_CTL 0x004
62 #define AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET 0x008
64 #define AM65_CPSW_PORT_REG_PRI_CTL 0x01c
65 #define AM65_CPSW_PORT_REG_RX_PRI_MAP 0x020
66 #define AM65_CPSW_PORT_REG_RX_MAXLEN 0x024
68 #define AM65_CPSW_PORTN_REG_SA_L 0x308
69 #define AM65_CPSW_PORTN_REG_SA_H 0x30c
70 #define AM65_CPSW_PORTN_REG_TS_CTL 0x310
71 #define AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG 0x314
72 #define AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG 0x318
73 #define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 0x31C
75 #define AM65_CPSW_CTL_VLAN_AWARE BIT(1)
76 #define AM65_CPSW_CTL_P0_ENABLE BIT(2)
77 #define AM65_CPSW_CTL_P0_TX_CRC_REMOVE BIT(13)
78 #define AM65_CPSW_CTL_P0_RX_PAD BIT(14)
80 /* AM65_CPSW_P0_REG_CTL */
81 #define AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN BIT(0)
83 /* AM65_CPSW_PORT_REG_PRI_CTL */
84 #define AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN BIT(8)
86 /* AM65_CPSW_PN_TS_CTL register fields */
87 #define AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN BIT(4)
88 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN BIT(5)
89 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT2_EN BIT(6)
90 #define AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN BIT(7)
91 #define AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN BIT(10)
92 #define AM65_CPSW_PN_TS_CTL_TX_HOST_TS_EN BIT(11)
93 #define AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT 16
95 /* AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG register fields */
96 #define AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT 16
98 /* AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 */
99 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 BIT(16)
100 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 BIT(17)
101 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 BIT(18)
102 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 BIT(19)
103 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 BIT(20)
104 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 BIT(21)
105 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 BIT(22)
106 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO BIT(23)
108 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
109 #define AM65_CPSW_TS_EVENT_MSG_TYPE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3))
111 #define AM65_CPSW_TS_SEQ_ID_OFFSET (0x1e)
113 #define AM65_CPSW_TS_TX_ANX_ALL_EN \
114 (AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN | \
115 AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN | \
116 AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN)
118 #define AM65_CPSW_ALE_AGEOUT_DEFAULT 30
119 /* Number of TX/RX descriptors */
120 #define AM65_CPSW_MAX_TX_DESC 500
121 #define AM65_CPSW_MAX_RX_DESC 500
123 #define AM65_CPSW_NAV_PS_DATA_SIZE 16
124 #define AM65_CPSW_NAV_SW_DATA_SIZE 16
126 #define AM65_CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK | \
127 NETIF_MSG_IFUP | NETIF_MSG_PROBE | NETIF_MSG_IFDOWN | \
128 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
130 static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave,
133 u32 mac_hi = (dev_addr[0] << 0) | (dev_addr[1] << 8) |
134 (dev_addr[2] << 16) | (dev_addr[3] << 24);
135 u32 mac_lo = (dev_addr[4] << 0) | (dev_addr[5] << 8);
137 writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
138 writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L);
141 static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port)
143 cpsw_sl_reset(port->slave.mac_sl, 100);
144 /* Max length register has to be restored after MAC SL reset */
145 writel(AM65_CPSW_MAX_PACKET_SIZE,
146 port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
149 static void am65_cpsw_nuss_get_ver(struct am65_cpsw_common *common)
151 common->nuss_ver = readl(common->ss_base);
152 common->cpsw_ver = readl(common->cpsw_base);
153 dev_info(common->dev,
154 "initializing am65 cpsw nuss version 0x%08X, cpsw version 0x%08X Ports: %u quirks:%08x\n",
157 common->port_num + 1,
158 common->pdata.quirks);
161 void am65_cpsw_nuss_adjust_link(struct net_device *ndev)
163 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
164 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
165 struct phy_device *phy = port->slave.phy;
172 mac_control = CPSW_SL_CTL_GMII_EN;
174 if (phy->speed == 1000)
175 mac_control |= CPSW_SL_CTL_GIG;
176 if (phy->speed == 10 && phy_interface_is_rgmii(phy))
177 /* Can be used with in band mode only */
178 mac_control |= CPSW_SL_CTL_EXT_EN;
179 if (phy->speed == 100 && phy->interface == PHY_INTERFACE_MODE_RMII)
180 mac_control |= CPSW_SL_CTL_IFCTL_A;
182 mac_control |= CPSW_SL_CTL_FULLDUPLEX;
184 /* RGMII speed is 100M if !CPSW_SL_CTL_GIG*/
186 /* rx_pause/tx_pause */
187 if (port->slave.rx_pause)
188 mac_control |= CPSW_SL_CTL_RX_FLOW_EN;
190 if (port->slave.tx_pause)
191 mac_control |= CPSW_SL_CTL_TX_FLOW_EN;
193 cpsw_sl_ctl_set(port->slave.mac_sl, mac_control);
195 /* enable forwarding */
196 cpsw_ale_control_set(common->ale, port->port_id,
197 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
199 am65_cpsw_qos_link_up(ndev, phy->speed);
200 netif_tx_wake_all_queues(ndev);
204 /* disable forwarding */
205 cpsw_ale_control_set(common->ale, port->port_id,
206 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
208 cpsw_sl_ctl_set(port->slave.mac_sl, CPSW_SL_CTL_CMD_IDLE);
210 tmo = cpsw_sl_wait_for_idle(port->slave.mac_sl, 100);
211 dev_dbg(common->dev, "donw msc_sl %08x tmo %d\n",
212 cpsw_sl_reg_read(port->slave.mac_sl, CPSW_SL_MACSTATUS),
215 cpsw_sl_ctl_reset(port->slave.mac_sl);
217 am65_cpsw_qos_link_down(ndev);
218 netif_tx_stop_all_queues(ndev);
221 phy_print_status(phy);
224 static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev,
225 __be16 proto, u16 vid)
227 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
228 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
229 u32 port_mask, unreg_mcast = 0;
232 if (!common->is_emac_mode)
235 if (!netif_running(ndev) || !vid)
238 ret = pm_runtime_get_sync(common->dev);
240 pm_runtime_put_noidle(common->dev);
244 port_mask = BIT(port->port_id) | ALE_PORT_HOST;
246 unreg_mcast = port_mask;
247 dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid);
248 ret = cpsw_ale_vlan_add_modify(common->ale, vid, port_mask,
249 unreg_mcast, port_mask, 0);
251 pm_runtime_put(common->dev);
255 static int am65_cpsw_nuss_ndo_slave_kill_vid(struct net_device *ndev,
256 __be16 proto, u16 vid)
258 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
259 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
262 if (!common->is_emac_mode)
265 if (!netif_running(ndev) || !vid)
268 ret = pm_runtime_get_sync(common->dev);
270 pm_runtime_put_noidle(common->dev);
274 dev_info(common->dev, "Removing vlan %d from vlan filter\n", vid);
275 ret = cpsw_ale_del_vlan(common->ale, vid,
276 BIT(port->port_id) | ALE_PORT_HOST);
278 pm_runtime_put(common->dev);
282 static void am65_cpsw_slave_set_promisc(struct am65_cpsw_port *port,
285 struct am65_cpsw_common *common = port->common;
287 if (promisc && !common->is_emac_mode) {
288 dev_dbg(common->dev, "promisc mode requested in switch mode");
293 /* Enable promiscuous mode */
294 cpsw_ale_control_set(common->ale, port->port_id,
295 ALE_PORT_MACONLY_CAF, 1);
296 dev_dbg(common->dev, "promisc enabled\n");
298 /* Disable promiscuous mode */
299 cpsw_ale_control_set(common->ale, port->port_id,
300 ALE_PORT_MACONLY_CAF, 0);
301 dev_dbg(common->dev, "promisc disabled\n");
305 static void am65_cpsw_nuss_ndo_slave_set_rx_mode(struct net_device *ndev)
307 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
308 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
312 promisc = !!(ndev->flags & IFF_PROMISC);
313 am65_cpsw_slave_set_promisc(port, promisc);
318 /* Restore allmulti on vlans if necessary */
319 cpsw_ale_set_allmulti(common->ale,
320 ndev->flags & IFF_ALLMULTI, port->port_id);
322 port_mask = ALE_PORT_HOST;
323 /* Clear all mcast from ALE */
324 cpsw_ale_flush_multicast(common->ale, port_mask, -1);
326 if (!netdev_mc_empty(ndev)) {
327 struct netdev_hw_addr *ha;
329 /* program multicast address list into ALE register */
330 netdev_for_each_mc_addr(ha, ndev) {
331 cpsw_ale_add_mcast(common->ale, ha->addr,
337 static void am65_cpsw_nuss_ndo_host_tx_timeout(struct net_device *ndev,
338 unsigned int txqueue)
340 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
341 struct am65_cpsw_tx_chn *tx_chn;
342 struct netdev_queue *netif_txq;
343 unsigned long trans_start;
345 netif_txq = netdev_get_tx_queue(ndev, txqueue);
346 tx_chn = &common->tx_chns[txqueue];
347 trans_start = netif_txq->trans_start;
349 netdev_err(ndev, "txq:%d DRV_XOFF:%d tmo:%u dql_avail:%d free_desc:%zu\n",
351 netif_tx_queue_stopped(netif_txq),
352 jiffies_to_msecs(jiffies - trans_start),
353 dql_avail(&netif_txq->dql),
354 k3_cppi_desc_pool_avail(tx_chn->desc_pool));
356 if (netif_tx_queue_stopped(netif_txq)) {
357 /* try recover if stopped by us */
358 txq_trans_update(netif_txq);
359 netif_tx_wake_queue(netif_txq);
363 static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common,
366 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
367 struct cppi5_host_desc_t *desc_rx;
368 struct device *dev = common->dev;
369 u32 pkt_len = skb_tailroom(skb);
374 desc_rx = k3_cppi_desc_pool_alloc(rx_chn->desc_pool);
376 dev_err(dev, "Failed to allocate RXFDQ descriptor\n");
379 desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn->desc_pool, desc_rx);
381 buf_dma = dma_map_single(rx_chn->dma_dev, skb->data, pkt_len,
383 if (unlikely(dma_mapping_error(rx_chn->dma_dev, buf_dma))) {
384 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
385 dev_err(dev, "Failed to map rx skb buffer\n");
389 cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT,
390 AM65_CPSW_NAV_PS_DATA_SIZE);
391 k3_udma_glue_rx_dma_to_cppi5_addr(rx_chn->rx_chn, &buf_dma);
392 cppi5_hdesc_attach_buf(desc_rx, buf_dma, skb_tailroom(skb), buf_dma, skb_tailroom(skb));
393 swdata = cppi5_hdesc_get_swdata(desc_rx);
394 *((void **)swdata) = skb;
396 return k3_udma_glue_push_rx_chn(rx_chn->rx_chn, 0, desc_rx, desc_dma);
399 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common)
401 struct am65_cpsw_host *host_p = am65_common_get_host(common);
404 /* P0 set Receive Priority Type */
405 val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
407 if (common->pf_p0_rx_ptype_rrobin) {
408 val |= AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
409 /* Enet Ports fifos works in fixed priority mode only, so
410 * reset P0_Rx_Pri_Map so all packet will go in Enet fifo 0
414 val &= ~AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
415 /* restore P0_Rx_Pri_Map */
416 pri_map = 0x76543210;
419 writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP);
420 writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
423 static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common);
424 static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common);
425 static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port);
426 static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port);
428 static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common,
429 netdev_features_t features)
431 struct am65_cpsw_host *host_p = am65_common_get_host(common);
432 int port_idx, i, ret;
436 if (common->usage_count)
439 /* Control register */
440 writel(AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE |
441 AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD,
442 common->cpsw_base + AM65_CPSW_REG_CTL);
443 /* Max length register */
444 writel(AM65_CPSW_MAX_PACKET_SIZE,
445 host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
446 /* set base flow_id */
447 writel(common->rx_flow_id_base,
448 host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET);
449 /* en tx crc offload */
450 writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN, host_p->port_base + AM65_CPSW_P0_REG_CTL);
452 am65_cpsw_nuss_set_p0_ptype(common);
454 /* enable statistic */
455 val = BIT(HOST_PORT_NUM);
456 for (port_idx = 0; port_idx < common->port_num; port_idx++) {
457 struct am65_cpsw_port *port = &common->ports[port_idx];
460 val |= BIT(port->port_id);
462 writel(val, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
464 /* disable priority elevation */
465 writel(0, common->cpsw_base + AM65_CPSW_REG_PTYPE);
467 cpsw_ale_start(common->ale);
469 /* limit to one RX flow only */
470 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
471 ALE_DEFAULT_THREAD_ID, 0);
472 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
473 ALE_DEFAULT_THREAD_ENABLE, 1);
474 /* switch to vlan unaware mode */
475 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 1);
476 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
477 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
479 /* default vlan cfg: create mask based on enabled ports */
480 port_mask = GENMASK(common->port_num, 0) &
481 ~common->disabled_ports_mask;
483 cpsw_ale_add_vlan(common->ale, 0, port_mask,
484 port_mask, port_mask,
485 port_mask & ~ALE_PORT_HOST);
487 if (common->is_emac_mode)
488 am65_cpsw_init_host_port_emac(common);
490 am65_cpsw_init_host_port_switch(common);
492 for (i = 0; i < common->rx_chns.descs_num; i++) {
493 skb = __netdev_alloc_skb_ip_align(NULL,
494 AM65_CPSW_MAX_PACKET_SIZE,
497 dev_err(common->dev, "cannot allocate skb\n");
501 ret = am65_cpsw_nuss_rx_push(common, skb);
504 "cannot submit skb to channel rx, error %d\n",
509 kmemleak_not_leak(skb);
511 k3_udma_glue_enable_rx_chn(common->rx_chns.rx_chn);
513 for (i = 0; i < common->tx_ch_num; i++) {
514 ret = k3_udma_glue_enable_tx_chn(common->tx_chns[i].tx_chn);
517 napi_enable(&common->tx_chns[i].napi_tx);
520 napi_enable(&common->napi_rx);
522 dev_dbg(common->dev, "cpsw_nuss started\n");
526 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma);
527 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma);
529 static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)
533 if (common->usage_count != 1)
536 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
537 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
539 /* shutdown tx channels */
540 atomic_set(&common->tdown_cnt, common->tx_ch_num);
541 /* ensure new tdown_cnt value is visible */
542 smp_mb__after_atomic();
543 reinit_completion(&common->tdown_complete);
545 for (i = 0; i < common->tx_ch_num; i++)
546 k3_udma_glue_tdown_tx_chn(common->tx_chns[i].tx_chn, false);
548 i = wait_for_completion_timeout(&common->tdown_complete,
549 msecs_to_jiffies(1000));
551 dev_err(common->dev, "tx timeout\n");
552 for (i = 0; i < common->tx_ch_num; i++)
553 napi_disable(&common->tx_chns[i].napi_tx);
555 for (i = 0; i < common->tx_ch_num; i++) {
556 k3_udma_glue_reset_tx_chn(common->tx_chns[i].tx_chn,
558 am65_cpsw_nuss_tx_cleanup);
559 k3_udma_glue_disable_tx_chn(common->tx_chns[i].tx_chn);
562 k3_udma_glue_tdown_rx_chn(common->rx_chns.rx_chn, true);
563 napi_disable(&common->napi_rx);
565 for (i = 0; i < AM65_CPSW_MAX_RX_FLOWS; i++)
566 k3_udma_glue_reset_rx_chn(common->rx_chns.rx_chn, i,
568 am65_cpsw_nuss_rx_cleanup, !!i);
570 k3_udma_glue_disable_rx_chn(common->rx_chns.rx_chn);
572 cpsw_ale_stop(common->ale);
574 writel(0, common->cpsw_base + AM65_CPSW_REG_CTL);
575 writel(0, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
577 dev_dbg(common->dev, "cpsw_nuss stopped\n");
581 static int am65_cpsw_nuss_ndo_slave_stop(struct net_device *ndev)
583 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
584 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
588 phy_stop(port->slave.phy);
590 netif_tx_stop_all_queues(ndev);
592 if (port->slave.phy) {
593 phy_disconnect(port->slave.phy);
594 port->slave.phy = NULL;
597 ret = am65_cpsw_nuss_common_stop(common);
601 common->usage_count--;
602 pm_runtime_put(common->dev);
606 static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg)
608 struct am65_cpsw_port *port = arg;
613 return am65_cpsw_nuss_ndo_slave_add_vid(port->ndev, 0, vid);
616 static int am65_cpsw_nuss_ndo_slave_open(struct net_device *ndev)
618 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
619 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
622 ret = pm_runtime_get_sync(common->dev);
624 pm_runtime_put_noidle(common->dev);
628 /* Notify the stack of the actual queue counts. */
629 ret = netif_set_real_num_tx_queues(ndev, common->tx_ch_num);
631 dev_err(common->dev, "cannot set real number of tx queues\n");
635 ret = netif_set_real_num_rx_queues(ndev, AM65_CPSW_MAX_RX_QUEUES);
637 dev_err(common->dev, "cannot set real number of rx queues\n");
641 for (i = 0; i < common->tx_ch_num; i++)
642 netdev_tx_reset_queue(netdev_get_tx_queue(ndev, i));
644 ret = am65_cpsw_nuss_common_open(common, ndev->features);
648 common->usage_count++;
650 am65_cpsw_port_set_sl_mac(port, ndev->dev_addr);
652 if (common->is_emac_mode)
653 am65_cpsw_init_port_emac_ale(port);
655 am65_cpsw_init_port_switch_ale(port);
657 /* mac_sl should be configured via phy-link interface */
658 am65_cpsw_sl_ctl_reset(port);
660 ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET,
665 if (port->slave.phy_node) {
666 port->slave.phy = of_phy_connect(ndev,
667 port->slave.phy_node,
668 &am65_cpsw_nuss_adjust_link,
669 0, port->slave.phy_if);
670 if (!port->slave.phy) {
671 dev_err(common->dev, "phy %pOF not found on slave %d\n",
672 port->slave.phy_node,
679 /* restore vlan configurations */
680 vlan_for_each(ndev, cpsw_restore_vlans, port);
682 phy_attached_info(port->slave.phy);
683 phy_start(port->slave.phy);
688 am65_cpsw_nuss_ndo_slave_stop(ndev);
692 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)
694 struct am65_cpsw_rx_chn *rx_chn = data;
695 struct cppi5_host_desc_t *desc_rx;
701 desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
702 swdata = cppi5_hdesc_get_swdata(desc_rx);
704 cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
705 k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
707 dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
708 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
710 dev_kfree_skb_any(skb);
713 static void am65_cpsw_nuss_rx_ts(struct sk_buff *skb, u32 *psdata)
715 struct skb_shared_hwtstamps *ssh;
718 ns = ((u64)psdata[1] << 32) | psdata[0];
720 ssh = skb_hwtstamps(skb);
721 memset(ssh, 0, sizeof(*ssh));
722 ssh->hwtstamp = ns_to_ktime(ns);
725 /* RX psdata[2] word format - checksum information */
726 #define AM65_CPSW_RX_PSD_CSUM_ADD GENMASK(15, 0)
727 #define AM65_CPSW_RX_PSD_CSUM_ERR BIT(16)
728 #define AM65_CPSW_RX_PSD_IS_FRAGMENT BIT(17)
729 #define AM65_CPSW_RX_PSD_IS_TCP BIT(18)
730 #define AM65_CPSW_RX_PSD_IPV6_VALID BIT(19)
731 #define AM65_CPSW_RX_PSD_IPV4_VALID BIT(20)
733 static void am65_cpsw_nuss_rx_csum(struct sk_buff *skb, u32 csum_info)
735 /* HW can verify IPv4/IPv6 TCP/UDP packets checksum
736 * csum information provides in psdata[2] word:
737 * AM65_CPSW_RX_PSD_CSUM_ERR bit - indicates csum error
738 * AM65_CPSW_RX_PSD_IPV6_VALID and AM65_CPSW_RX_PSD_IPV4_VALID
739 * bits - indicates IPv4/IPv6 packet
740 * AM65_CPSW_RX_PSD_IS_FRAGMENT bit - indicates fragmented packet
741 * AM65_CPSW_RX_PSD_CSUM_ADD has value 0xFFFF for non fragmented packets
742 * or csum value for fragmented packets if !AM65_CPSW_RX_PSD_CSUM_ERR
744 skb_checksum_none_assert(skb);
746 if (unlikely(!(skb->dev->features & NETIF_F_RXCSUM)))
749 if ((csum_info & (AM65_CPSW_RX_PSD_IPV6_VALID |
750 AM65_CPSW_RX_PSD_IPV4_VALID)) &&
751 !(csum_info & AM65_CPSW_RX_PSD_CSUM_ERR)) {
752 /* csum for fragmented packets is unsupported */
753 if (!(csum_info & AM65_CPSW_RX_PSD_IS_FRAGMENT))
754 skb->ip_summed = CHECKSUM_UNNECESSARY;
758 static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_common *common,
761 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
762 u32 buf_dma_len, pkt_len, port_id = 0, csum_info;
763 struct am65_cpsw_ndev_priv *ndev_priv;
764 struct am65_cpsw_ndev_stats *stats;
765 struct cppi5_host_desc_t *desc_rx;
766 struct device *dev = common->dev;
767 struct sk_buff *skb, *new_skb;
768 dma_addr_t desc_dma, buf_dma;
769 struct am65_cpsw_port *port;
770 struct net_device *ndev;
775 ret = k3_udma_glue_pop_rx_chn(rx_chn->rx_chn, flow_idx, &desc_dma);
778 dev_err(dev, "RX: pop chn fail %d\n", ret);
782 if (cppi5_desc_is_tdcm(desc_dma)) {
783 dev_dbg(dev, "%s RX tdown flow: %u\n", __func__, flow_idx);
787 desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
788 dev_dbg(dev, "%s flow_idx: %u desc %pad\n",
789 __func__, flow_idx, &desc_dma);
791 swdata = cppi5_hdesc_get_swdata(desc_rx);
793 cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
794 k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
795 pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
796 cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL);
797 dev_dbg(dev, "%s rx port_id:%d\n", __func__, port_id);
798 port = am65_common_get_port(common, port_id);
802 psdata = cppi5_hdesc_get_psdata(desc_rx);
803 /* add RX timestamp */
804 if (port->rx_ts_enabled)
805 am65_cpsw_nuss_rx_ts(skb, psdata);
806 csum_info = psdata[2];
807 dev_dbg(dev, "%s rx csum_info:%#x\n", __func__, csum_info);
809 dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
811 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
813 new_skb = netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE);
815 ndev_priv = netdev_priv(ndev);
816 am65_cpsw_nuss_set_offload_fwd_mark(skb, ndev_priv->offload_fwd_mark);
817 skb_put(skb, pkt_len);
818 skb->protocol = eth_type_trans(skb, ndev);
819 am65_cpsw_nuss_rx_csum(skb, csum_info);
820 napi_gro_receive(&common->napi_rx, skb);
822 stats = this_cpu_ptr(ndev_priv->stats);
824 u64_stats_update_begin(&stats->syncp);
826 stats->rx_bytes += pkt_len;
827 u64_stats_update_end(&stats->syncp);
828 kmemleak_not_leak(new_skb);
830 ndev->stats.rx_dropped++;
834 if (netif_dormant(ndev)) {
835 dev_kfree_skb_any(new_skb);
836 ndev->stats.rx_dropped++;
840 ret = am65_cpsw_nuss_rx_push(common, new_skb);
841 if (WARN_ON(ret < 0)) {
842 dev_kfree_skb_any(new_skb);
843 ndev->stats.rx_errors++;
844 ndev->stats.rx_dropped++;
850 static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)
852 struct am65_cpsw_common *common = am65_cpsw_napi_to_common(napi_rx);
853 int flow = AM65_CPSW_MAX_RX_FLOWS;
857 /* process every flow */
859 cur_budget = budget - num_rx;
861 while (cur_budget--) {
862 ret = am65_cpsw_nuss_rx_packets(common, flow);
868 if (num_rx >= budget)
872 dev_dbg(common->dev, "%s num_rx:%d %d\n", __func__, num_rx, budget);
874 if (num_rx < budget && napi_complete_done(napi_rx, num_rx))
875 enable_irq(common->rx_chns.irq);
880 static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,
881 struct cppi5_host_desc_t *desc)
883 struct cppi5_host_desc_t *first_desc, *next_desc;
884 dma_addr_t buf_dma, next_desc_dma;
888 next_desc = first_desc;
890 cppi5_hdesc_get_obuf(first_desc, &buf_dma, &buf_dma_len);
891 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
893 dma_unmap_single(tx_chn->dma_dev, buf_dma, buf_dma_len, DMA_TO_DEVICE);
895 next_desc_dma = cppi5_hdesc_get_next_hbdesc(first_desc);
896 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
897 while (next_desc_dma) {
898 next_desc = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
900 cppi5_hdesc_get_obuf(next_desc, &buf_dma, &buf_dma_len);
901 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
903 dma_unmap_page(tx_chn->dma_dev, buf_dma, buf_dma_len,
906 next_desc_dma = cppi5_hdesc_get_next_hbdesc(next_desc);
907 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
909 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
912 k3_cppi_desc_pool_free(tx_chn->desc_pool, first_desc);
915 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma)
917 struct am65_cpsw_tx_chn *tx_chn = data;
918 struct cppi5_host_desc_t *desc_tx;
922 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, desc_dma);
923 swdata = cppi5_hdesc_get_swdata(desc_tx);
925 am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);
927 dev_kfree_skb_any(skb);
930 static struct sk_buff *
931 am65_cpsw_nuss_tx_compl_packet(struct am65_cpsw_tx_chn *tx_chn,
934 struct am65_cpsw_ndev_priv *ndev_priv;
935 struct am65_cpsw_ndev_stats *stats;
936 struct cppi5_host_desc_t *desc_tx;
937 struct net_device *ndev;
941 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
943 swdata = cppi5_hdesc_get_swdata(desc_tx);
945 am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);
949 am65_cpts_tx_timestamp(tx_chn->common->cpts, skb);
951 ndev_priv = netdev_priv(ndev);
952 stats = this_cpu_ptr(ndev_priv->stats);
953 u64_stats_update_begin(&stats->syncp);
955 stats->tx_bytes += skb->len;
956 u64_stats_update_end(&stats->syncp);
961 static void am65_cpsw_nuss_tx_wake(struct am65_cpsw_tx_chn *tx_chn, struct net_device *ndev,
962 struct netdev_queue *netif_txq)
964 if (netif_tx_queue_stopped(netif_txq)) {
965 /* Check whether the queue is stopped due to stalled
966 * tx dma, if the queue is stopped then wake the queue
967 * as we have free desc for tx
969 __netif_tx_lock(netif_txq, smp_processor_id());
970 if (netif_running(ndev) &&
971 (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >= MAX_SKB_FRAGS))
972 netif_tx_wake_queue(netif_txq);
974 __netif_tx_unlock(netif_txq);
978 static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,
979 int chn, unsigned int budget)
981 struct device *dev = common->dev;
982 struct am65_cpsw_tx_chn *tx_chn;
983 struct netdev_queue *netif_txq;
984 unsigned int total_bytes = 0;
985 struct net_device *ndev;
990 tx_chn = &common->tx_chns[chn];
993 spin_lock(&tx_chn->lock);
994 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
995 spin_unlock(&tx_chn->lock);
999 if (cppi5_desc_is_tdcm(desc_dma)) {
1000 if (atomic_dec_and_test(&common->tdown_cnt))
1001 complete(&common->tdown_complete);
1005 skb = am65_cpsw_nuss_tx_compl_packet(tx_chn, desc_dma);
1006 total_bytes = skb->len;
1008 napi_consume_skb(skb, budget);
1011 netif_txq = netdev_get_tx_queue(ndev, chn);
1013 netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
1015 am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);
1018 dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
1023 static int am65_cpsw_nuss_tx_compl_packets_2g(struct am65_cpsw_common *common,
1024 int chn, unsigned int budget)
1026 struct device *dev = common->dev;
1027 struct am65_cpsw_tx_chn *tx_chn;
1028 struct netdev_queue *netif_txq;
1029 unsigned int total_bytes = 0;
1030 struct net_device *ndev;
1031 struct sk_buff *skb;
1032 dma_addr_t desc_dma;
1033 int res, num_tx = 0;
1035 tx_chn = &common->tx_chns[chn];
1038 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
1039 if (res == -ENODATA)
1042 if (cppi5_desc_is_tdcm(desc_dma)) {
1043 if (atomic_dec_and_test(&common->tdown_cnt))
1044 complete(&common->tdown_complete);
1048 skb = am65_cpsw_nuss_tx_compl_packet(tx_chn, desc_dma);
1051 total_bytes += skb->len;
1052 napi_consume_skb(skb, budget);
1059 netif_txq = netdev_get_tx_queue(ndev, chn);
1061 netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
1063 am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);
1065 dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
1070 static int am65_cpsw_nuss_tx_poll(struct napi_struct *napi_tx, int budget)
1072 struct am65_cpsw_tx_chn *tx_chn = am65_cpsw_napi_to_tx_chn(napi_tx);
1075 if (AM65_CPSW_IS_CPSW2G(tx_chn->common))
1076 num_tx = am65_cpsw_nuss_tx_compl_packets_2g(tx_chn->common, tx_chn->id, budget);
1078 num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn->common, tx_chn->id, budget);
1080 num_tx = min(num_tx, budget);
1081 if (num_tx < budget) {
1082 napi_complete(napi_tx);
1083 enable_irq(tx_chn->irq);
1089 static irqreturn_t am65_cpsw_nuss_rx_irq(int irq, void *dev_id)
1091 struct am65_cpsw_common *common = dev_id;
1093 disable_irq_nosync(irq);
1094 napi_schedule(&common->napi_rx);
1099 static irqreturn_t am65_cpsw_nuss_tx_irq(int irq, void *dev_id)
1101 struct am65_cpsw_tx_chn *tx_chn = dev_id;
1103 disable_irq_nosync(irq);
1104 napi_schedule(&tx_chn->napi_tx);
1109 static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb,
1110 struct net_device *ndev)
1112 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1113 struct cppi5_host_desc_t *first_desc, *next_desc, *cur_desc;
1114 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1115 struct device *dev = common->dev;
1116 struct am65_cpsw_tx_chn *tx_chn;
1117 struct netdev_queue *netif_txq;
1118 dma_addr_t desc_dma, buf_dma;
1124 /* padding enabled in hw */
1125 pkt_len = skb_headlen(skb);
1127 /* SKB TX timestamp */
1128 if (port->tx_ts_enabled)
1129 am65_cpts_prep_tx_timestamp(common->cpts, skb);
1131 q_idx = skb_get_queue_mapping(skb);
1132 dev_dbg(dev, "%s skb_queue:%d\n", __func__, q_idx);
1134 tx_chn = &common->tx_chns[q_idx];
1135 netif_txq = netdev_get_tx_queue(ndev, q_idx);
1137 /* Map the linear buffer */
1138 buf_dma = dma_map_single(tx_chn->dma_dev, skb->data, pkt_len,
1140 if (unlikely(dma_mapping_error(tx_chn->dma_dev, buf_dma))) {
1141 dev_err(dev, "Failed to map tx skb buffer\n");
1142 ndev->stats.tx_errors++;
1146 first_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1148 dev_dbg(dev, "Failed to allocate descriptor\n");
1149 dma_unmap_single(tx_chn->dma_dev, buf_dma, pkt_len,
1154 cppi5_hdesc_init(first_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT,
1155 AM65_CPSW_NAV_PS_DATA_SIZE);
1156 cppi5_desc_set_pktids(&first_desc->hdr, 0, 0x3FFF);
1157 cppi5_hdesc_set_pkttype(first_desc, 0x7);
1158 cppi5_desc_set_tags_ids(&first_desc->hdr, 0, port->port_id);
1160 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &buf_dma);
1161 cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);
1162 swdata = cppi5_hdesc_get_swdata(first_desc);
1164 psdata = cppi5_hdesc_get_psdata(first_desc);
1166 /* HW csum offload if enabled */
1168 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1169 unsigned int cs_start, cs_offset;
1171 cs_start = skb_transport_offset(skb);
1172 cs_offset = cs_start + skb->csum_offset;
1173 /* HW numerates bytes starting from 1 */
1174 psdata[2] = ((cs_offset + 1) << 24) |
1175 ((cs_start + 1) << 16) | (skb->len - cs_start);
1176 dev_dbg(dev, "%s tx psdata:%#x\n", __func__, psdata[2]);
1179 if (!skb_is_nonlinear(skb))
1182 dev_dbg(dev, "fragmented SKB\n");
1184 /* Handle the case where skb is fragmented in pages */
1185 cur_desc = first_desc;
1186 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1187 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1188 u32 frag_size = skb_frag_size(frag);
1190 next_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1192 dev_err(dev, "Failed to allocate descriptor\n");
1193 goto busy_free_descs;
1196 buf_dma = skb_frag_dma_map(tx_chn->dma_dev, frag, 0, frag_size,
1198 if (unlikely(dma_mapping_error(tx_chn->dma_dev, buf_dma))) {
1199 dev_err(dev, "Failed to map tx skb page\n");
1200 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
1201 ndev->stats.tx_errors++;
1202 goto err_free_descs;
1205 cppi5_hdesc_reset_hbdesc(next_desc);
1206 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &buf_dma);
1207 cppi5_hdesc_attach_buf(next_desc,
1208 buf_dma, frag_size, buf_dma, frag_size);
1210 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool,
1212 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &desc_dma);
1213 cppi5_hdesc_link_hbdesc(cur_desc, desc_dma);
1215 pkt_len += frag_size;
1216 cur_desc = next_desc;
1218 WARN_ON(pkt_len != skb->len);
1221 skb_tx_timestamp(skb);
1223 /* report bql before sending packet */
1224 netdev_tx_sent_queue(netif_txq, pkt_len);
1226 cppi5_hdesc_set_pktlen(first_desc, pkt_len);
1227 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool, first_desc);
1228 if (AM65_CPSW_IS_CPSW2G(common)) {
1229 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1231 spin_lock_bh(&tx_chn->lock);
1232 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1233 spin_unlock_bh(&tx_chn->lock);
1236 dev_err(dev, "can't push desc %d\n", ret);
1238 netdev_tx_completed_queue(netif_txq, 1, pkt_len);
1239 ndev->stats.tx_errors++;
1240 goto err_free_descs;
1243 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) < MAX_SKB_FRAGS) {
1244 netif_tx_stop_queue(netif_txq);
1245 /* Barrier, so that stop_queue visible to other cpus */
1246 smp_mb__after_atomic();
1247 dev_dbg(dev, "netif_tx_stop_queue %d\n", q_idx);
1249 /* re-check for smp */
1250 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >=
1252 netif_tx_wake_queue(netif_txq);
1253 dev_dbg(dev, "netif_tx_wake_queue %d\n", q_idx);
1257 return NETDEV_TX_OK;
1260 am65_cpsw_nuss_xmit_free(tx_chn, first_desc);
1262 ndev->stats.tx_dropped++;
1263 dev_kfree_skb_any(skb);
1264 return NETDEV_TX_OK;
1267 am65_cpsw_nuss_xmit_free(tx_chn, first_desc);
1269 netif_tx_stop_queue(netif_txq);
1270 return NETDEV_TX_BUSY;
1273 static int am65_cpsw_nuss_ndo_slave_set_mac_address(struct net_device *ndev,
1276 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1277 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1278 struct sockaddr *sockaddr = (struct sockaddr *)addr;
1281 ret = eth_prepare_mac_addr_change(ndev, addr);
1285 ret = pm_runtime_get_sync(common->dev);
1287 pm_runtime_put_noidle(common->dev);
1291 cpsw_ale_del_ucast(common->ale, ndev->dev_addr,
1292 HOST_PORT_NUM, 0, 0);
1293 cpsw_ale_add_ucast(common->ale, sockaddr->sa_data,
1294 HOST_PORT_NUM, ALE_SECURE, 0);
1296 am65_cpsw_port_set_sl_mac(port, addr);
1297 eth_commit_mac_addr_change(ndev, sockaddr);
1299 pm_runtime_put(common->dev);
1304 static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,
1307 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1308 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1309 u32 ts_ctrl, seq_id, ts_ctrl_ltype2, ts_vlan_ltype;
1310 struct hwtstamp_config cfg;
1312 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1315 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1318 /* TX HW timestamp */
1319 switch (cfg.tx_type) {
1320 case HWTSTAMP_TX_OFF:
1321 case HWTSTAMP_TX_ON:
1327 switch (cfg.rx_filter) {
1328 case HWTSTAMP_FILTER_NONE:
1329 port->rx_ts_enabled = false;
1331 case HWTSTAMP_FILTER_ALL:
1332 case HWTSTAMP_FILTER_SOME:
1333 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1334 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1335 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1336 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1337 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1338 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1339 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1340 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1341 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1342 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1343 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1344 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1345 case HWTSTAMP_FILTER_NTP_ALL:
1346 port->rx_ts_enabled = true;
1347 cfg.rx_filter = HWTSTAMP_FILTER_ALL;
1353 port->tx_ts_enabled = (cfg.tx_type == HWTSTAMP_TX_ON);
1355 /* cfg TX timestamp */
1356 seq_id = (AM65_CPSW_TS_SEQ_ID_OFFSET <<
1357 AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT) | ETH_P_1588;
1359 ts_vlan_ltype = ETH_P_8021Q;
1361 ts_ctrl_ltype2 = ETH_P_1588 |
1362 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 |
1363 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 |
1364 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 |
1365 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 |
1366 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 |
1367 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 |
1368 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 |
1369 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO;
1371 ts_ctrl = AM65_CPSW_TS_EVENT_MSG_TYPE_BITS <<
1372 AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT;
1374 if (port->tx_ts_enabled)
1375 ts_ctrl |= AM65_CPSW_TS_TX_ANX_ALL_EN |
1376 AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN;
1378 writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG);
1379 writel(ts_vlan_ltype, port->port_base +
1380 AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG);
1381 writel(ts_ctrl_ltype2, port->port_base +
1382 AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2);
1383 writel(ts_ctrl, port->port_base + AM65_CPSW_PORTN_REG_TS_CTL);
1385 /* en/dis RX timestamp */
1386 am65_cpts_rx_enable(common->cpts, port->rx_ts_enabled);
1388 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1391 static int am65_cpsw_nuss_hwtstamp_get(struct net_device *ndev,
1394 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1395 struct hwtstamp_config cfg;
1397 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1401 cfg.tx_type = port->tx_ts_enabled ?
1402 HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
1403 cfg.rx_filter = port->rx_ts_enabled ?
1404 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;
1406 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1409 static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev,
1410 struct ifreq *req, int cmd)
1412 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1414 if (!netif_running(ndev))
1419 return am65_cpsw_nuss_hwtstamp_set(ndev, req);
1421 return am65_cpsw_nuss_hwtstamp_get(ndev, req);
1424 if (!port->slave.phy)
1427 return phy_mii_ioctl(port->slave.phy, req, cmd);
1430 static void am65_cpsw_nuss_ndo_get_stats(struct net_device *dev,
1431 struct rtnl_link_stats64 *stats)
1433 struct am65_cpsw_ndev_priv *ndev_priv = netdev_priv(dev);
1437 for_each_possible_cpu(cpu) {
1438 struct am65_cpsw_ndev_stats *cpu_stats;
1444 cpu_stats = per_cpu_ptr(ndev_priv->stats, cpu);
1446 start = u64_stats_fetch_begin_irq(&cpu_stats->syncp);
1447 rx_packets = cpu_stats->rx_packets;
1448 rx_bytes = cpu_stats->rx_bytes;
1449 tx_packets = cpu_stats->tx_packets;
1450 tx_bytes = cpu_stats->tx_bytes;
1451 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start));
1453 stats->rx_packets += rx_packets;
1454 stats->rx_bytes += rx_bytes;
1455 stats->tx_packets += tx_packets;
1456 stats->tx_bytes += tx_bytes;
1459 stats->rx_errors = dev->stats.rx_errors;
1460 stats->rx_dropped = dev->stats.rx_dropped;
1461 stats->tx_dropped = dev->stats.tx_dropped;
1464 static struct devlink_port *am65_cpsw_ndo_get_devlink_port(struct net_device *ndev)
1466 struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1468 return &port->devlink_port;
1471 static const struct net_device_ops am65_cpsw_nuss_netdev_ops = {
1472 .ndo_open = am65_cpsw_nuss_ndo_slave_open,
1473 .ndo_stop = am65_cpsw_nuss_ndo_slave_stop,
1474 .ndo_start_xmit = am65_cpsw_nuss_ndo_slave_xmit,
1475 .ndo_set_rx_mode = am65_cpsw_nuss_ndo_slave_set_rx_mode,
1476 .ndo_get_stats64 = am65_cpsw_nuss_ndo_get_stats,
1477 .ndo_validate_addr = eth_validate_addr,
1478 .ndo_set_mac_address = am65_cpsw_nuss_ndo_slave_set_mac_address,
1479 .ndo_tx_timeout = am65_cpsw_nuss_ndo_host_tx_timeout,
1480 .ndo_vlan_rx_add_vid = am65_cpsw_nuss_ndo_slave_add_vid,
1481 .ndo_vlan_rx_kill_vid = am65_cpsw_nuss_ndo_slave_kill_vid,
1482 .ndo_do_ioctl = am65_cpsw_nuss_ndo_slave_ioctl,
1483 .ndo_setup_tc = am65_cpsw_qos_ndo_setup_tc,
1484 .ndo_get_devlink_port = am65_cpsw_ndo_get_devlink_port,
1487 static void am65_cpsw_nuss_slave_disable_unused(struct am65_cpsw_port *port)
1489 struct am65_cpsw_common *common = port->common;
1491 if (!port->disabled)
1494 cpsw_ale_control_set(common->ale, port->port_id,
1495 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
1497 cpsw_sl_reset(port->slave.mac_sl, 100);
1498 cpsw_sl_ctl_reset(port->slave.mac_sl);
1501 static void am65_cpsw_nuss_free_tx_chns(void *data)
1503 struct am65_cpsw_common *common = data;
1506 for (i = 0; i < common->tx_ch_num; i++) {
1507 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1509 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1510 k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1512 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1513 k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1515 memset(tx_chn, 0, sizeof(*tx_chn));
1519 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common)
1521 struct device *dev = common->dev;
1524 devm_remove_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1526 for (i = 0; i < common->tx_ch_num; i++) {
1527 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1530 devm_free_irq(dev, tx_chn->irq, tx_chn);
1532 netif_napi_del(&tx_chn->napi_tx);
1534 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1535 k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1537 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1538 k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1540 memset(tx_chn, 0, sizeof(*tx_chn));
1544 static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common)
1546 u32 max_desc_num = ALIGN(AM65_CPSW_MAX_TX_DESC, MAX_SKB_FRAGS);
1547 struct k3_udma_glue_tx_channel_cfg tx_cfg = { 0 };
1548 struct device *dev = common->dev;
1549 struct k3_ring_cfg ring_cfg = {
1550 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1551 .mode = K3_RINGACC_RING_MODE_RING,
1557 hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1558 AM65_CPSW_NAV_SW_DATA_SIZE);
1560 tx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1561 tx_cfg.tx_cfg = ring_cfg;
1562 tx_cfg.txcq_cfg = ring_cfg;
1563 tx_cfg.tx_cfg.size = max_desc_num;
1564 tx_cfg.txcq_cfg.size = max_desc_num;
1566 for (i = 0; i < common->tx_ch_num; i++) {
1567 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1569 snprintf(tx_chn->tx_chn_name,
1570 sizeof(tx_chn->tx_chn_name), "tx%d", i);
1572 spin_lock_init(&tx_chn->lock);
1573 tx_chn->common = common;
1575 tx_chn->descs_num = max_desc_num;
1578 k3_udma_glue_request_tx_chn(dev,
1579 tx_chn->tx_chn_name,
1581 if (IS_ERR(tx_chn->tx_chn)) {
1582 ret = dev_err_probe(dev, PTR_ERR(tx_chn->tx_chn),
1583 "Failed to request tx dma channel\n");
1586 tx_chn->dma_dev = k3_udma_glue_tx_get_dma_device(tx_chn->tx_chn);
1588 tx_chn->desc_pool = k3_cppi_desc_pool_create_name(tx_chn->dma_dev,
1591 tx_chn->tx_chn_name);
1592 if (IS_ERR(tx_chn->desc_pool)) {
1593 ret = PTR_ERR(tx_chn->desc_pool);
1594 dev_err(dev, "Failed to create poll %d\n", ret);
1598 tx_chn->irq = k3_udma_glue_tx_get_irq(tx_chn->tx_chn);
1599 if (tx_chn->irq <= 0) {
1600 dev_err(dev, "Failed to get tx dma irq %d\n",
1605 snprintf(tx_chn->tx_chn_name,
1606 sizeof(tx_chn->tx_chn_name), "%s-tx%d",
1607 dev_name(dev), tx_chn->id);
1611 i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1613 dev_err(dev, "Failed to add free_tx_chns action %d\n", i);
1620 static void am65_cpsw_nuss_free_rx_chns(void *data)
1622 struct am65_cpsw_common *common = data;
1623 struct am65_cpsw_rx_chn *rx_chn;
1625 rx_chn = &common->rx_chns;
1627 if (!IS_ERR_OR_NULL(rx_chn->desc_pool))
1628 k3_cppi_desc_pool_destroy(rx_chn->desc_pool);
1630 if (!IS_ERR_OR_NULL(rx_chn->rx_chn))
1631 k3_udma_glue_release_rx_chn(rx_chn->rx_chn);
1634 static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)
1636 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
1637 struct k3_udma_glue_rx_channel_cfg rx_cfg = { 0 };
1638 u32 max_desc_num = AM65_CPSW_MAX_RX_DESC;
1639 struct device *dev = common->dev;
1644 hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1645 AM65_CPSW_NAV_SW_DATA_SIZE);
1647 rx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1648 rx_cfg.flow_id_num = AM65_CPSW_MAX_RX_FLOWS;
1649 rx_cfg.flow_id_base = common->rx_flow_id_base;
1651 /* init all flows */
1653 rx_chn->descs_num = max_desc_num;
1655 rx_chn->rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &rx_cfg);
1656 if (IS_ERR(rx_chn->rx_chn)) {
1657 ret = dev_err_probe(dev, PTR_ERR(rx_chn->rx_chn),
1658 "Failed to request rx dma channel\n");
1661 rx_chn->dma_dev = k3_udma_glue_rx_get_dma_device(rx_chn->rx_chn);
1663 rx_chn->desc_pool = k3_cppi_desc_pool_create_name(rx_chn->dma_dev,
1666 if (IS_ERR(rx_chn->desc_pool)) {
1667 ret = PTR_ERR(rx_chn->desc_pool);
1668 dev_err(dev, "Failed to create rx poll %d\n", ret);
1672 common->rx_flow_id_base =
1673 k3_udma_glue_rx_get_flow_id_base(rx_chn->rx_chn);
1674 dev_info(dev, "set new flow-id-base %u\n", common->rx_flow_id_base);
1676 fdqring_id = K3_RINGACC_RING_ID_ANY;
1677 for (i = 0; i < rx_cfg.flow_id_num; i++) {
1678 struct k3_ring_cfg rxring_cfg = {
1679 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1680 .mode = K3_RINGACC_RING_MODE_RING,
1683 struct k3_ring_cfg fdqring_cfg = {
1684 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1685 .flags = K3_RINGACC_RING_SHARED,
1687 struct k3_udma_glue_rx_flow_cfg rx_flow_cfg = {
1688 .rx_cfg = rxring_cfg,
1689 .rxfdq_cfg = fdqring_cfg,
1690 .ring_rxq_id = K3_RINGACC_RING_ID_ANY,
1692 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG,
1695 rx_flow_cfg.ring_rxfdq0_id = fdqring_id;
1696 rx_flow_cfg.rx_cfg.size = max_desc_num;
1697 rx_flow_cfg.rxfdq_cfg.size = max_desc_num;
1698 rx_flow_cfg.rxfdq_cfg.mode = common->pdata.fdqring_mode;
1700 ret = k3_udma_glue_rx_flow_init(rx_chn->rx_chn,
1703 dev_err(dev, "Failed to init rx flow%d %d\n", i, ret);
1708 k3_udma_glue_rx_flow_get_fdq_id(rx_chn->rx_chn,
1711 rx_chn->irq = k3_udma_glue_rx_get_irq(rx_chn->rx_chn, i);
1713 if (rx_chn->irq <= 0) {
1714 dev_err(dev, "Failed to get rx dma irq %d\n",
1722 i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);
1724 dev_err(dev, "Failed to add free_rx_chns action %d\n", i);
1731 static int am65_cpsw_nuss_init_host_p(struct am65_cpsw_common *common)
1733 struct am65_cpsw_host *host_p = am65_common_get_host(common);
1735 host_p->common = common;
1736 host_p->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE;
1737 host_p->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE;
1742 static int am65_cpsw_am654_get_efuse_macid(struct device_node *of_node,
1743 int slave, u8 *mac_addr)
1745 u32 mac_lo, mac_hi, offset;
1746 struct regmap *syscon;
1749 syscon = syscon_regmap_lookup_by_phandle(of_node, "ti,syscon-efuse");
1750 if (IS_ERR(syscon)) {
1751 if (PTR_ERR(syscon) == -ENODEV)
1753 return PTR_ERR(syscon);
1756 ret = of_property_read_u32_index(of_node, "ti,syscon-efuse", 1,
1761 regmap_read(syscon, offset, &mac_lo);
1762 regmap_read(syscon, offset + 4, &mac_hi);
1764 mac_addr[0] = (mac_hi >> 8) & 0xff;
1765 mac_addr[1] = mac_hi & 0xff;
1766 mac_addr[2] = (mac_lo >> 24) & 0xff;
1767 mac_addr[3] = (mac_lo >> 16) & 0xff;
1768 mac_addr[4] = (mac_lo >> 8) & 0xff;
1769 mac_addr[5] = mac_lo & 0xff;
1774 static int am65_cpsw_init_cpts(struct am65_cpsw_common *common)
1776 struct device *dev = common->dev;
1777 struct device_node *node;
1778 struct am65_cpts *cpts;
1779 void __iomem *reg_base;
1781 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1784 node = of_get_child_by_name(dev->of_node, "cpts");
1786 dev_err(dev, "%s cpts not found\n", __func__);
1790 reg_base = common->cpsw_base + AM65_CPSW_NU_CPTS_BASE;
1791 cpts = am65_cpts_create(dev, reg_base, node);
1793 int ret = PTR_ERR(cpts);
1795 if (ret == -EOPNOTSUPP) {
1796 dev_info(dev, "cpts disabled\n");
1800 dev_err(dev, "cpts create err %d\n", ret);
1803 common->cpts = cpts;
1804 /* Forbid PM runtime if CPTS is running.
1805 * K3 CPSWxG modules may completely lose context during ON->OFF
1806 * transitions depending on integration.
1807 * AM65x/J721E MCU CPSW2G: false
1808 * J721E MAIN_CPSW9G: true
1810 pm_runtime_forbid(dev);
1815 static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
1817 struct device_node *node, *port_np;
1818 struct device *dev = common->dev;
1821 node = of_get_child_by_name(dev->of_node, "ethernet-ports");
1825 for_each_child_of_node(node, port_np) {
1826 struct am65_cpsw_port *port;
1829 /* it is not a slave port node, continue */
1830 if (strcmp(port_np->name, "port"))
1833 ret = of_property_read_u32(port_np, "reg", &port_id);
1835 dev_err(dev, "%pOF error reading port_id %d\n",
1840 if (!port_id || port_id > common->port_num) {
1841 dev_err(dev, "%pOF has invalid port_id %u %s\n",
1842 port_np, port_id, port_np->name);
1846 port = am65_common_get_port(common, port_id);
1847 port->port_id = port_id;
1848 port->common = common;
1849 port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE +
1850 AM65_CPSW_NU_PORTS_OFFSET * (port_id);
1851 port->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE +
1852 (AM65_CPSW_NU_STATS_PORT_OFFSET * port_id);
1853 port->name = of_get_property(port_np, "label", NULL);
1854 port->fetch_ram_base =
1855 common->cpsw_base + AM65_CPSW_NU_FRAM_BASE +
1856 (AM65_CPSW_NU_FRAM_PORT_OFFSET * (port_id - 1));
1858 port->slave.mac_sl = cpsw_sl_get("am65", dev, port->port_base);
1859 if (IS_ERR(port->slave.mac_sl))
1860 return PTR_ERR(port->slave.mac_sl);
1862 port->disabled = !of_device_is_available(port_np);
1863 if (port->disabled) {
1864 common->disabled_ports_mask |= BIT(port->port_id);
1868 port->slave.ifphy = devm_of_phy_get(dev, port_np, NULL);
1869 if (IS_ERR(port->slave.ifphy)) {
1870 ret = PTR_ERR(port->slave.ifphy);
1871 dev_err(dev, "%pOF error retrieving port phy: %d\n",
1876 port->slave.mac_only =
1877 of_property_read_bool(port_np, "ti,mac-only");
1879 /* get phy/link info */
1880 if (of_phy_is_fixed_link(port_np)) {
1881 ret = of_phy_register_fixed_link(port_np);
1883 return dev_err_probe(dev, ret,
1884 "failed to register fixed-link phy %pOF\n",
1886 port->slave.phy_node = of_node_get(port_np);
1888 port->slave.phy_node =
1889 of_parse_phandle(port_np, "phy-handle", 0);
1892 if (!port->slave.phy_node) {
1894 "slave[%d] no phy found\n", port_id);
1898 ret = of_get_phy_mode(port_np, &port->slave.phy_if);
1900 dev_err(dev, "%pOF read phy-mode err %d\n",
1905 ret = of_get_mac_address(port_np, port->slave.mac_addr);
1907 am65_cpsw_am654_get_efuse_macid(port_np,
1909 port->slave.mac_addr);
1910 if (!is_valid_ether_addr(port->slave.mac_addr)) {
1911 random_ether_addr(port->slave.mac_addr);
1912 dev_err(dev, "Use random MAC address\n");
1918 /* is there at least one ext.port */
1919 if (!(~common->disabled_ports_mask & GENMASK(common->port_num, 1))) {
1920 dev_err(dev, "No Ext. port are available\n");
1927 static void am65_cpsw_pcpu_stats_free(void *data)
1929 struct am65_cpsw_ndev_stats __percpu *stats = data;
1935 am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx)
1937 struct am65_cpsw_ndev_priv *ndev_priv;
1938 struct device *dev = common->dev;
1939 struct am65_cpsw_port *port;
1942 port = &common->ports[port_idx];
1948 port->ndev = devm_alloc_etherdev_mqs(common->dev,
1949 sizeof(struct am65_cpsw_ndev_priv),
1950 AM65_CPSW_MAX_TX_QUEUES,
1951 AM65_CPSW_MAX_RX_QUEUES);
1953 dev_err(dev, "error allocating slave net_device %u\n",
1958 ndev_priv = netdev_priv(port->ndev);
1959 ndev_priv->port = port;
1960 ndev_priv->msg_enable = AM65_CPSW_DEBUG;
1961 SET_NETDEV_DEV(port->ndev, dev);
1963 ether_addr_copy(port->ndev->dev_addr, port->slave.mac_addr);
1965 port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE;
1966 port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;
1967 port->ndev->hw_features = NETIF_F_SG |
1971 port->ndev->features = port->ndev->hw_features |
1972 NETIF_F_HW_VLAN_CTAG_FILTER;
1973 port->ndev->vlan_features |= NETIF_F_SG;
1974 port->ndev->netdev_ops = &am65_cpsw_nuss_netdev_ops;
1975 port->ndev->ethtool_ops = &am65_cpsw_ethtool_ops_slave;
1977 /* Disable TX checksum offload by default due to HW bug */
1978 if (common->pdata.quirks & AM65_CPSW_QUIRK_I2027_NO_TX_CSUM)
1979 port->ndev->features &= ~NETIF_F_HW_CSUM;
1981 ndev_priv->stats = netdev_alloc_pcpu_stats(struct am65_cpsw_ndev_stats);
1982 if (!ndev_priv->stats)
1985 ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free,
1988 dev_err(dev, "failed to add percpu stat free action %d\n", ret);
1990 if (!common->dma_ndev)
1991 common->dma_ndev = port->ndev;
1996 static int am65_cpsw_nuss_init_ndevs(struct am65_cpsw_common *common)
2001 for (i = 0; i < common->port_num; i++) {
2002 ret = am65_cpsw_nuss_init_port_ndev(common, i);
2007 netif_napi_add(common->dma_ndev, &common->napi_rx,
2008 am65_cpsw_nuss_rx_poll, NAPI_POLL_WEIGHT);
2013 static int am65_cpsw_nuss_ndev_add_tx_napi(struct am65_cpsw_common *common)
2015 struct device *dev = common->dev;
2018 for (i = 0; i < common->tx_ch_num; i++) {
2019 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
2021 netif_tx_napi_add(common->dma_ndev, &tx_chn->napi_tx,
2022 am65_cpsw_nuss_tx_poll, NAPI_POLL_WEIGHT);
2024 ret = devm_request_irq(dev, tx_chn->irq,
2025 am65_cpsw_nuss_tx_irq,
2027 tx_chn->tx_chn_name, tx_chn);
2029 dev_err(dev, "failure requesting tx%u irq %u, %d\n",
2030 tx_chn->id, tx_chn->irq, ret);
2039 static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common)
2041 struct am65_cpsw_port *port;
2044 for (i = 0; i < common->port_num; i++) {
2045 port = &common->ports[i];
2047 unregister_netdev(port->ndev);
2051 static void am65_cpsw_port_offload_fwd_mark_update(struct am65_cpsw_common *common)
2056 if (common->br_members == (GENMASK(common->port_num, 1) & ~common->disabled_ports_mask))
2059 dev_dbg(common->dev, "set offload_fwd_mark %d\n", set_val);
2061 for (i = 1; i <= common->port_num; i++) {
2062 struct am65_cpsw_port *port = am65_common_get_port(common, i);
2063 struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(port->ndev);
2065 priv->offload_fwd_mark = set_val;
2069 bool am65_cpsw_port_dev_check(const struct net_device *ndev)
2071 if (ndev->netdev_ops == &am65_cpsw_nuss_netdev_ops) {
2072 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2074 return !common->is_emac_mode;
2080 static int am65_cpsw_netdevice_port_link(struct net_device *ndev, struct net_device *br_ndev)
2082 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2083 struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
2085 if (!common->br_members) {
2086 common->hw_bridge_dev = br_ndev;
2088 /* This is adding the port to a second bridge, this is
2091 if (common->hw_bridge_dev != br_ndev)
2095 common->br_members |= BIT(priv->port->port_id);
2097 am65_cpsw_port_offload_fwd_mark_update(common);
2102 static void am65_cpsw_netdevice_port_unlink(struct net_device *ndev)
2104 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2105 struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
2107 common->br_members &= ~BIT(priv->port->port_id);
2109 am65_cpsw_port_offload_fwd_mark_update(common);
2111 if (!common->br_members)
2112 common->hw_bridge_dev = NULL;
2115 /* netdev notifier */
2116 static int am65_cpsw_netdevice_event(struct notifier_block *unused,
2117 unsigned long event, void *ptr)
2119 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2120 struct netdev_notifier_changeupper_info *info;
2121 int ret = NOTIFY_DONE;
2123 if (!am65_cpsw_port_dev_check(ndev))
2127 case NETDEV_CHANGEUPPER:
2130 if (netif_is_bridge_master(info->upper_dev)) {
2132 ret = am65_cpsw_netdevice_port_link(ndev, info->upper_dev);
2134 am65_cpsw_netdevice_port_unlink(ndev);
2141 return notifier_from_errno(ret);
2144 static int am65_cpsw_register_notifiers(struct am65_cpsw_common *cpsw)
2148 if (AM65_CPSW_IS_CPSW2G(cpsw) ||
2149 !IS_REACHABLE(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV))
2152 cpsw->am65_cpsw_netdevice_nb.notifier_call = &am65_cpsw_netdevice_event;
2153 ret = register_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2155 dev_err(cpsw->dev, "can't register netdevice notifier\n");
2159 ret = am65_cpsw_switchdev_register_notifiers(cpsw);
2161 unregister_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2166 static void am65_cpsw_unregister_notifiers(struct am65_cpsw_common *cpsw)
2168 if (AM65_CPSW_IS_CPSW2G(cpsw) ||
2169 !IS_REACHABLE(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV))
2172 am65_cpsw_switchdev_unregister_notifiers(cpsw);
2173 unregister_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2176 static const struct devlink_ops am65_cpsw_devlink_ops = {};
2178 static void am65_cpsw_init_stp_ale_entry(struct am65_cpsw_common *cpsw)
2180 cpsw_ale_add_mcast(cpsw->ale, eth_stp_addr, ALE_PORT_HOST, ALE_SUPER, 0,
2181 ALE_MCAST_BLOCK_LEARN_FWD);
2184 static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common)
2186 struct am65_cpsw_host *host = am65_common_get_host(common);
2188 writel(common->default_vlan, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2190 am65_cpsw_init_stp_ale_entry(common);
2192 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_P0_UNI_FLOOD, 1);
2193 dev_dbg(common->dev, "Set P0_UNI_FLOOD\n");
2194 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_PORT_NOLEARN, 0);
2197 static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common)
2199 struct am65_cpsw_host *host = am65_common_get_host(common);
2201 writel(0, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2203 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_P0_UNI_FLOOD, 0);
2204 dev_dbg(common->dev, "unset P0_UNI_FLOOD\n");
2206 /* learning make no sense in multi-mac mode */
2207 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_PORT_NOLEARN, 1);
2210 static int am65_cpsw_dl_switch_mode_get(struct devlink *dl, u32 id,
2211 struct devlink_param_gset_ctx *ctx)
2213 struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);
2214 struct am65_cpsw_common *common = dl_priv->common;
2216 dev_dbg(common->dev, "%s id:%u\n", __func__, id);
2218 if (id != AM65_CPSW_DL_PARAM_SWITCH_MODE)
2221 ctx->val.vbool = !common->is_emac_mode;
2226 static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port)
2228 struct am65_cpsw_slave_data *slave = &port->slave;
2229 struct am65_cpsw_common *common = port->common;
2232 writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2234 if (slave->mac_only)
2235 /* enable mac-only mode on port */
2236 cpsw_ale_control_set(common->ale, port->port_id,
2237 ALE_PORT_MACONLY, 1);
2239 cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_NOLEARN, 1);
2241 port_mask = BIT(port->port_id) | ALE_PORT_HOST;
2243 cpsw_ale_add_ucast(common->ale, port->ndev->dev_addr,
2244 HOST_PORT_NUM, ALE_SECURE, slave->port_vlan);
2245 cpsw_ale_add_mcast(common->ale, port->ndev->broadcast,
2246 port_mask, ALE_VLAN, slave->port_vlan, ALE_MCAST_FWD_2);
2249 static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port)
2251 struct am65_cpsw_slave_data *slave = &port->slave;
2252 struct am65_cpsw_common *cpsw = port->common;
2255 cpsw_ale_control_set(cpsw->ale, port->port_id,
2256 ALE_PORT_NOLEARN, 0);
2258 cpsw_ale_add_ucast(cpsw->ale, port->ndev->dev_addr,
2259 HOST_PORT_NUM, ALE_SECURE | ALE_BLOCKED | ALE_VLAN,
2262 port_mask = BIT(port->port_id) | ALE_PORT_HOST;
2264 cpsw_ale_add_mcast(cpsw->ale, port->ndev->broadcast,
2265 port_mask, ALE_VLAN, slave->port_vlan,
2268 writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2270 cpsw_ale_control_set(cpsw->ale, port->port_id,
2271 ALE_PORT_MACONLY, 0);
2274 static int am65_cpsw_dl_switch_mode_set(struct devlink *dl, u32 id,
2275 struct devlink_param_gset_ctx *ctx)
2277 struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);
2278 struct am65_cpsw_common *cpsw = dl_priv->common;
2279 bool switch_en = ctx->val.vbool;
2280 bool if_running = false;
2283 dev_dbg(cpsw->dev, "%s id:%u\n", __func__, id);
2285 if (id != AM65_CPSW_DL_PARAM_SWITCH_MODE)
2288 if (switch_en == !cpsw->is_emac_mode)
2291 if (!switch_en && cpsw->br_members) {
2292 dev_err(cpsw->dev, "Remove ports from bridge before disabling switch mode\n");
2298 cpsw->is_emac_mode = !switch_en;
2300 for (i = 0; i < cpsw->port_num; i++) {
2301 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2303 if (!sl_ndev || !netif_running(sl_ndev))
2310 /* all ndevs are down */
2311 for (i = 0; i < cpsw->port_num; i++) {
2312 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2313 struct am65_cpsw_slave_data *slave;
2318 slave = am65_ndev_to_slave(sl_ndev);
2320 slave->port_vlan = cpsw->default_vlan;
2322 slave->port_vlan = 0;
2328 cpsw_ale_control_set(cpsw->ale, 0, ALE_BYPASS, 1);
2329 /* clean up ALE table */
2330 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_CLEAR, 1);
2331 cpsw_ale_control_get(cpsw->ale, HOST_PORT_NUM, ALE_AGEOUT);
2334 dev_info(cpsw->dev, "Enable switch mode\n");
2336 am65_cpsw_init_host_port_switch(cpsw);
2338 for (i = 0; i < cpsw->port_num; i++) {
2339 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2340 struct am65_cpsw_slave_data *slave;
2341 struct am65_cpsw_port *port;
2346 port = am65_ndev_to_port(sl_ndev);
2347 slave = am65_ndev_to_slave(sl_ndev);
2348 slave->port_vlan = cpsw->default_vlan;
2350 if (netif_running(sl_ndev))
2351 am65_cpsw_init_port_switch_ale(port);
2355 dev_info(cpsw->dev, "Disable switch mode\n");
2357 am65_cpsw_init_host_port_emac(cpsw);
2359 for (i = 0; i < cpsw->port_num; i++) {
2360 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2361 struct am65_cpsw_port *port;
2366 port = am65_ndev_to_port(sl_ndev);
2367 port->slave.port_vlan = 0;
2368 if (netif_running(sl_ndev))
2369 am65_cpsw_init_port_emac_ale(port);
2372 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_BYPASS, 0);
2379 static const struct devlink_param am65_cpsw_devlink_params[] = {
2380 DEVLINK_PARAM_DRIVER(AM65_CPSW_DL_PARAM_SWITCH_MODE, "switch_mode",
2381 DEVLINK_PARAM_TYPE_BOOL,
2382 BIT(DEVLINK_PARAM_CMODE_RUNTIME),
2383 am65_cpsw_dl_switch_mode_get,
2384 am65_cpsw_dl_switch_mode_set, NULL),
2387 static void am65_cpsw_unregister_devlink_ports(struct am65_cpsw_common *common)
2389 struct devlink_port *dl_port;
2390 struct am65_cpsw_port *port;
2393 for (i = 1; i <= common->port_num; i++) {
2394 port = am65_common_get_port(common, i);
2395 dl_port = &port->devlink_port;
2397 if (dl_port->registered)
2398 devlink_port_unregister(dl_port);
2402 static int am65_cpsw_nuss_register_devlink(struct am65_cpsw_common *common)
2404 struct devlink_port_attrs attrs = {};
2405 struct am65_cpsw_devlink *dl_priv;
2406 struct device *dev = common->dev;
2407 struct devlink_port *dl_port;
2408 struct am65_cpsw_port *port;
2413 devlink_alloc(&am65_cpsw_devlink_ops, sizeof(*dl_priv));
2414 if (!common->devlink)
2417 dl_priv = devlink_priv(common->devlink);
2418 dl_priv->common = common;
2420 ret = devlink_register(common->devlink, dev);
2422 dev_err(dev, "devlink reg fail ret:%d\n", ret);
2426 /* Provide devlink hook to switch mode when multiple external ports
2427 * are present NUSS switchdev driver is enabled.
2429 if (!AM65_CPSW_IS_CPSW2G(common) &&
2430 IS_ENABLED(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV)) {
2431 ret = devlink_params_register(common->devlink,
2432 am65_cpsw_devlink_params,
2433 ARRAY_SIZE(am65_cpsw_devlink_params));
2435 dev_err(dev, "devlink params reg fail ret:%d\n", ret);
2438 devlink_params_publish(common->devlink);
2441 for (i = 1; i <= common->port_num; i++) {
2442 port = am65_common_get_port(common, i);
2443 dl_port = &port->devlink_port;
2445 attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
2446 attrs.phys.port_number = port->port_id;
2447 attrs.switch_id.id_len = sizeof(resource_size_t);
2448 memcpy(attrs.switch_id.id, common->switch_id, attrs.switch_id.id_len);
2449 devlink_port_attrs_set(dl_port, &attrs);
2451 ret = devlink_port_register(common->devlink, dl_port, port->port_id);
2453 dev_err(dev, "devlink_port reg fail for port %d, ret:%d\n",
2454 port->port_id, ret);
2457 devlink_port_type_eth_set(dl_port, port->ndev);
2463 am65_cpsw_unregister_devlink_ports(common);
2465 devlink_unregister(common->devlink);
2467 devlink_free(common->devlink);
2472 static void am65_cpsw_unregister_devlink(struct am65_cpsw_common *common)
2474 if (!AM65_CPSW_IS_CPSW2G(common) &&
2475 IS_ENABLED(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV)) {
2476 devlink_params_unpublish(common->devlink);
2477 devlink_params_unregister(common->devlink, am65_cpsw_devlink_params,
2478 ARRAY_SIZE(am65_cpsw_devlink_params));
2481 am65_cpsw_unregister_devlink_ports(common);
2482 devlink_unregister(common->devlink);
2483 devlink_free(common->devlink);
2486 static int am65_cpsw_nuss_register_ndevs(struct am65_cpsw_common *common)
2488 struct device *dev = common->dev;
2489 struct am65_cpsw_port *port;
2492 ret = am65_cpsw_nuss_ndev_add_tx_napi(common);
2496 ret = devm_request_irq(dev, common->rx_chns.irq,
2497 am65_cpsw_nuss_rx_irq,
2498 IRQF_TRIGGER_HIGH, dev_name(dev), common);
2500 dev_err(dev, "failure requesting rx irq %u, %d\n",
2501 common->rx_chns.irq, ret);
2505 for (i = 0; i < common->port_num; i++) {
2506 port = &common->ports[i];
2511 ret = register_netdev(port->ndev);
2513 dev_err(dev, "error registering slave net device%i %d\n",
2515 goto err_cleanup_ndev;
2519 ret = am65_cpsw_register_notifiers(common);
2521 goto err_cleanup_ndev;
2523 ret = am65_cpsw_nuss_register_devlink(common);
2525 goto clean_unregister_notifiers;
2527 /* can't auto unregister ndev using devm_add_action() due to
2528 * devres release sequence in DD core for DMA
2532 clean_unregister_notifiers:
2533 am65_cpsw_unregister_notifiers(common);
2535 am65_cpsw_nuss_cleanup_ndev(common);
2540 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx)
2544 common->tx_ch_num = num_tx;
2545 ret = am65_cpsw_nuss_init_tx_chns(common);
2549 return am65_cpsw_nuss_ndev_add_tx_napi(common);
2552 struct am65_cpsw_soc_pdata {
2556 static const struct am65_cpsw_soc_pdata am65x_soc_sr2_0 = {
2557 .quirks_dis = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2560 static const struct soc_device_attribute am65_cpsw_socinfo[] = {
2561 { .family = "AM65X",
2562 .revision = "SR2.0",
2563 .data = &am65x_soc_sr2_0
2568 static const struct am65_cpsw_pdata am65x_sr1_0 = {
2569 .quirks = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2570 .ale_dev_id = "am65x-cpsw2g",
2571 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2574 static const struct am65_cpsw_pdata j721e_pdata = {
2576 .ale_dev_id = "am65x-cpsw2g",
2577 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2580 static const struct am65_cpsw_pdata am64x_cpswxg_pdata = {
2582 .ale_dev_id = "am64-cpswxg",
2583 .fdqring_mode = K3_RINGACC_RING_MODE_RING,
2586 static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {
2587 { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0},
2588 { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata},
2589 { .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata},
2592 MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable);
2594 static void am65_cpsw_nuss_apply_socinfo(struct am65_cpsw_common *common)
2596 const struct soc_device_attribute *soc;
2598 soc = soc_device_match(am65_cpsw_socinfo);
2599 if (soc && soc->data) {
2600 const struct am65_cpsw_soc_pdata *socdata = soc->data;
2602 /* disable quirks */
2603 common->pdata.quirks &= ~socdata->quirks_dis;
2607 static int am65_cpsw_nuss_probe(struct platform_device *pdev)
2609 struct cpsw_ale_params ale_params = { 0 };
2610 const struct of_device_id *of_id;
2611 struct device *dev = &pdev->dev;
2612 struct am65_cpsw_common *common;
2613 struct device_node *node;
2614 struct resource *res;
2619 common = devm_kzalloc(dev, sizeof(struct am65_cpsw_common), GFP_KERNEL);
2624 of_id = of_match_device(am65_cpsw_nuss_of_mtable, dev);
2627 common->pdata = *(const struct am65_cpsw_pdata *)of_id->data;
2629 am65_cpsw_nuss_apply_socinfo(common);
2631 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cpsw_nuss");
2632 common->ss_base = devm_ioremap_resource(&pdev->dev, res);
2633 if (IS_ERR(common->ss_base))
2634 return PTR_ERR(common->ss_base);
2635 common->cpsw_base = common->ss_base + AM65_CPSW_CPSW_NU_BASE;
2636 /* Use device's physical base address as switch id */
2637 id_temp = cpu_to_be64(res->start);
2638 memcpy(common->switch_id, &id_temp, sizeof(res->start));
2640 node = of_get_child_by_name(dev->of_node, "ethernet-ports");
2643 common->port_num = of_get_child_count(node);
2644 if (common->port_num < 1 || common->port_num > AM65_CPSW_MAX_PORTS)
2648 common->rx_flow_id_base = -1;
2649 init_completion(&common->tdown_complete);
2650 common->tx_ch_num = 1;
2651 common->pf_p0_rx_ptype_rrobin = false;
2652 common->default_vlan = 1;
2654 common->ports = devm_kcalloc(dev, common->port_num,
2655 sizeof(*common->ports),
2660 clk = devm_clk_get(dev, "fck");
2662 return dev_err_probe(dev, PTR_ERR(clk), "getting fck clock\n");
2663 common->bus_freq = clk_get_rate(clk);
2665 pm_runtime_enable(dev);
2666 ret = pm_runtime_get_sync(dev);
2668 pm_runtime_put_noidle(dev);
2669 pm_runtime_disable(dev);
2673 node = of_get_child_by_name(dev->of_node, "mdio");
2675 dev_warn(dev, "MDIO node not found\n");
2676 } else if (of_device_is_available(node)) {
2677 struct platform_device *mdio_pdev;
2679 mdio_pdev = of_platform_device_create(node, NULL, dev);
2685 common->mdio_dev = &mdio_pdev->dev;
2689 am65_cpsw_nuss_get_ver(common);
2691 /* init tx channels */
2692 ret = am65_cpsw_nuss_init_tx_chns(common);
2695 ret = am65_cpsw_nuss_init_rx_chns(common);
2699 ret = am65_cpsw_nuss_init_host_p(common);
2703 ret = am65_cpsw_nuss_init_slave_ports(common);
2707 /* init common data */
2708 ale_params.dev = dev;
2709 ale_params.ale_ageout = AM65_CPSW_ALE_AGEOUT_DEFAULT;
2710 ale_params.ale_ports = common->port_num + 1;
2711 ale_params.ale_regs = common->cpsw_base + AM65_CPSW_NU_ALE_BASE;
2712 ale_params.dev_id = common->pdata.ale_dev_id;
2713 ale_params.bus_freq = common->bus_freq;
2715 common->ale = cpsw_ale_create(&ale_params);
2716 if (IS_ERR(common->ale)) {
2717 dev_err(dev, "error initializing ale engine\n");
2718 ret = PTR_ERR(common->ale);
2722 ret = am65_cpsw_init_cpts(common);
2727 for (i = 0; i < common->port_num; i++)
2728 am65_cpsw_nuss_slave_disable_unused(&common->ports[i]);
2730 dev_set_drvdata(dev, common);
2732 common->is_emac_mode = true;
2734 ret = am65_cpsw_nuss_init_ndevs(common);
2738 ret = am65_cpsw_nuss_register_ndevs(common);
2742 pm_runtime_put(dev);
2746 of_platform_device_destroy(common->mdio_dev, NULL);
2748 pm_runtime_put_sync(dev);
2749 pm_runtime_disable(dev);
2753 static int am65_cpsw_nuss_remove(struct platform_device *pdev)
2755 struct device *dev = &pdev->dev;
2756 struct am65_cpsw_common *common;
2759 common = dev_get_drvdata(dev);
2761 ret = pm_runtime_get_sync(&pdev->dev);
2763 pm_runtime_put_noidle(&pdev->dev);
2767 am65_cpsw_unregister_devlink(common);
2768 am65_cpsw_unregister_notifiers(common);
2770 /* must unregister ndevs here because DD release_driver routine calls
2771 * dma_deconfigure(dev) before devres_release_all(dev)
2773 am65_cpsw_nuss_cleanup_ndev(common);
2775 of_platform_device_destroy(common->mdio_dev, NULL);
2777 pm_runtime_put_sync(&pdev->dev);
2778 pm_runtime_disable(&pdev->dev);
2782 static struct platform_driver am65_cpsw_nuss_driver = {
2784 .name = AM65_CPSW_DRV_NAME,
2785 .of_match_table = am65_cpsw_nuss_of_mtable,
2787 .probe = am65_cpsw_nuss_probe,
2788 .remove = am65_cpsw_nuss_remove,
2791 module_platform_driver(am65_cpsw_nuss_driver);
2793 MODULE_LICENSE("GPL v2");
2794 MODULE_AUTHOR("Grygorii Strashko <grygorii.strashko@ti.com>");
2795 MODULE_DESCRIPTION("TI AM65 CPSW Ethernet driver");