drivers/net/ethernet/ti/am65-cpsw-nuss.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
   3  *
   4  * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/etherdevice.h>
  10 #include <linux/if_bridge.h>
  11 #include <linux/if_vlan.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/kernel.h>
  14 #include <linux/kmemleak.h>
  15 #include <linux/module.h>
  16 #include <linux/netdevice.h>
  17 #include <linux/net_tstamp.h>
  18 #include <linux/of.h>
  19 #include <linux/of_mdio.h>
  20 #include <linux/of_net.h>
  21 #include <linux/of_device.h>
  22 #include <linux/phy.h>
  23 #include <linux/phy/phy.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/regmap.h>
  27 #include <linux/mfd/syscon.h>
  28 #include <linux/sys_soc.h>
  29 #include <linux/dma/ti-cppi5.h>
  30 #include <linux/dma/k3-udma-glue.h>
  31
  32 #include "cpsw_ale.h"
  33 #include "cpsw_sl.h"
  34 #include "am65-cpsw-nuss.h"
  35 #include "am65-cpsw-switchdev.h"
  36 #include "k3-cppi-desc-pool.h"
  37 #include "am65-cpts.h"
  38
  39 #define AM65_CPSW_SS_BASE       0x0
  40 #define AM65_CPSW_SGMII_BASE    0x100
  41 #define AM65_CPSW_XGMII_BASE    0x2100
  42 #define AM65_CPSW_CPSW_NU_BASE  0x20000
  43 #define AM65_CPSW_NU_PORTS_BASE 0x1000
  44 #define AM65_CPSW_NU_FRAM_BASE  0x12000
  45 #define AM65_CPSW_NU_STATS_BASE 0x1a000
  46 #define AM65_CPSW_NU_ALE_BASE   0x1e000
  47 #define AM65_CPSW_NU_CPTS_BASE  0x1d000
  48
  49 #define AM65_CPSW_NU_PORTS_OFFSET       0x1000
  50 #define AM65_CPSW_NU_STATS_PORT_OFFSET  0x200
  51 #define AM65_CPSW_NU_FRAM_PORT_OFFSET   0x200
  52
  53 #define AM65_CPSW_MAX_PORTS     8
  54
  55 #define AM65_CPSW_MIN_PACKET_SIZE       VLAN_ETH_ZLEN
  56 #define AM65_CPSW_MAX_PACKET_SIZE       (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
  57
  58 #define AM65_CPSW_REG_CTL               0x004
  59 #define AM65_CPSW_REG_STAT_PORT_EN      0x014
  60 #define AM65_CPSW_REG_PTYPE             0x018
  61
  62 #define AM65_CPSW_P0_REG_CTL                    0x004
  63 #define AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET      0x008
  64
  65 #define AM65_CPSW_PORT_REG_PRI_CTL              0x01c
  66 #define AM65_CPSW_PORT_REG_RX_PRI_MAP           0x020
  67 #define AM65_CPSW_PORT_REG_RX_MAXLEN            0x024
  68
  69 #define AM65_CPSW_PORTN_REG_SA_L                0x308
  70 #define AM65_CPSW_PORTN_REG_SA_H                0x30c
  71 #define AM65_CPSW_PORTN_REG_TS_CTL              0x310
  72 #define AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG    0x314
  73 #define AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG   0x318
  74 #define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2       0x31C
  75
  76 #define AM65_CPSW_CTL_VLAN_AWARE                BIT(1)
  77 #define AM65_CPSW_CTL_P0_ENABLE                 BIT(2)
  78 #define AM65_CPSW_CTL_P0_TX_CRC_REMOVE          BIT(13)
  79 #define AM65_CPSW_CTL_P0_RX_PAD                 BIT(14)
  80
  81 /* AM65_CPSW_P0_REG_CTL */
  82 #define AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN     BIT(0)
  83
  84 /* AM65_CPSW_PORT_REG_PRI_CTL */
  85 #define AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN      BIT(8)
  86
  87 /* AM65_CPSW_PN_TS_CTL register fields */
  88 #define AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN         BIT(4)
  89 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN      BIT(5)
  90 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT2_EN      BIT(6)
  91 #define AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN         BIT(7)
  92 #define AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN         BIT(10)
  93 #define AM65_CPSW_PN_TS_CTL_TX_HOST_TS_EN       BIT(11)
  94 #define AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT   16
  95
  96 /* AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG register fields */
  97 #define AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT     16
  98
  99 /* AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 */
 100 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107       BIT(16)
 101 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129       BIT(17)
 102 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130       BIT(18)
 103 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131       BIT(19)
 104 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132       BIT(20)
 105 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319       BIT(21)
 106 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320       BIT(22)
 107 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO BIT(23)
 108
 109 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
 110 #define AM65_CPSW_TS_EVENT_MSG_TYPE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3))
 111
 112 #define AM65_CPSW_TS_SEQ_ID_OFFSET (0x1e)
 113
 114 #define AM65_CPSW_TS_TX_ANX_ALL_EN              \
 115         (AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN |      \
 116          AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN |      \
 117          AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN)
 118
 119 #define AM65_CPSW_ALE_AGEOUT_DEFAULT    30
 120 /* Number of TX/RX descriptors */
 121 #define AM65_CPSW_MAX_TX_DESC   500
 122 #define AM65_CPSW_MAX_RX_DESC   500
 123
 124 #define AM65_CPSW_NAV_PS_DATA_SIZE 16
 125 #define AM65_CPSW_NAV_SW_DATA_SIZE 16
 126
 127 #define AM65_CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK | \
 128                          NETIF_MSG_IFUP | NETIF_MSG_PROBE | NETIF_MSG_IFDOWN | \
 129                          NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
 130
 131 static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave,
 132                                       const u8 *dev_addr)
 133 {
 134         u32 mac_hi = (dev_addr[0] << 0) | (dev_addr[1] << 8) |
 135                      (dev_addr[2] << 16) | (dev_addr[3] << 24);
 136         u32 mac_lo = (dev_addr[4] << 0) | (dev_addr[5] << 8);
 137
 138         writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
 139         writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L);
 140 }
 141
 142 static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port)
 143 {
 144         cpsw_sl_reset(port->slave.mac_sl, 100);
 145         /* Max length register has to be restored after MAC SL reset */
 146         writel(AM65_CPSW_MAX_PACKET_SIZE,
 147                port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
 148 }
 149
 150 static void am65_cpsw_nuss_get_ver(struct am65_cpsw_common *common)
 151 {
 152         common->nuss_ver = readl(common->ss_base);
 153         common->cpsw_ver = readl(common->cpsw_base);
 154         dev_info(common->dev,
 155                  "initializing am65 cpsw nuss version 0x%08X, cpsw version 0x%08X Ports: %u quirks:%08x\n",
 156                 common->nuss_ver,
 157                 common->cpsw_ver,
 158                 common->port_num + 1,
 159                 common->pdata.quirks);
 160 }
 161
 162 void am65_cpsw_nuss_adjust_link(struct net_device *ndev)
 163 {
 164         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 165         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 166         struct phy_device *phy = port->slave.phy;
 167         u32 mac_control = 0;
 168
 169         if (!phy)
 170                 return;
 171
 172         if (phy->link) {
 173                 mac_control = CPSW_SL_CTL_GMII_EN;
 174
 175                 if (phy->speed == 1000)
 176                         mac_control |= CPSW_SL_CTL_GIG;
 177                 if (phy->speed == 10 && phy_interface_is_rgmii(phy))
 178                         /* Can be used with in band mode only */
 179                         mac_control |= CPSW_SL_CTL_EXT_EN;
 180                 if (phy->speed == 100 && phy->interface == PHY_INTERFACE_MODE_RMII)
 181                         mac_control |= CPSW_SL_CTL_IFCTL_A;
 182                 if (phy->duplex)
 183                         mac_control |= CPSW_SL_CTL_FULLDUPLEX;
 184
 185                 /* RGMII speed is 100M if !CPSW_SL_CTL_GIG*/
 186
 187                 /* rx_pause/tx_pause */
 188                 if (port->slave.rx_pause)
 189                         mac_control |= CPSW_SL_CTL_RX_FLOW_EN;
 190
 191                 if (port->slave.tx_pause)
 192                         mac_control |= CPSW_SL_CTL_TX_FLOW_EN;
 193
 194                 cpsw_sl_ctl_set(port->slave.mac_sl, mac_control);
 195
 196                 /* enable forwarding */
 197                 cpsw_ale_control_set(common->ale, port->port_id,
 198                                      ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 199
 200                 am65_cpsw_qos_link_up(ndev, phy->speed);
 201                 netif_tx_wake_all_queues(ndev);
 202         } else {
 203                 int tmo;
 204
 205                 /* disable forwarding */
 206                 cpsw_ale_control_set(common->ale, port->port_id,
 207                                      ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 208
 209                 cpsw_sl_ctl_set(port->slave.mac_sl, CPSW_SL_CTL_CMD_IDLE);
 210
 211                 tmo = cpsw_sl_wait_for_idle(port->slave.mac_sl, 100);
 212                 dev_dbg(common->dev, "donw msc_sl %08x tmo %d\n",
 213                         cpsw_sl_reg_read(port->slave.mac_sl, CPSW_SL_MACSTATUS),
 214                         tmo);
 215
 216                 cpsw_sl_ctl_reset(port->slave.mac_sl);
 217
 218                 am65_cpsw_qos_link_down(ndev);
 219                 netif_tx_stop_all_queues(ndev);
 220         }
 221
 222         phy_print_status(phy);
 223 }
 224
 225 static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev,
 226                                             __be16 proto, u16 vid)
 227 {
 228         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 229         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 230         u32 port_mask, unreg_mcast = 0;
 231         int ret;
 232
 233         if (!common->is_emac_mode)
 234                 return 0;
 235
 236         if (!netif_running(ndev) || !vid)
 237                 return 0;
 238
 239         ret = pm_runtime_get_sync(common->dev);
 240         if (ret < 0) {
 241                 pm_runtime_put_noidle(common->dev);
 242                 return ret;
 243         }
 244
 245         port_mask = BIT(port->port_id) | ALE_PORT_HOST;
 246         if (!vid)
 247                 unreg_mcast = port_mask;
 248         dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid);
 249         ret = cpsw_ale_vlan_add_modify(common->ale, vid, port_mask,
 250                                        unreg_mcast, port_mask, 0);
 251
 252         pm_runtime_put(common->dev);
 253         return ret;
 254 }
 255
 256 static int am65_cpsw_nuss_ndo_slave_kill_vid(struct net_device *ndev,
 257                                              __be16 proto, u16 vid)
 258 {
 259         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 260         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 261         int ret;
 262
 263         if (!common->is_emac_mode)
 264                 return 0;
 265
 266         if (!netif_running(ndev) || !vid)
 267                 return 0;
 268
 269         ret = pm_runtime_get_sync(common->dev);
 270         if (ret < 0) {
 271                 pm_runtime_put_noidle(common->dev);
 272                 return ret;
 273         }
 274
 275         dev_info(common->dev, "Removing vlan %d from vlan filter\n", vid);
 276         ret = cpsw_ale_del_vlan(common->ale, vid,
 277                                 BIT(port->port_id) | ALE_PORT_HOST);
 278
 279         pm_runtime_put(common->dev);
 280         return ret;
 281 }
 282
 283 static void am65_cpsw_slave_set_promisc(struct am65_cpsw_port *port,
 284                                         bool promisc)
 285 {
 286         struct am65_cpsw_common *common = port->common;
 287
 288         if (promisc && !common->is_emac_mode) {
 289                 dev_dbg(common->dev, "promisc mode requested in switch mode");
 290                 return;
 291         }
 292
 293         if (promisc) {
 294                 /* Enable promiscuous mode */
 295                 cpsw_ale_control_set(common->ale, port->port_id,
 296                                      ALE_PORT_MACONLY_CAF, 1);
 297                 dev_dbg(common->dev, "promisc enabled\n");
 298         } else {
 299                 /* Disable promiscuous mode */
 300                 cpsw_ale_control_set(common->ale, port->port_id,
 301                                      ALE_PORT_MACONLY_CAF, 0);
 302                 dev_dbg(common->dev, "promisc disabled\n");
 303         }
 304 }
 305
 306 static void am65_cpsw_nuss_ndo_slave_set_rx_mode(struct net_device *ndev)
 307 {
 308         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 309         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 310         u32 port_mask;
 311         bool promisc;
 312
 313         promisc = !!(ndev->flags & IFF_PROMISC);
 314         am65_cpsw_slave_set_promisc(port, promisc);
 315
 316         if (promisc)
 317                 return;
 318
 319         /* Restore allmulti on vlans if necessary */
 320         cpsw_ale_set_allmulti(common->ale,
 321                               ndev->flags & IFF_ALLMULTI, port->port_id);
 322
 323         port_mask = ALE_PORT_HOST;
 324         /* Clear all mcast from ALE */
 325         cpsw_ale_flush_multicast(common->ale, port_mask, -1);
 326
 327         if (!netdev_mc_empty(ndev)) {
 328                 struct netdev_hw_addr *ha;
 329
 330                 /* program multicast address list into ALE register */
 331                 netdev_for_each_mc_addr(ha, ndev) {
 332                         cpsw_ale_add_mcast(common->ale, ha->addr,
 333                                            port_mask, 0, 0, 0);
 334                 }
 335         }
 336 }
 337
 338 static void am65_cpsw_nuss_ndo_host_tx_timeout(struct net_device *ndev,
 339                                                unsigned int txqueue)
 340 {
 341         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 342         struct am65_cpsw_tx_chn *tx_chn;
 343         struct netdev_queue *netif_txq;
 344         unsigned long trans_start;
 345
 346         netif_txq = netdev_get_tx_queue(ndev, txqueue);
 347         tx_chn = &common->tx_chns[txqueue];
 348         trans_start = netif_txq->trans_start;
 349
 350         netdev_err(ndev, "txq:%d DRV_XOFF:%d tmo:%u dql_avail:%d free_desc:%zu\n",
 351                    txqueue,
 352                    netif_tx_queue_stopped(netif_txq),
 353                    jiffies_to_msecs(jiffies - trans_start),
 354                    dql_avail(&netif_txq->dql),
 355                    k3_cppi_desc_pool_avail(tx_chn->desc_pool));
 356
 357         if (netif_tx_queue_stopped(netif_txq)) {
 358                 /* try recover if stopped by us */
 359                 txq_trans_update(netif_txq);
 360                 netif_tx_wake_queue(netif_txq);
 361         }
 362 }
 363
 364 static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common,
 365                                   struct sk_buff *skb)
 366 {
 367         struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
 368         struct cppi5_host_desc_t *desc_rx;
 369         struct device *dev = common->dev;
 370         u32 pkt_len = skb_tailroom(skb);
 371         dma_addr_t desc_dma;
 372         dma_addr_t buf_dma;
 373         void *swdata;
 374
 375         desc_rx = k3_cppi_desc_pool_alloc(rx_chn->desc_pool);
 376         if (!desc_rx) {
 377                 dev_err(dev, "Failed to allocate RXFDQ descriptor\n");
 378                 return -ENOMEM;
 379         }
 380         desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn->desc_pool, desc_rx);
 381
 382         buf_dma = dma_map_single(rx_chn->dma_dev, skb->data, pkt_len,
 383                                  DMA_FROM_DEVICE);
 384         if (unlikely(dma_mapping_error(rx_chn->dma_dev, buf_dma))) {
 385                 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
 386                 dev_err(dev, "Failed to map rx skb buffer\n");
 387                 return -EINVAL;
 388         }
 389
 390         cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT,
 391                          AM65_CPSW_NAV_PS_DATA_SIZE);
 392         k3_udma_glue_rx_dma_to_cppi5_addr(rx_chn->rx_chn, &buf_dma);
 393         cppi5_hdesc_attach_buf(desc_rx, buf_dma, skb_tailroom(skb), buf_dma, skb_tailroom(skb));
 394         swdata = cppi5_hdesc_get_swdata(desc_rx);
 395         *((void **)swdata) = skb;
 396
 397         return k3_udma_glue_push_rx_chn(rx_chn->rx_chn, 0, desc_rx, desc_dma);
 398 }
 399
 400 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common)
 401 {
 402         struct am65_cpsw_host *host_p = am65_common_get_host(common);
 403         u32 val, pri_map;
 404
 405         /* P0 set Receive Priority Type */
 406         val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
 407
 408         if (common->pf_p0_rx_ptype_rrobin) {
 409                 val |= AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
 410                 /* Enet Ports fifos works in fixed priority mode only, so
 411                  * reset P0_Rx_Pri_Map so all packet will go in Enet fifo 0
 412                  */
 413                 pri_map = 0x0;
 414         } else {
 415                 val &= ~AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
 416                 /* restore P0_Rx_Pri_Map */
 417                 pri_map = 0x76543210;
 418         }
 419
 420         writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP);
 421         writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
 422 }
 423
 424 static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common);
 425 static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common);
 426 static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port);
 427 static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port);
 428
 429 static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common,
 430                                       netdev_features_t features)
 431 {
 432         struct am65_cpsw_host *host_p = am65_common_get_host(common);
 433         int port_idx, i, ret;
 434         struct sk_buff *skb;
 435         u32 val, port_mask;
 436
 437         if (common->usage_count)
 438                 return 0;
 439
 440         /* Control register */
 441         writel(AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE |
 442                AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD,
 443                common->cpsw_base + AM65_CPSW_REG_CTL);
 444         /* Max length register */
 445         writel(AM65_CPSW_MAX_PACKET_SIZE,
 446                host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
 447         /* set base flow_id */
 448         writel(common->rx_flow_id_base,
 449                host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET);
 450         /* en tx crc offload */
 451         writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN, host_p->port_base + AM65_CPSW_P0_REG_CTL);
 452
 453         am65_cpsw_nuss_set_p0_ptype(common);
 454
 455         /* enable statistic */
 456         val = BIT(HOST_PORT_NUM);
 457         for (port_idx = 0; port_idx < common->port_num; port_idx++) {
 458                 struct am65_cpsw_port *port = &common->ports[port_idx];
 459
 460                 if (!port->disabled)
 461                         val |=  BIT(port->port_id);
 462         }
 463         writel(val, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
 464
 465         /* disable priority elevation */
 466         writel(0, common->cpsw_base + AM65_CPSW_REG_PTYPE);
 467
 468         cpsw_ale_start(common->ale);
 469
 470         /* limit to one RX flow only */
 471         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 472                              ALE_DEFAULT_THREAD_ID, 0);
 473         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 474                              ALE_DEFAULT_THREAD_ENABLE, 1);
 475         /* switch to vlan unaware mode */
 476         cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 1);
 477         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 478                              ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 479
 480         /* default vlan cfg: create mask based on enabled ports */
 481         port_mask = GENMASK(common->port_num, 0) &
 482                     ~common->disabled_ports_mask;
 483
 484         cpsw_ale_add_vlan(common->ale, 0, port_mask,
 485                           port_mask, port_mask,
 486                           port_mask & ~ALE_PORT_HOST);
 487
 488         if (common->is_emac_mode)
 489                 am65_cpsw_init_host_port_emac(common);
 490         else
 491                 am65_cpsw_init_host_port_switch(common);
 492
 493         for (i = 0; i < common->rx_chns.descs_num; i++) {
 494                 skb = __netdev_alloc_skb_ip_align(NULL,
 495                                                   AM65_CPSW_MAX_PACKET_SIZE,
 496                                                   GFP_KERNEL);
 497                 if (!skb) {
 498                         dev_err(common->dev, "cannot allocate skb\n");
 499                         return -ENOMEM;
 500                 }
 501
 502                 ret = am65_cpsw_nuss_rx_push(common, skb);
 503                 if (ret < 0) {
 504                         dev_err(common->dev,
 505                                 "cannot submit skb to channel rx, error %d\n",
 506                                 ret);
 507                         kfree_skb(skb);
 508                         return ret;
 509                 }
 510                 kmemleak_not_leak(skb);
 511         }
 512         k3_udma_glue_enable_rx_chn(common->rx_chns.rx_chn);
 513
 514         for (i = 0; i < common->tx_ch_num; i++) {
 515                 ret = k3_udma_glue_enable_tx_chn(common->tx_chns[i].tx_chn);
 516                 if (ret)
 517                         return ret;
 518                 napi_enable(&common->tx_chns[i].napi_tx);
 519         }
 520
 521         napi_enable(&common->napi_rx);
 522
 523         dev_dbg(common->dev, "cpsw_nuss started\n");
 524         return 0;
 525 }
 526
 527 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma);
 528 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma);
 529
 530 static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)
 531 {
 532         int i;
 533
 534         if (common->usage_count != 1)
 535                 return 0;
 536
 537         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 538                              ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 539
 540         /* shutdown tx channels */
 541         atomic_set(&common->tdown_cnt, common->tx_ch_num);
 542         /* ensure new tdown_cnt value is visible */
 543         smp_mb__after_atomic();
 544         reinit_completion(&common->tdown_complete);
 545
 546         for (i = 0; i < common->tx_ch_num; i++)
 547                 k3_udma_glue_tdown_tx_chn(common->tx_chns[i].tx_chn, false);
 548
 549         i = wait_for_completion_timeout(&common->tdown_complete,
 550                                         msecs_to_jiffies(1000));
 551         if (!i)
 552                 dev_err(common->dev, "tx timeout\n");
 553         for (i = 0; i < common->tx_ch_num; i++)
 554                 napi_disable(&common->tx_chns[i].napi_tx);
 555
 556         for (i = 0; i < common->tx_ch_num; i++) {
 557                 k3_udma_glue_reset_tx_chn(common->tx_chns[i].tx_chn,
 558                                           &common->tx_chns[i],
 559                                           am65_cpsw_nuss_tx_cleanup);
 560                 k3_udma_glue_disable_tx_chn(common->tx_chns[i].tx_chn);
 561         }
 562
 563         k3_udma_glue_tdown_rx_chn(common->rx_chns.rx_chn, true);
 564         napi_disable(&common->napi_rx);
 565
 566         for (i = 0; i < AM65_CPSW_MAX_RX_FLOWS; i++)
 567                 k3_udma_glue_reset_rx_chn(common->rx_chns.rx_chn, i,
 568                                           &common->rx_chns,
 569                                           am65_cpsw_nuss_rx_cleanup, !!i);
 570
 571         k3_udma_glue_disable_rx_chn(common->rx_chns.rx_chn);
 572
 573         cpsw_ale_stop(common->ale);
 574
 575         writel(0, common->cpsw_base + AM65_CPSW_REG_CTL);
 576         writel(0, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
 577
 578         dev_dbg(common->dev, "cpsw_nuss stopped\n");
 579         return 0;
 580 }
 581
 582 static int am65_cpsw_nuss_ndo_slave_stop(struct net_device *ndev)
 583 {
 584         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 585         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 586         int ret;
 587
 588         if (port->slave.phy)
 589                 phy_stop(port->slave.phy);
 590
 591         netif_tx_stop_all_queues(ndev);
 592
 593         if (port->slave.phy) {
 594                 phy_disconnect(port->slave.phy);
 595                 port->slave.phy = NULL;
 596         }
 597
 598         ret = am65_cpsw_nuss_common_stop(common);
 599         if (ret)
 600                 return ret;
 601
 602         common->usage_count--;
 603         pm_runtime_put(common->dev);
 604         return 0;
 605 }
 606
 607 static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg)
 608 {
 609         struct am65_cpsw_port *port = arg;
 610
 611         if (!vdev)
 612                 return 0;
 613
 614         return am65_cpsw_nuss_ndo_slave_add_vid(port->ndev, 0, vid);
 615 }
 616
 617 static int am65_cpsw_nuss_ndo_slave_open(struct net_device *ndev)
 618 {
 619         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 620         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 621         int ret, i;
 622
 623         ret = pm_runtime_get_sync(common->dev);
 624         if (ret < 0) {
 625                 pm_runtime_put_noidle(common->dev);
 626                 return ret;
 627         }
 628
 629         /* Notify the stack of the actual queue counts. */
 630         ret = netif_set_real_num_tx_queues(ndev, common->tx_ch_num);
 631         if (ret) {
 632                 dev_err(common->dev, "cannot set real number of tx queues\n");
 633                 return ret;
 634         }
 635
 636         ret = netif_set_real_num_rx_queues(ndev, AM65_CPSW_MAX_RX_QUEUES);
 637         if (ret) {
 638                 dev_err(common->dev, "cannot set real number of rx queues\n");
 639                 return ret;
 640         }
 641
 642         for (i = 0; i < common->tx_ch_num; i++)
 643                 netdev_tx_reset_queue(netdev_get_tx_queue(ndev, i));
 644
 645         ret = am65_cpsw_nuss_common_open(common, ndev->features);
 646         if (ret)
 647                 return ret;
 648
 649         common->usage_count++;
 650
 651         am65_cpsw_port_set_sl_mac(port, ndev->dev_addr);
 652
 653         if (common->is_emac_mode)
 654                 am65_cpsw_init_port_emac_ale(port);
 655         else
 656                 am65_cpsw_init_port_switch_ale(port);
 657
 658         /* mac_sl should be configured via phy-link interface */
 659         am65_cpsw_sl_ctl_reset(port);
 660
 661         ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET,
 662                                port->slave.phy_if);
 663         if (ret)
 664                 goto error_cleanup;
 665
 666         if (port->slave.phy_node) {
 667                 port->slave.phy = of_phy_connect(ndev,
 668                                                  port->slave.phy_node,
 669                                                  &am65_cpsw_nuss_adjust_link,
 670                                                  0, port->slave.phy_if);
 671                 if (!port->slave.phy) {
 672                         dev_err(common->dev, "phy %pOF not found on slave %d\n",
 673                                 port->slave.phy_node,
 674                                 port->port_id);
 675                         ret = -ENODEV;
 676                         goto error_cleanup;
 677                 }
 678         }
 679
 680         /* restore vlan configurations */
 681         vlan_for_each(ndev, cpsw_restore_vlans, port);
 682
 683         phy_attached_info(port->slave.phy);
 684         phy_start(port->slave.phy);
 685
 686         return 0;
 687
 688 error_cleanup:
 689         am65_cpsw_nuss_ndo_slave_stop(ndev);
 690         return ret;
 691 }
 692
 693 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)
 694 {
 695         struct am65_cpsw_rx_chn *rx_chn = data;
 696         struct cppi5_host_desc_t *desc_rx;
 697         struct sk_buff *skb;
 698         dma_addr_t buf_dma;
 699         u32 buf_dma_len;
 700         void **swdata;
 701
 702         desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
 703         swdata = cppi5_hdesc_get_swdata(desc_rx);
 704         skb = *swdata;
 705         cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
 706         k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
 707
 708         dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
 709         k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
 710
 711         dev_kfree_skb_any(skb);
 712 }
 713
 714 static void am65_cpsw_nuss_rx_ts(struct sk_buff *skb, u32 *psdata)
 715 {
 716         struct skb_shared_hwtstamps *ssh;
 717         u64 ns;
 718
 719         ns = ((u64)psdata[1] << 32) | psdata[0];
 720
 721         ssh = skb_hwtstamps(skb);
 722         memset(ssh, 0, sizeof(*ssh));
 723         ssh->hwtstamp = ns_to_ktime(ns);
 724 }
 725
 726 /* RX psdata[2] word format - checksum information */
 727 #define AM65_CPSW_RX_PSD_CSUM_ADD       GENMASK(15, 0)
 728 #define AM65_CPSW_RX_PSD_CSUM_ERR       BIT(16)
 729 #define AM65_CPSW_RX_PSD_IS_FRAGMENT    BIT(17)
 730 #define AM65_CPSW_RX_PSD_IS_TCP         BIT(18)
 731 #define AM65_CPSW_RX_PSD_IPV6_VALID     BIT(19)
 732 #define AM65_CPSW_RX_PSD_IPV4_VALID     BIT(20)
 733
 734 static void am65_cpsw_nuss_rx_csum(struct sk_buff *skb, u32 csum_info)
 735 {
 736         /* HW can verify IPv4/IPv6 TCP/UDP packets checksum
 737          * csum information provides in psdata[2] word:
 738          * AM65_CPSW_RX_PSD_CSUM_ERR bit - indicates csum error
 739          * AM65_CPSW_RX_PSD_IPV6_VALID and AM65_CPSW_RX_PSD_IPV4_VALID
 740          * bits - indicates IPv4/IPv6 packet
 741          * AM65_CPSW_RX_PSD_IS_FRAGMENT bit - indicates fragmented packet
 742          * AM65_CPSW_RX_PSD_CSUM_ADD has value 0xFFFF for non fragmented packets
 743          * or csum value for fragmented packets if !AM65_CPSW_RX_PSD_CSUM_ERR
 744          */
 745         skb_checksum_none_assert(skb);
 746
 747         if (unlikely(!(skb->dev->features & NETIF_F_RXCSUM)))
 748                 return;
 749
 750         if ((csum_info & (AM65_CPSW_RX_PSD_IPV6_VALID |
 751                           AM65_CPSW_RX_PSD_IPV4_VALID)) &&
 752                           !(csum_info & AM65_CPSW_RX_PSD_CSUM_ERR)) {
 753                 /* csum for fragmented packets is unsupported */
 754                 if (!(csum_info & AM65_CPSW_RX_PSD_IS_FRAGMENT))
 755                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 756         }
 757 }
 758
 759 static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_common *common,
 760                                      u32 flow_idx)
 761 {
 762         struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
 763         u32 buf_dma_len, pkt_len, port_id = 0, csum_info;
 764         struct am65_cpsw_ndev_priv *ndev_priv;
 765         struct am65_cpsw_ndev_stats *stats;
 766         struct cppi5_host_desc_t *desc_rx;
 767         struct device *dev = common->dev;
 768         struct sk_buff *skb, *new_skb;
 769         dma_addr_t desc_dma, buf_dma;
 770         struct am65_cpsw_port *port;
 771         struct net_device *ndev;
 772         void **swdata;
 773         u32 *psdata;
 774         int ret = 0;
 775
 776         ret = k3_udma_glue_pop_rx_chn(rx_chn->rx_chn, flow_idx, &desc_dma);
 777         if (ret) {
 778                 if (ret != -ENODATA)
 779                         dev_err(dev, "RX: pop chn fail %d\n", ret);
 780                 return ret;
 781         }
 782
 783         if (cppi5_desc_is_tdcm(desc_dma)) {
 784                 dev_dbg(dev, "%s RX tdown flow: %u\n", __func__, flow_idx);
 785                 return 0;
 786         }
 787
 788         desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
 789         dev_dbg(dev, "%s flow_idx: %u desc %pad\n",
 790                 __func__, flow_idx, &desc_dma);
 791
 792         swdata = cppi5_hdesc_get_swdata(desc_rx);
 793         skb = *swdata;
 794         cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
 795         k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
 796         pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
 797         cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL);
 798         dev_dbg(dev, "%s rx port_id:%d\n", __func__, port_id);
 799         port = am65_common_get_port(common, port_id);
 800         ndev = port->ndev;
 801         skb->dev = ndev;
 802
 803         psdata = cppi5_hdesc_get_psdata(desc_rx);
 804         /* add RX timestamp */
 805         if (port->rx_ts_enabled)
 806                 am65_cpsw_nuss_rx_ts(skb, psdata);
 807         csum_info = psdata[2];
 808         dev_dbg(dev, "%s rx csum_info:%#x\n", __func__, csum_info);
 809
 810         dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
 811
 812         k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
 813
 814         new_skb = netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE);
 815         if (new_skb) {
 816                 ndev_priv = netdev_priv(ndev);
 817                 am65_cpsw_nuss_set_offload_fwd_mark(skb, ndev_priv->offload_fwd_mark);
 818                 skb_put(skb, pkt_len);
 819                 skb->protocol = eth_type_trans(skb, ndev);
 820                 am65_cpsw_nuss_rx_csum(skb, csum_info);
 821                 napi_gro_receive(&common->napi_rx, skb);
 822
 823                 stats = this_cpu_ptr(ndev_priv->stats);
 824
 825                 u64_stats_update_begin(&stats->syncp);
 826                 stats->rx_packets++;
 827                 stats->rx_bytes += pkt_len;
 828                 u64_stats_update_end(&stats->syncp);
 829                 kmemleak_not_leak(new_skb);
 830         } else {
 831                 ndev->stats.rx_dropped++;
 832                 new_skb = skb;
 833         }
 834
 835         if (netif_dormant(ndev)) {
 836                 dev_kfree_skb_any(new_skb);
 837                 ndev->stats.rx_dropped++;
 838                 return 0;
 839         }
 840
 841         ret = am65_cpsw_nuss_rx_push(common, new_skb);
 842         if (WARN_ON(ret < 0)) {
 843                 dev_kfree_skb_any(new_skb);
 844                 ndev->stats.rx_errors++;
 845                 ndev->stats.rx_dropped++;
 846         }
 847
 848         return ret;
 849 }
 850
 851 static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)
 852 {
 853         struct am65_cpsw_common *common = am65_cpsw_napi_to_common(napi_rx);
 854         int flow = AM65_CPSW_MAX_RX_FLOWS;
 855         int cur_budget, ret;
 856         int num_rx = 0;
 857
 858         /* process every flow */
 859         while (flow--) {
 860                 cur_budget = budget - num_rx;
 861
 862                 while (cur_budget--) {
 863                         ret = am65_cpsw_nuss_rx_packets(common, flow);
 864                         if (ret)
 865                                 break;
 866                         num_rx++;
 867                 }
 868
 869                 if (num_rx >= budget)
 870                         break;
 871         }
 872
 873         dev_dbg(common->dev, "%s num_rx:%d %d\n", __func__, num_rx, budget);
 874
 875         if (num_rx < budget && napi_complete_done(napi_rx, num_rx))
 876                 enable_irq(common->rx_chns.irq);
 877
 878         return num_rx;
 879 }
 880
 881 static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,
 882                                      struct cppi5_host_desc_t *desc)
 883 {
 884         struct cppi5_host_desc_t *first_desc, *next_desc;
 885         dma_addr_t buf_dma, next_desc_dma;
 886         u32 buf_dma_len;
 887
 888         first_desc = desc;
 889         next_desc = first_desc;
 890
 891         cppi5_hdesc_get_obuf(first_desc, &buf_dma, &buf_dma_len);
 892         k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
 893
 894         dma_unmap_single(tx_chn->dma_dev, buf_dma, buf_dma_len, DMA_TO_DEVICE);
 895
 896         next_desc_dma = cppi5_hdesc_get_next_hbdesc(first_desc);
 897         k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
 898         while (next_desc_dma) {
 899                 next_desc = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
 900                                                        next_desc_dma);
 901                 cppi5_hdesc_get_obuf(next_desc, &buf_dma, &buf_dma_len);
 902                 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
 903
 904                 dma_unmap_page(tx_chn->dma_dev, buf_dma, buf_dma_len,
 905                                DMA_TO_DEVICE);
 906
 907                 next_desc_dma = cppi5_hdesc_get_next_hbdesc(next_desc);
 908                 k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
 909
 910                 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
 911         }
 912
 913         k3_cppi_desc_pool_free(tx_chn->desc_pool, first_desc);
 914 }
 915
 916 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma)
 917 {
 918         struct am65_cpsw_tx_chn *tx_chn = data;
 919         struct cppi5_host_desc_t *desc_tx;
 920         struct sk_buff *skb;
 921         void **swdata;
 922
 923         desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, desc_dma);
 924         swdata = cppi5_hdesc_get_swdata(desc_tx);
 925         skb = *(swdata);
 926         am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);
 927
 928         dev_kfree_skb_any(skb);
 929 }
 930
 931 static struct sk_buff *
 932 am65_cpsw_nuss_tx_compl_packet(struct am65_cpsw_tx_chn *tx_chn,
 933                                dma_addr_t desc_dma)
 934 {
 935         struct am65_cpsw_ndev_priv *ndev_priv;
 936         struct am65_cpsw_ndev_stats *stats;
 937         struct cppi5_host_desc_t *desc_tx;
 938         struct net_device *ndev;
 939         struct sk_buff *skb;
 940         void **swdata;
 941
 942         desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
 943                                              desc_dma);
 944         swdata = cppi5_hdesc_get_swdata(desc_tx);
 945         skb = *(swdata);
 946         am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);
 947
 948         ndev = skb->dev;
 949
 950         am65_cpts_tx_timestamp(tx_chn->common->cpts, skb);
 951
 952         ndev_priv = netdev_priv(ndev);
 953         stats = this_cpu_ptr(ndev_priv->stats);
 954         u64_stats_update_begin(&stats->syncp);
 955         stats->tx_packets++;
 956         stats->tx_bytes += skb->len;
 957         u64_stats_update_end(&stats->syncp);
 958
 959         return skb;
 960 }
 961
 962 static void am65_cpsw_nuss_tx_wake(struct am65_cpsw_tx_chn *tx_chn, struct net_device *ndev,
 963                                    struct netdev_queue *netif_txq)
 964 {
 965         if (netif_tx_queue_stopped(netif_txq)) {
 966                 /* Check whether the queue is stopped due to stalled
 967                  * tx dma, if the queue is stopped then wake the queue
 968                  * as we have free desc for tx
 969                  */
 970                 __netif_tx_lock(netif_txq, smp_processor_id());
 971                 if (netif_running(ndev) &&
 972                     (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >= MAX_SKB_FRAGS))
 973                         netif_tx_wake_queue(netif_txq);
 974
 975                 __netif_tx_unlock(netif_txq);
 976         }
 977 }
 978
 979 static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,
 980                                            int chn, unsigned int budget)
 981 {
 982         struct device *dev = common->dev;
 983         struct am65_cpsw_tx_chn *tx_chn;
 984         struct netdev_queue *netif_txq;
 985         unsigned int total_bytes = 0;
 986         struct net_device *ndev;
 987         struct sk_buff *skb;
 988         dma_addr_t desc_dma;
 989         int res, num_tx = 0;
 990
 991         tx_chn = &common->tx_chns[chn];
 992
 993         while (true) {
 994                 spin_lock(&tx_chn->lock);
 995                 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
 996                 spin_unlock(&tx_chn->lock);
 997                 if (res == -ENODATA)
 998                         break;
 999
1000                 if (cppi5_desc_is_tdcm(desc_dma)) {
1001                         if (atomic_dec_and_test(&common->tdown_cnt))
1002                                 complete(&common->tdown_complete);
1003                         break;
1004                 }
1005
1006                 skb = am65_cpsw_nuss_tx_compl_packet(tx_chn, desc_dma);
1007                 total_bytes = skb->len;
1008                 ndev = skb->dev;
1009                 napi_consume_skb(skb, budget);
1010                 num_tx++;
1011
1012                 netif_txq = netdev_get_tx_queue(ndev, chn);
1013
1014                 netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
1015
1016                 am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);
1017         }
1018
1019         dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
1020
1021         return num_tx;
1022 }
1023
1024 static int am65_cpsw_nuss_tx_compl_packets_2g(struct am65_cpsw_common *common,
1025                                               int chn, unsigned int budget)
1026 {
1027         struct device *dev = common->dev;
1028         struct am65_cpsw_tx_chn *tx_chn;
1029         struct netdev_queue *netif_txq;
1030         unsigned int total_bytes = 0;
1031         struct net_device *ndev;
1032         struct sk_buff *skb;
1033         dma_addr_t desc_dma;
1034         int res, num_tx = 0;
1035
1036         tx_chn = &common->tx_chns[chn];
1037
1038         while (true) {
1039                 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
1040                 if (res == -ENODATA)
1041                         break;
1042
1043                 if (cppi5_desc_is_tdcm(desc_dma)) {
1044                         if (atomic_dec_and_test(&common->tdown_cnt))
1045                                 complete(&common->tdown_complete);
1046                         break;
1047                 }
1048
1049                 skb = am65_cpsw_nuss_tx_compl_packet(tx_chn, desc_dma);
1050
1051                 ndev = skb->dev;
1052                 total_bytes += skb->len;
1053                 napi_consume_skb(skb, budget);
1054                 num_tx++;
1055         }
1056
1057         if (!num_tx)
1058                 return 0;
1059
1060         netif_txq = netdev_get_tx_queue(ndev, chn);
1061
1062         netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
1063
1064         am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);
1065
1066         dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
1067
1068         return num_tx;
1069 }
1070
1071 static int am65_cpsw_nuss_tx_poll(struct napi_struct *napi_tx, int budget)
1072 {
1073         struct am65_cpsw_tx_chn *tx_chn = am65_cpsw_napi_to_tx_chn(napi_tx);
1074         int num_tx;
1075
1076         if (AM65_CPSW_IS_CPSW2G(tx_chn->common))
1077                 num_tx = am65_cpsw_nuss_tx_compl_packets_2g(tx_chn->common, tx_chn->id, budget);
1078         else
1079                 num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn->common, tx_chn->id, budget);
1080
1081         num_tx = min(num_tx, budget);
1082         if (num_tx < budget) {
1083                 napi_complete(napi_tx);
1084                 enable_irq(tx_chn->irq);
1085         }
1086
1087         return num_tx;
1088 }
1089
1090 static irqreturn_t am65_cpsw_nuss_rx_irq(int irq, void *dev_id)
1091 {
1092         struct am65_cpsw_common *common = dev_id;
1093
1094         disable_irq_nosync(irq);
1095         napi_schedule(&common->napi_rx);
1096
1097         return IRQ_HANDLED;
1098 }
1099
1100 static irqreturn_t am65_cpsw_nuss_tx_irq(int irq, void *dev_id)
1101 {
1102         struct am65_cpsw_tx_chn *tx_chn = dev_id;
1103
1104         disable_irq_nosync(irq);
1105         napi_schedule(&tx_chn->napi_tx);
1106
1107         return IRQ_HANDLED;
1108 }
1109
1110 static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb,
1111                                                  struct net_device *ndev)
1112 {
1113         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1114         struct cppi5_host_desc_t *first_desc, *next_desc, *cur_desc;
1115         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1116         struct device *dev = common->dev;
1117         struct am65_cpsw_tx_chn *tx_chn;
1118         struct netdev_queue *netif_txq;
1119         dma_addr_t desc_dma, buf_dma;
1120         int ret, q_idx, i;
1121         void **swdata;
1122         u32 *psdata;
1123         u32 pkt_len;
1124
1125         /* padding enabled in hw */
1126         pkt_len = skb_headlen(skb);
1127
1128         /* SKB TX timestamp */
1129         if (port->tx_ts_enabled)
1130                 am65_cpts_prep_tx_timestamp(common->cpts, skb);
1131
1132         q_idx = skb_get_queue_mapping(skb);
1133         dev_dbg(dev, "%s skb_queue:%d\n", __func__, q_idx);
1134
1135         tx_chn = &common->tx_chns[q_idx];
1136         netif_txq = netdev_get_tx_queue(ndev, q_idx);
1137
1138         /* Map the linear buffer */
1139         buf_dma = dma_map_single(tx_chn->dma_dev, skb->data, pkt_len,
1140                                  DMA_TO_DEVICE);
1141         if (unlikely(dma_mapping_error(tx_chn->dma_dev, buf_dma))) {
1142                 dev_err(dev, "Failed to map tx skb buffer\n");
1143                 ndev->stats.tx_errors++;
1144                 goto err_free_skb;
1145         }
1146
1147         first_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1148         if (!first_desc) {
1149                 dev_dbg(dev, "Failed to allocate descriptor\n");
1150                 dma_unmap_single(tx_chn->dma_dev, buf_dma, pkt_len,
1151                                  DMA_TO_DEVICE);
1152                 goto busy_stop_q;
1153         }
1154
1155         cppi5_hdesc_init(first_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT,
1156                          AM65_CPSW_NAV_PS_DATA_SIZE);
1157         cppi5_desc_set_pktids(&first_desc->hdr, 0, 0x3FFF);
1158         cppi5_hdesc_set_pkttype(first_desc, 0x7);
1159         cppi5_desc_set_tags_ids(&first_desc->hdr, 0, port->port_id);
1160
1161         k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &buf_dma);
1162         cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);
1163         swdata = cppi5_hdesc_get_swdata(first_desc);
1164         *(swdata) = skb;
1165         psdata = cppi5_hdesc_get_psdata(first_desc);
1166
1167         /* HW csum offload if enabled */
1168         psdata[2] = 0;
1169         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1170                 unsigned int cs_start, cs_offset;
1171
1172                 cs_start = skb_transport_offset(skb);
1173                 cs_offset = cs_start + skb->csum_offset;
1174                 /* HW numerates bytes starting from 1 */
1175                 psdata[2] = ((cs_offset + 1) << 24) |
1176                             ((cs_start + 1) << 16) | (skb->len - cs_start);
1177                 dev_dbg(dev, "%s tx psdata:%#x\n", __func__, psdata[2]);
1178         }
1179
1180         if (!skb_is_nonlinear(skb))
1181                 goto done_tx;
1182
1183         dev_dbg(dev, "fragmented SKB\n");
1184
1185         /* Handle the case where skb is fragmented in pages */
1186         cur_desc = first_desc;
1187         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1188                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1189                 u32 frag_size = skb_frag_size(frag);
1190
1191                 next_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1192                 if (!next_desc) {
1193                         dev_err(dev, "Failed to allocate descriptor\n");
1194                         goto busy_free_descs;
1195                 }
1196
1197                 buf_dma = skb_frag_dma_map(tx_chn->dma_dev, frag, 0, frag_size,
1198                                            DMA_TO_DEVICE);
1199                 if (unlikely(dma_mapping_error(tx_chn->dma_dev, buf_dma))) {
1200                         dev_err(dev, "Failed to map tx skb page\n");
1201                         k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
1202                         ndev->stats.tx_errors++;
1203                         goto err_free_descs;
1204                 }
1205
1206                 cppi5_hdesc_reset_hbdesc(next_desc);
1207                 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &buf_dma);
1208                 cppi5_hdesc_attach_buf(next_desc,
1209                                        buf_dma, frag_size, buf_dma, frag_size);
1210
1211                 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool,
1212                                                       next_desc);
1213                 k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn->tx_chn, &desc_dma);
1214                 cppi5_hdesc_link_hbdesc(cur_desc, desc_dma);
1215
1216                 pkt_len += frag_size;
1217                 cur_desc = next_desc;
1218         }
1219         WARN_ON(pkt_len != skb->len);
1220
1221 done_tx:
1222         skb_tx_timestamp(skb);
1223
1224         /* report bql before sending packet */
1225         netdev_tx_sent_queue(netif_txq, pkt_len);
1226
1227         cppi5_hdesc_set_pktlen(first_desc, pkt_len);
1228         desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool, first_desc);
1229         if (AM65_CPSW_IS_CPSW2G(common)) {
1230                 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1231         } else {
1232                 spin_lock_bh(&tx_chn->lock);
1233                 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1234                 spin_unlock_bh(&tx_chn->lock);
1235         }
1236         if (ret) {
1237                 dev_err(dev, "can't push desc %d\n", ret);
1238                 /* inform bql */
1239                 netdev_tx_completed_queue(netif_txq, 1, pkt_len);
1240                 ndev->stats.tx_errors++;
1241                 goto err_free_descs;
1242         }
1243
1244         if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) < MAX_SKB_FRAGS) {
1245                 netif_tx_stop_queue(netif_txq);
1246                 /* Barrier, so that stop_queue visible to other cpus */
1247                 smp_mb__after_atomic();
1248                 dev_dbg(dev, "netif_tx_stop_queue %d\n", q_idx);
1249
1250                 /* re-check for smp */
1251                 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >=
1252                     MAX_SKB_FRAGS) {
1253                         netif_tx_wake_queue(netif_txq);
1254                         dev_dbg(dev, "netif_tx_wake_queue %d\n", q_idx);
1255                 }
1256         }
1257
1258         return NETDEV_TX_OK;
1259
1260 err_free_descs:
1261         am65_cpsw_nuss_xmit_free(tx_chn, first_desc);
1262 err_free_skb:
1263         ndev->stats.tx_dropped++;
1264         dev_kfree_skb_any(skb);
1265         return NETDEV_TX_OK;
1266
1267 busy_free_descs:
1268         am65_cpsw_nuss_xmit_free(tx_chn, first_desc);
1269 busy_stop_q:
1270         netif_tx_stop_queue(netif_txq);
1271         return NETDEV_TX_BUSY;
1272 }
1273
1274 static int am65_cpsw_nuss_ndo_slave_set_mac_address(struct net_device *ndev,
1275                                                     void *addr)
1276 {
1277         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1278         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1279         struct sockaddr *sockaddr = (struct sockaddr *)addr;
1280         int ret;
1281
1282         ret = eth_prepare_mac_addr_change(ndev, addr);
1283         if (ret < 0)
1284                 return ret;
1285
1286         ret = pm_runtime_get_sync(common->dev);
1287         if (ret < 0) {
1288                 pm_runtime_put_noidle(common->dev);
1289                 return ret;
1290         }
1291
1292         cpsw_ale_del_ucast(common->ale, ndev->dev_addr,
1293                            HOST_PORT_NUM, 0, 0);
1294         cpsw_ale_add_ucast(common->ale, sockaddr->sa_data,
1295                            HOST_PORT_NUM, ALE_SECURE, 0);
1296
1297         am65_cpsw_port_set_sl_mac(port, addr);
1298         eth_commit_mac_addr_change(ndev, sockaddr);
1299
1300         pm_runtime_put(common->dev);
1301
1302         return 0;
1303 }
1304
1305 static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,
1306                                        struct ifreq *ifr)
1307 {
1308         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1309         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1310         u32 ts_ctrl, seq_id, ts_ctrl_ltype2, ts_vlan_ltype;
1311         struct hwtstamp_config cfg;
1312
1313         if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1314                 return -EOPNOTSUPP;
1315
1316         if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1317                 return -EFAULT;
1318
1319         /* TX HW timestamp */
1320         switch (cfg.tx_type) {
1321         case HWTSTAMP_TX_OFF:
1322         case HWTSTAMP_TX_ON:
1323                 break;
1324         default:
1325                 return -ERANGE;
1326         }
1327
1328         switch (cfg.rx_filter) {
1329         case HWTSTAMP_FILTER_NONE:
1330                 port->rx_ts_enabled = false;
1331                 break;
1332         case HWTSTAMP_FILTER_ALL:
1333         case HWTSTAMP_FILTER_SOME:
1334         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1335         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1336         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1337         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1338         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1339         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1340         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1341         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1342         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1343         case HWTSTAMP_FILTER_PTP_V2_EVENT:
1344         case HWTSTAMP_FILTER_PTP_V2_SYNC:
1345         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1346         case HWTSTAMP_FILTER_NTP_ALL:
1347                 port->rx_ts_enabled = true;
1348                 cfg.rx_filter = HWTSTAMP_FILTER_ALL;
1349                 break;
1350         default:
1351                 return -ERANGE;
1352         }
1353
1354         port->tx_ts_enabled = (cfg.tx_type == HWTSTAMP_TX_ON);
1355
1356         /* cfg TX timestamp */
1357         seq_id = (AM65_CPSW_TS_SEQ_ID_OFFSET <<
1358                   AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT) | ETH_P_1588;
1359
1360         ts_vlan_ltype = ETH_P_8021Q;
1361
1362         ts_ctrl_ltype2 = ETH_P_1588 |
1363                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 |
1364                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 |
1365                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 |
1366                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 |
1367                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 |
1368                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 |
1369                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 |
1370                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO;
1371
1372         ts_ctrl = AM65_CPSW_TS_EVENT_MSG_TYPE_BITS <<
1373                   AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT;
1374
1375         if (port->tx_ts_enabled)
1376                 ts_ctrl |= AM65_CPSW_TS_TX_ANX_ALL_EN |
1377                            AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN;
1378
1379         writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG);
1380         writel(ts_vlan_ltype, port->port_base +
1381                AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG);
1382         writel(ts_ctrl_ltype2, port->port_base +
1383                AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2);
1384         writel(ts_ctrl, port->port_base + AM65_CPSW_PORTN_REG_TS_CTL);
1385
1386         /* en/dis RX timestamp */
1387         am65_cpts_rx_enable(common->cpts, port->rx_ts_enabled);
1388
1389         return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1390 }
1391
1392 static int am65_cpsw_nuss_hwtstamp_get(struct net_device *ndev,
1393                                        struct ifreq *ifr)
1394 {
1395         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1396         struct hwtstamp_config cfg;
1397
1398         if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1399                 return -EOPNOTSUPP;
1400
1401         cfg.flags = 0;
1402         cfg.tx_type = port->tx_ts_enabled ?
1403                       HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
1404         cfg.rx_filter = port->rx_ts_enabled ?
1405                         HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;
1406
1407         return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1408 }
1409
1410 static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev,
1411                                           struct ifreq *req, int cmd)
1412 {
1413         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1414
1415         if (!netif_running(ndev))
1416                 return -EINVAL;
1417
1418         switch (cmd) {
1419         case SIOCSHWTSTAMP:
1420                 return am65_cpsw_nuss_hwtstamp_set(ndev, req);
1421         case SIOCGHWTSTAMP:
1422                 return am65_cpsw_nuss_hwtstamp_get(ndev, req);
1423         }
1424
1425         if (!port->slave.phy)
1426                 return -EOPNOTSUPP;
1427
1428         return phy_mii_ioctl(port->slave.phy, req, cmd);
1429 }
1430
1431 static void am65_cpsw_nuss_ndo_get_stats(struct net_device *dev,
1432                                          struct rtnl_link_stats64 *stats)
1433 {
1434         struct am65_cpsw_ndev_priv *ndev_priv = netdev_priv(dev);
1435         unsigned int start;
1436         int cpu;
1437
1438         for_each_possible_cpu(cpu) {
1439                 struct am65_cpsw_ndev_stats *cpu_stats;
1440                 u64 rx_packets;
1441                 u64 rx_bytes;
1442                 u64 tx_packets;
1443                 u64 tx_bytes;
1444
1445                 cpu_stats = per_cpu_ptr(ndev_priv->stats, cpu);
1446                 do {
1447                         start = u64_stats_fetch_begin_irq(&cpu_stats->syncp);
1448                         rx_packets = cpu_stats->rx_packets;
1449                         rx_bytes   = cpu_stats->rx_bytes;
1450                         tx_packets = cpu_stats->tx_packets;
1451                         tx_bytes   = cpu_stats->tx_bytes;
1452                 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start));
1453
1454                 stats->rx_packets += rx_packets;
1455                 stats->rx_bytes   += rx_bytes;
1456                 stats->tx_packets += tx_packets;
1457                 stats->tx_bytes   += tx_bytes;
1458         }
1459
1460         stats->rx_errors        = dev->stats.rx_errors;
1461         stats->rx_dropped       = dev->stats.rx_dropped;
1462         stats->tx_dropped       = dev->stats.tx_dropped;
1463 }
1464
1465 static struct devlink_port *am65_cpsw_ndo_get_devlink_port(struct net_device *ndev)
1466 {
1467         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1468
1469         return &port->devlink_port;
1470 }
1471
1472 static const struct net_device_ops am65_cpsw_nuss_netdev_ops = {
1473         .ndo_open               = am65_cpsw_nuss_ndo_slave_open,
1474         .ndo_stop               = am65_cpsw_nuss_ndo_slave_stop,
1475         .ndo_start_xmit         = am65_cpsw_nuss_ndo_slave_xmit,
1476         .ndo_set_rx_mode        = am65_cpsw_nuss_ndo_slave_set_rx_mode,
1477         .ndo_get_stats64        = am65_cpsw_nuss_ndo_get_stats,
1478         .ndo_validate_addr      = eth_validate_addr,
1479         .ndo_set_mac_address    = am65_cpsw_nuss_ndo_slave_set_mac_address,
1480         .ndo_tx_timeout         = am65_cpsw_nuss_ndo_host_tx_timeout,
1481         .ndo_vlan_rx_add_vid    = am65_cpsw_nuss_ndo_slave_add_vid,
1482         .ndo_vlan_rx_kill_vid   = am65_cpsw_nuss_ndo_slave_kill_vid,
1483         .ndo_do_ioctl           = am65_cpsw_nuss_ndo_slave_ioctl,
1484         .ndo_setup_tc           = am65_cpsw_qos_ndo_setup_tc,
1485         .ndo_get_devlink_port   = am65_cpsw_ndo_get_devlink_port,
1486 };
1487
1488 static void am65_cpsw_nuss_slave_disable_unused(struct am65_cpsw_port *port)
1489 {
1490         struct am65_cpsw_common *common = port->common;
1491
1492         if (!port->disabled)
1493                 return;
1494
1495         cpsw_ale_control_set(common->ale, port->port_id,
1496                              ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
1497
1498         cpsw_sl_reset(port->slave.mac_sl, 100);
1499         cpsw_sl_ctl_reset(port->slave.mac_sl);
1500 }
1501
1502 static void am65_cpsw_nuss_free_tx_chns(void *data)
1503 {
1504         struct am65_cpsw_common *common = data;
1505         int i;
1506
1507         for (i = 0; i < common->tx_ch_num; i++) {
1508                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1509
1510                 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1511                         k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1512
1513                 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1514                         k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1515
1516                 memset(tx_chn, 0, sizeof(*tx_chn));
1517         }
1518 }
1519
1520 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common)
1521 {
1522         struct device *dev = common->dev;
1523         int i;
1524
1525         devm_remove_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1526
1527         for (i = 0; i < common->tx_ch_num; i++) {
1528                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1529
1530                 if (tx_chn->irq)
1531                         devm_free_irq(dev, tx_chn->irq, tx_chn);
1532
1533                 netif_napi_del(&tx_chn->napi_tx);
1534
1535                 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1536                         k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1537
1538                 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1539                         k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1540
1541                 memset(tx_chn, 0, sizeof(*tx_chn));
1542         }
1543 }
1544
1545 static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common)
1546 {
1547         u32  max_desc_num = ALIGN(AM65_CPSW_MAX_TX_DESC, MAX_SKB_FRAGS);
1548         struct k3_udma_glue_tx_channel_cfg tx_cfg = { 0 };
1549         struct device *dev = common->dev;
1550         struct k3_ring_cfg ring_cfg = {
1551                 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1552                 .mode = K3_RINGACC_RING_MODE_RING,
1553                 .flags = 0
1554         };
1555         u32 hdesc_size;
1556         int i, ret = 0;
1557
1558         hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1559                                            AM65_CPSW_NAV_SW_DATA_SIZE);
1560
1561         tx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1562         tx_cfg.tx_cfg = ring_cfg;
1563         tx_cfg.txcq_cfg = ring_cfg;
1564         tx_cfg.tx_cfg.size = max_desc_num;
1565         tx_cfg.txcq_cfg.size = max_desc_num;
1566
1567         for (i = 0; i < common->tx_ch_num; i++) {
1568                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1569
1570                 snprintf(tx_chn->tx_chn_name,
1571                          sizeof(tx_chn->tx_chn_name), "tx%d", i);
1572
1573                 spin_lock_init(&tx_chn->lock);
1574                 tx_chn->common = common;
1575                 tx_chn->id = i;
1576                 tx_chn->descs_num = max_desc_num;
1577
1578                 tx_chn->tx_chn =
1579                         k3_udma_glue_request_tx_chn(dev,
1580                                                     tx_chn->tx_chn_name,
1581                                                     &tx_cfg);
1582                 if (IS_ERR(tx_chn->tx_chn)) {
1583                         ret = dev_err_probe(dev, PTR_ERR(tx_chn->tx_chn),
1584                                             "Failed to request tx dma channel\n");
1585                         goto err;
1586                 }
1587                 tx_chn->dma_dev = k3_udma_glue_tx_get_dma_device(tx_chn->tx_chn);
1588
1589                 tx_chn->desc_pool = k3_cppi_desc_pool_create_name(tx_chn->dma_dev,
1590                                                                   tx_chn->descs_num,
1591                                                                   hdesc_size,
1592                                                                   tx_chn->tx_chn_name);
1593                 if (IS_ERR(tx_chn->desc_pool)) {
1594                         ret = PTR_ERR(tx_chn->desc_pool);
1595                         dev_err(dev, "Failed to create poll %d\n", ret);
1596                         goto err;
1597                 }
1598
1599                 tx_chn->irq = k3_udma_glue_tx_get_irq(tx_chn->tx_chn);
1600                 if (tx_chn->irq <= 0) {
1601                         dev_err(dev, "Failed to get tx dma irq %d\n",
1602                                 tx_chn->irq);
1603                         goto err;
1604                 }
1605
1606                 snprintf(tx_chn->tx_chn_name,
1607                          sizeof(tx_chn->tx_chn_name), "%s-tx%d",
1608                          dev_name(dev), tx_chn->id);
1609         }
1610
1611 err:
1612         i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1613         if (i) {
1614                 dev_err(dev, "Failed to add free_tx_chns action %d\n", i);
1615                 return i;
1616         }
1617
1618         return ret;
1619 }
1620
1621 static void am65_cpsw_nuss_free_rx_chns(void *data)
1622 {
1623         struct am65_cpsw_common *common = data;
1624         struct am65_cpsw_rx_chn *rx_chn;
1625
1626         rx_chn = &common->rx_chns;
1627
1628         if (!IS_ERR_OR_NULL(rx_chn->desc_pool))
1629                 k3_cppi_desc_pool_destroy(rx_chn->desc_pool);
1630
1631         if (!IS_ERR_OR_NULL(rx_chn->rx_chn))
1632                 k3_udma_glue_release_rx_chn(rx_chn->rx_chn);
1633 }
1634
1635 static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)
1636 {
1637         struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
1638         struct k3_udma_glue_rx_channel_cfg rx_cfg = { 0 };
1639         u32  max_desc_num = AM65_CPSW_MAX_RX_DESC;
1640         struct device *dev = common->dev;
1641         u32 hdesc_size;
1642         u32 fdqring_id;
1643         int i, ret = 0;
1644
1645         hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1646                                            AM65_CPSW_NAV_SW_DATA_SIZE);
1647
1648         rx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1649         rx_cfg.flow_id_num = AM65_CPSW_MAX_RX_FLOWS;
1650         rx_cfg.flow_id_base = common->rx_flow_id_base;
1651
1652         /* init all flows */
1653         rx_chn->dev = dev;
1654         rx_chn->descs_num = max_desc_num;
1655
1656         rx_chn->rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &rx_cfg);
1657         if (IS_ERR(rx_chn->rx_chn)) {
1658                 ret = dev_err_probe(dev, PTR_ERR(rx_chn->rx_chn),
1659                                     "Failed to request rx dma channel\n");
1660                 goto err;
1661         }
1662         rx_chn->dma_dev = k3_udma_glue_rx_get_dma_device(rx_chn->rx_chn);
1663
1664         rx_chn->desc_pool = k3_cppi_desc_pool_create_name(rx_chn->dma_dev,
1665                                                           rx_chn->descs_num,
1666                                                           hdesc_size, "rx");
1667         if (IS_ERR(rx_chn->desc_pool)) {
1668                 ret = PTR_ERR(rx_chn->desc_pool);
1669                 dev_err(dev, "Failed to create rx poll %d\n", ret);
1670                 goto err;
1671         }
1672
1673         common->rx_flow_id_base =
1674                         k3_udma_glue_rx_get_flow_id_base(rx_chn->rx_chn);
1675         dev_info(dev, "set new flow-id-base %u\n", common->rx_flow_id_base);
1676
1677         fdqring_id = K3_RINGACC_RING_ID_ANY;
1678         for (i = 0; i < rx_cfg.flow_id_num; i++) {
1679                 struct k3_ring_cfg rxring_cfg = {
1680                         .elm_size = K3_RINGACC_RING_ELSIZE_8,
1681                         .mode = K3_RINGACC_RING_MODE_RING,
1682                         .flags = 0,
1683                 };
1684                 struct k3_ring_cfg fdqring_cfg = {
1685                         .elm_size = K3_RINGACC_RING_ELSIZE_8,
1686                         .flags = K3_RINGACC_RING_SHARED,
1687                 };
1688                 struct k3_udma_glue_rx_flow_cfg rx_flow_cfg = {
1689                         .rx_cfg = rxring_cfg,
1690                         .rxfdq_cfg = fdqring_cfg,
1691                         .ring_rxq_id = K3_RINGACC_RING_ID_ANY,
1692                         .src_tag_lo_sel =
1693                                 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG,
1694                 };
1695
1696                 rx_flow_cfg.ring_rxfdq0_id = fdqring_id;
1697                 rx_flow_cfg.rx_cfg.size = max_desc_num;
1698                 rx_flow_cfg.rxfdq_cfg.size = max_desc_num;
1699                 rx_flow_cfg.rxfdq_cfg.mode = common->pdata.fdqring_mode;
1700
1701                 ret = k3_udma_glue_rx_flow_init(rx_chn->rx_chn,
1702                                                 i, &rx_flow_cfg);
1703                 if (ret) {
1704                         dev_err(dev, "Failed to init rx flow%d %d\n", i, ret);
1705                         goto err;
1706                 }
1707                 if (!i)
1708                         fdqring_id =
1709                                 k3_udma_glue_rx_flow_get_fdq_id(rx_chn->rx_chn,
1710                                                                 i);
1711
1712                 rx_chn->irq = k3_udma_glue_rx_get_irq(rx_chn->rx_chn, i);
1713
1714                 if (rx_chn->irq <= 0) {
1715                         dev_err(dev, "Failed to get rx dma irq %d\n",
1716                                 rx_chn->irq);
1717                         ret = -ENXIO;
1718                         goto err;
1719                 }
1720         }
1721
1722 err:
1723         i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);
1724         if (i) {
1725                 dev_err(dev, "Failed to add free_rx_chns action %d\n", i);
1726                 return i;
1727         }
1728
1729         return ret;
1730 }
1731
1732 static int am65_cpsw_nuss_init_host_p(struct am65_cpsw_common *common)
1733 {
1734         struct am65_cpsw_host *host_p = am65_common_get_host(common);
1735
1736         host_p->common = common;
1737         host_p->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE;
1738         host_p->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE;
1739
1740         return 0;
1741 }
1742
1743 static int am65_cpsw_am654_get_efuse_macid(struct device_node *of_node,
1744                                            int slave, u8 *mac_addr)
1745 {
1746         u32 mac_lo, mac_hi, offset;
1747         struct regmap *syscon;
1748         int ret;
1749
1750         syscon = syscon_regmap_lookup_by_phandle(of_node, "ti,syscon-efuse");
1751         if (IS_ERR(syscon)) {
1752                 if (PTR_ERR(syscon) == -ENODEV)
1753                         return 0;
1754                 return PTR_ERR(syscon);
1755         }
1756
1757         ret = of_property_read_u32_index(of_node, "ti,syscon-efuse", 1,
1758                                          &offset);
1759         if (ret)
1760                 return ret;
1761
1762         regmap_read(syscon, offset, &mac_lo);
1763         regmap_read(syscon, offset + 4, &mac_hi);
1764
1765         mac_addr[0] = (mac_hi >> 8) & 0xff;
1766         mac_addr[1] = mac_hi & 0xff;
1767         mac_addr[2] = (mac_lo >> 24) & 0xff;
1768         mac_addr[3] = (mac_lo >> 16) & 0xff;
1769         mac_addr[4] = (mac_lo >> 8) & 0xff;
1770         mac_addr[5] = mac_lo & 0xff;
1771
1772         return 0;
1773 }
1774
1775 static int am65_cpsw_init_cpts(struct am65_cpsw_common *common)
1776 {
1777         struct device *dev = common->dev;
1778         struct device_node *node;
1779         struct am65_cpts *cpts;
1780         void __iomem *reg_base;
1781
1782         if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1783                 return 0;
1784
1785         node = of_get_child_by_name(dev->of_node, "cpts");
1786         if (!node) {
1787                 dev_err(dev, "%s cpts not found\n", __func__);
1788                 return -ENOENT;
1789         }
1790
1791         reg_base = common->cpsw_base + AM65_CPSW_NU_CPTS_BASE;
1792         cpts = am65_cpts_create(dev, reg_base, node);
1793         if (IS_ERR(cpts)) {
1794                 int ret = PTR_ERR(cpts);
1795
1796                 if (ret == -EOPNOTSUPP) {
1797                         dev_info(dev, "cpts disabled\n");
1798                         return 0;
1799                 }
1800
1801                 dev_err(dev, "cpts create err %d\n", ret);
1802                 return ret;
1803         }
1804         common->cpts = cpts;
1805         /* Forbid PM runtime if CPTS is running.
1806          * K3 CPSWxG modules may completely lose context during ON->OFF
1807          * transitions depending on integration.
1808          * AM65x/J721E MCU CPSW2G: false
1809          * J721E MAIN_CPSW9G: true
1810          */
1811         pm_runtime_forbid(dev);
1812
1813         return 0;
1814 }
1815
1816 static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
1817 {
1818         struct device_node *node, *port_np;
1819         struct device *dev = common->dev;
1820         int ret;
1821
1822         node = of_get_child_by_name(dev->of_node, "ethernet-ports");
1823         if (!node)
1824                 return -ENOENT;
1825
1826         for_each_child_of_node(node, port_np) {
1827                 struct am65_cpsw_port *port;
1828                 u32 port_id;
1829
1830                 /* it is not a slave port node, continue */
1831                 if (strcmp(port_np->name, "port"))
1832                         continue;
1833
1834                 ret = of_property_read_u32(port_np, "reg", &port_id);
1835                 if (ret < 0) {
1836                         dev_err(dev, "%pOF error reading port_id %d\n",
1837                                 port_np, ret);
1838                         return ret;
1839                 }
1840
1841                 if (!port_id || port_id > common->port_num) {
1842                         dev_err(dev, "%pOF has invalid port_id %u %s\n",
1843                                 port_np, port_id, port_np->name);
1844                         return -EINVAL;
1845                 }
1846
1847                 port = am65_common_get_port(common, port_id);
1848                 port->port_id = port_id;
1849                 port->common = common;
1850                 port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE +
1851                                   AM65_CPSW_NU_PORTS_OFFSET * (port_id);
1852                 port->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE +
1853                                   (AM65_CPSW_NU_STATS_PORT_OFFSET * port_id);
1854                 port->name = of_get_property(port_np, "label", NULL);
1855                 port->fetch_ram_base =
1856                                 common->cpsw_base + AM65_CPSW_NU_FRAM_BASE +
1857                                 (AM65_CPSW_NU_FRAM_PORT_OFFSET * (port_id - 1));
1858
1859                 port->slave.mac_sl = cpsw_sl_get("am65", dev, port->port_base);
1860                 if (IS_ERR(port->slave.mac_sl))
1861                         return PTR_ERR(port->slave.mac_sl);
1862
1863                 port->disabled = !of_device_is_available(port_np);
1864                 if (port->disabled) {
1865                         common->disabled_ports_mask |= BIT(port->port_id);
1866                         continue;
1867                 }
1868
1869                 port->slave.ifphy = devm_of_phy_get(dev, port_np, NULL);
1870                 if (IS_ERR(port->slave.ifphy)) {
1871                         ret = PTR_ERR(port->slave.ifphy);
1872                         dev_err(dev, "%pOF error retrieving port phy: %d\n",
1873                                 port_np, ret);
1874                         return ret;
1875                 }
1876
1877                 port->slave.mac_only =
1878                                 of_property_read_bool(port_np, "ti,mac-only");
1879
1880                 /* get phy/link info */
1881                 if (of_phy_is_fixed_link(port_np)) {
1882                         ret = of_phy_register_fixed_link(port_np);
1883                         if (ret)
1884                                 return dev_err_probe(dev, ret,
1885                                                      "failed to register fixed-link phy %pOF\n",
1886                                                      port_np);
1887                         port->slave.phy_node = of_node_get(port_np);
1888                 } else {
1889                         port->slave.phy_node =
1890                                 of_parse_phandle(port_np, "phy-handle", 0);
1891                 }
1892
1893                 if (!port->slave.phy_node) {
1894                         dev_err(dev,
1895                                 "slave[%d] no phy found\n", port_id);
1896                         return -ENODEV;
1897                 }
1898
1899                 ret = of_get_phy_mode(port_np, &port->slave.phy_if);
1900                 if (ret) {
1901                         dev_err(dev, "%pOF read phy-mode err %d\n",
1902                                 port_np, ret);
1903                         return ret;
1904                 }
1905
1906                 ret = of_get_mac_address(port_np, port->slave.mac_addr);
1907                 if (ret) {
1908                         am65_cpsw_am654_get_efuse_macid(port_np,
1909                                                         port->port_id,
1910                                                         port->slave.mac_addr);
1911                         if (!is_valid_ether_addr(port->slave.mac_addr)) {
1912                                 random_ether_addr(port->slave.mac_addr);
1913                                 dev_err(dev, "Use random MAC address\n");
1914                         }
1915                 }
1916         }
1917         of_node_put(node);
1918
1919         /* is there at least one ext.port */
1920         if (!(~common->disabled_ports_mask & GENMASK(common->port_num, 1))) {
1921                 dev_err(dev, "No Ext. port are available\n");
1922                 return -ENODEV;
1923         }
1924
1925         return 0;
1926 }
1927
1928 static void am65_cpsw_pcpu_stats_free(void *data)
1929 {
1930         struct am65_cpsw_ndev_stats __percpu *stats = data;
1931
1932         free_percpu(stats);
1933 }
1934
1935 static int
1936 am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx)
1937 {
1938         struct am65_cpsw_ndev_priv *ndev_priv;
1939         struct device *dev = common->dev;
1940         struct am65_cpsw_port *port;
1941         int ret;
1942
1943         port = &common->ports[port_idx];
1944
1945         if (port->disabled)
1946                 return 0;
1947
1948         /* alloc netdev */
1949         port->ndev = devm_alloc_etherdev_mqs(common->dev,
1950                                              sizeof(struct am65_cpsw_ndev_priv),
1951                                              AM65_CPSW_MAX_TX_QUEUES,
1952                                              AM65_CPSW_MAX_RX_QUEUES);
1953         if (!port->ndev) {
1954                 dev_err(dev, "error allocating slave net_device %u\n",
1955                         port->port_id);
1956                 return -ENOMEM;
1957         }
1958
1959         ndev_priv = netdev_priv(port->ndev);
1960         ndev_priv->port = port;
1961         ndev_priv->msg_enable = AM65_CPSW_DEBUG;
1962         SET_NETDEV_DEV(port->ndev, dev);
1963
1964         ether_addr_copy(port->ndev->dev_addr, port->slave.mac_addr);
1965
1966         port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE;
1967         port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;
1968         port->ndev->hw_features = NETIF_F_SG |
1969                                   NETIF_F_RXCSUM |
1970                                   NETIF_F_HW_CSUM |
1971                                   NETIF_F_HW_TC;
1972         port->ndev->features = port->ndev->hw_features |
1973                                NETIF_F_HW_VLAN_CTAG_FILTER;
1974         port->ndev->vlan_features |=  NETIF_F_SG;
1975         port->ndev->netdev_ops = &am65_cpsw_nuss_netdev_ops;
1976         port->ndev->ethtool_ops = &am65_cpsw_ethtool_ops_slave;
1977
1978         /* Disable TX checksum offload by default due to HW bug */
1979         if (common->pdata.quirks & AM65_CPSW_QUIRK_I2027_NO_TX_CSUM)
1980                 port->ndev->features &= ~NETIF_F_HW_CSUM;
1981
1982         ndev_priv->stats = netdev_alloc_pcpu_stats(struct am65_cpsw_ndev_stats);
1983         if (!ndev_priv->stats)
1984                 return -ENOMEM;
1985
1986         ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free,
1987                                        ndev_priv->stats);
1988         if (ret)
1989                 dev_err(dev, "failed to add percpu stat free action %d\n", ret);
1990
1991         if (!common->dma_ndev)
1992                 common->dma_ndev = port->ndev;
1993
1994         return ret;
1995 }
1996
1997 static int am65_cpsw_nuss_init_ndevs(struct am65_cpsw_common *common)
1998 {
1999         int ret;
2000         int i;
2001
2002         for (i = 0; i < common->port_num; i++) {
2003                 ret = am65_cpsw_nuss_init_port_ndev(common, i);
2004                 if (ret)
2005                         return ret;
2006         }
2007
2008         netif_napi_add(common->dma_ndev, &common->napi_rx,
2009                        am65_cpsw_nuss_rx_poll, NAPI_POLL_WEIGHT);
2010
2011         return ret;
2012 }
2013
2014 static int am65_cpsw_nuss_ndev_add_tx_napi(struct am65_cpsw_common *common)
2015 {
2016         struct device *dev = common->dev;
2017         int i, ret = 0;
2018
2019         for (i = 0; i < common->tx_ch_num; i++) {
2020                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
2021
2022                 netif_tx_napi_add(common->dma_ndev, &tx_chn->napi_tx,
2023                                   am65_cpsw_nuss_tx_poll, NAPI_POLL_WEIGHT);
2024
2025                 ret = devm_request_irq(dev, tx_chn->irq,
2026                                        am65_cpsw_nuss_tx_irq,
2027                                        IRQF_TRIGGER_HIGH,
2028                                        tx_chn->tx_chn_name, tx_chn);
2029                 if (ret) {
2030                         dev_err(dev, "failure requesting tx%u irq %u, %d\n",
2031                                 tx_chn->id, tx_chn->irq, ret);
2032                         goto err;
2033                 }
2034         }
2035
2036 err:
2037         return ret;
2038 }
2039
2040 static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common)
2041 {
2042         struct am65_cpsw_port *port;
2043         int i;
2044
2045         for (i = 0; i < common->port_num; i++) {
2046                 port = &common->ports[i];
2047                 if (port->ndev)
2048                         unregister_netdev(port->ndev);
2049         }
2050 }
2051
2052 static void am65_cpsw_port_offload_fwd_mark_update(struct am65_cpsw_common *common)
2053 {
2054         int set_val = 0;
2055         int i;
2056
2057         if (common->br_members == (GENMASK(common->port_num, 1) & ~common->disabled_ports_mask))
2058                 set_val = 1;
2059
2060         dev_dbg(common->dev, "set offload_fwd_mark %d\n", set_val);
2061
2062         for (i = 1; i <= common->port_num; i++) {
2063                 struct am65_cpsw_port *port = am65_common_get_port(common, i);
2064                 struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(port->ndev);
2065
2066                 priv->offload_fwd_mark = set_val;
2067         }
2068 }
2069
2070 bool am65_cpsw_port_dev_check(const struct net_device *ndev)
2071 {
2072         if (ndev->netdev_ops == &am65_cpsw_nuss_netdev_ops) {
2073                 struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2074
2075                 return !common->is_emac_mode;
2076         }
2077
2078         return false;
2079 }
2080
2081 static int am65_cpsw_netdevice_port_link(struct net_device *ndev,
2082                                          struct net_device *br_ndev,
2083                                          struct netlink_ext_ack *extack)
2084 {
2085         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2086         struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
2087         int err;
2088
2089         if (!common->br_members) {
2090                 common->hw_bridge_dev = br_ndev;
2091         } else {
2092                 /* This is adding the port to a second bridge, this is
2093                  * unsupported
2094                  */
2095                 if (common->hw_bridge_dev != br_ndev)
2096                         return -EOPNOTSUPP;
2097         }
2098
2099         err = switchdev_bridge_port_offload(ndev, ndev, extack);
2100         if (err)
2101                 return err;
2102
2103         common->br_members |= BIT(priv->port->port_id);
2104
2105         am65_cpsw_port_offload_fwd_mark_update(common);
2106
2107         return NOTIFY_DONE;
2108 }
2109
2110 static void am65_cpsw_netdevice_port_unlink(struct net_device *ndev)
2111 {
2112         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
2113         struct am65_cpsw_ndev_priv *priv = am65_ndev_to_priv(ndev);
2114
2115         switchdev_bridge_port_unoffload(ndev);
2116
2117         common->br_members &= ~BIT(priv->port->port_id);
2118
2119         am65_cpsw_port_offload_fwd_mark_update(common);
2120
2121         if (!common->br_members)
2122                 common->hw_bridge_dev = NULL;
2123 }
2124
2125 /* netdev notifier */
2126 static int am65_cpsw_netdevice_event(struct notifier_block *unused,
2127                                      unsigned long event, void *ptr)
2128 {
2129         struct netlink_ext_ack *extack = netdev_notifier_info_to_extack(ptr);
2130         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2131         struct netdev_notifier_changeupper_info *info;
2132         int ret = NOTIFY_DONE;
2133
2134         if (!am65_cpsw_port_dev_check(ndev))
2135                 return NOTIFY_DONE;
2136
2137         switch (event) {
2138         case NETDEV_CHANGEUPPER:
2139                 info = ptr;
2140
2141                 if (netif_is_bridge_master(info->upper_dev)) {
2142                         if (info->linking)
2143                                 ret = am65_cpsw_netdevice_port_link(ndev,
2144                                                                     info->upper_dev,
2145                                                                     extack);
2146                         else
2147                                 am65_cpsw_netdevice_port_unlink(ndev);
2148                 }
2149                 break;
2150         default:
2151                 return NOTIFY_DONE;
2152         }
2153
2154         return notifier_from_errno(ret);
2155 }
2156
2157 static int am65_cpsw_register_notifiers(struct am65_cpsw_common *cpsw)
2158 {
2159         int ret = 0;
2160
2161         if (AM65_CPSW_IS_CPSW2G(cpsw) ||
2162             !IS_REACHABLE(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV))
2163                 return 0;
2164
2165         cpsw->am65_cpsw_netdevice_nb.notifier_call = &am65_cpsw_netdevice_event;
2166         ret = register_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2167         if (ret) {
2168                 dev_err(cpsw->dev, "can't register netdevice notifier\n");
2169                 return ret;
2170         }
2171
2172         ret = am65_cpsw_switchdev_register_notifiers(cpsw);
2173         if (ret)
2174                 unregister_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2175
2176         return ret;
2177 }
2178
2179 static void am65_cpsw_unregister_notifiers(struct am65_cpsw_common *cpsw)
2180 {
2181         if (AM65_CPSW_IS_CPSW2G(cpsw) ||
2182             !IS_REACHABLE(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV))
2183                 return;
2184
2185         am65_cpsw_switchdev_unregister_notifiers(cpsw);
2186         unregister_netdevice_notifier(&cpsw->am65_cpsw_netdevice_nb);
2187 }
2188
2189 static const struct devlink_ops am65_cpsw_devlink_ops = {};
2190
2191 static void am65_cpsw_init_stp_ale_entry(struct am65_cpsw_common *cpsw)
2192 {
2193         cpsw_ale_add_mcast(cpsw->ale, eth_stp_addr, ALE_PORT_HOST, ALE_SUPER, 0,
2194                            ALE_MCAST_BLOCK_LEARN_FWD);
2195 }
2196
2197 static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common)
2198 {
2199         struct am65_cpsw_host *host = am65_common_get_host(common);
2200
2201         writel(common->default_vlan, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2202
2203         am65_cpsw_init_stp_ale_entry(common);
2204
2205         cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_P0_UNI_FLOOD, 1);
2206         dev_dbg(common->dev, "Set P0_UNI_FLOOD\n");
2207         cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_PORT_NOLEARN, 0);
2208 }
2209
2210 static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common)
2211 {
2212         struct am65_cpsw_host *host = am65_common_get_host(common);
2213
2214         writel(0, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2215
2216         cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_P0_UNI_FLOOD, 0);
2217         dev_dbg(common->dev, "unset P0_UNI_FLOOD\n");
2218
2219         /* learning make no sense in multi-mac mode */
2220         cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_PORT_NOLEARN, 1);
2221 }
2222
2223 static int am65_cpsw_dl_switch_mode_get(struct devlink *dl, u32 id,
2224                                         struct devlink_param_gset_ctx *ctx)
2225 {
2226         struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);
2227         struct am65_cpsw_common *common = dl_priv->common;
2228
2229         dev_dbg(common->dev, "%s id:%u\n", __func__, id);
2230
2231         if (id != AM65_CPSW_DL_PARAM_SWITCH_MODE)
2232                 return -EOPNOTSUPP;
2233
2234         ctx->val.vbool = !common->is_emac_mode;
2235
2236         return 0;
2237 }
2238
2239 static void am65_cpsw_init_port_emac_ale(struct  am65_cpsw_port *port)
2240 {
2241         struct am65_cpsw_slave_data *slave = &port->slave;
2242         struct am65_cpsw_common *common = port->common;
2243         u32 port_mask;
2244
2245         writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2246
2247         if (slave->mac_only)
2248                 /* enable mac-only mode on port */
2249                 cpsw_ale_control_set(common->ale, port->port_id,
2250                                      ALE_PORT_MACONLY, 1);
2251
2252         cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_NOLEARN, 1);
2253
2254         port_mask = BIT(port->port_id) | ALE_PORT_HOST;
2255
2256         cpsw_ale_add_ucast(common->ale, port->ndev->dev_addr,
2257                            HOST_PORT_NUM, ALE_SECURE, slave->port_vlan);
2258         cpsw_ale_add_mcast(common->ale, port->ndev->broadcast,
2259                            port_mask, ALE_VLAN, slave->port_vlan, ALE_MCAST_FWD_2);
2260 }
2261
2262 static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port)
2263 {
2264         struct am65_cpsw_slave_data *slave = &port->slave;
2265         struct am65_cpsw_common *cpsw = port->common;
2266         u32 port_mask;
2267
2268         cpsw_ale_control_set(cpsw->ale, port->port_id,
2269                              ALE_PORT_NOLEARN, 0);
2270
2271         cpsw_ale_add_ucast(cpsw->ale, port->ndev->dev_addr,
2272                            HOST_PORT_NUM, ALE_SECURE | ALE_BLOCKED | ALE_VLAN,
2273                            slave->port_vlan);
2274
2275         port_mask = BIT(port->port_id) | ALE_PORT_HOST;
2276
2277         cpsw_ale_add_mcast(cpsw->ale, port->ndev->broadcast,
2278                            port_mask, ALE_VLAN, slave->port_vlan,
2279                            ALE_MCAST_FWD_2);
2280
2281         writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2282
2283         cpsw_ale_control_set(cpsw->ale, port->port_id,
2284                              ALE_PORT_MACONLY, 0);
2285 }
2286
2287 static int am65_cpsw_dl_switch_mode_set(struct devlink *dl, u32 id,
2288                                         struct devlink_param_gset_ctx *ctx)
2289 {
2290         struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);
2291         struct am65_cpsw_common *cpsw = dl_priv->common;
2292         bool switch_en = ctx->val.vbool;
2293         bool if_running = false;
2294         int i;
2295
2296         dev_dbg(cpsw->dev, "%s id:%u\n", __func__, id);
2297
2298         if (id != AM65_CPSW_DL_PARAM_SWITCH_MODE)
2299                 return -EOPNOTSUPP;
2300
2301         if (switch_en == !cpsw->is_emac_mode)
2302                 return 0;
2303
2304         if (!switch_en && cpsw->br_members) {
2305                 dev_err(cpsw->dev, "Remove ports from bridge before disabling switch mode\n");
2306                 return -EINVAL;
2307         }
2308
2309         rtnl_lock();
2310
2311         cpsw->is_emac_mode = !switch_en;
2312
2313         for (i = 0; i < cpsw->port_num; i++) {
2314                 struct net_device *sl_ndev = cpsw->ports[i].ndev;
2315
2316                 if (!sl_ndev || !netif_running(sl_ndev))
2317                         continue;
2318
2319                 if_running = true;
2320         }
2321
2322         if (!if_running) {
2323                 /* all ndevs are down */
2324                 for (i = 0; i < cpsw->port_num; i++) {
2325                         struct net_device *sl_ndev = cpsw->ports[i].ndev;
2326                         struct am65_cpsw_slave_data *slave;
2327
2328                         if (!sl_ndev)
2329                                 continue;
2330
2331                         slave = am65_ndev_to_slave(sl_ndev);
2332                         if (switch_en)
2333                                 slave->port_vlan = cpsw->default_vlan;
2334                         else
2335                                 slave->port_vlan = 0;
2336                 }
2337
2338                 goto exit;
2339         }
2340
2341         cpsw_ale_control_set(cpsw->ale, 0, ALE_BYPASS, 1);
2342         /* clean up ALE table */
2343         cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_CLEAR, 1);
2344         cpsw_ale_control_get(cpsw->ale, HOST_PORT_NUM, ALE_AGEOUT);
2345
2346         if (switch_en) {
2347                 dev_info(cpsw->dev, "Enable switch mode\n");
2348
2349                 am65_cpsw_init_host_port_switch(cpsw);
2350
2351                 for (i = 0; i < cpsw->port_num; i++) {
2352                         struct net_device *sl_ndev = cpsw->ports[i].ndev;
2353                         struct am65_cpsw_slave_data *slave;
2354                         struct am65_cpsw_port *port;
2355
2356                         if (!sl_ndev)
2357                                 continue;
2358
2359                         port = am65_ndev_to_port(sl_ndev);
2360                         slave = am65_ndev_to_slave(sl_ndev);
2361                         slave->port_vlan = cpsw->default_vlan;
2362
2363                         if (netif_running(sl_ndev))
2364                                 am65_cpsw_init_port_switch_ale(port);
2365                 }
2366
2367         } else {
2368                 dev_info(cpsw->dev, "Disable switch mode\n");
2369
2370                 am65_cpsw_init_host_port_emac(cpsw);
2371
2372                 for (i = 0; i < cpsw->port_num; i++) {
2373                         struct net_device *sl_ndev = cpsw->ports[i].ndev;
2374                         struct am65_cpsw_port *port;
2375
2376                         if (!sl_ndev)
2377                                 continue;
2378
2379                         port = am65_ndev_to_port(sl_ndev);
2380                         port->slave.port_vlan = 0;
2381                         if (netif_running(sl_ndev))
2382                                 am65_cpsw_init_port_emac_ale(port);
2383                 }
2384         }
2385         cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_BYPASS, 0);
2386 exit:
2387         rtnl_unlock();
2388
2389         return 0;
2390 }
2391
2392 static const struct devlink_param am65_cpsw_devlink_params[] = {
2393         DEVLINK_PARAM_DRIVER(AM65_CPSW_DL_PARAM_SWITCH_MODE, "switch_mode",
2394                              DEVLINK_PARAM_TYPE_BOOL,
2395                              BIT(DEVLINK_PARAM_CMODE_RUNTIME),
2396                              am65_cpsw_dl_switch_mode_get,
2397                              am65_cpsw_dl_switch_mode_set, NULL),
2398 };
2399
2400 static void am65_cpsw_unregister_devlink_ports(struct am65_cpsw_common *common)
2401 {
2402         struct devlink_port *dl_port;
2403         struct am65_cpsw_port *port;
2404         int i;
2405
2406         for (i = 1; i <= common->port_num; i++) {
2407                 port = am65_common_get_port(common, i);
2408                 dl_port = &port->devlink_port;
2409
2410                 if (dl_port->registered)
2411                         devlink_port_unregister(dl_port);
2412         }
2413 }
2414
2415 static int am65_cpsw_nuss_register_devlink(struct am65_cpsw_common *common)
2416 {
2417         struct devlink_port_attrs attrs = {};
2418         struct am65_cpsw_devlink *dl_priv;
2419         struct device *dev = common->dev;
2420         struct devlink_port *dl_port;
2421         struct am65_cpsw_port *port;
2422         int ret = 0;
2423         int i;
2424
2425         common->devlink =
2426                 devlink_alloc(&am65_cpsw_devlink_ops, sizeof(*dl_priv));
2427         if (!common->devlink)
2428                 return -ENOMEM;
2429
2430         dl_priv = devlink_priv(common->devlink);
2431         dl_priv->common = common;
2432
2433         ret = devlink_register(common->devlink, dev);
2434         if (ret) {
2435                 dev_err(dev, "devlink reg fail ret:%d\n", ret);
2436                 goto dl_free;
2437         }
2438
2439         /* Provide devlink hook to switch mode when multiple external ports
2440          * are present NUSS switchdev driver is enabled.
2441          */
2442         if (!AM65_CPSW_IS_CPSW2G(common) &&
2443             IS_ENABLED(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV)) {
2444                 ret = devlink_params_register(common->devlink,
2445                                               am65_cpsw_devlink_params,
2446                                               ARRAY_SIZE(am65_cpsw_devlink_params));
2447                 if (ret) {
2448                         dev_err(dev, "devlink params reg fail ret:%d\n", ret);
2449                         goto dl_unreg;
2450                 }
2451                 devlink_params_publish(common->devlink);
2452         }
2453
2454         for (i = 1; i <= common->port_num; i++) {
2455                 port = am65_common_get_port(common, i);
2456                 dl_port = &port->devlink_port;
2457
2458                 attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
2459                 attrs.phys.port_number = port->port_id;
2460                 attrs.switch_id.id_len = sizeof(resource_size_t);
2461                 memcpy(attrs.switch_id.id, common->switch_id, attrs.switch_id.id_len);
2462                 devlink_port_attrs_set(dl_port, &attrs);
2463
2464                 ret = devlink_port_register(common->devlink, dl_port, port->port_id);
2465                 if (ret) {
2466                         dev_err(dev, "devlink_port reg fail for port %d, ret:%d\n",
2467                                 port->port_id, ret);
2468                         goto dl_port_unreg;
2469                 }
2470                 devlink_port_type_eth_set(dl_port, port->ndev);
2471         }
2472
2473         return ret;
2474
2475 dl_port_unreg:
2476         am65_cpsw_unregister_devlink_ports(common);
2477 dl_unreg:
2478         devlink_unregister(common->devlink);
2479 dl_free:
2480         devlink_free(common->devlink);
2481
2482         return ret;
2483 }
2484
2485 static void am65_cpsw_unregister_devlink(struct am65_cpsw_common *common)
2486 {
2487         if (!AM65_CPSW_IS_CPSW2G(common) &&
2488             IS_ENABLED(CONFIG_TI_K3_AM65_CPSW_SWITCHDEV)) {
2489                 devlink_params_unpublish(common->devlink);
2490                 devlink_params_unregister(common->devlink, am65_cpsw_devlink_params,
2491                                           ARRAY_SIZE(am65_cpsw_devlink_params));
2492         }
2493
2494         am65_cpsw_unregister_devlink_ports(common);
2495         devlink_unregister(common->devlink);
2496         devlink_free(common->devlink);
2497 }
2498
2499 static int am65_cpsw_nuss_register_ndevs(struct am65_cpsw_common *common)
2500 {
2501         struct device *dev = common->dev;
2502         struct am65_cpsw_port *port;
2503         int ret = 0, i;
2504
2505         ret = am65_cpsw_nuss_ndev_add_tx_napi(common);
2506         if (ret)
2507                 return ret;
2508
2509         ret = devm_request_irq(dev, common->rx_chns.irq,
2510                                am65_cpsw_nuss_rx_irq,
2511                                IRQF_TRIGGER_HIGH, dev_name(dev), common);
2512         if (ret) {
2513                 dev_err(dev, "failure requesting rx irq %u, %d\n",
2514                         common->rx_chns.irq, ret);
2515                 return ret;
2516         }
2517
2518         for (i = 0; i < common->port_num; i++) {
2519                 port = &common->ports[i];
2520
2521                 if (!port->ndev)
2522                         continue;
2523
2524                 ret = register_netdev(port->ndev);
2525                 if (ret) {
2526                         dev_err(dev, "error registering slave net device%i %d\n",
2527                                 i, ret);
2528                         goto err_cleanup_ndev;
2529                 }
2530         }
2531
2532         ret = am65_cpsw_register_notifiers(common);
2533         if (ret)
2534                 goto err_cleanup_ndev;
2535
2536         ret = am65_cpsw_nuss_register_devlink(common);
2537         if (ret)
2538                 goto clean_unregister_notifiers;
2539
2540         /* can't auto unregister ndev using devm_add_action() due to
2541          * devres release sequence in DD core for DMA
2542          */
2543
2544         return 0;
2545 clean_unregister_notifiers:
2546         am65_cpsw_unregister_notifiers(common);
2547 err_cleanup_ndev:
2548         am65_cpsw_nuss_cleanup_ndev(common);
2549
2550         return ret;
2551 }
2552
2553 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx)
2554 {
2555         int ret;
2556
2557         common->tx_ch_num = num_tx;
2558         ret = am65_cpsw_nuss_init_tx_chns(common);
2559         if (ret)
2560                 return ret;
2561
2562         return am65_cpsw_nuss_ndev_add_tx_napi(common);
2563 }
2564
2565 struct am65_cpsw_soc_pdata {
2566         u32     quirks_dis;
2567 };
2568
2569 static const struct am65_cpsw_soc_pdata am65x_soc_sr2_0 = {
2570         .quirks_dis = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2571 };
2572
2573 static const struct soc_device_attribute am65_cpsw_socinfo[] = {
2574         { .family = "AM65X",
2575           .revision = "SR2.0",
2576           .data = &am65x_soc_sr2_0
2577         },
2578         {/* sentinel */}
2579 };
2580
2581 static const struct am65_cpsw_pdata am65x_sr1_0 = {
2582         .quirks = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2583         .ale_dev_id = "am65x-cpsw2g",
2584         .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2585 };
2586
2587 static const struct am65_cpsw_pdata j721e_pdata = {
2588         .quirks = 0,
2589         .ale_dev_id = "am65x-cpsw2g",
2590         .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2591 };
2592
2593 static const struct am65_cpsw_pdata am64x_cpswxg_pdata = {
2594         .quirks = 0,
2595         .ale_dev_id = "am64-cpswxg",
2596         .fdqring_mode = K3_RINGACC_RING_MODE_RING,
2597 };
2598
2599 static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {
2600         { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0},
2601         { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata},
2602         { .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata},
2603         { /* sentinel */ },
2604 };
2605 MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable);
2606
2607 static void am65_cpsw_nuss_apply_socinfo(struct am65_cpsw_common *common)
2608 {
2609         const struct soc_device_attribute *soc;
2610
2611         soc = soc_device_match(am65_cpsw_socinfo);
2612         if (soc && soc->data) {
2613                 const struct am65_cpsw_soc_pdata *socdata = soc->data;
2614
2615                 /* disable quirks */
2616                 common->pdata.quirks &= ~socdata->quirks_dis;
2617         }
2618 }
2619
2620 static int am65_cpsw_nuss_probe(struct platform_device *pdev)
2621 {
2622         struct cpsw_ale_params ale_params = { 0 };
2623         const struct of_device_id *of_id;
2624         struct device *dev = &pdev->dev;
2625         struct am65_cpsw_common *common;
2626         struct device_node *node;
2627         struct resource *res;
2628         struct clk *clk;
2629         u64 id_temp;
2630         int ret, i;
2631
2632         common = devm_kzalloc(dev, sizeof(struct am65_cpsw_common), GFP_KERNEL);
2633         if (!common)
2634                 return -ENOMEM;
2635         common->dev = dev;
2636
2637         of_id = of_match_device(am65_cpsw_nuss_of_mtable, dev);
2638         if (!of_id)
2639                 return -EINVAL;
2640         common->pdata = *(const struct am65_cpsw_pdata *)of_id->data;
2641
2642         am65_cpsw_nuss_apply_socinfo(common);
2643
2644         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cpsw_nuss");
2645         common->ss_base = devm_ioremap_resource(&pdev->dev, res);
2646         if (IS_ERR(common->ss_base))
2647                 return PTR_ERR(common->ss_base);
2648         common->cpsw_base = common->ss_base + AM65_CPSW_CPSW_NU_BASE;
2649         /* Use device's physical base address as switch id */
2650         id_temp = cpu_to_be64(res->start);
2651         memcpy(common->switch_id, &id_temp, sizeof(res->start));
2652
2653         node = of_get_child_by_name(dev->of_node, "ethernet-ports");
2654         if (!node)
2655                 return -ENOENT;
2656         common->port_num = of_get_child_count(node);
2657         if (common->port_num < 1 || common->port_num > AM65_CPSW_MAX_PORTS)
2658                 return -ENOENT;
2659         of_node_put(node);
2660
2661         common->rx_flow_id_base = -1;
2662         init_completion(&common->tdown_complete);
2663         common->tx_ch_num = 1;
2664         common->pf_p0_rx_ptype_rrobin = false;
2665         common->default_vlan = 1;
2666
2667         common->ports = devm_kcalloc(dev, common->port_num,
2668                                      sizeof(*common->ports),
2669                                      GFP_KERNEL);
2670         if (!common->ports)
2671                 return -ENOMEM;
2672
2673         clk = devm_clk_get(dev, "fck");
2674         if (IS_ERR(clk))
2675                 return dev_err_probe(dev, PTR_ERR(clk), "getting fck clock\n");
2676         common->bus_freq = clk_get_rate(clk);
2677
2678         pm_runtime_enable(dev);
2679         ret = pm_runtime_get_sync(dev);
2680         if (ret < 0) {
2681                 pm_runtime_put_noidle(dev);
2682                 pm_runtime_disable(dev);
2683                 return ret;
2684         }
2685
2686         node = of_get_child_by_name(dev->of_node, "mdio");
2687         if (!node) {
2688                 dev_warn(dev, "MDIO node not found\n");
2689         } else if (of_device_is_available(node)) {
2690                 struct platform_device *mdio_pdev;
2691
2692                 mdio_pdev = of_platform_device_create(node, NULL, dev);
2693                 if (!mdio_pdev) {
2694                         ret = -ENODEV;
2695                         goto err_pm_clear;
2696                 }
2697
2698                 common->mdio_dev =  &mdio_pdev->dev;
2699         }
2700         of_node_put(node);
2701
2702         am65_cpsw_nuss_get_ver(common);
2703
2704         /* init tx channels */
2705         ret = am65_cpsw_nuss_init_tx_chns(common);
2706         if (ret)
2707                 goto err_of_clear;
2708         ret = am65_cpsw_nuss_init_rx_chns(common);
2709         if (ret)
2710                 goto err_of_clear;
2711
2712         ret = am65_cpsw_nuss_init_host_p(common);
2713         if (ret)
2714                 goto err_of_clear;
2715
2716         ret = am65_cpsw_nuss_init_slave_ports(common);
2717         if (ret)
2718                 goto err_of_clear;
2719
2720         /* init common data */
2721         ale_params.dev = dev;
2722         ale_params.ale_ageout = AM65_CPSW_ALE_AGEOUT_DEFAULT;
2723         ale_params.ale_ports = common->port_num + 1;
2724         ale_params.ale_regs = common->cpsw_base + AM65_CPSW_NU_ALE_BASE;
2725         ale_params.dev_id = common->pdata.ale_dev_id;
2726         ale_params.bus_freq = common->bus_freq;
2727
2728         common->ale = cpsw_ale_create(&ale_params);
2729         if (IS_ERR(common->ale)) {
2730                 dev_err(dev, "error initializing ale engine\n");
2731                 ret = PTR_ERR(common->ale);
2732                 goto err_of_clear;
2733         }
2734
2735         ret = am65_cpsw_init_cpts(common);
2736         if (ret)
2737                 goto err_of_clear;
2738
2739         /* init ports */
2740         for (i = 0; i < common->port_num; i++)
2741                 am65_cpsw_nuss_slave_disable_unused(&common->ports[i]);
2742
2743         dev_set_drvdata(dev, common);
2744
2745         common->is_emac_mode = true;
2746
2747         ret = am65_cpsw_nuss_init_ndevs(common);
2748         if (ret)
2749                 goto err_of_clear;
2750
2751         ret = am65_cpsw_nuss_register_ndevs(common);
2752         if (ret)
2753                 goto err_of_clear;
2754
2755         pm_runtime_put(dev);
2756         return 0;
2757
2758 err_of_clear:
2759         of_platform_device_destroy(common->mdio_dev, NULL);
2760 err_pm_clear:
2761         pm_runtime_put_sync(dev);
2762         pm_runtime_disable(dev);
2763         return ret;
2764 }
2765
2766 static int am65_cpsw_nuss_remove(struct platform_device *pdev)
2767 {
2768         struct device *dev = &pdev->dev;
2769         struct am65_cpsw_common *common;
2770         int ret;
2771
2772         common = dev_get_drvdata(dev);
2773
2774         ret = pm_runtime_get_sync(&pdev->dev);
2775         if (ret < 0) {
2776                 pm_runtime_put_noidle(&pdev->dev);
2777                 return ret;
2778         }
2779
2780         am65_cpsw_unregister_devlink(common);
2781         am65_cpsw_unregister_notifiers(common);
2782
2783         /* must unregister ndevs here because DD release_driver routine calls
2784          * dma_deconfigure(dev) before devres_release_all(dev)
2785          */
2786         am65_cpsw_nuss_cleanup_ndev(common);
2787
2788         of_platform_device_destroy(common->mdio_dev, NULL);
2789
2790         pm_runtime_put_sync(&pdev->dev);
2791         pm_runtime_disable(&pdev->dev);
2792         return 0;
2793 }
2794
2795 static struct platform_driver am65_cpsw_nuss_driver = {
2796         .driver = {
2797                 .name    = AM65_CPSW_DRV_NAME,
2798                 .of_match_table = am65_cpsw_nuss_of_mtable,
2799         },
2800         .probe = am65_cpsw_nuss_probe,
2801         .remove = am65_cpsw_nuss_remove,
2802 };
2803
2804 module_platform_driver(am65_cpsw_nuss_driver);
2805
2806 MODULE_LICENSE("GPL v2");
2807 MODULE_AUTHOR("Grygorii Strashko <grygorii.strashko@ti.com>");
2808 MODULE_DESCRIPTION("TI AM65 CPSW Ethernet driver");