drivers/net/ethernet/ti/am65-cpsw-nuss.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
   3  *
   4  * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/etherdevice.h>
  10 #include <linux/if_vlan.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/kernel.h>
  13 #include <linux/kmemleak.h>
  14 #include <linux/module.h>
  15 #include <linux/netdevice.h>
  16 #include <linux/net_tstamp.h>
  17 #include <linux/of.h>
  18 #include <linux/of_mdio.h>
  19 #include <linux/of_net.h>
  20 #include <linux/of_device.h>
  21 #include <linux/phy.h>
  22 #include <linux/phy/phy.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/regmap.h>
  26 #include <linux/mfd/syscon.h>
  27 #include <linux/sys_soc.h>
  28 #include <linux/dma/ti-cppi5.h>
  29 #include <linux/dma/k3-udma-glue.h>
  30
  31 #include "cpsw_ale.h"
  32 #include "cpsw_sl.h"
  33 #include "am65-cpsw-nuss.h"
  34 #include "k3-cppi-desc-pool.h"
  35 #include "am65-cpts.h"
  36
  37 #define AM65_CPSW_SS_BASE       0x0
  38 #define AM65_CPSW_SGMII_BASE    0x100
  39 #define AM65_CPSW_XGMII_BASE    0x2100
  40 #define AM65_CPSW_CPSW_NU_BASE  0x20000
  41 #define AM65_CPSW_NU_PORTS_BASE 0x1000
  42 #define AM65_CPSW_NU_FRAM_BASE  0x12000
  43 #define AM65_CPSW_NU_STATS_BASE 0x1a000
  44 #define AM65_CPSW_NU_ALE_BASE   0x1e000
  45 #define AM65_CPSW_NU_CPTS_BASE  0x1d000
  46
  47 #define AM65_CPSW_NU_PORTS_OFFSET       0x1000
  48 #define AM65_CPSW_NU_STATS_PORT_OFFSET  0x200
  49 #define AM65_CPSW_NU_FRAM_PORT_OFFSET   0x200
  50
  51 #define AM65_CPSW_MAX_PORTS     8
  52
  53 #define AM65_CPSW_MIN_PACKET_SIZE       VLAN_ETH_ZLEN
  54 #define AM65_CPSW_MAX_PACKET_SIZE       (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
  55
  56 #define AM65_CPSW_REG_CTL               0x004
  57 #define AM65_CPSW_REG_STAT_PORT_EN      0x014
  58 #define AM65_CPSW_REG_PTYPE             0x018
  59
  60 #define AM65_CPSW_P0_REG_CTL                    0x004
  61 #define AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET      0x008
  62
  63 #define AM65_CPSW_PORT_REG_PRI_CTL              0x01c
  64 #define AM65_CPSW_PORT_REG_RX_PRI_MAP           0x020
  65 #define AM65_CPSW_PORT_REG_RX_MAXLEN            0x024
  66
  67 #define AM65_CPSW_PORTN_REG_SA_L                0x308
  68 #define AM65_CPSW_PORTN_REG_SA_H                0x30c
  69 #define AM65_CPSW_PORTN_REG_TS_CTL              0x310
  70 #define AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG    0x314
  71 #define AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG   0x318
  72 #define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2       0x31C
  73
  74 #define AM65_CPSW_CTL_VLAN_AWARE                BIT(1)
  75 #define AM65_CPSW_CTL_P0_ENABLE                 BIT(2)
  76 #define AM65_CPSW_CTL_P0_TX_CRC_REMOVE          BIT(13)
  77 #define AM65_CPSW_CTL_P0_RX_PAD                 BIT(14)
  78
  79 /* AM65_CPSW_P0_REG_CTL */
  80 #define AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN     BIT(0)
  81
  82 /* AM65_CPSW_PORT_REG_PRI_CTL */
  83 #define AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN      BIT(8)
  84
  85 /* AM65_CPSW_PN_TS_CTL register fields */
  86 #define AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN         BIT(4)
  87 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN      BIT(5)
  88 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT2_EN      BIT(6)
  89 #define AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN         BIT(7)
  90 #define AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN         BIT(10)
  91 #define AM65_CPSW_PN_TS_CTL_TX_HOST_TS_EN       BIT(11)
  92 #define AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT   16
  93
  94 /* AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG register fields */
  95 #define AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT     16
  96
  97 /* AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 */
  98 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107       BIT(16)
  99 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129       BIT(17)
 100 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130       BIT(18)
 101 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131       BIT(19)
 102 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132       BIT(20)
 103 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319       BIT(21)
 104 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320       BIT(22)
 105 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO BIT(23)
 106
 107 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
 108 #define AM65_CPSW_TS_EVENT_MSG_TYPE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3))
 109
 110 #define AM65_CPSW_TS_SEQ_ID_OFFSET (0x1e)
 111
 112 #define AM65_CPSW_TS_TX_ANX_ALL_EN              \
 113         (AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN |      \
 114          AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN |      \
 115          AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN)
 116
 117 #define AM65_CPSW_ALE_AGEOUT_DEFAULT    30
 118 /* Number of TX/RX descriptors */
 119 #define AM65_CPSW_MAX_TX_DESC   500
 120 #define AM65_CPSW_MAX_RX_DESC   500
 121
 122 #define AM65_CPSW_NAV_PS_DATA_SIZE 16
 123 #define AM65_CPSW_NAV_SW_DATA_SIZE 16
 124
 125 #define AM65_CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK | \
 126                          NETIF_MSG_IFUP | NETIF_MSG_PROBE | NETIF_MSG_IFDOWN | \
 127                          NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
 128
 129 static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave,
 130                                       const u8 *dev_addr)
 131 {
 132         u32 mac_hi = (dev_addr[0] << 0) | (dev_addr[1] << 8) |
 133                      (dev_addr[2] << 16) | (dev_addr[3] << 24);
 134         u32 mac_lo = (dev_addr[4] << 0) | (dev_addr[5] << 8);
 135
 136         writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
 137         writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L);
 138 }
 139
 140 static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port)
 141 {
 142         cpsw_sl_reset(port->slave.mac_sl, 100);
 143         /* Max length register has to be restored after MAC SL reset */
 144         writel(AM65_CPSW_MAX_PACKET_SIZE,
 145                port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
 146 }
 147
 148 static void am65_cpsw_nuss_get_ver(struct am65_cpsw_common *common)
 149 {
 150         common->nuss_ver = readl(common->ss_base);
 151         common->cpsw_ver = readl(common->cpsw_base);
 152         dev_info(common->dev,
 153                  "initializing am65 cpsw nuss version 0x%08X, cpsw version 0x%08X Ports: %u quirks:%08x\n",
 154                 common->nuss_ver,
 155                 common->cpsw_ver,
 156                 common->port_num + 1,
 157                 common->pdata.quirks);
 158 }
 159
 160 void am65_cpsw_nuss_adjust_link(struct net_device *ndev)
 161 {
 162         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 163         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 164         struct phy_device *phy = port->slave.phy;
 165         u32 mac_control = 0;
 166
 167         if (!phy)
 168                 return;
 169
 170         if (phy->link) {
 171                 mac_control = CPSW_SL_CTL_GMII_EN;
 172
 173                 if (phy->speed == 1000)
 174                         mac_control |= CPSW_SL_CTL_GIG;
 175                 if (phy->speed == 10 && phy_interface_is_rgmii(phy))
 176                         /* Can be used with in band mode only */
 177                         mac_control |= CPSW_SL_CTL_EXT_EN;
 178                 if (phy->speed == 100 && phy->interface == PHY_INTERFACE_MODE_RMII)
 179                         mac_control |= CPSW_SL_CTL_IFCTL_A;
 180                 if (phy->duplex)
 181                         mac_control |= CPSW_SL_CTL_FULLDUPLEX;
 182
 183                 /* RGMII speed is 100M if !CPSW_SL_CTL_GIG*/
 184
 185                 /* rx_pause/tx_pause */
 186                 if (port->slave.rx_pause)
 187                         mac_control |= CPSW_SL_CTL_RX_FLOW_EN;
 188
 189                 if (port->slave.tx_pause)
 190                         mac_control |= CPSW_SL_CTL_TX_FLOW_EN;
 191
 192                 cpsw_sl_ctl_set(port->slave.mac_sl, mac_control);
 193
 194                 /* enable forwarding */
 195                 cpsw_ale_control_set(common->ale, port->port_id,
 196                                      ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 197
 198                 am65_cpsw_qos_link_up(ndev, phy->speed);
 199                 netif_tx_wake_all_queues(ndev);
 200         } else {
 201                 int tmo;
 202
 203                 /* disable forwarding */
 204                 cpsw_ale_control_set(common->ale, port->port_id,
 205                                      ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 206
 207                 cpsw_sl_ctl_set(port->slave.mac_sl, CPSW_SL_CTL_CMD_IDLE);
 208
 209                 tmo = cpsw_sl_wait_for_idle(port->slave.mac_sl, 100);
 210                 dev_dbg(common->dev, "donw msc_sl %08x tmo %d\n",
 211                         cpsw_sl_reg_read(port->slave.mac_sl, CPSW_SL_MACSTATUS),
 212                         tmo);
 213
 214                 cpsw_sl_ctl_reset(port->slave.mac_sl);
 215
 216                 am65_cpsw_qos_link_down(ndev);
 217                 netif_tx_stop_all_queues(ndev);
 218         }
 219
 220         phy_print_status(phy);
 221 }
 222
 223 static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev,
 224                                             __be16 proto, u16 vid)
 225 {
 226         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 227         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 228         u32 port_mask, unreg_mcast = 0;
 229         int ret;
 230
 231         if (!netif_running(ndev) || !vid)
 232                 return 0;
 233
 234         ret = pm_runtime_get_sync(common->dev);
 235         if (ret < 0) {
 236                 pm_runtime_put_noidle(common->dev);
 237                 return ret;
 238         }
 239
 240         port_mask = BIT(port->port_id) | ALE_PORT_HOST;
 241         if (!vid)
 242                 unreg_mcast = port_mask;
 243         dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid);
 244         ret = cpsw_ale_add_vlan(common->ale, vid, port_mask,
 245                                 unreg_mcast, port_mask, 0);
 246
 247         pm_runtime_put(common->dev);
 248         return ret;
 249 }
 250
 251 static int am65_cpsw_nuss_ndo_slave_kill_vid(struct net_device *ndev,
 252                                              __be16 proto, u16 vid)
 253 {
 254         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 255         int ret;
 256
 257         if (!netif_running(ndev) || !vid)
 258                 return 0;
 259
 260         ret = pm_runtime_get_sync(common->dev);
 261         if (ret < 0) {
 262                 pm_runtime_put_noidle(common->dev);
 263                 return ret;
 264         }
 265
 266         dev_info(common->dev, "Removing vlan %d from vlan filter\n", vid);
 267         ret = cpsw_ale_del_vlan(common->ale, vid, 0);
 268
 269         pm_runtime_put(common->dev);
 270         return ret;
 271 }
 272
 273 static void am65_cpsw_slave_set_promisc_2g(struct am65_cpsw_port *port,
 274                                            bool promisc)
 275 {
 276         struct am65_cpsw_common *common = port->common;
 277
 278         if (promisc) {
 279                 /* Enable promiscuous mode */
 280                 cpsw_ale_control_set(common->ale, port->port_id,
 281                                      ALE_PORT_MACONLY_CAF, 1);
 282                 dev_dbg(common->dev, "promisc enabled\n");
 283         } else {
 284                 /* Disable promiscuous mode */
 285                 cpsw_ale_control_set(common->ale, port->port_id,
 286                                      ALE_PORT_MACONLY_CAF, 0);
 287                 dev_dbg(common->dev, "promisc disabled\n");
 288         }
 289 }
 290
 291 static void am65_cpsw_nuss_ndo_slave_set_rx_mode(struct net_device *ndev)
 292 {
 293         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 294         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 295         u32 port_mask;
 296         bool promisc;
 297
 298         promisc = !!(ndev->flags & IFF_PROMISC);
 299         am65_cpsw_slave_set_promisc_2g(port, promisc);
 300
 301         if (promisc)
 302                 return;
 303
 304         /* Restore allmulti on vlans if necessary */
 305         cpsw_ale_set_allmulti(common->ale,
 306                               ndev->flags & IFF_ALLMULTI, port->port_id);
 307
 308         port_mask = ALE_PORT_HOST;
 309         /* Clear all mcast from ALE */
 310         cpsw_ale_flush_multicast(common->ale, port_mask, -1);
 311
 312         if (!netdev_mc_empty(ndev)) {
 313                 struct netdev_hw_addr *ha;
 314
 315                 /* program multicast address list into ALE register */
 316                 netdev_for_each_mc_addr(ha, ndev) {
 317                         cpsw_ale_add_mcast(common->ale, ha->addr,
 318                                            port_mask, 0, 0, 0);
 319                 }
 320         }
 321 }
 322
 323 static void am65_cpsw_nuss_ndo_host_tx_timeout(struct net_device *ndev,
 324                                                unsigned int txqueue)
 325 {
 326         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 327         struct am65_cpsw_tx_chn *tx_chn;
 328         struct netdev_queue *netif_txq;
 329         unsigned long trans_start;
 330
 331         netif_txq = netdev_get_tx_queue(ndev, txqueue);
 332         tx_chn = &common->tx_chns[txqueue];
 333         trans_start = netif_txq->trans_start;
 334
 335         netdev_err(ndev, "txq:%d DRV_XOFF:%d tmo:%u dql_avail:%d free_desc:%zu\n",
 336                    txqueue,
 337                    netif_tx_queue_stopped(netif_txq),
 338                    jiffies_to_msecs(jiffies - trans_start),
 339                    dql_avail(&netif_txq->dql),
 340                    k3_cppi_desc_pool_avail(tx_chn->desc_pool));
 341
 342         if (netif_tx_queue_stopped(netif_txq)) {
 343                 /* try recover if stopped by us */
 344                 txq_trans_update(netif_txq);
 345                 netif_tx_wake_queue(netif_txq);
 346         }
 347 }
 348
 349 static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common,
 350                                   struct sk_buff *skb)
 351 {
 352         struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
 353         struct cppi5_host_desc_t *desc_rx;
 354         struct device *dev = common->dev;
 355         u32 pkt_len = skb_tailroom(skb);
 356         dma_addr_t desc_dma;
 357         dma_addr_t buf_dma;
 358         void *swdata;
 359
 360         desc_rx = k3_cppi_desc_pool_alloc(rx_chn->desc_pool);
 361         if (!desc_rx) {
 362                 dev_err(dev, "Failed to allocate RXFDQ descriptor\n");
 363                 return -ENOMEM;
 364         }
 365         desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn->desc_pool, desc_rx);
 366
 367         buf_dma = dma_map_single(dev, skb->data, pkt_len, DMA_FROM_DEVICE);
 368         if (unlikely(dma_mapping_error(dev, buf_dma))) {
 369                 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
 370                 dev_err(dev, "Failed to map rx skb buffer\n");
 371                 return -EINVAL;
 372         }
 373
 374         cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT,
 375                          AM65_CPSW_NAV_PS_DATA_SIZE);
 376         cppi5_hdesc_attach_buf(desc_rx, 0, 0, buf_dma, skb_tailroom(skb));
 377         swdata = cppi5_hdesc_get_swdata(desc_rx);
 378         *((void **)swdata) = skb;
 379
 380         return k3_udma_glue_push_rx_chn(rx_chn->rx_chn, 0, desc_rx, desc_dma);
 381 }
 382
 383 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common)
 384 {
 385         struct am65_cpsw_host *host_p = am65_common_get_host(common);
 386         u32 val, pri_map;
 387
 388         /* P0 set Receive Priority Type */
 389         val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
 390
 391         if (common->pf_p0_rx_ptype_rrobin) {
 392                 val |= AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
 393                 /* Enet Ports fifos works in fixed priority mode only, so
 394                  * reset P0_Rx_Pri_Map so all packet will go in Enet fifo 0
 395                  */
 396                 pri_map = 0x0;
 397         } else {
 398                 val &= ~AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN;
 399                 /* restore P0_Rx_Pri_Map */
 400                 pri_map = 0x76543210;
 401         }
 402
 403         writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP);
 404         writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
 405 }
 406
 407 static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common,
 408                                       netdev_features_t features)
 409 {
 410         struct am65_cpsw_host *host_p = am65_common_get_host(common);
 411         int port_idx, i, ret;
 412         struct sk_buff *skb;
 413         u32 val, port_mask;
 414
 415         if (common->usage_count)
 416                 return 0;
 417
 418         /* Control register */
 419         writel(AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE |
 420                AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD,
 421                common->cpsw_base + AM65_CPSW_REG_CTL);
 422         /* Max length register */
 423         writel(AM65_CPSW_MAX_PACKET_SIZE,
 424                host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
 425         /* set base flow_id */
 426         writel(common->rx_flow_id_base,
 427                host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET);
 428         /* en tx crc offload */
 429         if (features & NETIF_F_HW_CSUM)
 430                 writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN,
 431                        host_p->port_base + AM65_CPSW_P0_REG_CTL);
 432
 433         am65_cpsw_nuss_set_p0_ptype(common);
 434
 435         /* enable statistic */
 436         val = BIT(HOST_PORT_NUM);
 437         for (port_idx = 0; port_idx < common->port_num; port_idx++) {
 438                 struct am65_cpsw_port *port = &common->ports[port_idx];
 439
 440                 if (!port->disabled)
 441                         val |=  BIT(port->port_id);
 442         }
 443         writel(val, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
 444
 445         /* disable priority elevation */
 446         writel(0, common->cpsw_base + AM65_CPSW_REG_PTYPE);
 447
 448         cpsw_ale_start(common->ale);
 449
 450         /* limit to one RX flow only */
 451         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 452                              ALE_DEFAULT_THREAD_ID, 0);
 453         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 454                              ALE_DEFAULT_THREAD_ENABLE, 1);
 455         if (AM65_CPSW_IS_CPSW2G(common))
 456                 cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 457                                      ALE_PORT_NOLEARN, 1);
 458         /* switch to vlan unaware mode */
 459         cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 1);
 460         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 461                              ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 462
 463         /* default vlan cfg: create mask based on enabled ports */
 464         port_mask = GENMASK(common->port_num, 0) &
 465                     ~common->disabled_ports_mask;
 466
 467         cpsw_ale_add_vlan(common->ale, 0, port_mask,
 468                           port_mask, port_mask,
 469                           port_mask & ~ALE_PORT_HOST);
 470
 471         for (i = 0; i < common->rx_chns.descs_num; i++) {
 472                 skb = __netdev_alloc_skb_ip_align(NULL,
 473                                                   AM65_CPSW_MAX_PACKET_SIZE,
 474                                                   GFP_KERNEL);
 475                 if (!skb) {
 476                         dev_err(common->dev, "cannot allocate skb\n");
 477                         return -ENOMEM;
 478                 }
 479
 480                 ret = am65_cpsw_nuss_rx_push(common, skb);
 481                 if (ret < 0) {
 482                         dev_err(common->dev,
 483                                 "cannot submit skb to channel rx, error %d\n",
 484                                 ret);
 485                         kfree_skb(skb);
 486                         return ret;
 487                 }
 488                 kmemleak_not_leak(skb);
 489         }
 490         k3_udma_glue_enable_rx_chn(common->rx_chns.rx_chn);
 491
 492         for (i = 0; i < common->tx_ch_num; i++) {
 493                 ret = k3_udma_glue_enable_tx_chn(common->tx_chns[i].tx_chn);
 494                 if (ret)
 495                         return ret;
 496                 napi_enable(&common->tx_chns[i].napi_tx);
 497         }
 498
 499         napi_enable(&common->napi_rx);
 500
 501         dev_dbg(common->dev, "cpsw_nuss started\n");
 502         return 0;
 503 }
 504
 505 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma);
 506 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma);
 507
 508 static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)
 509 {
 510         int i;
 511
 512         if (common->usage_count != 1)
 513                 return 0;
 514
 515         cpsw_ale_control_set(common->ale, HOST_PORT_NUM,
 516                              ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 517
 518         /* shutdown tx channels */
 519         atomic_set(&common->tdown_cnt, common->tx_ch_num);
 520         /* ensure new tdown_cnt value is visible */
 521         smp_mb__after_atomic();
 522         reinit_completion(&common->tdown_complete);
 523
 524         for (i = 0; i < common->tx_ch_num; i++)
 525                 k3_udma_glue_tdown_tx_chn(common->tx_chns[i].tx_chn, false);
 526
 527         i = wait_for_completion_timeout(&common->tdown_complete,
 528                                         msecs_to_jiffies(1000));
 529         if (!i)
 530                 dev_err(common->dev, "tx timeout\n");
 531         for (i = 0; i < common->tx_ch_num; i++)
 532                 napi_disable(&common->tx_chns[i].napi_tx);
 533
 534         for (i = 0; i < common->tx_ch_num; i++) {
 535                 k3_udma_glue_reset_tx_chn(common->tx_chns[i].tx_chn,
 536                                           &common->tx_chns[i],
 537                                           am65_cpsw_nuss_tx_cleanup);
 538                 k3_udma_glue_disable_tx_chn(common->tx_chns[i].tx_chn);
 539         }
 540
 541         k3_udma_glue_tdown_rx_chn(common->rx_chns.rx_chn, true);
 542         napi_disable(&common->napi_rx);
 543
 544         for (i = 0; i < AM65_CPSW_MAX_RX_FLOWS; i++)
 545                 k3_udma_glue_reset_rx_chn(common->rx_chns.rx_chn, i,
 546                                           &common->rx_chns,
 547                                           am65_cpsw_nuss_rx_cleanup, !!i);
 548
 549         k3_udma_glue_disable_rx_chn(common->rx_chns.rx_chn);
 550
 551         cpsw_ale_stop(common->ale);
 552
 553         writel(0, common->cpsw_base + AM65_CPSW_REG_CTL);
 554         writel(0, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
 555
 556         dev_dbg(common->dev, "cpsw_nuss stopped\n");
 557         return 0;
 558 }
 559
 560 static int am65_cpsw_nuss_ndo_slave_stop(struct net_device *ndev)
 561 {
 562         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 563         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 564         int ret;
 565
 566         if (port->slave.phy)
 567                 phy_stop(port->slave.phy);
 568
 569         netif_tx_stop_all_queues(ndev);
 570
 571         if (port->slave.phy) {
 572                 phy_disconnect(port->slave.phy);
 573                 port->slave.phy = NULL;
 574         }
 575
 576         ret = am65_cpsw_nuss_common_stop(common);
 577         if (ret)
 578                 return ret;
 579
 580         common->usage_count--;
 581         pm_runtime_put(common->dev);
 582         return 0;
 583 }
 584
 585 static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg)
 586 {
 587         struct am65_cpsw_port *port = arg;
 588
 589         if (!vdev)
 590                 return 0;
 591
 592         return am65_cpsw_nuss_ndo_slave_add_vid(port->ndev, 0, vid);
 593 }
 594
 595 static int am65_cpsw_nuss_ndo_slave_open(struct net_device *ndev)
 596 {
 597         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
 598         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
 599         u32 port_mask;
 600         int ret, i;
 601
 602         ret = pm_runtime_get_sync(common->dev);
 603         if (ret < 0) {
 604                 pm_runtime_put_noidle(common->dev);
 605                 return ret;
 606         }
 607
 608         /* Notify the stack of the actual queue counts. */
 609         ret = netif_set_real_num_tx_queues(ndev, common->tx_ch_num);
 610         if (ret) {
 611                 dev_err(common->dev, "cannot set real number of tx queues\n");
 612                 return ret;
 613         }
 614
 615         ret = netif_set_real_num_rx_queues(ndev, AM65_CPSW_MAX_RX_QUEUES);
 616         if (ret) {
 617                 dev_err(common->dev, "cannot set real number of rx queues\n");
 618                 return ret;
 619         }
 620
 621         for (i = 0; i < common->tx_ch_num; i++)
 622                 netdev_tx_reset_queue(netdev_get_tx_queue(ndev, i));
 623
 624         ret = am65_cpsw_nuss_common_open(common, ndev->features);
 625         if (ret)
 626                 return ret;
 627
 628         common->usage_count++;
 629
 630         am65_cpsw_port_set_sl_mac(port, ndev->dev_addr);
 631
 632         if (port->slave.mac_only)
 633                 /* enable mac-only mode on port */
 634                 cpsw_ale_control_set(common->ale, port->port_id,
 635                                      ALE_PORT_MACONLY, 1);
 636         if (AM65_CPSW_IS_CPSW2G(common))
 637                 cpsw_ale_control_set(common->ale, port->port_id,
 638                                      ALE_PORT_NOLEARN, 1);
 639
 640         port_mask = BIT(port->port_id) | ALE_PORT_HOST;
 641         cpsw_ale_add_ucast(common->ale, ndev->dev_addr,
 642                            HOST_PORT_NUM, ALE_SECURE, 0);
 643         cpsw_ale_add_mcast(common->ale, ndev->broadcast,
 644                            port_mask, 0, 0, ALE_MCAST_FWD_2);
 645
 646         /* mac_sl should be configured via phy-link interface */
 647         am65_cpsw_sl_ctl_reset(port);
 648
 649         ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET,
 650                                port->slave.phy_if);
 651         if (ret)
 652                 goto error_cleanup;
 653
 654         if (port->slave.phy_node) {
 655                 port->slave.phy = of_phy_connect(ndev,
 656                                                  port->slave.phy_node,
 657                                                  &am65_cpsw_nuss_adjust_link,
 658                                                  0, port->slave.phy_if);
 659                 if (!port->slave.phy) {
 660                         dev_err(common->dev, "phy %pOF not found on slave %d\n",
 661                                 port->slave.phy_node,
 662                                 port->port_id);
 663                         ret = -ENODEV;
 664                         goto error_cleanup;
 665                 }
 666         }
 667
 668         /* restore vlan configurations */
 669         vlan_for_each(ndev, cpsw_restore_vlans, port);
 670
 671         phy_attached_info(port->slave.phy);
 672         phy_start(port->slave.phy);
 673
 674         return 0;
 675
 676 error_cleanup:
 677         am65_cpsw_nuss_ndo_slave_stop(ndev);
 678         return ret;
 679 }
 680
 681 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)
 682 {
 683         struct am65_cpsw_rx_chn *rx_chn = data;
 684         struct cppi5_host_desc_t *desc_rx;
 685         struct sk_buff *skb;
 686         dma_addr_t buf_dma;
 687         u32 buf_dma_len;
 688         void **swdata;
 689
 690         desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
 691         swdata = cppi5_hdesc_get_swdata(desc_rx);
 692         skb = *swdata;
 693         cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
 694
 695         dma_unmap_single(rx_chn->dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
 696         k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
 697
 698         dev_kfree_skb_any(skb);
 699 }
 700
 701 static void am65_cpsw_nuss_rx_ts(struct sk_buff *skb, u32 *psdata)
 702 {
 703         struct skb_shared_hwtstamps *ssh;
 704         u64 ns;
 705
 706         ns = ((u64)psdata[1] << 32) | psdata[0];
 707
 708         ssh = skb_hwtstamps(skb);
 709         memset(ssh, 0, sizeof(*ssh));
 710         ssh->hwtstamp = ns_to_ktime(ns);
 711 }
 712
 713 /* RX psdata[2] word format - checksum information */
 714 #define AM65_CPSW_RX_PSD_CSUM_ADD       GENMASK(15, 0)
 715 #define AM65_CPSW_RX_PSD_CSUM_ERR       BIT(16)
 716 #define AM65_CPSW_RX_PSD_IS_FRAGMENT    BIT(17)
 717 #define AM65_CPSW_RX_PSD_IS_TCP         BIT(18)
 718 #define AM65_CPSW_RX_PSD_IPV6_VALID     BIT(19)
 719 #define AM65_CPSW_RX_PSD_IPV4_VALID     BIT(20)
 720
 721 static void am65_cpsw_nuss_rx_csum(struct sk_buff *skb, u32 csum_info)
 722 {
 723         /* HW can verify IPv4/IPv6 TCP/UDP packets checksum
 724          * csum information provides in psdata[2] word:
 725          * AM65_CPSW_RX_PSD_CSUM_ERR bit - indicates csum error
 726          * AM65_CPSW_RX_PSD_IPV6_VALID and AM65_CPSW_RX_PSD_IPV4_VALID
 727          * bits - indicates IPv4/IPv6 packet
 728          * AM65_CPSW_RX_PSD_IS_FRAGMENT bit - indicates fragmented packet
 729          * AM65_CPSW_RX_PSD_CSUM_ADD has value 0xFFFF for non fragmented packets
 730          * or csum value for fragmented packets if !AM65_CPSW_RX_PSD_CSUM_ERR
 731          */
 732         skb_checksum_none_assert(skb);
 733
 734         if (unlikely(!(skb->dev->features & NETIF_F_RXCSUM)))
 735                 return;
 736
 737         if ((csum_info & (AM65_CPSW_RX_PSD_IPV6_VALID |
 738                           AM65_CPSW_RX_PSD_IPV4_VALID)) &&
 739                           !(csum_info & AM65_CPSW_RX_PSD_CSUM_ERR)) {
 740                 /* csum for fragmented packets is unsupported */
 741                 if (!(csum_info & AM65_CPSW_RX_PSD_IS_FRAGMENT))
 742                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 743         }
 744 }
 745
 746 static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_common *common,
 747                                      u32 flow_idx)
 748 {
 749         struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
 750         u32 buf_dma_len, pkt_len, port_id = 0, csum_info;
 751         struct am65_cpsw_ndev_priv *ndev_priv;
 752         struct am65_cpsw_ndev_stats *stats;
 753         struct cppi5_host_desc_t *desc_rx;
 754         struct device *dev = common->dev;
 755         struct sk_buff *skb, *new_skb;
 756         dma_addr_t desc_dma, buf_dma;
 757         struct am65_cpsw_port *port;
 758         struct net_device *ndev;
 759         void **swdata;
 760         u32 *psdata;
 761         int ret = 0;
 762
 763         ret = k3_udma_glue_pop_rx_chn(rx_chn->rx_chn, flow_idx, &desc_dma);
 764         if (ret) {
 765                 if (ret != -ENODATA)
 766                         dev_err(dev, "RX: pop chn fail %d\n", ret);
 767                 return ret;
 768         }
 769
 770         if (desc_dma & 0x1) {
 771                 dev_dbg(dev, "%s RX tdown flow: %u\n", __func__, flow_idx);
 772                 return 0;
 773         }
 774
 775         desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma);
 776         dev_dbg(dev, "%s flow_idx: %u desc %pad\n",
 777                 __func__, flow_idx, &desc_dma);
 778
 779         swdata = cppi5_hdesc_get_swdata(desc_rx);
 780         skb = *swdata;
 781         cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
 782         pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
 783         cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL);
 784         dev_dbg(dev, "%s rx port_id:%d\n", __func__, port_id);
 785         port = am65_common_get_port(common, port_id);
 786         ndev = port->ndev;
 787         skb->dev = ndev;
 788
 789         psdata = cppi5_hdesc_get_psdata(desc_rx);
 790         /* add RX timestamp */
 791         if (port->rx_ts_enabled)
 792                 am65_cpsw_nuss_rx_ts(skb, psdata);
 793         csum_info = psdata[2];
 794         dev_dbg(dev, "%s rx csum_info:%#x\n", __func__, csum_info);
 795
 796         dma_unmap_single(dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
 797
 798         k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
 799
 800         new_skb = netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE);
 801         if (new_skb) {
 802                 skb_put(skb, pkt_len);
 803                 skb->protocol = eth_type_trans(skb, ndev);
 804                 am65_cpsw_nuss_rx_csum(skb, csum_info);
 805                 napi_gro_receive(&common->napi_rx, skb);
 806
 807                 ndev_priv = netdev_priv(ndev);
 808                 stats = this_cpu_ptr(ndev_priv->stats);
 809
 810                 u64_stats_update_begin(&stats->syncp);
 811                 stats->rx_packets++;
 812                 stats->rx_bytes += pkt_len;
 813                 u64_stats_update_end(&stats->syncp);
 814                 kmemleak_not_leak(new_skb);
 815         } else {
 816                 ndev->stats.rx_dropped++;
 817                 new_skb = skb;
 818         }
 819
 820         if (netif_dormant(ndev)) {
 821                 dev_kfree_skb_any(new_skb);
 822                 ndev->stats.rx_dropped++;
 823                 return 0;
 824         }
 825
 826         ret = am65_cpsw_nuss_rx_push(common, new_skb);
 827         if (WARN_ON(ret < 0)) {
 828                 dev_kfree_skb_any(new_skb);
 829                 ndev->stats.rx_errors++;
 830                 ndev->stats.rx_dropped++;
 831         }
 832
 833         return ret;
 834 }
 835
 836 static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)
 837 {
 838         struct am65_cpsw_common *common = am65_cpsw_napi_to_common(napi_rx);
 839         int flow = AM65_CPSW_MAX_RX_FLOWS;
 840         int cur_budget, ret;
 841         int num_rx = 0;
 842
 843         /* process every flow */
 844         while (flow--) {
 845                 cur_budget = budget - num_rx;
 846
 847                 while (cur_budget--) {
 848                         ret = am65_cpsw_nuss_rx_packets(common, flow);
 849                         if (ret)
 850                                 break;
 851                         num_rx++;
 852                 }
 853
 854                 if (num_rx >= budget)
 855                         break;
 856         }
 857
 858         dev_dbg(common->dev, "%s num_rx:%d %d\n", __func__, num_rx, budget);
 859
 860         if (num_rx < budget && napi_complete_done(napi_rx, num_rx))
 861                 enable_irq(common->rx_chns.irq);
 862
 863         return num_rx;
 864 }
 865
 866 static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,
 867                                      struct device *dev,
 868                                      struct cppi5_host_desc_t *desc)
 869 {
 870         struct cppi5_host_desc_t *first_desc, *next_desc;
 871         dma_addr_t buf_dma, next_desc_dma;
 872         u32 buf_dma_len;
 873
 874         first_desc = desc;
 875         next_desc = first_desc;
 876
 877         cppi5_hdesc_get_obuf(first_desc, &buf_dma, &buf_dma_len);
 878
 879         dma_unmap_single(dev, buf_dma, buf_dma_len,
 880                          DMA_TO_DEVICE);
 881
 882         next_desc_dma = cppi5_hdesc_get_next_hbdesc(first_desc);
 883         while (next_desc_dma) {
 884                 next_desc = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
 885                                                        next_desc_dma);
 886                 cppi5_hdesc_get_obuf(next_desc, &buf_dma, &buf_dma_len);
 887
 888                 dma_unmap_page(dev, buf_dma, buf_dma_len,
 889                                DMA_TO_DEVICE);
 890
 891                 next_desc_dma = cppi5_hdesc_get_next_hbdesc(next_desc);
 892
 893                 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
 894         }
 895
 896         k3_cppi_desc_pool_free(tx_chn->desc_pool, first_desc);
 897 }
 898
 899 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma)
 900 {
 901         struct am65_cpsw_tx_chn *tx_chn = data;
 902         struct cppi5_host_desc_t *desc_tx;
 903         struct sk_buff *skb;
 904         void **swdata;
 905
 906         desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, desc_dma);
 907         swdata = cppi5_hdesc_get_swdata(desc_tx);
 908         skb = *(swdata);
 909         am65_cpsw_nuss_xmit_free(tx_chn, tx_chn->common->dev, desc_tx);
 910
 911         dev_kfree_skb_any(skb);
 912 }
 913
 914 static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,
 915                                            int chn, unsigned int budget)
 916 {
 917         struct cppi5_host_desc_t *desc_tx;
 918         struct device *dev = common->dev;
 919         struct am65_cpsw_tx_chn *tx_chn;
 920         struct netdev_queue *netif_txq;
 921         unsigned int total_bytes = 0;
 922         struct net_device *ndev;
 923         struct sk_buff *skb;
 924         dma_addr_t desc_dma;
 925         int res, num_tx = 0;
 926         void **swdata;
 927
 928         tx_chn = &common->tx_chns[chn];
 929
 930         while (true) {
 931                 struct am65_cpsw_ndev_priv *ndev_priv;
 932                 struct am65_cpsw_ndev_stats *stats;
 933
 934                 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
 935                 if (res == -ENODATA)
 936                         break;
 937
 938                 if (desc_dma & 0x1) {
 939                         if (atomic_dec_and_test(&common->tdown_cnt))
 940                                 complete(&common->tdown_complete);
 941                         break;
 942                 }
 943
 944                 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
 945                                                      desc_dma);
 946                 swdata = cppi5_hdesc_get_swdata(desc_tx);
 947                 skb = *(swdata);
 948                 am65_cpsw_nuss_xmit_free(tx_chn, dev, desc_tx);
 949
 950                 ndev = skb->dev;
 951
 952                 am65_cpts_tx_timestamp(common->cpts, skb);
 953
 954                 ndev_priv = netdev_priv(ndev);
 955                 stats = this_cpu_ptr(ndev_priv->stats);
 956                 u64_stats_update_begin(&stats->syncp);
 957                 stats->tx_packets++;
 958                 stats->tx_bytes += skb->len;
 959                 u64_stats_update_end(&stats->syncp);
 960
 961                 total_bytes += skb->len;
 962                 napi_consume_skb(skb, budget);
 963                 num_tx++;
 964         }
 965
 966         if (!num_tx)
 967                 return 0;
 968
 969         netif_txq = netdev_get_tx_queue(ndev, chn);
 970
 971         netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);
 972
 973         if (netif_tx_queue_stopped(netif_txq)) {
 974                 /* Check whether the queue is stopped due to stalled tx dma,
 975                  * if the queue is stopped then wake the queue as
 976                  * we have free desc for tx
 977                  */
 978                 __netif_tx_lock(netif_txq, smp_processor_id());
 979                 if (netif_running(ndev) &&
 980                     (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >=
 981                      MAX_SKB_FRAGS))
 982                         netif_tx_wake_queue(netif_txq);
 983
 984                 __netif_tx_unlock(netif_txq);
 985         }
 986         dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);
 987
 988         return num_tx;
 989 }
 990
 991 static int am65_cpsw_nuss_tx_poll(struct napi_struct *napi_tx, int budget)
 992 {
 993         struct am65_cpsw_tx_chn *tx_chn = am65_cpsw_napi_to_tx_chn(napi_tx);
 994         int num_tx;
 995
 996         num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn->common, tx_chn->id,
 997                                                  budget);
 998         num_tx = min(num_tx, budget);
 999         if (num_tx < budget) {
1000                 napi_complete(napi_tx);
1001                 enable_irq(tx_chn->irq);
1002         }
1003
1004         return num_tx;
1005 }
1006
1007 static irqreturn_t am65_cpsw_nuss_rx_irq(int irq, void *dev_id)
1008 {
1009         struct am65_cpsw_common *common = dev_id;
1010
1011         disable_irq_nosync(irq);
1012         napi_schedule(&common->napi_rx);
1013
1014         return IRQ_HANDLED;
1015 }
1016
1017 static irqreturn_t am65_cpsw_nuss_tx_irq(int irq, void *dev_id)
1018 {
1019         struct am65_cpsw_tx_chn *tx_chn = dev_id;
1020
1021         disable_irq_nosync(irq);
1022         napi_schedule(&tx_chn->napi_tx);
1023
1024         return IRQ_HANDLED;
1025 }
1026
1027 static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb,
1028                                                  struct net_device *ndev)
1029 {
1030         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1031         struct cppi5_host_desc_t *first_desc, *next_desc, *cur_desc;
1032         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1033         struct device *dev = common->dev;
1034         struct am65_cpsw_tx_chn *tx_chn;
1035         struct netdev_queue *netif_txq;
1036         dma_addr_t desc_dma, buf_dma;
1037         int ret, q_idx, i;
1038         void **swdata;
1039         u32 *psdata;
1040         u32 pkt_len;
1041
1042         /* padding enabled in hw */
1043         pkt_len = skb_headlen(skb);
1044
1045         /* SKB TX timestamp */
1046         if (port->tx_ts_enabled)
1047                 am65_cpts_prep_tx_timestamp(common->cpts, skb);
1048
1049         q_idx = skb_get_queue_mapping(skb);
1050         dev_dbg(dev, "%s skb_queue:%d\n", __func__, q_idx);
1051
1052         tx_chn = &common->tx_chns[q_idx];
1053         netif_txq = netdev_get_tx_queue(ndev, q_idx);
1054
1055         /* Map the linear buffer */
1056         buf_dma = dma_map_single(dev, skb->data, pkt_len,
1057                                  DMA_TO_DEVICE);
1058         if (unlikely(dma_mapping_error(dev, buf_dma))) {
1059                 dev_err(dev, "Failed to map tx skb buffer\n");
1060                 ndev->stats.tx_errors++;
1061                 goto err_free_skb;
1062         }
1063
1064         first_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1065         if (!first_desc) {
1066                 dev_dbg(dev, "Failed to allocate descriptor\n");
1067                 dma_unmap_single(dev, buf_dma, pkt_len, DMA_TO_DEVICE);
1068                 goto busy_stop_q;
1069         }
1070
1071         cppi5_hdesc_init(first_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT,
1072                          AM65_CPSW_NAV_PS_DATA_SIZE);
1073         cppi5_desc_set_pktids(&first_desc->hdr, 0, 0x3FFF);
1074         cppi5_hdesc_set_pkttype(first_desc, 0x7);
1075         cppi5_desc_set_tags_ids(&first_desc->hdr, 0, port->port_id);
1076
1077         cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);
1078         swdata = cppi5_hdesc_get_swdata(first_desc);
1079         *(swdata) = skb;
1080         psdata = cppi5_hdesc_get_psdata(first_desc);
1081
1082         /* HW csum offload if enabled */
1083         psdata[2] = 0;
1084         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1085                 unsigned int cs_start, cs_offset;
1086
1087                 cs_start = skb_transport_offset(skb);
1088                 cs_offset = cs_start + skb->csum_offset;
1089                 /* HW numerates bytes starting from 1 */
1090                 psdata[2] = ((cs_offset + 1) << 24) |
1091                             ((cs_start + 1) << 16) | (skb->len - cs_start);
1092                 dev_dbg(dev, "%s tx psdata:%#x\n", __func__, psdata[2]);
1093         }
1094
1095         if (!skb_is_nonlinear(skb))
1096                 goto done_tx;
1097
1098         dev_dbg(dev, "fragmented SKB\n");
1099
1100         /* Handle the case where skb is fragmented in pages */
1101         cur_desc = first_desc;
1102         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1103                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1104                 u32 frag_size = skb_frag_size(frag);
1105
1106                 next_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
1107                 if (!next_desc) {
1108                         dev_err(dev, "Failed to allocate descriptor\n");
1109                         goto busy_free_descs;
1110                 }
1111
1112                 buf_dma = skb_frag_dma_map(dev, frag, 0, frag_size,
1113                                            DMA_TO_DEVICE);
1114                 if (unlikely(dma_mapping_error(dev, buf_dma))) {
1115                         dev_err(dev, "Failed to map tx skb page\n");
1116                         k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
1117                         ndev->stats.tx_errors++;
1118                         goto err_free_descs;
1119                 }
1120
1121                 cppi5_hdesc_reset_hbdesc(next_desc);
1122                 cppi5_hdesc_attach_buf(next_desc,
1123                                        buf_dma, frag_size, buf_dma, frag_size);
1124
1125                 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool,
1126                                                       next_desc);
1127                 cppi5_hdesc_link_hbdesc(cur_desc, desc_dma);
1128
1129                 pkt_len += frag_size;
1130                 cur_desc = next_desc;
1131         }
1132         WARN_ON(pkt_len != skb->len);
1133
1134 done_tx:
1135         skb_tx_timestamp(skb);
1136
1137         /* report bql before sending packet */
1138         netdev_tx_sent_queue(netif_txq, pkt_len);
1139
1140         cppi5_hdesc_set_pktlen(first_desc, pkt_len);
1141         desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool, first_desc);
1142         ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma);
1143         if (ret) {
1144                 dev_err(dev, "can't push desc %d\n", ret);
1145                 /* inform bql */
1146                 netdev_tx_completed_queue(netif_txq, 1, pkt_len);
1147                 ndev->stats.tx_errors++;
1148                 goto err_free_descs;
1149         }
1150
1151         if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) < MAX_SKB_FRAGS) {
1152                 netif_tx_stop_queue(netif_txq);
1153                 /* Barrier, so that stop_queue visible to other cpus */
1154                 smp_mb__after_atomic();
1155                 dev_dbg(dev, "netif_tx_stop_queue %d\n", q_idx);
1156
1157                 /* re-check for smp */
1158                 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >=
1159                     MAX_SKB_FRAGS) {
1160                         netif_tx_wake_queue(netif_txq);
1161                         dev_dbg(dev, "netif_tx_wake_queue %d\n", q_idx);
1162                 }
1163         }
1164
1165         return NETDEV_TX_OK;
1166
1167 err_free_descs:
1168         am65_cpsw_nuss_xmit_free(tx_chn, dev, first_desc);
1169 err_free_skb:
1170         ndev->stats.tx_dropped++;
1171         dev_kfree_skb_any(skb);
1172         return NETDEV_TX_OK;
1173
1174 busy_free_descs:
1175         am65_cpsw_nuss_xmit_free(tx_chn, dev, first_desc);
1176 busy_stop_q:
1177         netif_tx_stop_queue(netif_txq);
1178         return NETDEV_TX_BUSY;
1179 }
1180
1181 static int am65_cpsw_nuss_ndo_slave_set_mac_address(struct net_device *ndev,
1182                                                     void *addr)
1183 {
1184         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1185         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1186         struct sockaddr *sockaddr = (struct sockaddr *)addr;
1187         int ret;
1188
1189         ret = eth_prepare_mac_addr_change(ndev, addr);
1190         if (ret < 0)
1191                 return ret;
1192
1193         ret = pm_runtime_get_sync(common->dev);
1194         if (ret < 0) {
1195                 pm_runtime_put_noidle(common->dev);
1196                 return ret;
1197         }
1198
1199         cpsw_ale_del_ucast(common->ale, ndev->dev_addr,
1200                            HOST_PORT_NUM, 0, 0);
1201         cpsw_ale_add_ucast(common->ale, sockaddr->sa_data,
1202                            HOST_PORT_NUM, ALE_SECURE, 0);
1203
1204         am65_cpsw_port_set_sl_mac(port, addr);
1205         eth_commit_mac_addr_change(ndev, sockaddr);
1206
1207         pm_runtime_put(common->dev);
1208
1209         return 0;
1210 }
1211
1212 static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,
1213                                        struct ifreq *ifr)
1214 {
1215         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1216         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1217         u32 ts_ctrl, seq_id, ts_ctrl_ltype2, ts_vlan_ltype;
1218         struct hwtstamp_config cfg;
1219
1220         if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1221                 return -EOPNOTSUPP;
1222
1223         if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1224                 return -EFAULT;
1225
1226         /* TX HW timestamp */
1227         switch (cfg.tx_type) {
1228         case HWTSTAMP_TX_OFF:
1229         case HWTSTAMP_TX_ON:
1230                 break;
1231         default:
1232                 return -ERANGE;
1233         }
1234
1235         switch (cfg.rx_filter) {
1236         case HWTSTAMP_FILTER_NONE:
1237                 port->rx_ts_enabled = false;
1238                 break;
1239         case HWTSTAMP_FILTER_ALL:
1240         case HWTSTAMP_FILTER_SOME:
1241         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1242         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1243         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1244         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1245         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1246         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1247         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1248         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1249         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1250         case HWTSTAMP_FILTER_PTP_V2_EVENT:
1251         case HWTSTAMP_FILTER_PTP_V2_SYNC:
1252         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1253         case HWTSTAMP_FILTER_NTP_ALL:
1254                 port->rx_ts_enabled = true;
1255                 cfg.rx_filter = HWTSTAMP_FILTER_ALL;
1256                 break;
1257         default:
1258                 return -ERANGE;
1259         }
1260
1261         port->tx_ts_enabled = (cfg.tx_type == HWTSTAMP_TX_ON);
1262
1263         /* cfg TX timestamp */
1264         seq_id = (AM65_CPSW_TS_SEQ_ID_OFFSET <<
1265                   AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT) | ETH_P_1588;
1266
1267         ts_vlan_ltype = ETH_P_8021Q;
1268
1269         ts_ctrl_ltype2 = ETH_P_1588 |
1270                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 |
1271                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 |
1272                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 |
1273                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 |
1274                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 |
1275                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 |
1276                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 |
1277                          AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO;
1278
1279         ts_ctrl = AM65_CPSW_TS_EVENT_MSG_TYPE_BITS <<
1280                   AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT;
1281
1282         if (port->tx_ts_enabled)
1283                 ts_ctrl |= AM65_CPSW_TS_TX_ANX_ALL_EN |
1284                            AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN;
1285
1286         writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG);
1287         writel(ts_vlan_ltype, port->port_base +
1288                AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG);
1289         writel(ts_ctrl_ltype2, port->port_base +
1290                AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2);
1291         writel(ts_ctrl, port->port_base + AM65_CPSW_PORTN_REG_TS_CTL);
1292
1293         /* en/dis RX timestamp */
1294         am65_cpts_rx_enable(common->cpts, port->rx_ts_enabled);
1295
1296         return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1297 }
1298
1299 static int am65_cpsw_nuss_hwtstamp_get(struct net_device *ndev,
1300                                        struct ifreq *ifr)
1301 {
1302         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1303         struct hwtstamp_config cfg;
1304
1305         if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1306                 return -EOPNOTSUPP;
1307
1308         cfg.flags = 0;
1309         cfg.tx_type = port->tx_ts_enabled ?
1310                       HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
1311         cfg.rx_filter = port->rx_ts_enabled ?
1312                         HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;
1313
1314         return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1315 }
1316
1317 static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev,
1318                                           struct ifreq *req, int cmd)
1319 {
1320         struct am65_cpsw_port *port = am65_ndev_to_port(ndev);
1321
1322         if (!netif_running(ndev))
1323                 return -EINVAL;
1324
1325         switch (cmd) {
1326         case SIOCSHWTSTAMP:
1327                 return am65_cpsw_nuss_hwtstamp_set(ndev, req);
1328         case SIOCGHWTSTAMP:
1329                 return am65_cpsw_nuss_hwtstamp_get(ndev, req);
1330         }
1331
1332         if (!port->slave.phy)
1333                 return -EOPNOTSUPP;
1334
1335         return phy_mii_ioctl(port->slave.phy, req, cmd);
1336 }
1337
1338 static void am65_cpsw_nuss_ndo_get_stats(struct net_device *dev,
1339                                          struct rtnl_link_stats64 *stats)
1340 {
1341         struct am65_cpsw_ndev_priv *ndev_priv = netdev_priv(dev);
1342         unsigned int start;
1343         int cpu;
1344
1345         for_each_possible_cpu(cpu) {
1346                 struct am65_cpsw_ndev_stats *cpu_stats;
1347                 u64 rx_packets;
1348                 u64 rx_bytes;
1349                 u64 tx_packets;
1350                 u64 tx_bytes;
1351
1352                 cpu_stats = per_cpu_ptr(ndev_priv->stats, cpu);
1353                 do {
1354                         start = u64_stats_fetch_begin_irq(&cpu_stats->syncp);
1355                         rx_packets = cpu_stats->rx_packets;
1356                         rx_bytes   = cpu_stats->rx_bytes;
1357                         tx_packets = cpu_stats->tx_packets;
1358                         tx_bytes   = cpu_stats->tx_bytes;
1359                 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start));
1360
1361                 stats->rx_packets += rx_packets;
1362                 stats->rx_bytes   += rx_bytes;
1363                 stats->tx_packets += tx_packets;
1364                 stats->tx_bytes   += tx_bytes;
1365         }
1366
1367         stats->rx_errors        = dev->stats.rx_errors;
1368         stats->rx_dropped       = dev->stats.rx_dropped;
1369         stats->tx_dropped       = dev->stats.tx_dropped;
1370 }
1371
1372 static int am65_cpsw_nuss_ndo_slave_set_features(struct net_device *ndev,
1373                                                  netdev_features_t features)
1374 {
1375         struct am65_cpsw_common *common = am65_ndev_to_common(ndev);
1376         netdev_features_t changes = features ^ ndev->features;
1377         struct am65_cpsw_host *host_p;
1378
1379         host_p = am65_common_get_host(common);
1380
1381         if (changes & NETIF_F_HW_CSUM) {
1382                 bool enable = !!(features & NETIF_F_HW_CSUM);
1383
1384                 dev_info(common->dev, "Turn %s tx-checksum-ip-generic\n",
1385                          enable ? "ON" : "OFF");
1386                 if (enable)
1387                         writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN,
1388                                host_p->port_base + AM65_CPSW_P0_REG_CTL);
1389                 else
1390                         writel(0,
1391                                host_p->port_base + AM65_CPSW_P0_REG_CTL);
1392         }
1393
1394         return 0;
1395 }
1396
1397 static const struct net_device_ops am65_cpsw_nuss_netdev_ops_2g = {
1398         .ndo_open               = am65_cpsw_nuss_ndo_slave_open,
1399         .ndo_stop               = am65_cpsw_nuss_ndo_slave_stop,
1400         .ndo_start_xmit         = am65_cpsw_nuss_ndo_slave_xmit,
1401         .ndo_set_rx_mode        = am65_cpsw_nuss_ndo_slave_set_rx_mode,
1402         .ndo_get_stats64        = am65_cpsw_nuss_ndo_get_stats,
1403         .ndo_validate_addr      = eth_validate_addr,
1404         .ndo_set_mac_address    = am65_cpsw_nuss_ndo_slave_set_mac_address,
1405         .ndo_tx_timeout         = am65_cpsw_nuss_ndo_host_tx_timeout,
1406         .ndo_vlan_rx_add_vid    = am65_cpsw_nuss_ndo_slave_add_vid,
1407         .ndo_vlan_rx_kill_vid   = am65_cpsw_nuss_ndo_slave_kill_vid,
1408         .ndo_do_ioctl           = am65_cpsw_nuss_ndo_slave_ioctl,
1409         .ndo_set_features       = am65_cpsw_nuss_ndo_slave_set_features,
1410         .ndo_setup_tc           = am65_cpsw_qos_ndo_setup_tc,
1411 };
1412
1413 static void am65_cpsw_nuss_slave_disable_unused(struct am65_cpsw_port *port)
1414 {
1415         struct am65_cpsw_common *common = port->common;
1416
1417         if (!port->disabled)
1418                 return;
1419
1420         common->disabled_ports_mask |= BIT(port->port_id);
1421         cpsw_ale_control_set(common->ale, port->port_id,
1422                              ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
1423
1424         cpsw_sl_reset(port->slave.mac_sl, 100);
1425         cpsw_sl_ctl_reset(port->slave.mac_sl);
1426 }
1427
1428 static void am65_cpsw_nuss_free_tx_chns(void *data)
1429 {
1430         struct am65_cpsw_common *common = data;
1431         int i;
1432
1433         for (i = 0; i < common->tx_ch_num; i++) {
1434                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1435
1436                 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1437                         k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1438
1439                 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1440                         k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1441
1442                 memset(tx_chn, 0, sizeof(*tx_chn));
1443         }
1444 }
1445
1446 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common)
1447 {
1448         struct device *dev = common->dev;
1449         int i;
1450
1451         devm_remove_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1452
1453         for (i = 0; i < common->tx_ch_num; i++) {
1454                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1455
1456                 if (tx_chn->irq)
1457                         devm_free_irq(dev, tx_chn->irq, tx_chn);
1458
1459                 netif_napi_del(&tx_chn->napi_tx);
1460
1461                 if (!IS_ERR_OR_NULL(tx_chn->tx_chn))
1462                         k3_udma_glue_release_tx_chn(tx_chn->tx_chn);
1463
1464                 if (!IS_ERR_OR_NULL(tx_chn->desc_pool))
1465                         k3_cppi_desc_pool_destroy(tx_chn->desc_pool);
1466
1467                 memset(tx_chn, 0, sizeof(*tx_chn));
1468         }
1469 }
1470
1471 static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common)
1472 {
1473         u32  max_desc_num = ALIGN(AM65_CPSW_MAX_TX_DESC, MAX_SKB_FRAGS);
1474         struct k3_udma_glue_tx_channel_cfg tx_cfg = { 0 };
1475         struct device *dev = common->dev;
1476         struct k3_ring_cfg ring_cfg = {
1477                 .elm_size = K3_RINGACC_RING_ELSIZE_8,
1478                 .mode = K3_RINGACC_RING_MODE_RING,
1479                 .flags = 0
1480         };
1481         u32 hdesc_size;
1482         int i, ret = 0;
1483
1484         hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1485                                            AM65_CPSW_NAV_SW_DATA_SIZE);
1486
1487         tx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1488         tx_cfg.tx_cfg = ring_cfg;
1489         tx_cfg.txcq_cfg = ring_cfg;
1490         tx_cfg.tx_cfg.size = max_desc_num;
1491         tx_cfg.txcq_cfg.size = max_desc_num;
1492
1493         for (i = 0; i < common->tx_ch_num; i++) {
1494                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1495
1496                 snprintf(tx_chn->tx_chn_name,
1497                          sizeof(tx_chn->tx_chn_name), "tx%d", i);
1498
1499                 tx_chn->common = common;
1500                 tx_chn->id = i;
1501                 tx_chn->descs_num = max_desc_num;
1502                 tx_chn->desc_pool =
1503                         k3_cppi_desc_pool_create_name(dev,
1504                                                       tx_chn->descs_num,
1505                                                       hdesc_size,
1506                                                       tx_chn->tx_chn_name);
1507                 if (IS_ERR(tx_chn->desc_pool)) {
1508                         ret = PTR_ERR(tx_chn->desc_pool);
1509                         dev_err(dev, "Failed to create poll %d\n", ret);
1510                         goto err;
1511                 }
1512
1513                 tx_chn->tx_chn =
1514                         k3_udma_glue_request_tx_chn(dev,
1515                                                     tx_chn->tx_chn_name,
1516                                                     &tx_cfg);
1517                 if (IS_ERR(tx_chn->tx_chn)) {
1518                         ret = PTR_ERR(tx_chn->tx_chn);
1519                         dev_err(dev, "Failed to request tx dma channel %d\n",
1520                                 ret);
1521                         goto err;
1522                 }
1523
1524                 tx_chn->irq = k3_udma_glue_tx_get_irq(tx_chn->tx_chn);
1525                 if (tx_chn->irq <= 0) {
1526                         dev_err(dev, "Failed to get tx dma irq %d\n",
1527                                 tx_chn->irq);
1528                         goto err;
1529                 }
1530
1531                 snprintf(tx_chn->tx_chn_name,
1532                          sizeof(tx_chn->tx_chn_name), "%s-tx%d",
1533                          dev_name(dev), tx_chn->id);
1534         }
1535
1536 err:
1537         i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1538         if (i) {
1539                 dev_err(dev, "Failed to add free_tx_chns action %d\n", i);
1540                 return i;
1541         }
1542
1543         return ret;
1544 }
1545
1546 static void am65_cpsw_nuss_free_rx_chns(void *data)
1547 {
1548         struct am65_cpsw_common *common = data;
1549         struct am65_cpsw_rx_chn *rx_chn;
1550
1551         rx_chn = &common->rx_chns;
1552
1553         if (!IS_ERR_OR_NULL(rx_chn->rx_chn))
1554                 k3_udma_glue_release_rx_chn(rx_chn->rx_chn);
1555
1556         if (!IS_ERR_OR_NULL(rx_chn->desc_pool))
1557                 k3_cppi_desc_pool_destroy(rx_chn->desc_pool);
1558 }
1559
1560 static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)
1561 {
1562         struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
1563         struct k3_udma_glue_rx_channel_cfg rx_cfg = { 0 };
1564         u32  max_desc_num = AM65_CPSW_MAX_RX_DESC;
1565         struct device *dev = common->dev;
1566         u32 hdesc_size;
1567         u32 fdqring_id;
1568         int i, ret = 0;
1569
1570         hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE,
1571                                            AM65_CPSW_NAV_SW_DATA_SIZE);
1572
1573         rx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE;
1574         rx_cfg.flow_id_num = AM65_CPSW_MAX_RX_FLOWS;
1575         rx_cfg.flow_id_base = common->rx_flow_id_base;
1576
1577         /* init all flows */
1578         rx_chn->dev = dev;
1579         rx_chn->descs_num = max_desc_num;
1580         rx_chn->desc_pool = k3_cppi_desc_pool_create_name(dev,
1581                                                           rx_chn->descs_num,
1582                                                           hdesc_size, "rx");
1583         if (IS_ERR(rx_chn->desc_pool)) {
1584                 ret = PTR_ERR(rx_chn->desc_pool);
1585                 dev_err(dev, "Failed to create rx poll %d\n", ret);
1586                 goto err;
1587         }
1588
1589         rx_chn->rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &rx_cfg);
1590         if (IS_ERR(rx_chn->rx_chn)) {
1591                 ret = PTR_ERR(rx_chn->rx_chn);
1592                 dev_err(dev, "Failed to request rx dma channel %d\n", ret);
1593                 goto err;
1594         }
1595
1596         common->rx_flow_id_base =
1597                         k3_udma_glue_rx_get_flow_id_base(rx_chn->rx_chn);
1598         dev_info(dev, "set new flow-id-base %u\n", common->rx_flow_id_base);
1599
1600         fdqring_id = K3_RINGACC_RING_ID_ANY;
1601         for (i = 0; i < rx_cfg.flow_id_num; i++) {
1602                 struct k3_ring_cfg rxring_cfg = {
1603                         .elm_size = K3_RINGACC_RING_ELSIZE_8,
1604                         .mode = K3_RINGACC_RING_MODE_RING,
1605                         .flags = 0,
1606                 };
1607                 struct k3_ring_cfg fdqring_cfg = {
1608                         .elm_size = K3_RINGACC_RING_ELSIZE_8,
1609                         .mode = K3_RINGACC_RING_MODE_MESSAGE,
1610                         .flags = K3_RINGACC_RING_SHARED,
1611                 };
1612                 struct k3_udma_glue_rx_flow_cfg rx_flow_cfg = {
1613                         .rx_cfg = rxring_cfg,
1614                         .rxfdq_cfg = fdqring_cfg,
1615                         .ring_rxq_id = K3_RINGACC_RING_ID_ANY,
1616                         .src_tag_lo_sel =
1617                                 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG,
1618                 };
1619
1620                 rx_flow_cfg.ring_rxfdq0_id = fdqring_id;
1621                 rx_flow_cfg.rx_cfg.size = max_desc_num;
1622                 rx_flow_cfg.rxfdq_cfg.size = max_desc_num;
1623
1624                 ret = k3_udma_glue_rx_flow_init(rx_chn->rx_chn,
1625                                                 i, &rx_flow_cfg);
1626                 if (ret) {
1627                         dev_err(dev, "Failed to init rx flow%d %d\n", i, ret);
1628                         goto err;
1629                 }
1630                 if (!i)
1631                         fdqring_id =
1632                                 k3_udma_glue_rx_flow_get_fdq_id(rx_chn->rx_chn,
1633                                                                 i);
1634
1635                 rx_chn->irq = k3_udma_glue_rx_get_irq(rx_chn->rx_chn, i);
1636
1637                 if (rx_chn->irq <= 0) {
1638                         dev_err(dev, "Failed to get rx dma irq %d\n",
1639                                 rx_chn->irq);
1640                         ret = -ENXIO;
1641                         goto err;
1642                 }
1643         }
1644
1645 err:
1646         i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);
1647         if (i) {
1648                 dev_err(dev, "Failed to add free_rx_chns action %d\n", i);
1649                 return i;
1650         }
1651
1652         return ret;
1653 }
1654
1655 static int am65_cpsw_nuss_init_host_p(struct am65_cpsw_common *common)
1656 {
1657         struct am65_cpsw_host *host_p = am65_common_get_host(common);
1658
1659         host_p->common = common;
1660         host_p->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE;
1661         host_p->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE;
1662
1663         return 0;
1664 }
1665
1666 static int am65_cpsw_am654_get_efuse_macid(struct device_node *of_node,
1667                                            int slave, u8 *mac_addr)
1668 {
1669         u32 mac_lo, mac_hi, offset;
1670         struct regmap *syscon;
1671         int ret;
1672
1673         syscon = syscon_regmap_lookup_by_phandle(of_node, "ti,syscon-efuse");
1674         if (IS_ERR(syscon)) {
1675                 if (PTR_ERR(syscon) == -ENODEV)
1676                         return 0;
1677                 return PTR_ERR(syscon);
1678         }
1679
1680         ret = of_property_read_u32_index(of_node, "ti,syscon-efuse", 1,
1681                                          &offset);
1682         if (ret)
1683                 return ret;
1684
1685         regmap_read(syscon, offset, &mac_lo);
1686         regmap_read(syscon, offset + 4, &mac_hi);
1687
1688         mac_addr[0] = (mac_hi >> 8) & 0xff;
1689         mac_addr[1] = mac_hi & 0xff;
1690         mac_addr[2] = (mac_lo >> 24) & 0xff;
1691         mac_addr[3] = (mac_lo >> 16) & 0xff;
1692         mac_addr[4] = (mac_lo >> 8) & 0xff;
1693         mac_addr[5] = mac_lo & 0xff;
1694
1695         return 0;
1696 }
1697
1698 static int am65_cpsw_init_cpts(struct am65_cpsw_common *common)
1699 {
1700         struct device *dev = common->dev;
1701         struct device_node *node;
1702         struct am65_cpts *cpts;
1703         void __iomem *reg_base;
1704
1705         if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))
1706                 return 0;
1707
1708         node = of_get_child_by_name(dev->of_node, "cpts");
1709         if (!node) {
1710                 dev_err(dev, "%s cpts not found\n", __func__);
1711                 return -ENOENT;
1712         }
1713
1714         reg_base = common->cpsw_base + AM65_CPSW_NU_CPTS_BASE;
1715         cpts = am65_cpts_create(dev, reg_base, node);
1716         if (IS_ERR(cpts)) {
1717                 int ret = PTR_ERR(cpts);
1718
1719                 if (ret == -EOPNOTSUPP) {
1720                         dev_info(dev, "cpts disabled\n");
1721                         return 0;
1722                 }
1723
1724                 dev_err(dev, "cpts create err %d\n", ret);
1725                 return ret;
1726         }
1727         common->cpts = cpts;
1728
1729         return 0;
1730 }
1731
1732 static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
1733 {
1734         struct device_node *node, *port_np;
1735         struct device *dev = common->dev;
1736         int ret;
1737
1738         node = of_get_child_by_name(dev->of_node, "ethernet-ports");
1739         if (!node)
1740                 return -ENOENT;
1741
1742         for_each_child_of_node(node, port_np) {
1743                 struct am65_cpsw_port *port;
1744                 const void *mac_addr;
1745                 u32 port_id;
1746
1747                 /* it is not a slave port node, continue */
1748                 if (strcmp(port_np->name, "port"))
1749                         continue;
1750
1751                 ret = of_property_read_u32(port_np, "reg", &port_id);
1752                 if (ret < 0) {
1753                         dev_err(dev, "%pOF error reading port_id %d\n",
1754                                 port_np, ret);
1755                         return ret;
1756                 }
1757
1758                 if (!port_id || port_id > common->port_num) {
1759                         dev_err(dev, "%pOF has invalid port_id %u %s\n",
1760                                 port_np, port_id, port_np->name);
1761                         return -EINVAL;
1762                 }
1763
1764                 port = am65_common_get_port(common, port_id);
1765                 port->port_id = port_id;
1766                 port->common = common;
1767                 port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE +
1768                                   AM65_CPSW_NU_PORTS_OFFSET * (port_id);
1769                 port->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE +
1770                                   (AM65_CPSW_NU_STATS_PORT_OFFSET * port_id);
1771                 port->name = of_get_property(port_np, "label", NULL);
1772                 port->fetch_ram_base =
1773                                 common->cpsw_base + AM65_CPSW_NU_FRAM_BASE +
1774                                 (AM65_CPSW_NU_FRAM_PORT_OFFSET * (port_id - 1));
1775
1776                 port->slave.mac_sl = cpsw_sl_get("am65", dev, port->port_base);
1777                 if (IS_ERR(port->slave.mac_sl))
1778                         return PTR_ERR(port->slave.mac_sl);
1779
1780                 port->disabled = !of_device_is_available(port_np);
1781                 if (port->disabled)
1782                         continue;
1783
1784                 port->slave.ifphy = devm_of_phy_get(dev, port_np, NULL);
1785                 if (IS_ERR(port->slave.ifphy)) {
1786                         ret = PTR_ERR(port->slave.ifphy);
1787                         dev_err(dev, "%pOF error retrieving port phy: %d\n",
1788                                 port_np, ret);
1789                         return ret;
1790                 }
1791
1792                 port->slave.mac_only =
1793                                 of_property_read_bool(port_np, "ti,mac-only");
1794
1795                 /* get phy/link info */
1796                 if (of_phy_is_fixed_link(port_np)) {
1797                         ret = of_phy_register_fixed_link(port_np);
1798                         if (ret) {
1799                                 if (ret != -EPROBE_DEFER)
1800                                         dev_err(dev, "%pOF failed to register fixed-link phy: %d\n",
1801                                                 port_np, ret);
1802                                 return ret;
1803                         }
1804                         port->slave.phy_node = of_node_get(port_np);
1805                 } else {
1806                         port->slave.phy_node =
1807                                 of_parse_phandle(port_np, "phy-handle", 0);
1808                 }
1809
1810                 if (!port->slave.phy_node) {
1811                         dev_err(dev,
1812                                 "slave[%d] no phy found\n", port_id);
1813                         return -ENODEV;
1814                 }
1815
1816                 ret = of_get_phy_mode(port_np, &port->slave.phy_if);
1817                 if (ret) {
1818                         dev_err(dev, "%pOF read phy-mode err %d\n",
1819                                 port_np, ret);
1820                         return ret;
1821                 }
1822
1823                 mac_addr = of_get_mac_address(port_np);
1824                 if (!IS_ERR(mac_addr)) {
1825                         ether_addr_copy(port->slave.mac_addr, mac_addr);
1826                 } else if (am65_cpsw_am654_get_efuse_macid(port_np,
1827                                                            port->port_id,
1828                                                            port->slave.mac_addr) ||
1829                            !is_valid_ether_addr(port->slave.mac_addr)) {
1830                         random_ether_addr(port->slave.mac_addr);
1831                         dev_err(dev, "Use random MAC address\n");
1832                 }
1833         }
1834         of_node_put(node);
1835
1836         return 0;
1837 }
1838
1839 static void am65_cpsw_pcpu_stats_free(void *data)
1840 {
1841         struct am65_cpsw_ndev_stats __percpu *stats = data;
1842
1843         free_percpu(stats);
1844 }
1845
1846 static int am65_cpsw_nuss_init_ndev_2g(struct am65_cpsw_common *common)
1847 {
1848         struct am65_cpsw_ndev_priv *ndev_priv;
1849         struct device *dev = common->dev;
1850         struct am65_cpsw_port *port;
1851         int ret;
1852
1853         port = am65_common_get_port(common, 1);
1854
1855         /* alloc netdev */
1856         port->ndev = devm_alloc_etherdev_mqs(common->dev,
1857                                              sizeof(struct am65_cpsw_ndev_priv),
1858                                              AM65_CPSW_MAX_TX_QUEUES,
1859                                              AM65_CPSW_MAX_RX_QUEUES);
1860         if (!port->ndev) {
1861                 dev_err(dev, "error allocating slave net_device %u\n",
1862                         port->port_id);
1863                 return -ENOMEM;
1864         }
1865
1866         ndev_priv = netdev_priv(port->ndev);
1867         ndev_priv->port = port;
1868         ndev_priv->msg_enable = AM65_CPSW_DEBUG;
1869         SET_NETDEV_DEV(port->ndev, dev);
1870
1871         ether_addr_copy(port->ndev->dev_addr, port->slave.mac_addr);
1872
1873         port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE;
1874         port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;
1875         port->ndev->hw_features = NETIF_F_SG |
1876                                   NETIF_F_RXCSUM |
1877                                   NETIF_F_HW_CSUM |
1878                                   NETIF_F_HW_TC;
1879         port->ndev->features = port->ndev->hw_features |
1880                                NETIF_F_HW_VLAN_CTAG_FILTER;
1881         port->ndev->vlan_features |=  NETIF_F_SG;
1882         port->ndev->netdev_ops = &am65_cpsw_nuss_netdev_ops_2g;
1883         port->ndev->ethtool_ops = &am65_cpsw_ethtool_ops_slave;
1884
1885         /* Disable TX checksum offload by default due to HW bug */
1886         if (common->pdata.quirks & AM65_CPSW_QUIRK_I2027_NO_TX_CSUM)
1887                 port->ndev->features &= ~NETIF_F_HW_CSUM;
1888
1889         ndev_priv->stats = netdev_alloc_pcpu_stats(struct am65_cpsw_ndev_stats);
1890         if (!ndev_priv->stats)
1891                 return -ENOMEM;
1892
1893         ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free,
1894                                        ndev_priv->stats);
1895         if (ret) {
1896                 dev_err(dev, "Failed to add percpu stat free action %d\n", ret);
1897                 return ret;
1898         }
1899
1900         netif_napi_add(port->ndev, &common->napi_rx,
1901                        am65_cpsw_nuss_rx_poll, NAPI_POLL_WEIGHT);
1902
1903         return ret;
1904 }
1905
1906 static int am65_cpsw_nuss_ndev_add_napi_2g(struct am65_cpsw_common *common)
1907 {
1908         struct device *dev = common->dev;
1909         struct am65_cpsw_port *port;
1910         int i, ret = 0;
1911
1912         port = am65_common_get_port(common, 1);
1913
1914         for (i = 0; i < common->tx_ch_num; i++) {
1915                 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i];
1916
1917                 netif_tx_napi_add(port->ndev, &tx_chn->napi_tx,
1918                                   am65_cpsw_nuss_tx_poll, NAPI_POLL_WEIGHT);
1919
1920                 ret = devm_request_irq(dev, tx_chn->irq,
1921                                        am65_cpsw_nuss_tx_irq,
1922                                        IRQF_TRIGGER_HIGH,
1923                                        tx_chn->tx_chn_name, tx_chn);
1924                 if (ret) {
1925                         dev_err(dev, "failure requesting tx%u irq %u, %d\n",
1926                                 tx_chn->id, tx_chn->irq, ret);
1927                         goto err;
1928                 }
1929         }
1930
1931 err:
1932         return ret;
1933 }
1934
1935 static int am65_cpsw_nuss_ndev_reg_2g(struct am65_cpsw_common *common)
1936 {
1937         struct device *dev = common->dev;
1938         struct am65_cpsw_port *port;
1939         int ret = 0;
1940
1941         port = am65_common_get_port(common, 1);
1942         ret = am65_cpsw_nuss_ndev_add_napi_2g(common);
1943         if (ret)
1944                 goto err;
1945
1946         ret = devm_request_irq(dev, common->rx_chns.irq,
1947                                am65_cpsw_nuss_rx_irq,
1948                                IRQF_TRIGGER_HIGH, dev_name(dev), common);
1949         if (ret) {
1950                 dev_err(dev, "failure requesting rx irq %u, %d\n",
1951                         common->rx_chns.irq, ret);
1952                 goto err;
1953         }
1954
1955         ret = register_netdev(port->ndev);
1956         if (ret)
1957                 dev_err(dev, "error registering slave net device %d\n", ret);
1958
1959         /* can't auto unregister ndev using devm_add_action() due to
1960          * devres release sequence in DD core for DMA
1961          */
1962 err:
1963         return ret;
1964 }
1965
1966 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx)
1967 {
1968         int ret;
1969
1970         common->tx_ch_num = num_tx;
1971         ret = am65_cpsw_nuss_init_tx_chns(common);
1972         if (ret)
1973                 return ret;
1974
1975         return am65_cpsw_nuss_ndev_add_napi_2g(common);
1976 }
1977
1978 static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common)
1979 {
1980         struct am65_cpsw_port *port;
1981         int i;
1982
1983         for (i = 0; i < common->port_num; i++) {
1984                 port = &common->ports[i];
1985                 if (port->ndev)
1986                         unregister_netdev(port->ndev);
1987         }
1988 }
1989
1990 struct am65_cpsw_soc_pdata {
1991         u32     quirks_dis;
1992 };
1993
1994 static const struct am65_cpsw_soc_pdata am65x_soc_sr2_0 = {
1995         .quirks_dis = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
1996 };
1997
1998 static const struct soc_device_attribute am65_cpsw_socinfo[] = {
1999         { .family = "AM65X",
2000           .revision = "SR2.0",
2001           .data = &am65x_soc_sr2_0
2002         },
2003         {/* sentinel */}
2004 };
2005
2006 static const struct am65_cpsw_pdata am65x_sr1_0 = {
2007         .quirks = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM,
2008 };
2009
2010 static const struct am65_cpsw_pdata j721e_pdata = {
2011         .quirks = 0,
2012 };
2013
2014 static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {
2015         { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0},
2016         { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata},
2017         { /* sentinel */ },
2018 };
2019 MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable);
2020
2021 static void am65_cpsw_nuss_apply_socinfo(struct am65_cpsw_common *common)
2022 {
2023         const struct soc_device_attribute *soc;
2024
2025         soc = soc_device_match(am65_cpsw_socinfo);
2026         if (soc && soc->data) {
2027                 const struct am65_cpsw_soc_pdata *socdata = soc->data;
2028
2029                 /* disable quirks */
2030                 common->pdata.quirks &= ~socdata->quirks_dis;
2031         }
2032 }
2033
2034 static int am65_cpsw_nuss_probe(struct platform_device *pdev)
2035 {
2036         struct cpsw_ale_params ale_params = { 0 };
2037         const struct of_device_id *of_id;
2038         struct device *dev = &pdev->dev;
2039         struct am65_cpsw_common *common;
2040         struct device_node *node;
2041         struct resource *res;
2042         struct clk *clk;
2043         int ret, i;
2044
2045         common = devm_kzalloc(dev, sizeof(struct am65_cpsw_common), GFP_KERNEL);
2046         if (!common)
2047                 return -ENOMEM;
2048         common->dev = dev;
2049
2050         of_id = of_match_device(am65_cpsw_nuss_of_mtable, dev);
2051         if (!of_id)
2052                 return -EINVAL;
2053         common->pdata = *(const struct am65_cpsw_pdata *)of_id->data;
2054
2055         am65_cpsw_nuss_apply_socinfo(common);
2056
2057         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cpsw_nuss");
2058         common->ss_base = devm_ioremap_resource(&pdev->dev, res);
2059         if (IS_ERR(common->ss_base))
2060                 return PTR_ERR(common->ss_base);
2061         common->cpsw_base = common->ss_base + AM65_CPSW_CPSW_NU_BASE;
2062
2063         node = of_get_child_by_name(dev->of_node, "ethernet-ports");
2064         if (!node)
2065                 return -ENOENT;
2066         common->port_num = of_get_child_count(node);
2067         if (common->port_num < 1 || common->port_num > AM65_CPSW_MAX_PORTS)
2068                 return -ENOENT;
2069         of_node_put(node);
2070
2071         if (common->port_num != 1)
2072                 return -EOPNOTSUPP;
2073
2074         common->rx_flow_id_base = -1;
2075         init_completion(&common->tdown_complete);
2076         common->tx_ch_num = 1;
2077         common->pf_p0_rx_ptype_rrobin = false;
2078
2079         ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(48));
2080         if (ret) {
2081                 dev_err(dev, "error setting dma mask: %d\n", ret);
2082                 return ret;
2083         }
2084
2085         common->ports = devm_kcalloc(dev, common->port_num,
2086                                      sizeof(*common->ports),
2087                                      GFP_KERNEL);
2088         if (!common->ports)
2089                 return -ENOMEM;
2090
2091         clk = devm_clk_get(dev, "fck");
2092         if (IS_ERR(clk)) {
2093                 ret = PTR_ERR(clk);
2094
2095                 if (ret != -EPROBE_DEFER)
2096                         dev_err(dev, "error getting fck clock %d\n", ret);
2097                 return ret;
2098         }
2099         common->bus_freq = clk_get_rate(clk);
2100
2101         pm_runtime_enable(dev);
2102         ret = pm_runtime_get_sync(dev);
2103         if (ret < 0) {
2104                 pm_runtime_put_noidle(dev);
2105                 pm_runtime_disable(dev);
2106                 return ret;
2107         }
2108
2109         node = of_get_child_by_name(dev->of_node, "mdio");
2110         if (!node) {
2111                 dev_warn(dev, "MDIO node not found\n");
2112         } else if (of_device_is_available(node)) {
2113                 struct platform_device *mdio_pdev;
2114
2115                 mdio_pdev = of_platform_device_create(node, NULL, dev);
2116                 if (!mdio_pdev) {
2117                         ret = -ENODEV;
2118                         goto err_pm_clear;
2119                 }
2120
2121                 common->mdio_dev =  &mdio_pdev->dev;
2122         }
2123         of_node_put(node);
2124
2125         am65_cpsw_nuss_get_ver(common);
2126
2127         /* init tx channels */
2128         ret = am65_cpsw_nuss_init_tx_chns(common);
2129         if (ret)
2130                 goto err_of_clear;
2131         ret = am65_cpsw_nuss_init_rx_chns(common);
2132         if (ret)
2133                 goto err_of_clear;
2134
2135         ret = am65_cpsw_nuss_init_host_p(common);
2136         if (ret)
2137                 goto err_of_clear;
2138
2139         ret = am65_cpsw_nuss_init_slave_ports(common);
2140         if (ret)
2141                 goto err_of_clear;
2142
2143         /* init common data */
2144         ale_params.dev = dev;
2145         ale_params.ale_ageout = AM65_CPSW_ALE_AGEOUT_DEFAULT;
2146         ale_params.ale_ports = common->port_num + 1;
2147         ale_params.ale_regs = common->cpsw_base + AM65_CPSW_NU_ALE_BASE;
2148         ale_params.dev_id = "am65x-cpsw2g";
2149         ale_params.bus_freq = common->bus_freq;
2150
2151         common->ale = cpsw_ale_create(&ale_params);
2152         if (IS_ERR(common->ale)) {
2153                 dev_err(dev, "error initializing ale engine\n");
2154                 ret = PTR_ERR(common->ale);
2155                 goto err_of_clear;
2156         }
2157
2158         ret = am65_cpsw_init_cpts(common);
2159         if (ret)
2160                 goto err_of_clear;
2161
2162         /* init ports */
2163         for (i = 0; i < common->port_num; i++)
2164                 am65_cpsw_nuss_slave_disable_unused(&common->ports[i]);
2165
2166         dev_set_drvdata(dev, common);
2167
2168         ret = am65_cpsw_nuss_init_ndev_2g(common);
2169         if (ret)
2170                 goto err_of_clear;
2171
2172         ret = am65_cpsw_nuss_ndev_reg_2g(common);
2173         if (ret)
2174                 goto err_of_clear;
2175
2176         pm_runtime_put(dev);
2177         return 0;
2178
2179 err_of_clear:
2180         of_platform_device_destroy(common->mdio_dev, NULL);
2181 err_pm_clear:
2182         pm_runtime_put_sync(dev);
2183         pm_runtime_disable(dev);
2184         return ret;
2185 }
2186
2187 static int am65_cpsw_nuss_remove(struct platform_device *pdev)
2188 {
2189         struct device *dev = &pdev->dev;
2190         struct am65_cpsw_common *common;
2191         int ret;
2192
2193         common = dev_get_drvdata(dev);
2194
2195         ret = pm_runtime_get_sync(&pdev->dev);
2196         if (ret < 0) {
2197                 pm_runtime_put_noidle(&pdev->dev);
2198                 return ret;
2199         }
2200
2201         /* must unregister ndevs here because DD release_driver routine calls
2202          * dma_deconfigure(dev) before devres_release_all(dev)
2203          */
2204         am65_cpsw_nuss_cleanup_ndev(common);
2205
2206         of_platform_device_destroy(common->mdio_dev, NULL);
2207
2208         pm_runtime_put_sync(&pdev->dev);
2209         pm_runtime_disable(&pdev->dev);
2210         return 0;
2211 }
2212
2213 static struct platform_driver am65_cpsw_nuss_driver = {
2214         .driver = {
2215                 .name    = AM65_CPSW_DRV_NAME,
2216                 .of_match_table = am65_cpsw_nuss_of_mtable,
2217         },
2218         .probe = am65_cpsw_nuss_probe,
2219         .remove = am65_cpsw_nuss_remove,
2220 };
2221
2222 module_platform_driver(am65_cpsw_nuss_driver);
2223
2224 MODULE_LICENSE("GPL v2");
2225 MODULE_AUTHOR("Grygorii Strashko <grygorii.strashko@ti.com>");
2226 MODULE_DESCRIPTION("TI AM65 CPSW Ethernet driver");