drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*******************************************************************************
   3   STMMAC Ethtool support
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7
   8   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
   9 *******************************************************************************/
  10
  11 #include <linux/etherdevice.h>
  12 #include <linux/ethtool.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/mii.h>
  15 #include <linux/phylink.h>
  16 #include <linux/net_tstamp.h>
  17 #include <asm/io.h>
  18
  19 #include "stmmac.h"
  20 #include "dwmac_dma.h"
  21 #include "dwxgmac2.h"
  22
  23 #define REG_SPACE_SIZE  0x1060
  24 #define MAC100_ETHTOOL_NAME     "st_mac100"
  25 #define GMAC_ETHTOOL_NAME       "st_gmac"
  26 #define XGMAC_ETHTOOL_NAME      "st_xgmac"
  27
  28 #define ETHTOOL_DMA_OFFSET      55
  29
  30 struct stmmac_stats {
  31         char stat_string[ETH_GSTRING_LEN];
  32         int sizeof_stat;
  33         int stat_offset;
  34 };
  35
  36 #define STMMAC_STAT(m)  \
  37         { #m, sizeof_field(struct stmmac_extra_stats, m),       \
  38         offsetof(struct stmmac_priv, xstats.m)}
  39
  40 static const struct stmmac_stats stmmac_gstrings_stats[] = {
  41         /* Transmit errors */
  42         STMMAC_STAT(tx_underflow),
  43         STMMAC_STAT(tx_carrier),
  44         STMMAC_STAT(tx_losscarrier),
  45         STMMAC_STAT(vlan_tag),
  46         STMMAC_STAT(tx_deferred),
  47         STMMAC_STAT(tx_vlan),
  48         STMMAC_STAT(tx_jabber),
  49         STMMAC_STAT(tx_frame_flushed),
  50         STMMAC_STAT(tx_payload_error),
  51         STMMAC_STAT(tx_ip_header_error),
  52         /* Receive errors */
  53         STMMAC_STAT(rx_desc),
  54         STMMAC_STAT(sa_filter_fail),
  55         STMMAC_STAT(overflow_error),
  56         STMMAC_STAT(ipc_csum_error),
  57         STMMAC_STAT(rx_collision),
  58         STMMAC_STAT(rx_crc_errors),
  59         STMMAC_STAT(dribbling_bit),
  60         STMMAC_STAT(rx_length),
  61         STMMAC_STAT(rx_mii),
  62         STMMAC_STAT(rx_multicast),
  63         STMMAC_STAT(rx_gmac_overflow),
  64         STMMAC_STAT(rx_watchdog),
  65         STMMAC_STAT(da_rx_filter_fail),
  66         STMMAC_STAT(sa_rx_filter_fail),
  67         STMMAC_STAT(rx_missed_cntr),
  68         STMMAC_STAT(rx_overflow_cntr),
  69         STMMAC_STAT(rx_vlan),
  70         STMMAC_STAT(rx_split_hdr_pkt_n),
  71         /* Tx/Rx IRQ error info */
  72         STMMAC_STAT(tx_undeflow_irq),
  73         STMMAC_STAT(tx_process_stopped_irq),
  74         STMMAC_STAT(tx_jabber_irq),
  75         STMMAC_STAT(rx_overflow_irq),
  76         STMMAC_STAT(rx_buf_unav_irq),
  77         STMMAC_STAT(rx_process_stopped_irq),
  78         STMMAC_STAT(rx_watchdog_irq),
  79         STMMAC_STAT(tx_early_irq),
  80         STMMAC_STAT(fatal_bus_error_irq),
  81         /* Tx/Rx IRQ Events */
  82         STMMAC_STAT(rx_early_irq),
  83         STMMAC_STAT(threshold),
  84         STMMAC_STAT(tx_pkt_n),
  85         STMMAC_STAT(rx_pkt_n),
  86         STMMAC_STAT(normal_irq_n),
  87         STMMAC_STAT(rx_normal_irq_n),
  88         STMMAC_STAT(napi_poll),
  89         STMMAC_STAT(tx_normal_irq_n),
  90         STMMAC_STAT(tx_clean),
  91         STMMAC_STAT(tx_set_ic_bit),
  92         STMMAC_STAT(irq_receive_pmt_irq_n),
  93         /* MMC info */
  94         STMMAC_STAT(mmc_tx_irq_n),
  95         STMMAC_STAT(mmc_rx_irq_n),
  96         STMMAC_STAT(mmc_rx_csum_offload_irq_n),
  97         /* EEE */
  98         STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
  99         STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
 100         STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
 101         STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
 102         STMMAC_STAT(phy_eee_wakeup_error_n),
 103         /* Extended RDES status */
 104         STMMAC_STAT(ip_hdr_err),
 105         STMMAC_STAT(ip_payload_err),
 106         STMMAC_STAT(ip_csum_bypassed),
 107         STMMAC_STAT(ipv4_pkt_rcvd),
 108         STMMAC_STAT(ipv6_pkt_rcvd),
 109         STMMAC_STAT(no_ptp_rx_msg_type_ext),
 110         STMMAC_STAT(ptp_rx_msg_type_sync),
 111         STMMAC_STAT(ptp_rx_msg_type_follow_up),
 112         STMMAC_STAT(ptp_rx_msg_type_delay_req),
 113         STMMAC_STAT(ptp_rx_msg_type_delay_resp),
 114         STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
 115         STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
 116         STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
 117         STMMAC_STAT(ptp_rx_msg_type_announce),
 118         STMMAC_STAT(ptp_rx_msg_type_management),
 119         STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
 120         STMMAC_STAT(ptp_frame_type),
 121         STMMAC_STAT(ptp_ver),
 122         STMMAC_STAT(timestamp_dropped),
 123         STMMAC_STAT(av_pkt_rcvd),
 124         STMMAC_STAT(av_tagged_pkt_rcvd),
 125         STMMAC_STAT(vlan_tag_priority_val),
 126         STMMAC_STAT(l3_filter_match),
 127         STMMAC_STAT(l4_filter_match),
 128         STMMAC_STAT(l3_l4_filter_no_match),
 129         /* PCS */
 130         STMMAC_STAT(irq_pcs_ane_n),
 131         STMMAC_STAT(irq_pcs_link_n),
 132         STMMAC_STAT(irq_rgmii_n),
 133         /* DEBUG */
 134         STMMAC_STAT(mtl_tx_status_fifo_full),
 135         STMMAC_STAT(mtl_tx_fifo_not_empty),
 136         STMMAC_STAT(mmtl_fifo_ctrl),
 137         STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
 138         STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
 139         STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
 140         STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
 141         STMMAC_STAT(mac_tx_in_pause),
 142         STMMAC_STAT(mac_tx_frame_ctrl_xfer),
 143         STMMAC_STAT(mac_tx_frame_ctrl_idle),
 144         STMMAC_STAT(mac_tx_frame_ctrl_wait),
 145         STMMAC_STAT(mac_tx_frame_ctrl_pause),
 146         STMMAC_STAT(mac_gmii_tx_proto_engine),
 147         STMMAC_STAT(mtl_rx_fifo_fill_level_full),
 148         STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
 149         STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
 150         STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
 151         STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
 152         STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
 153         STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
 154         STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
 155         STMMAC_STAT(mtl_rx_fifo_ctrl_active),
 156         STMMAC_STAT(mac_rx_frame_ctrl_fifo),
 157         STMMAC_STAT(mac_gmii_rx_proto_engine),
 158         /* TSO */
 159         STMMAC_STAT(tx_tso_frames),
 160         STMMAC_STAT(tx_tso_nfrags),
 161         /* EST */
 162         STMMAC_STAT(mtl_est_cgce),
 163         STMMAC_STAT(mtl_est_hlbs),
 164         STMMAC_STAT(mtl_est_hlbf),
 165         STMMAC_STAT(mtl_est_btre),
 166         STMMAC_STAT(mtl_est_btrlm),
 167 };
 168 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
 169
 170 /* HW MAC Management counters (if supported) */
 171 #define STMMAC_MMC_STAT(m)      \
 172         { #m, sizeof_field(struct stmmac_counters, m),  \
 173         offsetof(struct stmmac_priv, mmc.m)}
 174
 175 static const struct stmmac_stats stmmac_mmc[] = {
 176         STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
 177         STMMAC_MMC_STAT(mmc_tx_framecount_gb),
 178         STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
 179         STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
 180         STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
 181         STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
 182         STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
 183         STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
 184         STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
 185         STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
 186         STMMAC_MMC_STAT(mmc_tx_unicast_gb),
 187         STMMAC_MMC_STAT(mmc_tx_multicast_gb),
 188         STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
 189         STMMAC_MMC_STAT(mmc_tx_underflow_error),
 190         STMMAC_MMC_STAT(mmc_tx_singlecol_g),
 191         STMMAC_MMC_STAT(mmc_tx_multicol_g),
 192         STMMAC_MMC_STAT(mmc_tx_deferred),
 193         STMMAC_MMC_STAT(mmc_tx_latecol),
 194         STMMAC_MMC_STAT(mmc_tx_exesscol),
 195         STMMAC_MMC_STAT(mmc_tx_carrier_error),
 196         STMMAC_MMC_STAT(mmc_tx_octetcount_g),
 197         STMMAC_MMC_STAT(mmc_tx_framecount_g),
 198         STMMAC_MMC_STAT(mmc_tx_excessdef),
 199         STMMAC_MMC_STAT(mmc_tx_pause_frame),
 200         STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
 201         STMMAC_MMC_STAT(mmc_rx_framecount_gb),
 202         STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
 203         STMMAC_MMC_STAT(mmc_rx_octetcount_g),
 204         STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
 205         STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
 206         STMMAC_MMC_STAT(mmc_rx_crc_error),
 207         STMMAC_MMC_STAT(mmc_rx_align_error),
 208         STMMAC_MMC_STAT(mmc_rx_run_error),
 209         STMMAC_MMC_STAT(mmc_rx_jabber_error),
 210         STMMAC_MMC_STAT(mmc_rx_undersize_g),
 211         STMMAC_MMC_STAT(mmc_rx_oversize_g),
 212         STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
 213         STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
 214         STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
 215         STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
 216         STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
 217         STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
 218         STMMAC_MMC_STAT(mmc_rx_unicast_g),
 219         STMMAC_MMC_STAT(mmc_rx_length_error),
 220         STMMAC_MMC_STAT(mmc_rx_autofrangetype),
 221         STMMAC_MMC_STAT(mmc_rx_pause_frames),
 222         STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
 223         STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
 224         STMMAC_MMC_STAT(mmc_rx_watchdog_error),
 225         STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
 226         STMMAC_MMC_STAT(mmc_rx_ipc_intr),
 227         STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
 228         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
 229         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
 230         STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
 231         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
 232         STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
 233         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
 234         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
 235         STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
 236         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
 237         STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
 238         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
 239         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
 240         STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
 241         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
 242         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
 243         STMMAC_MMC_STAT(mmc_rx_udp_gd),
 244         STMMAC_MMC_STAT(mmc_rx_udp_err),
 245         STMMAC_MMC_STAT(mmc_rx_tcp_gd),
 246         STMMAC_MMC_STAT(mmc_rx_tcp_err),
 247         STMMAC_MMC_STAT(mmc_rx_icmp_gd),
 248         STMMAC_MMC_STAT(mmc_rx_icmp_err),
 249         STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
 250         STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
 251         STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
 252         STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
 253         STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
 254         STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
 255         STMMAC_MMC_STAT(mmc_tx_fpe_fragment_cntr),
 256         STMMAC_MMC_STAT(mmc_tx_hold_req_cntr),
 257         STMMAC_MMC_STAT(mmc_rx_packet_assembly_err_cntr),
 258         STMMAC_MMC_STAT(mmc_rx_packet_smd_err_cntr),
 259         STMMAC_MMC_STAT(mmc_rx_packet_assembly_ok_cntr),
 260         STMMAC_MMC_STAT(mmc_rx_fpe_fragment_cntr),
 261 };
 262 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
 263
 264 static const char stmmac_qstats_tx_string[][ETH_GSTRING_LEN] = {
 265         "tx_pkt_n",
 266         "tx_irq_n",
 267 #define STMMAC_TXQ_STATS ARRAY_SIZE(stmmac_qstats_tx_string)
 268 };
 269
 270 static const char stmmac_qstats_rx_string[][ETH_GSTRING_LEN] = {
 271         "rx_pkt_n",
 272         "rx_irq_n",
 273 #define STMMAC_RXQ_STATS ARRAY_SIZE(stmmac_qstats_rx_string)
 274 };
 275
 276 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
 277                                       struct ethtool_drvinfo *info)
 278 {
 279         struct stmmac_priv *priv = netdev_priv(dev);
 280
 281         if (priv->plat->has_gmac || priv->plat->has_gmac4)
 282                 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
 283         else if (priv->plat->has_xgmac)
 284                 strlcpy(info->driver, XGMAC_ETHTOOL_NAME, sizeof(info->driver));
 285         else
 286                 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
 287                         sizeof(info->driver));
 288
 289         if (priv->plat->pdev) {
 290                 strlcpy(info->bus_info, pci_name(priv->plat->pdev),
 291                         sizeof(info->bus_info));
 292         }
 293 }
 294
 295 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
 296                                              struct ethtool_link_ksettings *cmd)
 297 {
 298         struct stmmac_priv *priv = netdev_priv(dev);
 299
 300         if (priv->hw->pcs & STMMAC_PCS_RGMII ||
 301             priv->hw->pcs & STMMAC_PCS_SGMII) {
 302                 struct rgmii_adv adv;
 303                 u32 supported, advertising, lp_advertising;
 304
 305                 if (!priv->xstats.pcs_link) {
 306                         cmd->base.speed = SPEED_UNKNOWN;
 307                         cmd->base.duplex = DUPLEX_UNKNOWN;
 308                         return 0;
 309                 }
 310                 cmd->base.duplex = priv->xstats.pcs_duplex;
 311
 312                 cmd->base.speed = priv->xstats.pcs_speed;
 313
 314                 /* Get and convert ADV/LP_ADV from the HW AN registers */
 315                 if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
 316                         return -EOPNOTSUPP;     /* should never happen indeed */
 317
 318                 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
 319
 320                 ethtool_convert_link_mode_to_legacy_u32(
 321                         &supported, cmd->link_modes.supported);
 322                 ethtool_convert_link_mode_to_legacy_u32(
 323                         &advertising, cmd->link_modes.advertising);
 324                 ethtool_convert_link_mode_to_legacy_u32(
 325                         &lp_advertising, cmd->link_modes.lp_advertising);
 326
 327                 if (adv.pause & STMMAC_PCS_PAUSE)
 328                         advertising |= ADVERTISED_Pause;
 329                 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
 330                         advertising |= ADVERTISED_Asym_Pause;
 331                 if (adv.lp_pause & STMMAC_PCS_PAUSE)
 332                         lp_advertising |= ADVERTISED_Pause;
 333                 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
 334                         lp_advertising |= ADVERTISED_Asym_Pause;
 335
 336                 /* Reg49[3] always set because ANE is always supported */
 337                 cmd->base.autoneg = ADVERTISED_Autoneg;
 338                 supported |= SUPPORTED_Autoneg;
 339                 advertising |= ADVERTISED_Autoneg;
 340                 lp_advertising |= ADVERTISED_Autoneg;
 341
 342                 if (adv.duplex) {
 343                         supported |= (SUPPORTED_1000baseT_Full |
 344                                       SUPPORTED_100baseT_Full |
 345                                       SUPPORTED_10baseT_Full);
 346                         advertising |= (ADVERTISED_1000baseT_Full |
 347                                         ADVERTISED_100baseT_Full |
 348                                         ADVERTISED_10baseT_Full);
 349                 } else {
 350                         supported |= (SUPPORTED_1000baseT_Half |
 351                                       SUPPORTED_100baseT_Half |
 352                                       SUPPORTED_10baseT_Half);
 353                         advertising |= (ADVERTISED_1000baseT_Half |
 354                                         ADVERTISED_100baseT_Half |
 355                                         ADVERTISED_10baseT_Half);
 356                 }
 357                 if (adv.lp_duplex)
 358                         lp_advertising |= (ADVERTISED_1000baseT_Full |
 359                                            ADVERTISED_100baseT_Full |
 360                                            ADVERTISED_10baseT_Full);
 361                 else
 362                         lp_advertising |= (ADVERTISED_1000baseT_Half |
 363                                            ADVERTISED_100baseT_Half |
 364                                            ADVERTISED_10baseT_Half);
 365                 cmd->base.port = PORT_OTHER;
 366
 367                 ethtool_convert_legacy_u32_to_link_mode(
 368                         cmd->link_modes.supported, supported);
 369                 ethtool_convert_legacy_u32_to_link_mode(
 370                         cmd->link_modes.advertising, advertising);
 371                 ethtool_convert_legacy_u32_to_link_mode(
 372                         cmd->link_modes.lp_advertising, lp_advertising);
 373
 374                 return 0;
 375         }
 376
 377         return phylink_ethtool_ksettings_get(priv->phylink, cmd);
 378 }
 379
 380 static int
 381 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
 382                                   const struct ethtool_link_ksettings *cmd)
 383 {
 384         struct stmmac_priv *priv = netdev_priv(dev);
 385
 386         if (priv->hw->pcs & STMMAC_PCS_RGMII ||
 387             priv->hw->pcs & STMMAC_PCS_SGMII) {
 388                 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
 389
 390                 /* Only support ANE */
 391                 if (cmd->base.autoneg != AUTONEG_ENABLE)
 392                         return -EINVAL;
 393
 394                 mask &= (ADVERTISED_1000baseT_Half |
 395                         ADVERTISED_1000baseT_Full |
 396                         ADVERTISED_100baseT_Half |
 397                         ADVERTISED_100baseT_Full |
 398                         ADVERTISED_10baseT_Half |
 399                         ADVERTISED_10baseT_Full);
 400
 401                 mutex_lock(&priv->lock);
 402                 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
 403                 mutex_unlock(&priv->lock);
 404
 405                 return 0;
 406         }
 407
 408         return phylink_ethtool_ksettings_set(priv->phylink, cmd);
 409 }
 410
 411 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
 412 {
 413         struct stmmac_priv *priv = netdev_priv(dev);
 414         return priv->msg_enable;
 415 }
 416
 417 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
 418 {
 419         struct stmmac_priv *priv = netdev_priv(dev);
 420         priv->msg_enable = level;
 421
 422 }
 423
 424 static int stmmac_check_if_running(struct net_device *dev)
 425 {
 426         if (!netif_running(dev))
 427                 return -EBUSY;
 428         return 0;
 429 }
 430
 431 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
 432 {
 433         struct stmmac_priv *priv = netdev_priv(dev);
 434
 435         if (priv->plat->has_xgmac)
 436                 return XGMAC_REGSIZE * 4;
 437         return REG_SPACE_SIZE;
 438 }
 439
 440 static void stmmac_ethtool_gregs(struct net_device *dev,
 441                           struct ethtool_regs *regs, void *space)
 442 {
 443         struct stmmac_priv *priv = netdev_priv(dev);
 444         u32 *reg_space = (u32 *) space;
 445
 446         stmmac_dump_mac_regs(priv, priv->hw, reg_space);
 447         stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
 448
 449         if (!priv->plat->has_xgmac) {
 450                 /* Copy DMA registers to where ethtool expects them */
 451                 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
 452                        &reg_space[DMA_BUS_MODE / 4],
 453                        NUM_DWMAC1000_DMA_REGS * 4);
 454         }
 455 }
 456
 457 static int stmmac_nway_reset(struct net_device *dev)
 458 {
 459         struct stmmac_priv *priv = netdev_priv(dev);
 460
 461         return phylink_ethtool_nway_reset(priv->phylink);
 462 }
 463
 464 static void stmmac_get_ringparam(struct net_device *netdev,
 465                                  struct ethtool_ringparam *ring,
 466                                  struct kernel_ethtool_ringparam *kernel_ring,
 467                                  struct netlink_ext_ack *extack)
 468 {
 469         struct stmmac_priv *priv = netdev_priv(netdev);
 470
 471         ring->rx_max_pending = DMA_MAX_RX_SIZE;
 472         ring->tx_max_pending = DMA_MAX_TX_SIZE;
 473         ring->rx_pending = priv->dma_rx_size;
 474         ring->tx_pending = priv->dma_tx_size;
 475 }
 476
 477 static int stmmac_set_ringparam(struct net_device *netdev,
 478                                 struct ethtool_ringparam *ring,
 479                                 struct kernel_ethtool_ringparam *kernel_ring,
 480                                 struct netlink_ext_ack *extack)
 481 {
 482         if (ring->rx_mini_pending || ring->rx_jumbo_pending ||
 483             ring->rx_pending < DMA_MIN_RX_SIZE ||
 484             ring->rx_pending > DMA_MAX_RX_SIZE ||
 485             !is_power_of_2(ring->rx_pending) ||
 486             ring->tx_pending < DMA_MIN_TX_SIZE ||
 487             ring->tx_pending > DMA_MAX_TX_SIZE ||
 488             !is_power_of_2(ring->tx_pending))
 489                 return -EINVAL;
 490
 491         return stmmac_reinit_ringparam(netdev, ring->rx_pending,
 492                                        ring->tx_pending);
 493 }
 494
 495 static void
 496 stmmac_get_pauseparam(struct net_device *netdev,
 497                       struct ethtool_pauseparam *pause)
 498 {
 499         struct stmmac_priv *priv = netdev_priv(netdev);
 500         struct rgmii_adv adv_lp;
 501
 502         if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
 503                 pause->autoneg = 1;
 504                 if (!adv_lp.pause)
 505                         return;
 506         } else {
 507                 phylink_ethtool_get_pauseparam(priv->phylink, pause);
 508         }
 509 }
 510
 511 static int
 512 stmmac_set_pauseparam(struct net_device *netdev,
 513                       struct ethtool_pauseparam *pause)
 514 {
 515         struct stmmac_priv *priv = netdev_priv(netdev);
 516         struct rgmii_adv adv_lp;
 517
 518         if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
 519                 pause->autoneg = 1;
 520                 if (!adv_lp.pause)
 521                         return -EOPNOTSUPP;
 522                 return 0;
 523         } else {
 524                 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
 525         }
 526 }
 527
 528 static void stmmac_get_per_qstats(struct stmmac_priv *priv, u64 *data)
 529 {
 530         u32 tx_cnt = priv->plat->tx_queues_to_use;
 531         u32 rx_cnt = priv->plat->rx_queues_to_use;
 532         int q, stat;
 533         char *p;
 534
 535         for (q = 0; q < tx_cnt; q++) {
 536                 p = (char *)priv + offsetof(struct stmmac_priv,
 537                                             xstats.txq_stats[q].tx_pkt_n);
 538                 for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
 539                         *data++ = (*(u64 *)p);
 540                         p += sizeof(u64 *);
 541                 }
 542         }
 543         for (q = 0; q < rx_cnt; q++) {
 544                 p = (char *)priv + offsetof(struct stmmac_priv,
 545                                             xstats.rxq_stats[q].rx_pkt_n);
 546                 for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
 547                         *data++ = (*(u64 *)p);
 548                         p += sizeof(u64 *);
 549                 }
 550         }
 551 }
 552
 553 static void stmmac_get_ethtool_stats(struct net_device *dev,
 554                                  struct ethtool_stats *dummy, u64 *data)
 555 {
 556         struct stmmac_priv *priv = netdev_priv(dev);
 557         u32 rx_queues_count = priv->plat->rx_queues_to_use;
 558         u32 tx_queues_count = priv->plat->tx_queues_to_use;
 559         unsigned long count;
 560         int i, j = 0, ret;
 561
 562         if (priv->dma_cap.asp) {
 563                 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
 564                         if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
 565                                                 &count, NULL))
 566                                 data[j++] = count;
 567                 }
 568         }
 569
 570         /* Update the DMA HW counters for dwmac10/100 */
 571         ret = stmmac_dma_diagnostic_fr(priv, &dev->stats, (void *) &priv->xstats,
 572                         priv->ioaddr);
 573         if (ret) {
 574                 /* If supported, for new GMAC chips expose the MMC counters */
 575                 if (priv->dma_cap.rmon) {
 576                         stmmac_mmc_read(priv, priv->mmcaddr, &priv->mmc);
 577
 578                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 579                                 char *p;
 580                                 p = (char *)priv + stmmac_mmc[i].stat_offset;
 581
 582                                 data[j++] = (stmmac_mmc[i].sizeof_stat ==
 583                                              sizeof(u64)) ? (*(u64 *)p) :
 584                                              (*(u32 *)p);
 585                         }
 586                 }
 587                 if (priv->eee_enabled) {
 588                         int val = phylink_get_eee_err(priv->phylink);
 589                         if (val)
 590                                 priv->xstats.phy_eee_wakeup_error_n = val;
 591                 }
 592
 593                 if (priv->synopsys_id >= DWMAC_CORE_3_50)
 594                         stmmac_mac_debug(priv, priv->ioaddr,
 595                                         (void *)&priv->xstats,
 596                                         rx_queues_count, tx_queues_count);
 597         }
 598         for (i = 0; i < STMMAC_STATS_LEN; i++) {
 599                 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
 600                 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
 601                              sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
 602         }
 603         stmmac_get_per_qstats(priv, &data[j]);
 604 }
 605
 606 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
 607 {
 608         struct stmmac_priv *priv = netdev_priv(netdev);
 609         u32 tx_cnt = priv->plat->tx_queues_to_use;
 610         u32 rx_cnt = priv->plat->rx_queues_to_use;
 611         int i, len, safety_len = 0;
 612
 613         switch (sset) {
 614         case ETH_SS_STATS:
 615                 len = STMMAC_STATS_LEN +
 616                       STMMAC_TXQ_STATS * tx_cnt +
 617                       STMMAC_RXQ_STATS * rx_cnt;
 618
 619                 if (priv->dma_cap.rmon)
 620                         len += STMMAC_MMC_STATS_LEN;
 621                 if (priv->dma_cap.asp) {
 622                         for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
 623                                 if (!stmmac_safety_feat_dump(priv,
 624                                                         &priv->sstats, i,
 625                                                         NULL, NULL))
 626                                         safety_len++;
 627                         }
 628
 629                         len += safety_len;
 630                 }
 631
 632                 return len;
 633         case ETH_SS_TEST:
 634                 return stmmac_selftest_get_count(priv);
 635         default:
 636                 return -EOPNOTSUPP;
 637         }
 638 }
 639
 640 static void stmmac_get_qstats_string(struct stmmac_priv *priv, u8 *data)
 641 {
 642         u32 tx_cnt = priv->plat->tx_queues_to_use;
 643         u32 rx_cnt = priv->plat->rx_queues_to_use;
 644         int q, stat;
 645
 646         for (q = 0; q < tx_cnt; q++) {
 647                 for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
 648                         snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
 649                                  stmmac_qstats_tx_string[stat]);
 650                         data += ETH_GSTRING_LEN;
 651                 }
 652         }
 653         for (q = 0; q < rx_cnt; q++) {
 654                 for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
 655                         snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
 656                                  stmmac_qstats_rx_string[stat]);
 657                         data += ETH_GSTRING_LEN;
 658                 }
 659         }
 660 }
 661
 662 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 663 {
 664         int i;
 665         u8 *p = data;
 666         struct stmmac_priv *priv = netdev_priv(dev);
 667
 668         switch (stringset) {
 669         case ETH_SS_STATS:
 670                 if (priv->dma_cap.asp) {
 671                         for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
 672                                 const char *desc;
 673                                 if (!stmmac_safety_feat_dump(priv,
 674                                                         &priv->sstats, i,
 675                                                         NULL, &desc)) {
 676                                         memcpy(p, desc, ETH_GSTRING_LEN);
 677                                         p += ETH_GSTRING_LEN;
 678                                 }
 679                         }
 680                 }
 681                 if (priv->dma_cap.rmon)
 682                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 683                                 memcpy(p, stmmac_mmc[i].stat_string,
 684                                        ETH_GSTRING_LEN);
 685                                 p += ETH_GSTRING_LEN;
 686                         }
 687                 for (i = 0; i < STMMAC_STATS_LEN; i++) {
 688                         memcpy(p, stmmac_gstrings_stats[i].stat_string,
 689                                 ETH_GSTRING_LEN);
 690                         p += ETH_GSTRING_LEN;
 691                 }
 692                 stmmac_get_qstats_string(priv, p);
 693                 break;
 694         case ETH_SS_TEST:
 695                 stmmac_selftest_get_strings(priv, p);
 696                 break;
 697         default:
 698                 WARN_ON(1);
 699                 break;
 700         }
 701 }
 702
 703 /* Currently only support WOL through Magic packet. */
 704 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 705 {
 706         struct stmmac_priv *priv = netdev_priv(dev);
 707
 708         if (!priv->plat->pmt)
 709                 return phylink_ethtool_get_wol(priv->phylink, wol);
 710
 711         mutex_lock(&priv->lock);
 712         if (device_can_wakeup(priv->device)) {
 713                 wol->supported = WAKE_MAGIC | WAKE_UCAST;
 714                 if (priv->hw_cap_support && !priv->dma_cap.pmt_magic_frame)
 715                         wol->supported &= ~WAKE_MAGIC;
 716                 wol->wolopts = priv->wolopts;
 717         }
 718         mutex_unlock(&priv->lock);
 719 }
 720
 721 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 722 {
 723         struct stmmac_priv *priv = netdev_priv(dev);
 724         u32 support = WAKE_MAGIC | WAKE_UCAST;
 725
 726         if (!device_can_wakeup(priv->device))
 727                 return -EOPNOTSUPP;
 728
 729         if (!priv->plat->pmt) {
 730                 int ret = phylink_ethtool_set_wol(priv->phylink, wol);
 731
 732                 if (!ret)
 733                         device_set_wakeup_enable(priv->device, !!wol->wolopts);
 734                 return ret;
 735         }
 736
 737         /* By default almost all GMAC devices support the WoL via
 738          * magic frame but we can disable it if the HW capability
 739          * register shows no support for pmt_magic_frame. */
 740         if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
 741                 wol->wolopts &= ~WAKE_MAGIC;
 742
 743         if (wol->wolopts & ~support)
 744                 return -EINVAL;
 745
 746         if (wol->wolopts) {
 747                 pr_info("stmmac: wakeup enable\n");
 748                 device_set_wakeup_enable(priv->device, 1);
 749                 enable_irq_wake(priv->wol_irq);
 750         } else {
 751                 device_set_wakeup_enable(priv->device, 0);
 752                 disable_irq_wake(priv->wol_irq);
 753         }
 754
 755         mutex_lock(&priv->lock);
 756         priv->wolopts = wol->wolopts;
 757         mutex_unlock(&priv->lock);
 758
 759         return 0;
 760 }
 761
 762 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
 763                                      struct ethtool_eee *edata)
 764 {
 765         struct stmmac_priv *priv = netdev_priv(dev);
 766
 767         if (!priv->dma_cap.eee)
 768                 return -EOPNOTSUPP;
 769
 770         edata->eee_enabled = priv->eee_enabled;
 771         edata->eee_active = priv->eee_active;
 772         edata->tx_lpi_timer = priv->tx_lpi_timer;
 773         edata->tx_lpi_enabled = priv->tx_lpi_enabled;
 774
 775         return phylink_ethtool_get_eee(priv->phylink, edata);
 776 }
 777
 778 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
 779                                      struct ethtool_eee *edata)
 780 {
 781         struct stmmac_priv *priv = netdev_priv(dev);
 782         int ret;
 783
 784         if (!priv->dma_cap.eee)
 785                 return -EOPNOTSUPP;
 786
 787         if (priv->tx_lpi_enabled != edata->tx_lpi_enabled)
 788                 netdev_warn(priv->dev,
 789                             "Setting EEE tx-lpi is not supported\n");
 790
 791         if (priv->hw->xpcs) {
 792                 ret = xpcs_config_eee(priv->hw->xpcs,
 793                                       priv->plat->mult_fact_100ns,
 794                                       edata->eee_enabled);
 795                 if (ret)
 796                         return ret;
 797         }
 798
 799         if (!edata->eee_enabled)
 800                 stmmac_disable_eee_mode(priv);
 801
 802         ret = phylink_ethtool_set_eee(priv->phylink, edata);
 803         if (ret)
 804                 return ret;
 805
 806         if (edata->eee_enabled &&
 807             priv->tx_lpi_timer != edata->tx_lpi_timer) {
 808                 priv->tx_lpi_timer = edata->tx_lpi_timer;
 809                 stmmac_eee_init(priv);
 810         }
 811
 812         return 0;
 813 }
 814
 815 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
 816 {
 817         unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
 818
 819         if (!clk) {
 820                 clk = priv->plat->clk_ref_rate;
 821                 if (!clk)
 822                         return 0;
 823         }
 824
 825         return (usec * (clk / 1000000)) / 256;
 826 }
 827
 828 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
 829 {
 830         unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
 831
 832         if (!clk) {
 833                 clk = priv->plat->clk_ref_rate;
 834                 if (!clk)
 835                         return 0;
 836         }
 837
 838         return (riwt * 256) / (clk / 1000000);
 839 }
 840
 841 static int __stmmac_get_coalesce(struct net_device *dev,
 842                                  struct ethtool_coalesce *ec,
 843                                  int queue)
 844 {
 845         struct stmmac_priv *priv = netdev_priv(dev);
 846         u32 max_cnt;
 847         u32 rx_cnt;
 848         u32 tx_cnt;
 849
 850         rx_cnt = priv->plat->rx_queues_to_use;
 851         tx_cnt = priv->plat->tx_queues_to_use;
 852         max_cnt = max(rx_cnt, tx_cnt);
 853
 854         if (queue < 0)
 855                 queue = 0;
 856         else if (queue >= max_cnt)
 857                 return -EINVAL;
 858
 859         if (queue < tx_cnt) {
 860                 ec->tx_coalesce_usecs = priv->tx_coal_timer[queue];
 861                 ec->tx_max_coalesced_frames = priv->tx_coal_frames[queue];
 862         } else {
 863                 ec->tx_coalesce_usecs = 0;
 864                 ec->tx_max_coalesced_frames = 0;
 865         }
 866
 867         if (priv->use_riwt && queue < rx_cnt) {
 868                 ec->rx_max_coalesced_frames = priv->rx_coal_frames[queue];
 869                 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt[queue],
 870                                                          priv);
 871         } else {
 872                 ec->rx_max_coalesced_frames = 0;
 873                 ec->rx_coalesce_usecs = 0;
 874         }
 875
 876         return 0;
 877 }
 878
 879 static int stmmac_get_coalesce(struct net_device *dev,
 880                                struct ethtool_coalesce *ec,
 881                                struct kernel_ethtool_coalesce *kernel_coal,
 882                                struct netlink_ext_ack *extack)
 883 {
 884         return __stmmac_get_coalesce(dev, ec, -1);
 885 }
 886
 887 static int stmmac_get_per_queue_coalesce(struct net_device *dev, u32 queue,
 888                                          struct ethtool_coalesce *ec)
 889 {
 890         return __stmmac_get_coalesce(dev, ec, queue);
 891 }
 892
 893 static int __stmmac_set_coalesce(struct net_device *dev,
 894                                  struct ethtool_coalesce *ec,
 895                                  int queue)
 896 {
 897         struct stmmac_priv *priv = netdev_priv(dev);
 898         bool all_queues = false;
 899         unsigned int rx_riwt;
 900         u32 max_cnt;
 901         u32 rx_cnt;
 902         u32 tx_cnt;
 903
 904         rx_cnt = priv->plat->rx_queues_to_use;
 905         tx_cnt = priv->plat->tx_queues_to_use;
 906         max_cnt = max(rx_cnt, tx_cnt);
 907
 908         if (queue < 0)
 909                 all_queues = true;
 910         else if (queue >= max_cnt)
 911                 return -EINVAL;
 912
 913         if (priv->use_riwt && (ec->rx_coalesce_usecs > 0)) {
 914                 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
 915
 916                 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
 917                         return -EINVAL;
 918
 919                 if (all_queues) {
 920                         int i;
 921
 922                         for (i = 0; i < rx_cnt; i++) {
 923                                 priv->rx_riwt[i] = rx_riwt;
 924                                 stmmac_rx_watchdog(priv, priv->ioaddr,
 925                                                    rx_riwt, i);
 926                                 priv->rx_coal_frames[i] =
 927                                         ec->rx_max_coalesced_frames;
 928                         }
 929                 } else if (queue < rx_cnt) {
 930                         priv->rx_riwt[queue] = rx_riwt;
 931                         stmmac_rx_watchdog(priv, priv->ioaddr,
 932                                            rx_riwt, queue);
 933                         priv->rx_coal_frames[queue] =
 934                                 ec->rx_max_coalesced_frames;
 935                 }
 936         }
 937
 938         if ((ec->tx_coalesce_usecs == 0) &&
 939             (ec->tx_max_coalesced_frames == 0))
 940                 return -EINVAL;
 941
 942         if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
 943             (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
 944                 return -EINVAL;
 945
 946         if (all_queues) {
 947                 int i;
 948
 949                 for (i = 0; i < tx_cnt; i++) {
 950                         priv->tx_coal_frames[i] =
 951                                 ec->tx_max_coalesced_frames;
 952                         priv->tx_coal_timer[i] =
 953                                 ec->tx_coalesce_usecs;
 954                 }
 955         } else if (queue < tx_cnt) {
 956                 priv->tx_coal_frames[queue] =
 957                         ec->tx_max_coalesced_frames;
 958                 priv->tx_coal_timer[queue] =
 959                         ec->tx_coalesce_usecs;
 960         }
 961
 962         return 0;
 963 }
 964
 965 static int stmmac_set_coalesce(struct net_device *dev,
 966                                struct ethtool_coalesce *ec,
 967                                struct kernel_ethtool_coalesce *kernel_coal,
 968                                struct netlink_ext_ack *extack)
 969 {
 970         return __stmmac_set_coalesce(dev, ec, -1);
 971 }
 972
 973 static int stmmac_set_per_queue_coalesce(struct net_device *dev, u32 queue,
 974                                          struct ethtool_coalesce *ec)
 975 {
 976         return __stmmac_set_coalesce(dev, ec, queue);
 977 }
 978
 979 static int stmmac_get_rxnfc(struct net_device *dev,
 980                             struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
 981 {
 982         struct stmmac_priv *priv = netdev_priv(dev);
 983
 984         switch (rxnfc->cmd) {
 985         case ETHTOOL_GRXRINGS:
 986                 rxnfc->data = priv->plat->rx_queues_to_use;
 987                 break;
 988         default:
 989                 return -EOPNOTSUPP;
 990         }
 991
 992         return 0;
 993 }
 994
 995 static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
 996 {
 997         struct stmmac_priv *priv = netdev_priv(dev);
 998
 999         return sizeof(priv->rss.key);
1000 }
1001
1002 static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
1003 {
1004         struct stmmac_priv *priv = netdev_priv(dev);
1005
1006         return ARRAY_SIZE(priv->rss.table);
1007 }
1008
1009 static int stmmac_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1010                            u8 *hfunc)
1011 {
1012         struct stmmac_priv *priv = netdev_priv(dev);
1013         int i;
1014
1015         if (indir) {
1016                 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
1017                         indir[i] = priv->rss.table[i];
1018         }
1019
1020         if (key)
1021                 memcpy(key, priv->rss.key, sizeof(priv->rss.key));
1022         if (hfunc)
1023                 *hfunc = ETH_RSS_HASH_TOP;
1024
1025         return 0;
1026 }
1027
1028 static int stmmac_set_rxfh(struct net_device *dev, const u32 *indir,
1029                            const u8 *key, const u8 hfunc)
1030 {
1031         struct stmmac_priv *priv = netdev_priv(dev);
1032         int i;
1033
1034         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) && (hfunc != ETH_RSS_HASH_TOP))
1035                 return -EOPNOTSUPP;
1036
1037         if (indir) {
1038                 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
1039                         priv->rss.table[i] = indir[i];
1040         }
1041
1042         if (key)
1043                 memcpy(priv->rss.key, key, sizeof(priv->rss.key));
1044
1045         return stmmac_rss_configure(priv, priv->hw, &priv->rss,
1046                                     priv->plat->rx_queues_to_use);
1047 }
1048
1049 static void stmmac_get_channels(struct net_device *dev,
1050                                 struct ethtool_channels *chan)
1051 {
1052         struct stmmac_priv *priv = netdev_priv(dev);
1053
1054         chan->rx_count = priv->plat->rx_queues_to_use;
1055         chan->tx_count = priv->plat->tx_queues_to_use;
1056         chan->max_rx = priv->dma_cap.number_rx_queues;
1057         chan->max_tx = priv->dma_cap.number_tx_queues;
1058 }
1059
1060 static int stmmac_set_channels(struct net_device *dev,
1061                                struct ethtool_channels *chan)
1062 {
1063         struct stmmac_priv *priv = netdev_priv(dev);
1064
1065         if (chan->rx_count > priv->dma_cap.number_rx_queues ||
1066             chan->tx_count > priv->dma_cap.number_tx_queues ||
1067             !chan->rx_count || !chan->tx_count)
1068                 return -EINVAL;
1069
1070         return stmmac_reinit_queues(dev, chan->rx_count, chan->tx_count);
1071 }
1072
1073 static int stmmac_get_ts_info(struct net_device *dev,
1074                               struct ethtool_ts_info *info)
1075 {
1076         struct stmmac_priv *priv = netdev_priv(dev);
1077
1078         if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
1079
1080                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1081                                         SOF_TIMESTAMPING_TX_HARDWARE |
1082                                         SOF_TIMESTAMPING_RX_SOFTWARE |
1083                                         SOF_TIMESTAMPING_RX_HARDWARE |
1084                                         SOF_TIMESTAMPING_SOFTWARE |
1085                                         SOF_TIMESTAMPING_RAW_HARDWARE;
1086
1087                 if (priv->ptp_clock)
1088                         info->phc_index = ptp_clock_index(priv->ptp_clock);
1089
1090                 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
1091
1092                 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
1093                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1094                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1095                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1096                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1097                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1098                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
1099                                     (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
1100                                     (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
1101                                     (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1102                                     (1 << HWTSTAMP_FILTER_ALL));
1103                 return 0;
1104         } else
1105                 return ethtool_op_get_ts_info(dev, info);
1106 }
1107
1108 static int stmmac_get_tunable(struct net_device *dev,
1109                               const struct ethtool_tunable *tuna, void *data)
1110 {
1111         struct stmmac_priv *priv = netdev_priv(dev);
1112         int ret = 0;
1113
1114         switch (tuna->id) {
1115         case ETHTOOL_RX_COPYBREAK:
1116                 *(u32 *)data = priv->rx_copybreak;
1117                 break;
1118         default:
1119                 ret = -EINVAL;
1120                 break;
1121         }
1122
1123         return ret;
1124 }
1125
1126 static int stmmac_set_tunable(struct net_device *dev,
1127                               const struct ethtool_tunable *tuna,
1128                               const void *data)
1129 {
1130         struct stmmac_priv *priv = netdev_priv(dev);
1131         int ret = 0;
1132
1133         switch (tuna->id) {
1134         case ETHTOOL_RX_COPYBREAK:
1135                 priv->rx_copybreak = *(u32 *)data;
1136                 break;
1137         default:
1138                 ret = -EINVAL;
1139                 break;
1140         }
1141
1142         return ret;
1143 }
1144
1145 static const struct ethtool_ops stmmac_ethtool_ops = {
1146         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1147                                      ETHTOOL_COALESCE_MAX_FRAMES,
1148         .begin = stmmac_check_if_running,
1149         .get_drvinfo = stmmac_ethtool_getdrvinfo,
1150         .get_msglevel = stmmac_ethtool_getmsglevel,
1151         .set_msglevel = stmmac_ethtool_setmsglevel,
1152         .get_regs = stmmac_ethtool_gregs,
1153         .get_regs_len = stmmac_ethtool_get_regs_len,
1154         .get_link = ethtool_op_get_link,
1155         .nway_reset = stmmac_nway_reset,
1156         .get_ringparam = stmmac_get_ringparam,
1157         .set_ringparam = stmmac_set_ringparam,
1158         .get_pauseparam = stmmac_get_pauseparam,
1159         .set_pauseparam = stmmac_set_pauseparam,
1160         .self_test = stmmac_selftest_run,
1161         .get_ethtool_stats = stmmac_get_ethtool_stats,
1162         .get_strings = stmmac_get_strings,
1163         .get_wol = stmmac_get_wol,
1164         .set_wol = stmmac_set_wol,
1165         .get_eee = stmmac_ethtool_op_get_eee,
1166         .set_eee = stmmac_ethtool_op_set_eee,
1167         .get_sset_count = stmmac_get_sset_count,
1168         .get_rxnfc = stmmac_get_rxnfc,
1169         .get_rxfh_key_size = stmmac_get_rxfh_key_size,
1170         .get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
1171         .get_rxfh = stmmac_get_rxfh,
1172         .set_rxfh = stmmac_set_rxfh,
1173         .get_ts_info = stmmac_get_ts_info,
1174         .get_coalesce = stmmac_get_coalesce,
1175         .set_coalesce = stmmac_set_coalesce,
1176         .get_per_queue_coalesce = stmmac_get_per_queue_coalesce,
1177         .set_per_queue_coalesce = stmmac_set_per_queue_coalesce,
1178         .get_channels = stmmac_get_channels,
1179         .set_channels = stmmac_set_channels,
1180         .get_tunable = stmmac_get_tunable,
1181         .set_tunable = stmmac_set_tunable,
1182         .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
1183         .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
1184 };
1185
1186 void stmmac_set_ethtool_ops(struct net_device *netdev)
1187 {
1188         netdev->ethtool_ops = &stmmac_ethtool_ops;
1189 }