1 /*******************************************************************************
2 This contains the functions to handle the normal descriptors.
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 The full GNU General Public License is included in this distribution in
16 the file called "COPYING".
18 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
19 *******************************************************************************/
21 #include <linux/stmmac.h>
23 #include "descs_com.h"
25 static int ndesc_get_tx_status(void *data, struct stmmac_extra_stats *x,
26 struct dma_desc *p, void __iomem *ioaddr)
28 struct net_device_stats *stats = (struct net_device_stats *)data;
29 unsigned int tdes0 = le32_to_cpu(p->des0);
30 unsigned int tdes1 = le32_to_cpu(p->des1);
33 /* Get tx owner first */
34 if (unlikely(tdes0 & TDES0_OWN))
37 /* Verify tx error by looking at the last segment. */
38 if (likely(!(tdes1 & TDES1_LAST_SEGMENT)))
41 if (unlikely(tdes0 & TDES0_ERROR_SUMMARY)) {
42 if (unlikely(tdes0 & TDES0_UNDERFLOW_ERROR)) {
44 stats->tx_fifo_errors++;
46 if (unlikely(tdes0 & TDES0_NO_CARRIER)) {
48 stats->tx_carrier_errors++;
50 if (unlikely(tdes0 & TDES0_LOSS_CARRIER)) {
52 stats->tx_carrier_errors++;
54 if (unlikely((tdes0 & TDES0_EXCESSIVE_DEFERRAL) ||
55 (tdes0 & TDES0_EXCESSIVE_COLLISIONS) ||
56 (tdes0 & TDES0_LATE_COLLISION))) {
57 unsigned int collisions;
59 collisions = (tdes0 & TDES0_COLLISION_COUNT_MASK) >> 3;
60 stats->collisions += collisions;
65 if (tdes0 & TDES0_VLAN_FRAME)
68 if (unlikely(tdes0 & TDES0_DEFERRED))
74 static int ndesc_get_tx_len(struct dma_desc *p)
76 return (le32_to_cpu(p->des1) & RDES1_BUFFER1_SIZE_MASK);
79 /* This function verifies if each incoming frame has some errors
80 * and, if required, updates the multicast statistics.
81 * In case of success, it returns good_frame because the GMAC device
82 * is supposed to be able to compute the csum in HW. */
83 static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x,
87 unsigned int rdes0 = le32_to_cpu(p->des0);
88 struct net_device_stats *stats = (struct net_device_stats *)data;
90 if (unlikely(rdes0 & RDES0_OWN))
93 if (unlikely(!(rdes0 & RDES0_LAST_DESCRIPTOR))) {
94 stats->rx_length_errors++;
98 if (unlikely(rdes0 & RDES0_ERROR_SUMMARY)) {
99 if (unlikely(rdes0 & RDES0_DESCRIPTOR_ERROR))
101 if (unlikely(rdes0 & RDES0_SA_FILTER_FAIL))
103 if (unlikely(rdes0 & RDES0_OVERFLOW_ERROR))
105 if (unlikely(rdes0 & RDES0_IPC_CSUM_ERROR))
107 if (unlikely(rdes0 & RDES0_COLLISION)) {
111 if (unlikely(rdes0 & RDES0_CRC_ERROR)) {
113 stats->rx_crc_errors++;
117 if (unlikely(rdes0 & RDES0_DRIBBLING))
120 if (unlikely(rdes0 & RDES0_LENGTH_ERROR)) {
124 if (unlikely(rdes0 & RDES0_MII_ERROR)) {
128 #ifdef STMMAC_VLAN_TAG_USED
129 if (rdes0 & RDES0_VLAN_TAG)
135 static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
140 p->des0 |= cpu_to_le32(RDES0_OWN);
142 bfsize1 = min(bfsize, BUF_SIZE_2KiB - 1);
143 p->des1 |= cpu_to_le32(bfsize1 & RDES1_BUFFER1_SIZE_MASK);
145 if (mode == STMMAC_CHAIN_MODE)
146 ndesc_rx_set_on_chain(p, end);
148 ndesc_rx_set_on_ring(p, end, bfsize);
151 p->des1 |= cpu_to_le32(RDES1_DISABLE_IC);
154 static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end)
156 p->des0 &= cpu_to_le32(~TDES0_OWN);
157 if (mode == STMMAC_CHAIN_MODE)
158 ndesc_tx_set_on_chain(p);
160 ndesc_end_tx_desc_on_ring(p, end);
163 static int ndesc_get_tx_owner(struct dma_desc *p)
165 return (le32_to_cpu(p->des0) & TDES0_OWN) >> 31;
168 static void ndesc_set_tx_owner(struct dma_desc *p)
170 p->des0 |= cpu_to_le32(TDES0_OWN);
173 static void ndesc_set_rx_owner(struct dma_desc *p, int disable_rx_ic)
175 p->des0 |= cpu_to_le32(RDES0_OWN);
178 static int ndesc_get_tx_ls(struct dma_desc *p)
180 return (le32_to_cpu(p->des1) & TDES1_LAST_SEGMENT) >> 30;
183 static void ndesc_release_tx_desc(struct dma_desc *p, int mode)
185 int ter = (le32_to_cpu(p->des1) & TDES1_END_RING) >> 25;
187 memset(p, 0, offsetof(struct dma_desc, des2));
188 if (mode == STMMAC_CHAIN_MODE)
189 ndesc_tx_set_on_chain(p);
191 ndesc_end_tx_desc_on_ring(p, ter);
194 static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
195 bool csum_flag, int mode, bool tx_own,
196 bool ls, unsigned int tot_pkt_len)
198 unsigned int tdes1 = le32_to_cpu(p->des1);
201 tdes1 |= TDES1_FIRST_SEGMENT;
203 tdes1 &= ~TDES1_FIRST_SEGMENT;
205 if (likely(csum_flag))
206 tdes1 |= (TX_CIC_FULL) << TDES1_CHECKSUM_INSERTION_SHIFT;
208 tdes1 &= ~(TX_CIC_FULL << TDES1_CHECKSUM_INSERTION_SHIFT);
211 tdes1 |= TDES1_LAST_SEGMENT;
213 p->des1 = cpu_to_le32(tdes1);
215 if (mode == STMMAC_CHAIN_MODE)
216 norm_set_tx_desc_len_on_chain(p, len);
218 norm_set_tx_desc_len_on_ring(p, len);
221 p->des0 |= cpu_to_le32(TDES0_OWN);
224 static void ndesc_set_tx_ic(struct dma_desc *p)
226 p->des1 |= cpu_to_le32(TDES1_INTERRUPT);
229 static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
231 unsigned int csum = 0;
233 /* The type-1 checksum offload engines append the checksum at
234 * the end of frame and the two bytes of checksum are added in
236 * Adjust for that in the framelen for type-1 checksum offload
239 if (rx_coe_type == STMMAC_RX_COE_TYPE1)
242 return (((le32_to_cpu(p->des0) & RDES0_FRAME_LEN_MASK)
243 >> RDES0_FRAME_LEN_SHIFT) -
248 static void ndesc_enable_tx_timestamp(struct dma_desc *p)
250 p->des1 |= cpu_to_le32(TDES1_TIME_STAMP_ENABLE);
253 static int ndesc_get_tx_timestamp_status(struct dma_desc *p)
255 return (le32_to_cpu(p->des0) & TDES0_TIME_STAMP_STATUS) >> 17;
258 static void ndesc_get_timestamp(void *desc, u32 ats, u64 *ts)
260 struct dma_desc *p = (struct dma_desc *)desc;
263 ns = le32_to_cpu(p->des2);
264 /* convert high/sec time stamp value to nanosecond */
265 ns += le32_to_cpu(p->des3) * 1000000000ULL;
270 static int ndesc_get_rx_timestamp_status(void *desc, void *next_desc, u32 ats)
272 struct dma_desc *p = (struct dma_desc *)desc;
274 if ((le32_to_cpu(p->des2) == 0xffffffff) &&
275 (le32_to_cpu(p->des3) == 0xffffffff))
276 /* timestamp is corrupted, hence don't store it */
282 static void ndesc_display_ring(void *head, unsigned int size, bool rx)
284 struct dma_desc *p = (struct dma_desc *)head;
287 pr_info("%s descriptor ring:\n", rx ? "RX" : "TX");
289 for (i = 0; i < size; i++) {
293 pr_info("%03d [0x%x]: 0x%x 0x%x 0x%x 0x%x",
294 i, (unsigned int)virt_to_phys(p),
295 (unsigned int)x, (unsigned int)(x >> 32),
302 static void ndesc_get_addr(struct dma_desc *p, unsigned int *addr)
304 *addr = le32_to_cpu(p->des2);
307 static void ndesc_set_addr(struct dma_desc *p, dma_addr_t addr)
309 p->des2 = cpu_to_le32(addr);
312 static void ndesc_clear(struct dma_desc *p)
317 const struct stmmac_desc_ops ndesc_ops = {
318 .tx_status = ndesc_get_tx_status,
319 .rx_status = ndesc_get_rx_status,
320 .get_tx_len = ndesc_get_tx_len,
321 .init_rx_desc = ndesc_init_rx_desc,
322 .init_tx_desc = ndesc_init_tx_desc,
323 .get_tx_owner = ndesc_get_tx_owner,
324 .release_tx_desc = ndesc_release_tx_desc,
325 .prepare_tx_desc = ndesc_prepare_tx_desc,
326 .set_tx_ic = ndesc_set_tx_ic,
327 .get_tx_ls = ndesc_get_tx_ls,
328 .set_tx_owner = ndesc_set_tx_owner,
329 .set_rx_owner = ndesc_set_rx_owner,
330 .get_rx_frame_len = ndesc_get_rx_frame_len,
331 .enable_tx_timestamp = ndesc_enable_tx_timestamp,
332 .get_tx_timestamp_status = ndesc_get_tx_timestamp_status,
333 .get_timestamp = ndesc_get_timestamp,
334 .get_rx_timestamp_status = ndesc_get_rx_timestamp_status,
335 .display_ring = ndesc_display_ring,
336 .get_addr = ndesc_get_addr,
337 .set_addr = ndesc_set_addr,
338 .clear = ndesc_clear,