1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
34 /**************************************************************************
38 **************************************************************************/
40 #define EFX_DRIVER_VERSION "3.2"
43 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
44 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
46 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
47 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
50 /**************************************************************************
54 **************************************************************************/
56 #define EFX_MAX_CHANNELS 32U
57 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
58 #define EFX_EXTRA_CHANNEL_IOV 0
59 #define EFX_EXTRA_CHANNEL_PTP 1
60 #define EFX_MAX_EXTRA_CHANNELS 2U
62 /* Checksum generation is a per-queue option in hardware, so each
63 * queue visible to the networking core is backed by two hardware TX
65 #define EFX_MAX_TX_TC 2
66 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
67 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
68 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
69 #define EFX_TXQ_TYPES 4
70 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
72 /* Forward declare Precision Time Protocol (PTP) support structure. */
75 struct efx_self_tests;
78 * struct efx_special_buffer - An Efx special buffer
79 * @addr: CPU base address of the buffer
80 * @dma_addr: DMA base address of the buffer
81 * @len: Buffer length, in bytes
82 * @index: Buffer index within controller;s buffer table
83 * @entries: Number of buffer table entries
85 * Special buffers are used for the event queues and the TX and RX
86 * descriptor queues for each channel. They are *not* used for the
87 * actual transmit and receive buffers.
89 struct efx_special_buffer {
98 * struct efx_tx_buffer - buffer state for a TX descriptor
99 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
100 * freed when descriptor completes
101 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
102 * freed when descriptor completes.
103 * @dma_addr: DMA address of the fragment.
104 * @flags: Flags for allocation and DMA mapping type
105 * @len: Length of this fragment.
106 * This field is zero when the queue slot is empty.
107 * @unmap_len: Length of this fragment to unmap
109 struct efx_tx_buffer {
111 const struct sk_buff *skb;
115 unsigned short flags;
117 unsigned short unmap_len;
119 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
120 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
121 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
122 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
125 * struct efx_tx_queue - An Efx TX queue
127 * This is a ring buffer of TX fragments.
128 * Since the TX completion path always executes on the same
129 * CPU and the xmit path can operate on different CPUs,
130 * performance is increased by ensuring that the completion
131 * path and the xmit path operate on different cache lines.
132 * This is particularly important if the xmit path is always
133 * executing on one CPU which is different from the completion
134 * path. There is also a cache line for members which are
135 * read but not written on the fast path.
137 * @efx: The associated Efx NIC
138 * @queue: DMA queue number
139 * @channel: The associated channel
140 * @core_txq: The networking core TX queue structure
141 * @buffer: The software buffer ring
142 * @tsoh_page: Array of pages of TSO header buffers
143 * @txd: The hardware descriptor ring
144 * @ptr_mask: The size of the ring minus 1.
145 * @initialised: Has hardware queue been initialised?
146 * @read_count: Current read pointer.
147 * This is the number of buffers that have been removed from both rings.
148 * @old_write_count: The value of @write_count when last checked.
149 * This is here for performance reasons. The xmit path will
150 * only get the up-to-date value of @write_count if this
151 * variable indicates that the queue is empty. This is to
152 * avoid cache-line ping-pong between the xmit path and the
154 * @insert_count: Current insert pointer
155 * This is the number of buffers that have been added to the
157 * @write_count: Current write pointer
158 * This is the number of buffers that have been added to the
160 * @old_read_count: The value of read_count when last checked.
161 * This is here for performance reasons. The xmit path will
162 * only get the up-to-date value of read_count if this
163 * variable indicates that the queue is full. This is to
164 * avoid cache-line ping-pong between the xmit path and the
166 * @tso_bursts: Number of times TSO xmit invoked by kernel
167 * @tso_long_headers: Number of packets with headers too long for standard
169 * @tso_packets: Number of packets via the TSO xmit path
170 * @pushes: Number of times the TX push feature has been used
171 * @empty_read_count: If the completion path has seen the queue as empty
172 * and the transmission path has not yet checked this, the value of
173 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
175 struct efx_tx_queue {
176 /* Members which don't change on the fast path */
177 struct efx_nic *efx ____cacheline_aligned_in_smp;
179 struct efx_channel *channel;
180 struct netdev_queue *core_txq;
181 struct efx_tx_buffer *buffer;
182 struct efx_buffer *tsoh_page;
183 struct efx_special_buffer txd;
184 unsigned int ptr_mask;
187 /* Members used mainly on the completion path */
188 unsigned int read_count ____cacheline_aligned_in_smp;
189 unsigned int old_write_count;
191 /* Members used only on the xmit path */
192 unsigned int insert_count ____cacheline_aligned_in_smp;
193 unsigned int write_count;
194 unsigned int old_read_count;
195 unsigned int tso_bursts;
196 unsigned int tso_long_headers;
197 unsigned int tso_packets;
200 /* Members shared between paths and sometimes updated */
201 unsigned int empty_read_count ____cacheline_aligned_in_smp;
202 #define EFX_EMPTY_COUNT_VALID 0x80000000
203 atomic_t flush_outstanding;
207 * struct efx_rx_buffer - An Efx RX data buffer
208 * @dma_addr: DMA base address of the buffer
209 * @skb: The associated socket buffer. Valid iff !(@flags & %EFX_RX_BUF_PAGE).
210 * Will be %NULL if the buffer slot is currently free.
211 * @page: The associated page buffer. Valif iff @flags & %EFX_RX_BUF_PAGE.
212 * Will be %NULL if the buffer slot is currently free.
213 * @page_offset: Offset within page. Valid iff @flags & %EFX_RX_BUF_PAGE.
214 * @len: Buffer length, in bytes.
215 * @flags: Flags for buffer and packet state.
217 struct efx_rx_buffer {
227 #define EFX_RX_BUF_PAGE 0x0001
228 #define EFX_RX_PKT_CSUMMED 0x0002
229 #define EFX_RX_PKT_DISCARD 0x0004
232 * struct efx_rx_page_state - Page-based rx buffer state
234 * Inserted at the start of every page allocated for receive buffers.
235 * Used to facilitate sharing dma mappings between recycled rx buffers
236 * and those passed up to the kernel.
238 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
239 * When refcnt falls to zero, the page is unmapped for dma
240 * @dma_addr: The dma address of this page.
242 struct efx_rx_page_state {
246 unsigned int __pad[0] ____cacheline_aligned;
250 * struct efx_rx_queue - An Efx RX queue
251 * @efx: The associated Efx NIC
252 * @core_index: Index of network core RX queue. Will be >= 0 iff this
253 * is associated with a real RX queue.
254 * @buffer: The software buffer ring
255 * @rxd: The hardware descriptor ring
256 * @ptr_mask: The size of the ring minus 1.
257 * @enabled: Receive queue enabled indicator.
258 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
259 * @rxq_flush_pending.
260 * @added_count: Number of buffers added to the receive queue.
261 * @notified_count: Number of buffers given to NIC (<= @added_count).
262 * @removed_count: Number of buffers removed from the receive queue.
263 * @max_fill: RX descriptor maximum fill level (<= ring size)
264 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
266 * @min_fill: RX descriptor minimum non-zero fill level.
267 * This records the minimum fill level observed when a ring
268 * refill was triggered.
269 * @alloc_page_count: RX allocation strategy counter.
270 * @alloc_skb_count: RX allocation strategy counter.
271 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
273 struct efx_rx_queue {
276 struct efx_rx_buffer *buffer;
277 struct efx_special_buffer rxd;
278 unsigned int ptr_mask;
285 unsigned int max_fill;
286 unsigned int fast_fill_trigger;
287 unsigned int min_fill;
288 unsigned int min_overfill;
289 unsigned int alloc_page_count;
290 unsigned int alloc_skb_count;
291 struct timer_list slow_fill;
292 unsigned int slow_fill_count;
296 * struct efx_buffer - An Efx general-purpose buffer
297 * @addr: host base address of the buffer
298 * @dma_addr: DMA base address of the buffer
299 * @len: Buffer length, in bytes
301 * The NIC uses these buffers for its interrupt status registers and
311 enum efx_rx_alloc_method {
312 RX_ALLOC_METHOD_AUTO = 0,
313 RX_ALLOC_METHOD_SKB = 1,
314 RX_ALLOC_METHOD_PAGE = 2,
318 * struct efx_channel - An Efx channel
320 * A channel comprises an event queue, at least one TX queue, at least
321 * one RX queue, and an associated tasklet for processing the event
324 * @efx: Associated Efx NIC
325 * @channel: Channel instance number
326 * @type: Channel type definition
327 * @enabled: Channel enabled indicator
328 * @irq: IRQ number (MSI and MSI-X only)
329 * @irq_moderation: IRQ moderation value (in hardware ticks)
330 * @napi_dev: Net device used with NAPI
331 * @napi_str: NAPI control structure
332 * @work_pending: Is work pending via NAPI?
333 * @eventq: Event queue buffer
334 * @eventq_mask: Event queue pointer mask
335 * @eventq_read_ptr: Event queue read pointer
336 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
337 * @irq_count: Number of IRQs since last adaptive moderation decision
338 * @irq_mod_score: IRQ moderation score
339 * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
340 * and diagnostic counters
341 * @rx_alloc_push_pages: RX allocation method currently in use for pushing
343 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
344 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
345 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
346 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
347 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
348 * @n_rx_overlength: Count of RX_OVERLENGTH errors
349 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
350 * @rx_queue: RX queue for this channel
351 * @tx_queue: TX queues for this channel
356 const struct efx_channel_type *type;
359 unsigned int irq_moderation;
360 struct net_device *napi_dev;
361 struct napi_struct napi_str;
363 struct efx_special_buffer eventq;
364 unsigned int eventq_mask;
365 unsigned int eventq_read_ptr;
368 unsigned int irq_count;
369 unsigned int irq_mod_score;
370 #ifdef CONFIG_RFS_ACCEL
371 unsigned int rfs_filters_added;
375 int rx_alloc_push_pages;
377 unsigned n_rx_tobe_disc;
378 unsigned n_rx_ip_hdr_chksum_err;
379 unsigned n_rx_tcp_udp_chksum_err;
380 unsigned n_rx_mcast_mismatch;
381 unsigned n_rx_frm_trunc;
382 unsigned n_rx_overlength;
383 unsigned n_skbuff_leaks;
385 /* Used to pipeline received packets in order to optimise memory
386 * access with prefetches.
388 struct efx_rx_buffer *rx_pkt;
390 struct efx_rx_queue rx_queue;
391 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
395 * struct efx_channel_type - distinguishes traffic and extra channels
396 * @handle_no_channel: Handle failure to allocate an extra channel
397 * @pre_probe: Set up extra state prior to initialisation
398 * @post_remove: Tear down extra state after finalisation, if allocated.
399 * May be called on channels that have not been probed.
400 * @get_name: Generate the channel's name (used for its IRQ handler)
401 * @copy: Copy the channel state prior to reallocation. May be %NULL if
402 * reallocation is not supported.
403 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
404 * @keep_eventq: Flag for whether event queue should be kept initialised
405 * while the device is stopped
407 struct efx_channel_type {
408 void (*handle_no_channel)(struct efx_nic *);
409 int (*pre_probe)(struct efx_channel *);
410 void (*post_remove)(struct efx_channel *);
411 void (*get_name)(struct efx_channel *, char *buf, size_t len);
412 struct efx_channel *(*copy)(const struct efx_channel *);
413 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
423 #define STRING_TABLE_LOOKUP(val, member) \
424 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
426 extern const char *const efx_loopback_mode_names[];
427 extern const unsigned int efx_loopback_mode_max;
428 #define LOOPBACK_MODE(efx) \
429 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
431 extern const char *const efx_reset_type_names[];
432 extern const unsigned int efx_reset_type_max;
433 #define RESET_TYPE(type) \
434 STRING_TABLE_LOOKUP(type, efx_reset_type)
437 /* Be careful if altering to correct macro below */
438 EFX_INT_MODE_MSIX = 0,
439 EFX_INT_MODE_MSI = 1,
440 EFX_INT_MODE_LEGACY = 2,
441 EFX_INT_MODE_MAX /* Insert any new items before this */
443 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
446 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
447 STATE_READY = 1, /* hardware ready and netdev registered */
448 STATE_DISABLED = 2, /* device disabled due to hardware errors */
452 * Alignment of page-allocated RX buffers
454 * Controls the number of bytes inserted at the start of an RX buffer.
455 * This is the equivalent of NET_IP_ALIGN [which controls the alignment
456 * of the skb->head for hardware DMA].
458 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
459 #define EFX_PAGE_IP_ALIGN 0
461 #define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
465 * Alignment of the skb->head which wraps a page-allocated RX buffer
467 * The skb allocated to wrap an rx_buffer can have this alignment. Since
468 * the data is memcpy'd from the rx_buf, it does not need to be equal to
471 #define EFX_PAGE_SKB_ALIGN 2
473 /* Forward declaration */
476 /* Pseudo bit-mask flow control field */
477 #define EFX_FC_RX FLOW_CTRL_RX
478 #define EFX_FC_TX FLOW_CTRL_TX
479 #define EFX_FC_AUTO 4
482 * struct efx_link_state - Current state of the link
484 * @fd: Link is full-duplex
485 * @fc: Actual flow control flags
486 * @speed: Link speed (Mbps)
488 struct efx_link_state {
495 static inline bool efx_link_state_equal(const struct efx_link_state *left,
496 const struct efx_link_state *right)
498 return left->up == right->up && left->fd == right->fd &&
499 left->fc == right->fc && left->speed == right->speed;
503 * struct efx_phy_operations - Efx PHY operations table
504 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
505 * efx->loopback_modes.
506 * @init: Initialise PHY
507 * @fini: Shut down PHY
508 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
509 * @poll: Update @link_state and report whether it changed.
510 * Serialised by the mac_lock.
511 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
512 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
513 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
514 * (only needed where AN bit is set in mmds)
515 * @test_alive: Test that PHY is 'alive' (online)
516 * @test_name: Get the name of a PHY-specific test/result
517 * @run_tests: Run tests and record results as appropriate (offline).
518 * Flags are the ethtool tests flags.
520 struct efx_phy_operations {
521 int (*probe) (struct efx_nic *efx);
522 int (*init) (struct efx_nic *efx);
523 void (*fini) (struct efx_nic *efx);
524 void (*remove) (struct efx_nic *efx);
525 int (*reconfigure) (struct efx_nic *efx);
526 bool (*poll) (struct efx_nic *efx);
527 void (*get_settings) (struct efx_nic *efx,
528 struct ethtool_cmd *ecmd);
529 int (*set_settings) (struct efx_nic *efx,
530 struct ethtool_cmd *ecmd);
531 void (*set_npage_adv) (struct efx_nic *efx, u32);
532 int (*test_alive) (struct efx_nic *efx);
533 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
534 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
535 int (*get_module_eeprom) (struct efx_nic *efx,
536 struct ethtool_eeprom *ee,
538 int (*get_module_info) (struct efx_nic *efx,
539 struct ethtool_modinfo *modinfo);
543 * enum efx_phy_mode - PHY operating mode flags
544 * @PHY_MODE_NORMAL: on and should pass traffic
545 * @PHY_MODE_TX_DISABLED: on with TX disabled
546 * @PHY_MODE_LOW_POWER: set to low power through MDIO
547 * @PHY_MODE_OFF: switched off through external control
548 * @PHY_MODE_SPECIAL: on but will not pass traffic
552 PHY_MODE_TX_DISABLED = 1,
553 PHY_MODE_LOW_POWER = 2,
555 PHY_MODE_SPECIAL = 8,
558 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
560 return !!(mode & ~PHY_MODE_TX_DISABLED);
564 * Efx extended statistics
566 * Not all statistics are provided by all supported MACs. The purpose
567 * is this structure is to contain the raw statistics provided by each
570 struct efx_mac_stats {
588 u64 tx_15xx_to_jumbo;
591 u64 tx_single_collision;
592 u64 tx_multiple_collision;
593 u64 tx_excessive_collision;
595 u64 tx_late_collision;
596 u64 tx_excessive_deferred;
598 u64 tx_mac_src_error;
618 u64 rx_15xx_to_jumbo;
621 u64 rx_bad_64_to_15xx;
622 u64 rx_bad_15xx_to_jumbo;
626 u64 rx_false_carrier;
630 u64 rx_internal_error;
634 /* Number of bits used in a multicast filter hash address */
635 #define EFX_MCAST_HASH_BITS 8
637 /* Number of (single-bit) entries in a multicast filter hash */
638 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
640 /* An Efx multicast filter hash */
641 union efx_multicast_hash {
642 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
643 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
646 struct efx_filter_state;
651 * struct efx_nic - an Efx NIC
652 * @name: Device name (net device name or bus id before net device registered)
653 * @pci_dev: The PCI device
654 * @type: Controller type attributes
655 * @legacy_irq: IRQ number
656 * @legacy_irq_enabled: Are IRQs enabled on NIC (INT_EN_KER register)?
657 * @workqueue: Workqueue for port reconfigures and the HW monitor.
658 * Work items do not hold and must not acquire RTNL.
659 * @workqueue_name: Name of workqueue
660 * @reset_work: Scheduled reset workitem
661 * @membase_phys: Memory BAR value as physical address
662 * @membase: Memory BAR value
663 * @interrupt_mode: Interrupt mode
664 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
665 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
666 * @irq_rx_moderation: IRQ moderation time for RX event queues
667 * @msg_enable: Log message enable flags
668 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
669 * @reset_pending: Bitmask for pending resets
670 * @tx_queue: TX DMA queues
671 * @rx_queue: RX DMA queues
673 * @channel_name: Names for channels and their IRQs
674 * @extra_channel_types: Types of extra (non-traffic) channels that
675 * should be allocated for this NIC
676 * @rxq_entries: Size of receive queues requested by user.
677 * @txq_entries: Size of transmit queues requested by user.
678 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
679 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
680 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
681 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
682 * @sram_lim_qw: Qword address limit of SRAM
683 * @next_buffer_table: First available buffer table id
684 * @n_channels: Number of channels in use
685 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
686 * @n_tx_channels: Number of channels used for TX
687 * @rx_buffer_len: RX buffer length
688 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
689 * @rx_hash_key: Toeplitz hash key for RSS
690 * @rx_indir_table: Indirection table for RSS
691 * @int_error_count: Number of internal errors seen recently
692 * @int_error_expire: Time at which error count will be expired
693 * @irq_status: Interrupt status buffer
694 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
695 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
696 * @selftest_work: Work item for asynchronous self-test
697 * @mtd_list: List of MTDs attached to the NIC
698 * @nic_data: Hardware dependent state
699 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
700 * efx_monitor() and efx_reconfigure_port()
701 * @port_enabled: Port enabled indicator.
702 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
703 * efx_mac_work() with kernel interfaces. Safe to read under any
704 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
705 * be held to modify it.
706 * @port_initialized: Port initialized?
707 * @net_dev: Operating system network device. Consider holding the rtnl lock
708 * @stats_buffer: DMA buffer for statistics
709 * @phy_type: PHY type
710 * @phy_op: PHY interface
711 * @phy_data: PHY private data (including PHY-specific stats)
712 * @mdio: PHY MDIO interface
713 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
714 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
715 * @link_advertising: Autonegotiation advertising flags
716 * @link_state: Current state of the link
717 * @n_link_state_changes: Number of times the link has changed state
718 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
719 * @multicast_hash: Multicast hash table
720 * @wanted_fc: Wanted flow control flags
721 * @fc_disable: When non-zero flow control is disabled. Typically used to
722 * ensure that network back pressure doesn't delay dma queue flushes.
723 * Serialised by the rtnl lock.
724 * @mac_work: Work item for changing MAC promiscuity and multicast hash
725 * @loopback_mode: Loopback status
726 * @loopback_modes: Supported loopback mode bitmask
727 * @loopback_selftest: Offline self-test private state
728 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
729 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
730 * Decremented when the efx_flush_rx_queue() is called.
731 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
732 * completed (either success or failure). Not used when MCDI is used to
733 * flush receive queues.
734 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
735 * @vf: Array of &struct efx_vf objects.
736 * @vf_count: Number of VFs intended to be enabled.
737 * @vf_init_count: Number of VFs that have been fully initialised.
738 * @vi_scale: log2 number of vnics per VF.
739 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
740 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
741 * @local_addr_list: List of local addresses. Protected by %local_lock.
742 * @local_page_list: List of DMA addressable pages used to broadcast
743 * %local_addr_list. Protected by %local_lock.
744 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
745 * @peer_work: Work item to broadcast peer addresses to VMs.
746 * @ptp_data: PTP state data
747 * @monitor_work: Hardware monitor workitem
748 * @biu_lock: BIU (bus interface unit) lock
749 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
750 * field is used by efx_test_interrupts() to verify that an
751 * interrupt has occurred.
752 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
753 * @mac_stats: MAC statistics. These include all statistics the MACs
754 * can provide. Generic code converts these into a standard
755 * &struct net_device_stats.
756 * @stats_lock: Statistics update lock. Serialises statistics fetches
757 * and access to @mac_stats.
759 * This is stored in the private area of the &struct net_device.
762 /* The following fields should be written very rarely */
765 struct pci_dev *pci_dev;
766 const struct efx_nic_type *type;
768 bool legacy_irq_enabled;
769 struct workqueue_struct *workqueue;
770 char workqueue_name[16];
771 struct work_struct reset_work;
772 resource_size_t membase_phys;
773 void __iomem *membase;
775 enum efx_int_mode interrupt_mode;
776 unsigned int timer_quantum_ns;
777 bool irq_rx_adaptive;
778 unsigned int irq_rx_moderation;
781 enum nic_state state;
782 unsigned long reset_pending;
784 struct efx_channel *channel[EFX_MAX_CHANNELS];
785 char channel_name[EFX_MAX_CHANNELS][IFNAMSIZ + 6];
786 const struct efx_channel_type *
787 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
789 unsigned rxq_entries;
790 unsigned txq_entries;
791 unsigned int txq_stop_thresh;
792 unsigned int txq_wake_thresh;
796 unsigned sram_lim_qw;
797 unsigned next_buffer_table;
799 unsigned n_rx_channels;
801 unsigned tx_channel_offset;
802 unsigned n_tx_channels;
803 unsigned int rx_buffer_len;
804 unsigned int rx_buffer_order;
806 u32 rx_indir_table[128];
808 unsigned int_error_count;
809 unsigned long int_error_expire;
811 struct efx_buffer irq_status;
812 unsigned irq_zero_count;
814 struct delayed_work selftest_work;
816 #ifdef CONFIG_SFC_MTD
817 struct list_head mtd_list;
822 struct mutex mac_lock;
823 struct work_struct mac_work;
826 bool port_initialized;
827 struct net_device *net_dev;
829 struct efx_buffer stats_buffer;
831 unsigned int phy_type;
832 const struct efx_phy_operations *phy_op;
834 struct mdio_if_info mdio;
835 unsigned int mdio_bus;
836 enum efx_phy_mode phy_mode;
838 u32 link_advertising;
839 struct efx_link_state link_state;
840 unsigned int n_link_state_changes;
843 union efx_multicast_hash multicast_hash;
848 enum efx_loopback_mode loopback_mode;
851 void *loopback_selftest;
853 struct efx_filter_state *filter_state;
855 atomic_t drain_pending;
856 atomic_t rxq_flush_pending;
857 atomic_t rxq_flush_outstanding;
858 wait_queue_head_t flush_wq;
860 #ifdef CONFIG_SFC_SRIOV
861 struct efx_channel *vfdi_channel;
864 unsigned vf_init_count;
866 unsigned vf_buftbl_base;
867 struct efx_buffer vfdi_status;
868 struct list_head local_addr_list;
869 struct list_head local_page_list;
870 struct mutex local_lock;
871 struct work_struct peer_work;
874 struct efx_ptp_data *ptp_data;
876 /* The following fields may be written more often */
878 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
881 unsigned n_rx_nodesc_drop_cnt;
882 struct efx_mac_stats mac_stats;
883 spinlock_t stats_lock;
886 static inline int efx_dev_registered(struct efx_nic *efx)
888 return efx->net_dev->reg_state == NETREG_REGISTERED;
891 static inline unsigned int efx_port_num(struct efx_nic *efx)
893 return efx->net_dev->dev_id;
897 * struct efx_nic_type - Efx device type definition
898 * @probe: Probe the controller
899 * @remove: Free resources allocated by probe()
900 * @init: Initialise the controller
901 * @dimension_resources: Dimension controller resources (buffer table,
902 * and VIs once the available interrupt resources are clear)
903 * @fini: Shut down the controller
904 * @monitor: Periodic function for polling link state and hardware monitor
905 * @map_reset_reason: Map ethtool reset reason to a reset method
906 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
907 * @reset: Reset the controller hardware and possibly the PHY. This will
908 * be called while the controller is uninitialised.
909 * @probe_port: Probe the MAC and PHY
910 * @remove_port: Free resources allocated by probe_port()
911 * @handle_global_event: Handle a "global" event (may be %NULL)
912 * @prepare_flush: Prepare the hardware for flushing the DMA queues
913 * @finish_flush: Clean up after flushing the DMA queues
914 * @update_stats: Update statistics not provided by event handling
915 * @start_stats: Start the regular fetching of statistics
916 * @stop_stats: Stop the regular fetching of statistics
917 * @set_id_led: Set state of identifying LED or revert to automatic function
918 * @push_irq_moderation: Apply interrupt moderation value
919 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
920 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
921 * to the hardware. Serialised by the mac_lock.
922 * @check_mac_fault: Check MAC fault state. True if fault present.
923 * @get_wol: Get WoL configuration from driver state
924 * @set_wol: Push WoL configuration to the NIC
925 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
926 * @test_chip: Test registers. Should use efx_nic_test_registers(), and is
927 * expected to reset the NIC.
928 * @test_nvram: Test validity of NVRAM contents
929 * @revision: Hardware architecture revision
930 * @mem_map_size: Memory BAR mapped size
931 * @txd_ptr_tbl_base: TX descriptor ring base address
932 * @rxd_ptr_tbl_base: RX descriptor ring base address
933 * @buf_tbl_base: Buffer table base address
934 * @evq_ptr_tbl_base: Event queue pointer table base address
935 * @evq_rptr_tbl_base: Event queue read-pointer table base address
936 * @max_dma_mask: Maximum possible DMA mask
937 * @rx_buffer_hash_size: Size of hash at start of RX buffer
938 * @rx_buffer_padding: Size of padding at end of RX buffer
939 * @max_interrupt_mode: Highest capability interrupt mode supported
940 * from &enum efx_init_mode.
941 * @phys_addr_channels: Number of channels with physically addressed
943 * @timer_period_max: Maximum period of interrupt timer (in ticks)
944 * @offload_features: net_device feature flags for protocol offload
945 * features implemented in hardware
947 struct efx_nic_type {
948 int (*probe)(struct efx_nic *efx);
949 void (*remove)(struct efx_nic *efx);
950 int (*init)(struct efx_nic *efx);
951 void (*dimension_resources)(struct efx_nic *efx);
952 void (*fini)(struct efx_nic *efx);
953 void (*monitor)(struct efx_nic *efx);
954 enum reset_type (*map_reset_reason)(enum reset_type reason);
955 int (*map_reset_flags)(u32 *flags);
956 int (*reset)(struct efx_nic *efx, enum reset_type method);
957 int (*probe_port)(struct efx_nic *efx);
958 void (*remove_port)(struct efx_nic *efx);
959 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
960 void (*prepare_flush)(struct efx_nic *efx);
961 void (*finish_flush)(struct efx_nic *efx);
962 void (*update_stats)(struct efx_nic *efx);
963 void (*start_stats)(struct efx_nic *efx);
964 void (*stop_stats)(struct efx_nic *efx);
965 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
966 void (*push_irq_moderation)(struct efx_channel *channel);
967 int (*reconfigure_port)(struct efx_nic *efx);
968 int (*reconfigure_mac)(struct efx_nic *efx);
969 bool (*check_mac_fault)(struct efx_nic *efx);
970 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
971 int (*set_wol)(struct efx_nic *efx, u32 type);
972 void (*resume_wol)(struct efx_nic *efx);
973 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
974 int (*test_nvram)(struct efx_nic *efx);
977 unsigned int mem_map_size;
978 unsigned int txd_ptr_tbl_base;
979 unsigned int rxd_ptr_tbl_base;
980 unsigned int buf_tbl_base;
981 unsigned int evq_ptr_tbl_base;
982 unsigned int evq_rptr_tbl_base;
984 unsigned int rx_buffer_hash_size;
985 unsigned int rx_buffer_padding;
986 unsigned int max_interrupt_mode;
987 unsigned int phys_addr_channels;
988 unsigned int timer_period_max;
989 netdev_features_t offload_features;
992 /**************************************************************************
994 * Prototypes and inline functions
996 *************************************************************************/
998 static inline struct efx_channel *
999 efx_get_channel(struct efx_nic *efx, unsigned index)
1001 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
1002 return efx->channel[index];
1005 /* Iterate over all used channels */
1006 #define efx_for_each_channel(_channel, _efx) \
1007 for (_channel = (_efx)->channel[0]; \
1009 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1010 (_efx)->channel[_channel->channel + 1] : NULL)
1012 /* Iterate over all used channels in reverse */
1013 #define efx_for_each_channel_rev(_channel, _efx) \
1014 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1016 _channel = _channel->channel ? \
1017 (_efx)->channel[_channel->channel - 1] : NULL)
1019 static inline struct efx_tx_queue *
1020 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1022 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1023 type >= EFX_TXQ_TYPES);
1024 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1027 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1029 return channel->channel - channel->efx->tx_channel_offset <
1030 channel->efx->n_tx_channels;
1033 static inline struct efx_tx_queue *
1034 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1036 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1037 type >= EFX_TXQ_TYPES);
1038 return &channel->tx_queue[type];
1041 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1043 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1044 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1047 /* Iterate over all TX queues belonging to a channel */
1048 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1049 if (!efx_channel_has_tx_queues(_channel)) \
1052 for (_tx_queue = (_channel)->tx_queue; \
1053 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1054 efx_tx_queue_used(_tx_queue); \
1057 /* Iterate over all possible TX queues belonging to a channel */
1058 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1059 if (!efx_channel_has_tx_queues(_channel)) \
1062 for (_tx_queue = (_channel)->tx_queue; \
1063 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1066 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1068 return channel->rx_queue.core_index >= 0;
1071 static inline struct efx_rx_queue *
1072 efx_channel_get_rx_queue(struct efx_channel *channel)
1074 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1075 return &channel->rx_queue;
1078 /* Iterate over all RX queues belonging to a channel */
1079 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1080 if (!efx_channel_has_rx_queue(_channel)) \
1083 for (_rx_queue = &(_channel)->rx_queue; \
1087 static inline struct efx_channel *
1088 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1090 return container_of(rx_queue, struct efx_channel, rx_queue);
1093 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1095 return efx_rx_queue_channel(rx_queue)->channel;
1098 /* Returns a pointer to the specified receive buffer in the RX
1101 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1104 return &rx_queue->buffer[index];
1109 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1111 * This calculates the maximum frame length that will be used for a
1112 * given MTU. The frame length will be equal to the MTU plus a
1113 * constant amount of header space and padding. This is the quantity
1114 * that the net driver will program into the MAC as the maximum frame
1117 * The 10G MAC requires 8-byte alignment on the frame
1118 * length, so we round up to the nearest 8.
1120 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1121 * XGMII cycle). If the frame length reaches the maximum value in the
1122 * same cycle, the XMAC can miss the IPG altogether. We work around
1123 * this by adding a further 16 bytes.
1125 #define EFX_MAX_FRAME_LEN(mtu) \
1126 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1128 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1130 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1132 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1134 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1137 #endif /* EFX_NET_DRIVER_H */