1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/rwsem.h>
29 #include <linux/vmalloc.h>
30 #include <linux/i2c.h>
31 #include <linux/mtd/mtd.h>
32 #include <net/busy_poll.h>
38 /**************************************************************************
42 **************************************************************************/
44 #define EFX_DRIVER_VERSION "4.1"
47 #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x)
48 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
50 #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0)
51 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
54 /**************************************************************************
58 **************************************************************************/
60 #define EFX_MAX_CHANNELS 32U
61 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
62 #define EFX_EXTRA_CHANNEL_IOV 0
63 #define EFX_EXTRA_CHANNEL_PTP 1
64 #define EFX_MAX_EXTRA_CHANNELS 2U
66 /* Checksum generation is a per-queue option in hardware, so each
67 * queue visible to the networking core is backed by two hardware TX
69 #define EFX_MAX_TX_TC 2
70 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
71 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
72 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
73 #define EFX_TXQ_TYPES 4
74 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
76 /* Maximum possible MTU the driver supports */
77 #define EFX_MAX_MTU (9 * 1024)
79 /* Minimum MTU, from RFC791 (IP) */
80 #define EFX_MIN_MTU 68
82 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
83 * and should be a multiple of the cache line size.
85 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
87 /* If possible, we should ensure cache line alignment at start and end
88 * of every buffer. Otherwise, we just need to ensure 4-byte
89 * alignment of the network header.
92 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
94 #define EFX_RX_BUF_ALIGNMENT 4
97 /* Forward declare Precision Time Protocol (PTP) support structure. */
99 struct hwtstamp_config;
101 struct efx_self_tests;
104 * struct efx_buffer - A general-purpose DMA buffer
105 * @addr: host base address of the buffer
106 * @dma_addr: DMA base address of the buffer
107 * @len: Buffer length, in bytes
109 * The NIC uses these buffers for its interrupt status registers and
119 * struct efx_special_buffer - DMA buffer entered into buffer table
120 * @buf: Standard &struct efx_buffer
121 * @index: Buffer index within controller;s buffer table
122 * @entries: Number of buffer table entries
124 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
125 * Event and descriptor rings are addressed via one or more buffer
126 * table entries (and so can be physically non-contiguous, although we
127 * currently do not take advantage of that). On Falcon and Siena we
128 * have to take care of allocating and initialising the entries
129 * ourselves. On later hardware this is managed by the firmware and
130 * @index and @entries are left as 0.
132 struct efx_special_buffer {
133 struct efx_buffer buf;
135 unsigned int entries;
139 * struct efx_tx_buffer - buffer state for a TX descriptor
140 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
141 * freed when descriptor completes
142 * @option: When @flags & %EFX_TX_BUF_OPTION, a NIC-specific option descriptor.
143 * @dma_addr: DMA address of the fragment.
144 * @flags: Flags for allocation and DMA mapping type
145 * @len: Length of this fragment.
146 * This field is zero when the queue slot is empty.
147 * @unmap_len: Length of this fragment to unmap
148 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping.
149 * Only valid if @unmap_len != 0.
151 struct efx_tx_buffer {
152 const struct sk_buff *skb;
157 unsigned short flags;
159 unsigned short unmap_len;
160 unsigned short dma_offset;
162 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
163 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
164 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
165 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */
168 * struct efx_tx_queue - An Efx TX queue
170 * This is a ring buffer of TX fragments.
171 * Since the TX completion path always executes on the same
172 * CPU and the xmit path can operate on different CPUs,
173 * performance is increased by ensuring that the completion
174 * path and the xmit path operate on different cache lines.
175 * This is particularly important if the xmit path is always
176 * executing on one CPU which is different from the completion
177 * path. There is also a cache line for members which are
178 * read but not written on the fast path.
180 * @efx: The associated Efx NIC
181 * @queue: DMA queue number
182 * @tso_version: Version of TSO in use for this queue.
183 * @channel: The associated channel
184 * @core_txq: The networking core TX queue structure
185 * @buffer: The software buffer ring
186 * @cb_page: Array of pages of copy buffers. Carved up according to
187 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks.
188 * @txd: The hardware descriptor ring
189 * @ptr_mask: The size of the ring minus 1.
190 * @piobuf: PIO buffer region for this TX queue (shared with its partner).
191 * Size of the region is efx_piobuf_size.
192 * @piobuf_offset: Buffer offset to be specified in PIO descriptors
193 * @initialised: Has hardware queue been initialised?
194 * @timestamping: Is timestamping enabled for this channel?
195 * @handle_tso: TSO xmit preparation handler. Sets up the TSO metadata and
196 * may also map tx data, depending on the nature of the TSO implementation.
197 * @read_count: Current read pointer.
198 * This is the number of buffers that have been removed from both rings.
199 * @old_write_count: The value of @write_count when last checked.
200 * This is here for performance reasons. The xmit path will
201 * only get the up-to-date value of @write_count if this
202 * variable indicates that the queue is empty. This is to
203 * avoid cache-line ping-pong between the xmit path and the
205 * @merge_events: Number of TX merged completion events
206 * @completed_desc_ptr: Most recent completed pointer - only used with
208 * @completed_timestamp_major: Top part of the most recent tx timestamp.
209 * @completed_timestamp_minor: Low part of the most recent tx timestamp.
210 * @insert_count: Current insert pointer
211 * This is the number of buffers that have been added to the
213 * @write_count: Current write pointer
214 * This is the number of buffers that have been added to the
216 * @packet_write_count: Completable write pointer
217 * This is the write pointer of the last packet written.
218 * Normally this will equal @write_count, but as option descriptors
219 * don't produce completion events, they won't update this.
220 * Filled in iff @efx->type->option_descriptors; only used for PIO.
221 * Thus, this is written and used on EF10, and neither on farch.
222 * @old_read_count: The value of read_count when last checked.
223 * This is here for performance reasons. The xmit path will
224 * only get the up-to-date value of read_count if this
225 * variable indicates that the queue is full. This is to
226 * avoid cache-line ping-pong between the xmit path and the
228 * @tso_bursts: Number of times TSO xmit invoked by kernel
229 * @tso_long_headers: Number of packets with headers too long for standard
231 * @tso_packets: Number of packets via the TSO xmit path
232 * @tso_fallbacks: Number of times TSO fallback used
233 * @pushes: Number of times the TX push feature has been used
234 * @pio_packets: Number of times the TX PIO feature has been used
235 * @xmit_more_available: Are any packets waiting to be pushed to the NIC
236 * @cb_packets: Number of times the TX copybreak feature has been used
237 * @empty_read_count: If the completion path has seen the queue as empty
238 * and the transmission path has not yet checked this, the value of
239 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
241 struct efx_tx_queue {
242 /* Members which don't change on the fast path */
243 struct efx_nic *efx ____cacheline_aligned_in_smp;
245 unsigned int tso_version;
246 struct efx_channel *channel;
247 struct netdev_queue *core_txq;
248 struct efx_tx_buffer *buffer;
249 struct efx_buffer *cb_page;
250 struct efx_special_buffer txd;
251 unsigned int ptr_mask;
252 void __iomem *piobuf;
253 unsigned int piobuf_offset;
257 /* Function pointers used in the fast path. */
258 int (*handle_tso)(struct efx_tx_queue*, struct sk_buff*, bool *);
260 /* Members used mainly on the completion path */
261 unsigned int read_count ____cacheline_aligned_in_smp;
262 unsigned int old_write_count;
263 unsigned int merge_events;
264 unsigned int bytes_compl;
265 unsigned int pkts_compl;
266 unsigned int completed_desc_ptr;
267 u32 completed_timestamp_major;
268 u32 completed_timestamp_minor;
270 /* Members used only on the xmit path */
271 unsigned int insert_count ____cacheline_aligned_in_smp;
272 unsigned int write_count;
273 unsigned int packet_write_count;
274 unsigned int old_read_count;
275 unsigned int tso_bursts;
276 unsigned int tso_long_headers;
277 unsigned int tso_packets;
278 unsigned int tso_fallbacks;
280 unsigned int pio_packets;
281 bool xmit_more_available;
282 unsigned int cb_packets;
283 /* Statistics to supplement MAC stats */
284 unsigned long tx_packets;
286 /* Members shared between paths and sometimes updated */
287 unsigned int empty_read_count ____cacheline_aligned_in_smp;
288 #define EFX_EMPTY_COUNT_VALID 0x80000000
289 atomic_t flush_outstanding;
292 #define EFX_TX_CB_ORDER 7
293 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN
296 * struct efx_rx_buffer - An Efx RX data buffer
297 * @dma_addr: DMA base address of the buffer
298 * @page: The associated page buffer.
299 * Will be %NULL if the buffer slot is currently free.
300 * @page_offset: If pending: offset in @page of DMA base address.
301 * If completed: offset in @page of Ethernet header.
302 * @len: If pending: length for DMA descriptor.
303 * If completed: received length, excluding hash prefix.
304 * @flags: Flags for buffer and packet state. These are only set on the
305 * first buffer of a scattered packet.
307 struct efx_rx_buffer {
314 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
315 #define EFX_RX_PKT_CSUMMED 0x0002
316 #define EFX_RX_PKT_DISCARD 0x0004
317 #define EFX_RX_PKT_TCP 0x0040
318 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */
319 #define EFX_RX_PKT_CSUM_LEVEL 0x0200
322 * struct efx_rx_page_state - Page-based rx buffer state
324 * Inserted at the start of every page allocated for receive buffers.
325 * Used to facilitate sharing dma mappings between recycled rx buffers
326 * and those passed up to the kernel.
328 * @dma_addr: The dma address of this page.
330 struct efx_rx_page_state {
333 unsigned int __pad[0] ____cacheline_aligned;
337 * struct efx_rx_queue - An Efx RX queue
338 * @efx: The associated Efx NIC
339 * @core_index: Index of network core RX queue. Will be >= 0 iff this
340 * is associated with a real RX queue.
341 * @buffer: The software buffer ring
342 * @rxd: The hardware descriptor ring
343 * @ptr_mask: The size of the ring minus 1.
344 * @refill_enabled: Enable refill whenever fill level is low
345 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
346 * @rxq_flush_pending.
347 * @added_count: Number of buffers added to the receive queue.
348 * @notified_count: Number of buffers given to NIC (<= @added_count).
349 * @removed_count: Number of buffers removed from the receive queue.
350 * @scatter_n: Used by NIC specific receive code.
351 * @scatter_len: Used by NIC specific receive code.
352 * @page_ring: The ring to store DMA mapped pages for reuse.
353 * @page_add: Counter to calculate the write pointer for the recycle ring.
354 * @page_remove: Counter to calculate the read pointer for the recycle ring.
355 * @page_recycle_count: The number of pages that have been recycled.
356 * @page_recycle_failed: The number of pages that couldn't be recycled because
357 * the kernel still held a reference to them.
358 * @page_recycle_full: The number of pages that were released because the
359 * recycle ring was full.
360 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
361 * @max_fill: RX descriptor maximum fill level (<= ring size)
362 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
364 * @min_fill: RX descriptor minimum non-zero fill level.
365 * This records the minimum fill level observed when a ring
366 * refill was triggered.
367 * @recycle_count: RX buffer recycle counter.
368 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
370 struct efx_rx_queue {
373 struct efx_rx_buffer *buffer;
374 struct efx_special_buffer rxd;
375 unsigned int ptr_mask;
379 unsigned int added_count;
380 unsigned int notified_count;
381 unsigned int removed_count;
382 unsigned int scatter_n;
383 unsigned int scatter_len;
384 struct page **page_ring;
385 unsigned int page_add;
386 unsigned int page_remove;
387 unsigned int page_recycle_count;
388 unsigned int page_recycle_failed;
389 unsigned int page_recycle_full;
390 unsigned int page_ptr_mask;
391 unsigned int max_fill;
392 unsigned int fast_fill_trigger;
393 unsigned int min_fill;
394 unsigned int min_overfill;
395 unsigned int recycle_count;
396 struct timer_list slow_fill;
397 unsigned int slow_fill_count;
398 /* Statistics to supplement MAC stats */
399 unsigned long rx_packets;
402 enum efx_sync_events_state {
403 SYNC_EVENTS_DISABLED = 0,
404 SYNC_EVENTS_QUIESCENT,
405 SYNC_EVENTS_REQUESTED,
410 * struct efx_channel - An Efx channel
412 * A channel comprises an event queue, at least one TX queue, at least
413 * one RX queue, and an associated tasklet for processing the event
416 * @efx: Associated Efx NIC
417 * @channel: Channel instance number
418 * @type: Channel type definition
419 * @eventq_init: Event queue initialised flag
420 * @enabled: Channel enabled indicator
421 * @irq: IRQ number (MSI and MSI-X only)
422 * @irq_moderation_us: IRQ moderation value (in microseconds)
423 * @napi_dev: Net device used with NAPI
424 * @napi_str: NAPI control structure
425 * @state: state for NAPI vs busy polling
426 * @state_lock: lock protecting @state
427 * @eventq: Event queue buffer
428 * @eventq_mask: Event queue pointer mask
429 * @eventq_read_ptr: Event queue read pointer
430 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
431 * @irq_count: Number of IRQs since last adaptive moderation decision
432 * @irq_mod_score: IRQ moderation score
433 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
434 * indexed by filter ID
435 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
436 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
437 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
438 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
439 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
440 * @n_rx_overlength: Count of RX_OVERLENGTH errors
441 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
442 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
443 * lack of descriptors
444 * @n_rx_merge_events: Number of RX merged completion events
445 * @n_rx_merge_packets: Number of RX packets completed by merged events
446 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
447 * __efx_rx_packet(), or zero if there is none
448 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
449 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
450 * @rx_queue: RX queue for this channel
451 * @tx_queue: TX queues for this channel
452 * @sync_events_state: Current state of sync events on this channel
453 * @sync_timestamp_major: Major part of the last ptp sync event
454 * @sync_timestamp_minor: Minor part of the last ptp sync event
459 const struct efx_channel_type *type;
463 unsigned int irq_moderation_us;
464 struct net_device *napi_dev;
465 struct napi_struct napi_str;
466 #ifdef CONFIG_NET_RX_BUSY_POLL
467 unsigned long busy_poll_state;
469 struct efx_special_buffer eventq;
470 unsigned int eventq_mask;
471 unsigned int eventq_read_ptr;
474 unsigned int irq_count;
475 unsigned int irq_mod_score;
476 #ifdef CONFIG_RFS_ACCEL
477 unsigned int rfs_filters_added;
478 #define RPS_FLOW_ID_INVALID 0xFFFFFFFF
482 unsigned int n_rx_tobe_disc;
483 unsigned int n_rx_ip_hdr_chksum_err;
484 unsigned int n_rx_tcp_udp_chksum_err;
485 unsigned int n_rx_outer_ip_hdr_chksum_err;
486 unsigned int n_rx_outer_tcp_udp_chksum_err;
487 unsigned int n_rx_inner_ip_hdr_chksum_err;
488 unsigned int n_rx_inner_tcp_udp_chksum_err;
489 unsigned int n_rx_eth_crc_err;
490 unsigned int n_rx_mcast_mismatch;
491 unsigned int n_rx_frm_trunc;
492 unsigned int n_rx_overlength;
493 unsigned int n_skbuff_leaks;
494 unsigned int n_rx_nodesc_trunc;
495 unsigned int n_rx_merge_events;
496 unsigned int n_rx_merge_packets;
498 unsigned int rx_pkt_n_frags;
499 unsigned int rx_pkt_index;
501 struct efx_rx_queue rx_queue;
502 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
504 enum efx_sync_events_state sync_events_state;
505 u32 sync_timestamp_major;
506 u32 sync_timestamp_minor;
510 * struct efx_msi_context - Context for each MSI
511 * @efx: The associated NIC
512 * @index: Index of the channel/IRQ
513 * @name: Name of the channel/IRQ
515 * Unlike &struct efx_channel, this is never reallocated and is always
516 * safe for the IRQ handler to access.
518 struct efx_msi_context {
521 char name[IFNAMSIZ + 6];
525 * struct efx_channel_type - distinguishes traffic and extra channels
526 * @handle_no_channel: Handle failure to allocate an extra channel
527 * @pre_probe: Set up extra state prior to initialisation
528 * @post_remove: Tear down extra state after finalisation, if allocated.
529 * May be called on channels that have not been probed.
530 * @get_name: Generate the channel's name (used for its IRQ handler)
531 * @copy: Copy the channel state prior to reallocation. May be %NULL if
532 * reallocation is not supported.
533 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
534 * @keep_eventq: Flag for whether event queue should be kept initialised
535 * while the device is stopped
537 struct efx_channel_type {
538 void (*handle_no_channel)(struct efx_nic *);
539 int (*pre_probe)(struct efx_channel *);
540 void (*post_remove)(struct efx_channel *);
541 void (*get_name)(struct efx_channel *, char *buf, size_t len);
542 struct efx_channel *(*copy)(const struct efx_channel *);
543 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
553 #define STRING_TABLE_LOOKUP(val, member) \
554 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
556 extern const char *const efx_loopback_mode_names[];
557 extern const unsigned int efx_loopback_mode_max;
558 #define LOOPBACK_MODE(efx) \
559 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
561 extern const char *const efx_reset_type_names[];
562 extern const unsigned int efx_reset_type_max;
563 #define RESET_TYPE(type) \
564 STRING_TABLE_LOOKUP(type, efx_reset_type)
566 void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen);
569 /* Be careful if altering to correct macro below */
570 EFX_INT_MODE_MSIX = 0,
571 EFX_INT_MODE_MSI = 1,
572 EFX_INT_MODE_LEGACY = 2,
573 EFX_INT_MODE_MAX /* Insert any new items before this */
575 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
578 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
579 STATE_READY = 1, /* hardware ready and netdev registered */
580 STATE_DISABLED = 2, /* device disabled due to hardware errors */
581 STATE_RECOVERY = 3, /* device recovering from PCI error */
584 /* Forward declaration */
587 /* Pseudo bit-mask flow control field */
588 #define EFX_FC_RX FLOW_CTRL_RX
589 #define EFX_FC_TX FLOW_CTRL_TX
590 #define EFX_FC_AUTO 4
593 * struct efx_link_state - Current state of the link
595 * @fd: Link is full-duplex
596 * @fc: Actual flow control flags
597 * @speed: Link speed (Mbps)
599 struct efx_link_state {
606 static inline bool efx_link_state_equal(const struct efx_link_state *left,
607 const struct efx_link_state *right)
609 return left->up == right->up && left->fd == right->fd &&
610 left->fc == right->fc && left->speed == right->speed;
614 * struct efx_phy_operations - Efx PHY operations table
615 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
616 * efx->loopback_modes.
617 * @init: Initialise PHY
618 * @fini: Shut down PHY
619 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
620 * @poll: Update @link_state and report whether it changed.
621 * Serialised by the mac_lock.
622 * @get_link_ksettings: Get ethtool settings. Serialised by the mac_lock.
623 * @set_link_ksettings: Set ethtool settings. Serialised by the mac_lock.
624 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
625 * (only needed where AN bit is set in mmds)
626 * @test_alive: Test that PHY is 'alive' (online)
627 * @test_name: Get the name of a PHY-specific test/result
628 * @run_tests: Run tests and record results as appropriate (offline).
629 * Flags are the ethtool tests flags.
631 struct efx_phy_operations {
632 int (*probe) (struct efx_nic *efx);
633 int (*init) (struct efx_nic *efx);
634 void (*fini) (struct efx_nic *efx);
635 void (*remove) (struct efx_nic *efx);
636 int (*reconfigure) (struct efx_nic *efx);
637 bool (*poll) (struct efx_nic *efx);
638 void (*get_link_ksettings)(struct efx_nic *efx,
639 struct ethtool_link_ksettings *cmd);
640 int (*set_link_ksettings)(struct efx_nic *efx,
641 const struct ethtool_link_ksettings *cmd);
642 void (*set_npage_adv) (struct efx_nic *efx, u32);
643 int (*test_alive) (struct efx_nic *efx);
644 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
645 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
646 int (*get_module_eeprom) (struct efx_nic *efx,
647 struct ethtool_eeprom *ee,
649 int (*get_module_info) (struct efx_nic *efx,
650 struct ethtool_modinfo *modinfo);
654 * enum efx_phy_mode - PHY operating mode flags
655 * @PHY_MODE_NORMAL: on and should pass traffic
656 * @PHY_MODE_TX_DISABLED: on with TX disabled
657 * @PHY_MODE_LOW_POWER: set to low power through MDIO
658 * @PHY_MODE_OFF: switched off through external control
659 * @PHY_MODE_SPECIAL: on but will not pass traffic
663 PHY_MODE_TX_DISABLED = 1,
664 PHY_MODE_LOW_POWER = 2,
666 PHY_MODE_SPECIAL = 8,
669 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
671 return !!(mode & ~PHY_MODE_TX_DISABLED);
675 * struct efx_hw_stat_desc - Description of a hardware statistic
676 * @name: Name of the statistic as visible through ethtool, or %NULL if
677 * it should not be exposed
678 * @dma_width: Width in bits (0 for non-DMA statistics)
679 * @offset: Offset within stats (ignored for non-DMA statistics)
681 struct efx_hw_stat_desc {
687 /* Number of bits used in a multicast filter hash address */
688 #define EFX_MCAST_HASH_BITS 8
690 /* Number of (single-bit) entries in a multicast filter hash */
691 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
693 /* An Efx multicast filter hash */
694 union efx_multicast_hash {
695 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
696 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
702 * struct efx_nic - an Efx NIC
703 * @name: Device name (net device name or bus id before net device registered)
704 * @pci_dev: The PCI device
705 * @node: List node for maintaning primary/secondary function lists
706 * @primary: &struct efx_nic instance for the primary function of this
707 * controller. May be the same structure, and may be %NULL if no
708 * primary function is bound. Serialised by rtnl_lock.
709 * @secondary_list: List of &struct efx_nic instances for the secondary PCI
710 * functions of the controller, if this is for the primary function.
711 * Serialised by rtnl_lock.
712 * @type: Controller type attributes
713 * @legacy_irq: IRQ number
714 * @workqueue: Workqueue for port reconfigures and the HW monitor.
715 * Work items do not hold and must not acquire RTNL.
716 * @workqueue_name: Name of workqueue
717 * @reset_work: Scheduled reset workitem
718 * @membase_phys: Memory BAR value as physical address
719 * @membase: Memory BAR value
720 * @vi_stride: step between per-VI registers / memory regions
721 * @interrupt_mode: Interrupt mode
722 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
723 * @timer_max_ns: Interrupt timer maximum value, in nanoseconds
724 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
725 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues
726 * @irq_rx_moderation_us: IRQ moderation time for RX event queues
727 * @msg_enable: Log message enable flags
728 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
729 * @reset_pending: Bitmask for pending resets
730 * @tx_queue: TX DMA queues
731 * @rx_queue: RX DMA queues
733 * @msi_context: Context for each MSI
734 * @extra_channel_types: Types of extra (non-traffic) channels that
735 * should be allocated for this NIC
736 * @rxq_entries: Size of receive queues requested by user.
737 * @txq_entries: Size of transmit queues requested by user.
738 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
739 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
740 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
741 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
742 * @sram_lim_qw: Qword address limit of SRAM
743 * @next_buffer_table: First available buffer table id
744 * @n_channels: Number of channels in use
745 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
746 * @n_tx_channels: Number of channels used for TX
747 * @rx_ip_align: RX DMA address offset to have IP header aligned in
748 * in accordance with NET_IP_ALIGN
749 * @rx_dma_len: Current maximum RX DMA length
750 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
751 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
752 * for use in sk_buff::truesize
753 * @rx_prefix_size: Size of RX prefix before packet data
754 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
755 * (valid only if @rx_prefix_size != 0; always negative)
756 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
757 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative)
758 * @rx_packet_ts_offset: Offset of timestamp from start of packet data
759 * (valid only if channel->sync_timestamps_enabled; always negative)
760 * @rx_hash_key: Toeplitz hash key for RSS
761 * @rx_indir_table: Indirection table for RSS
762 * @rx_scatter: Scatter mode enabled for receives
763 * @rss_active: RSS enabled on hardware
764 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled
765 * @int_error_count: Number of internal errors seen recently
766 * @int_error_expire: Time at which error count will be expired
767 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
768 * acknowledge but do nothing else.
769 * @irq_status: Interrupt status buffer
770 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
771 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
772 * @selftest_work: Work item for asynchronous self-test
773 * @mtd_list: List of MTDs attached to the NIC
774 * @nic_data: Hardware dependent state
775 * @mcdi: Management-Controller-to-Driver Interface state
776 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
777 * efx_monitor() and efx_reconfigure_port()
778 * @port_enabled: Port enabled indicator.
779 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
780 * efx_mac_work() with kernel interfaces. Safe to read under any
781 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
782 * be held to modify it.
783 * @port_initialized: Port initialized?
784 * @net_dev: Operating system network device. Consider holding the rtnl lock
785 * @fixed_features: Features which cannot be turned off
786 * @num_mac_stats: Number of MAC stats reported by firmware (MAC_STATS_NUM_STATS
787 * field of %MC_CMD_GET_CAPABILITIES_V4 response, or %MC_CMD_MAC_NSTATS)
788 * @stats_buffer: DMA buffer for statistics
789 * @phy_type: PHY type
790 * @phy_op: PHY interface
791 * @phy_data: PHY private data (including PHY-specific stats)
792 * @mdio: PHY MDIO interface
793 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
794 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
795 * @link_advertising: Autonegotiation advertising flags
796 * @link_state: Current state of the link
797 * @n_link_state_changes: Number of times the link has changed state
798 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
799 * Protected by @mac_lock.
800 * @multicast_hash: Multicast hash table for Falcon-arch.
801 * Protected by @mac_lock.
802 * @wanted_fc: Wanted flow control flags
803 * @fc_disable: When non-zero flow control is disabled. Typically used to
804 * ensure that network back pressure doesn't delay dma queue flushes.
805 * Serialised by the rtnl lock.
806 * @mac_work: Work item for changing MAC promiscuity and multicast hash
807 * @loopback_mode: Loopback status
808 * @loopback_modes: Supported loopback mode bitmask
809 * @loopback_selftest: Offline self-test private state
810 * @filter_sem: Filter table rw_semaphore, for freeing the table
811 * @filter_lock: Filter table lock, for mere content changes
812 * @filter_state: Architecture-dependent filter table state
813 * @rps_expire_channel: Next channel to check for expiry
814 * @rps_expire_index: Next index to check for expiry in
815 * @rps_expire_channel's @rps_flow_id
816 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
817 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
818 * Decremented when the efx_flush_rx_queue() is called.
819 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
820 * completed (either success or failure). Not used when MCDI is used to
821 * flush receive queues.
822 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
823 * @vf_count: Number of VFs intended to be enabled.
824 * @vf_init_count: Number of VFs that have been fully initialised.
825 * @vi_scale: log2 number of vnics per VF.
826 * @ptp_data: PTP state data
827 * @ptp_warned: has this NIC seen and warned about unexpected PTP events?
828 * @vpd_sn: Serial number read from VPD
829 * @monitor_work: Hardware monitor workitem
830 * @biu_lock: BIU (bus interface unit) lock
831 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
832 * field is used by efx_test_interrupts() to verify that an
833 * interrupt has occurred.
834 * @stats_lock: Statistics update lock. Must be held when calling
835 * efx_nic_type::{update,start,stop}_stats.
836 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb
838 * This is stored in the private area of the &struct net_device.
841 /* The following fields should be written very rarely */
844 struct list_head node;
845 struct efx_nic *primary;
846 struct list_head secondary_list;
847 struct pci_dev *pci_dev;
848 unsigned int port_num;
849 const struct efx_nic_type *type;
851 bool eeh_disabled_legacy_irq;
852 struct workqueue_struct *workqueue;
853 char workqueue_name[16];
854 struct work_struct reset_work;
855 resource_size_t membase_phys;
856 void __iomem *membase;
858 unsigned int vi_stride;
860 enum efx_int_mode interrupt_mode;
861 unsigned int timer_quantum_ns;
862 unsigned int timer_max_ns;
863 bool irq_rx_adaptive;
864 unsigned int irq_mod_step_us;
865 unsigned int irq_rx_moderation_us;
868 enum nic_state state;
869 unsigned long reset_pending;
871 struct efx_channel *channel[EFX_MAX_CHANNELS];
872 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
873 const struct efx_channel_type *
874 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
876 unsigned rxq_entries;
877 unsigned txq_entries;
878 unsigned int txq_stop_thresh;
879 unsigned int txq_wake_thresh;
883 unsigned sram_lim_qw;
884 unsigned next_buffer_table;
886 unsigned int max_channels;
887 unsigned int max_tx_channels;
889 unsigned n_rx_channels;
891 unsigned tx_channel_offset;
892 unsigned n_tx_channels;
893 unsigned int rx_ip_align;
894 unsigned int rx_dma_len;
895 unsigned int rx_buffer_order;
896 unsigned int rx_buffer_truesize;
897 unsigned int rx_page_buf_step;
898 unsigned int rx_bufs_per_page;
899 unsigned int rx_pages_per_batch;
900 unsigned int rx_prefix_size;
901 int rx_packet_hash_offset;
902 int rx_packet_len_offset;
903 int rx_packet_ts_offset;
905 u32 rx_indir_table[128];
908 bool rx_hash_udp_4tuple;
910 unsigned int_error_count;
911 unsigned long int_error_expire;
913 bool irq_soft_enabled;
914 struct efx_buffer irq_status;
915 unsigned irq_zero_count;
917 struct delayed_work selftest_work;
919 #ifdef CONFIG_SFC_MTD
920 struct list_head mtd_list;
924 struct efx_mcdi_data *mcdi;
926 struct mutex mac_lock;
927 struct work_struct mac_work;
930 bool mc_bist_for_other_fn;
931 bool port_initialized;
932 struct net_device *net_dev;
934 netdev_features_t fixed_features;
937 struct efx_buffer stats_buffer;
938 u64 rx_nodesc_drops_total;
939 u64 rx_nodesc_drops_while_down;
940 bool rx_nodesc_drops_prev_state;
942 unsigned int phy_type;
943 const struct efx_phy_operations *phy_op;
945 struct mdio_if_info mdio;
946 unsigned int mdio_bus;
947 enum efx_phy_mode phy_mode;
949 __ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising);
950 struct efx_link_state link_state;
951 unsigned int n_link_state_changes;
954 union efx_multicast_hash multicast_hash;
959 enum efx_loopback_mode loopback_mode;
962 void *loopback_selftest;
964 struct rw_semaphore filter_sem;
965 spinlock_t filter_lock;
967 #ifdef CONFIG_RFS_ACCEL
968 unsigned int rps_expire_channel;
969 unsigned int rps_expire_index;
972 atomic_t active_queues;
973 atomic_t rxq_flush_pending;
974 atomic_t rxq_flush_outstanding;
975 wait_queue_head_t flush_wq;
977 #ifdef CONFIG_SFC_SRIOV
979 unsigned vf_init_count;
983 struct efx_ptp_data *ptp_data;
988 /* The following fields may be written more often */
990 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
993 spinlock_t stats_lock;
994 atomic_t n_rx_noskb_drops;
997 static inline int efx_dev_registered(struct efx_nic *efx)
999 return efx->net_dev->reg_state == NETREG_REGISTERED;
1002 static inline unsigned int efx_port_num(struct efx_nic *efx)
1004 return efx->port_num;
1007 struct efx_mtd_partition {
1008 struct list_head node;
1009 struct mtd_info mtd;
1010 const char *dev_type_name;
1011 const char *type_name;
1012 char name[IFNAMSIZ + 20];
1015 struct efx_udp_tunnel {
1016 u16 type; /* TUNNEL_ENCAP_UDP_PORT_ENTRY_foo, see mcdi_pcol.h */
1018 /* Count of repeated adds of the same port. Used only inside the list,
1019 * not in request arguments.
1025 * struct efx_nic_type - Efx device type definition
1026 * @mem_bar: Get the memory BAR
1027 * @mem_map_size: Get memory BAR mapped size
1028 * @probe: Probe the controller
1029 * @remove: Free resources allocated by probe()
1030 * @init: Initialise the controller
1031 * @dimension_resources: Dimension controller resources (buffer table,
1032 * and VIs once the available interrupt resources are clear)
1033 * @fini: Shut down the controller
1034 * @monitor: Periodic function for polling link state and hardware monitor
1035 * @map_reset_reason: Map ethtool reset reason to a reset method
1036 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
1037 * @reset: Reset the controller hardware and possibly the PHY. This will
1038 * be called while the controller is uninitialised.
1039 * @probe_port: Probe the MAC and PHY
1040 * @remove_port: Free resources allocated by probe_port()
1041 * @handle_global_event: Handle a "global" event (may be %NULL)
1042 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
1043 * @prepare_flush: Prepare the hardware for flushing the DMA queues
1044 * (for Falcon architecture)
1045 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
1047 * @prepare_flr: Prepare for an FLR
1048 * @finish_flr: Clean up after an FLR
1049 * @describe_stats: Describe statistics for ethtool
1050 * @update_stats: Update statistics not provided by event handling.
1051 * Either argument may be %NULL.
1052 * @start_stats: Start the regular fetching of statistics
1053 * @pull_stats: Pull stats from the NIC and wait until they arrive.
1054 * @stop_stats: Stop the regular fetching of statistics
1055 * @set_id_led: Set state of identifying LED or revert to automatic function
1056 * @push_irq_moderation: Apply interrupt moderation value
1057 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
1058 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
1059 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
1060 * to the hardware. Serialised by the mac_lock.
1061 * @check_mac_fault: Check MAC fault state. True if fault present.
1062 * @get_wol: Get WoL configuration from driver state
1063 * @set_wol: Push WoL configuration to the NIC
1064 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
1065 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
1066 * expected to reset the NIC.
1067 * @test_nvram: Test validity of NVRAM contents
1068 * @mcdi_request: Send an MCDI request with the given header and SDU.
1069 * The SDU length may be any value from 0 up to the protocol-
1070 * defined maximum, but its buffer will be padded to a multiple
1072 * @mcdi_poll_response: Test whether an MCDI response is available.
1073 * @mcdi_read_response: Read the MCDI response PDU. The offset will
1074 * be a multiple of 4. The length may not be, but the buffer
1075 * will be padded so it is safe to round up.
1076 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
1077 * return an appropriate error code for aborting any current
1078 * request; otherwise return 0.
1079 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
1080 * be separately enabled after this.
1081 * @irq_test_generate: Generate a test IRQ
1082 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1083 * queue must be separately disabled before this.
1084 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
1085 * a pointer to the &struct efx_msi_context for the channel.
1086 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
1087 * is a pointer to the &struct efx_nic.
1088 * @tx_probe: Allocate resources for TX queue
1089 * @tx_init: Initialise TX queue on the NIC
1090 * @tx_remove: Free resources for TX queue
1091 * @tx_write: Write TX descriptors and doorbell
1092 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC
1093 * @rx_pull_rss_config: Read RSS hash key and indirection table back from the NIC
1094 * @rx_probe: Allocate resources for RX queue
1095 * @rx_init: Initialise RX queue on the NIC
1096 * @rx_remove: Free resources for RX queue
1097 * @rx_write: Write RX descriptors and doorbell
1098 * @rx_defer_refill: Generate a refill reminder event
1099 * @ev_probe: Allocate resources for event queue
1100 * @ev_init: Initialise event queue on the NIC
1101 * @ev_fini: Deinitialise event queue on the NIC
1102 * @ev_remove: Free resources for event queue
1103 * @ev_process: Process events for a queue, up to the given NAPI quota
1104 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1105 * @ev_test_generate: Generate a test event
1106 * @filter_table_probe: Probe filter capabilities and set up filter software state
1107 * @filter_table_restore: Restore filters removed from hardware
1108 * @filter_table_remove: Remove filters from hardware and tear down software state
1109 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1110 * @filter_insert: add or replace a filter
1111 * @filter_remove_safe: remove a filter by ID, carefully
1112 * @filter_get_safe: retrieve a filter by ID, carefully
1113 * @filter_clear_rx: Remove all RX filters whose priority is less than or
1114 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO
1115 * @filter_count_rx_used: Get the number of filters in use at a given priority
1116 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1117 * @filter_get_rx_ids: Get list of RX filters at a given priority
1118 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
1119 * atomic. The hardware change may be asynchronous but should
1120 * not be delayed for long. It may fail if this can't be done
1122 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1123 * This must check whether the specified table entry is used by RFS
1124 * and that rps_may_expire_flow() returns true for it.
1125 * @mtd_probe: Probe and add MTD partitions associated with this net device,
1126 * using efx_mtd_add()
1127 * @mtd_rename: Set an MTD partition name using the net device name
1128 * @mtd_read: Read from an MTD partition
1129 * @mtd_erase: Erase part of an MTD partition
1130 * @mtd_write: Write to an MTD partition
1131 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1132 * also notifies the driver that a writer has finished using this
1134 * @ptp_write_host_time: Send host time to MC as part of sync protocol
1135 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1136 * timestamping, possibly only temporarily for the purposes of a reset.
1137 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags
1138 * and tx_type will already have been validated but this operation
1139 * must validate and update rx_filter.
1140 * @get_phys_port_id: Get the underlying physical port id.
1141 * @set_mac_address: Set the MAC address of the device
1142 * @tso_versions: Returns mask of firmware-assisted TSO versions supported.
1143 * If %NULL, then device does not support any TSO version.
1144 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required.
1145 * @udp_tnl_add_port: Add a UDP tunnel port
1146 * @udp_tnl_has_port: Check if a port has been added as UDP tunnel
1147 * @udp_tnl_del_port: Remove a UDP tunnel port
1148 * @revision: Hardware architecture revision
1149 * @txd_ptr_tbl_base: TX descriptor ring base address
1150 * @rxd_ptr_tbl_base: RX descriptor ring base address
1151 * @buf_tbl_base: Buffer table base address
1152 * @evq_ptr_tbl_base: Event queue pointer table base address
1153 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1154 * @max_dma_mask: Maximum possible DMA mask
1155 * @rx_prefix_size: Size of RX prefix before packet data
1156 * @rx_hash_offset: Offset of RX flow hash within prefix
1157 * @rx_ts_offset: Offset of timestamp within prefix
1158 * @rx_buffer_padding: Size of padding at end of RX packet
1159 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1160 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1161 * @option_descriptors: NIC supports TX option descriptors
1162 * @min_interrupt_mode: Lowest capability interrupt mode supported
1163 * from &enum efx_int_mode.
1164 * @max_interrupt_mode: Highest capability interrupt mode supported
1165 * from &enum efx_int_mode.
1166 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1167 * @offload_features: net_device feature flags for protocol offload
1168 * features implemented in hardware
1169 * @mcdi_max_ver: Maximum MCDI version supported
1170 * @hwtstamp_filters: Mask of hardware timestamp filter types supported
1172 struct efx_nic_type {
1174 unsigned int (*mem_bar)(struct efx_nic *efx);
1175 unsigned int (*mem_map_size)(struct efx_nic *efx);
1176 int (*probe)(struct efx_nic *efx);
1177 void (*remove)(struct efx_nic *efx);
1178 int (*init)(struct efx_nic *efx);
1179 int (*dimension_resources)(struct efx_nic *efx);
1180 void (*fini)(struct efx_nic *efx);
1181 void (*monitor)(struct efx_nic *efx);
1182 enum reset_type (*map_reset_reason)(enum reset_type reason);
1183 int (*map_reset_flags)(u32 *flags);
1184 int (*reset)(struct efx_nic *efx, enum reset_type method);
1185 int (*probe_port)(struct efx_nic *efx);
1186 void (*remove_port)(struct efx_nic *efx);
1187 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
1188 int (*fini_dmaq)(struct efx_nic *efx);
1189 void (*prepare_flush)(struct efx_nic *efx);
1190 void (*finish_flush)(struct efx_nic *efx);
1191 void (*prepare_flr)(struct efx_nic *efx);
1192 void (*finish_flr)(struct efx_nic *efx);
1193 size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
1194 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
1195 struct rtnl_link_stats64 *core_stats);
1196 void (*start_stats)(struct efx_nic *efx);
1197 void (*pull_stats)(struct efx_nic *efx);
1198 void (*stop_stats)(struct efx_nic *efx);
1199 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
1200 void (*push_irq_moderation)(struct efx_channel *channel);
1201 int (*reconfigure_port)(struct efx_nic *efx);
1202 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
1203 int (*reconfigure_mac)(struct efx_nic *efx);
1204 bool (*check_mac_fault)(struct efx_nic *efx);
1205 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1206 int (*set_wol)(struct efx_nic *efx, u32 type);
1207 void (*resume_wol)(struct efx_nic *efx);
1208 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
1209 int (*test_nvram)(struct efx_nic *efx);
1210 void (*mcdi_request)(struct efx_nic *efx,
1211 const efx_dword_t *hdr, size_t hdr_len,
1212 const efx_dword_t *sdu, size_t sdu_len);
1213 bool (*mcdi_poll_response)(struct efx_nic *efx);
1214 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1215 size_t pdu_offset, size_t pdu_len);
1216 int (*mcdi_poll_reboot)(struct efx_nic *efx);
1217 void (*mcdi_reboot_detected)(struct efx_nic *efx);
1218 void (*irq_enable_master)(struct efx_nic *efx);
1219 int (*irq_test_generate)(struct efx_nic *efx);
1220 void (*irq_disable_non_ev)(struct efx_nic *efx);
1221 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id);
1222 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id);
1223 int (*tx_probe)(struct efx_tx_queue *tx_queue);
1224 void (*tx_init)(struct efx_tx_queue *tx_queue);
1225 void (*tx_remove)(struct efx_tx_queue *tx_queue);
1226 void (*tx_write)(struct efx_tx_queue *tx_queue);
1227 unsigned int (*tx_limit_len)(struct efx_tx_queue *tx_queue,
1228 dma_addr_t dma_addr, unsigned int len);
1229 int (*rx_push_rss_config)(struct efx_nic *efx, bool user,
1230 const u32 *rx_indir_table, const u8 *key);
1231 int (*rx_pull_rss_config)(struct efx_nic *efx);
1232 int (*rx_probe)(struct efx_rx_queue *rx_queue);
1233 void (*rx_init)(struct efx_rx_queue *rx_queue);
1234 void (*rx_remove)(struct efx_rx_queue *rx_queue);
1235 void (*rx_write)(struct efx_rx_queue *rx_queue);
1236 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue);
1237 int (*ev_probe)(struct efx_channel *channel);
1238 int (*ev_init)(struct efx_channel *channel);
1239 void (*ev_fini)(struct efx_channel *channel);
1240 void (*ev_remove)(struct efx_channel *channel);
1241 int (*ev_process)(struct efx_channel *channel, int quota);
1242 void (*ev_read_ack)(struct efx_channel *channel);
1243 void (*ev_test_generate)(struct efx_channel *channel);
1244 int (*filter_table_probe)(struct efx_nic *efx);
1245 void (*filter_table_restore)(struct efx_nic *efx);
1246 void (*filter_table_remove)(struct efx_nic *efx);
1247 void (*filter_update_rx_scatter)(struct efx_nic *efx);
1248 s32 (*filter_insert)(struct efx_nic *efx,
1249 struct efx_filter_spec *spec, bool replace);
1250 int (*filter_remove_safe)(struct efx_nic *efx,
1251 enum efx_filter_priority priority,
1253 int (*filter_get_safe)(struct efx_nic *efx,
1254 enum efx_filter_priority priority,
1255 u32 filter_id, struct efx_filter_spec *);
1256 int (*filter_clear_rx)(struct efx_nic *efx,
1257 enum efx_filter_priority priority);
1258 u32 (*filter_count_rx_used)(struct efx_nic *efx,
1259 enum efx_filter_priority priority);
1260 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx);
1261 s32 (*filter_get_rx_ids)(struct efx_nic *efx,
1262 enum efx_filter_priority priority,
1263 u32 *buf, u32 size);
1264 #ifdef CONFIG_RFS_ACCEL
1265 s32 (*filter_rfs_insert)(struct efx_nic *efx,
1266 struct efx_filter_spec *spec);
1267 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id,
1268 unsigned int index);
1270 #ifdef CONFIG_SFC_MTD
1271 int (*mtd_probe)(struct efx_nic *efx);
1272 void (*mtd_rename)(struct efx_mtd_partition *part);
1273 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len,
1274 size_t *retlen, u8 *buffer);
1275 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len);
1276 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len,
1277 size_t *retlen, const u8 *buffer);
1278 int (*mtd_sync)(struct mtd_info *mtd);
1280 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time);
1281 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp);
1282 int (*ptp_set_ts_config)(struct efx_nic *efx,
1283 struct hwtstamp_config *init);
1284 int (*sriov_configure)(struct efx_nic *efx, int num_vfs);
1285 int (*vlan_rx_add_vid)(struct efx_nic *efx, __be16 proto, u16 vid);
1286 int (*vlan_rx_kill_vid)(struct efx_nic *efx, __be16 proto, u16 vid);
1287 int (*get_phys_port_id)(struct efx_nic *efx,
1288 struct netdev_phys_item_id *ppid);
1289 int (*sriov_init)(struct efx_nic *efx);
1290 void (*sriov_fini)(struct efx_nic *efx);
1291 bool (*sriov_wanted)(struct efx_nic *efx);
1292 void (*sriov_reset)(struct efx_nic *efx);
1293 void (*sriov_flr)(struct efx_nic *efx, unsigned vf_i);
1294 int (*sriov_set_vf_mac)(struct efx_nic *efx, int vf_i, u8 *mac);
1295 int (*sriov_set_vf_vlan)(struct efx_nic *efx, int vf_i, u16 vlan,
1297 int (*sriov_set_vf_spoofchk)(struct efx_nic *efx, int vf_i,
1299 int (*sriov_get_vf_config)(struct efx_nic *efx, int vf_i,
1300 struct ifla_vf_info *ivi);
1301 int (*sriov_set_vf_link_state)(struct efx_nic *efx, int vf_i,
1303 int (*vswitching_probe)(struct efx_nic *efx);
1304 int (*vswitching_restore)(struct efx_nic *efx);
1305 void (*vswitching_remove)(struct efx_nic *efx);
1306 int (*get_mac_address)(struct efx_nic *efx, unsigned char *perm_addr);
1307 int (*set_mac_address)(struct efx_nic *efx);
1308 u32 (*tso_versions)(struct efx_nic *efx);
1309 int (*udp_tnl_push_ports)(struct efx_nic *efx);
1310 int (*udp_tnl_add_port)(struct efx_nic *efx, struct efx_udp_tunnel tnl);
1311 bool (*udp_tnl_has_port)(struct efx_nic *efx, __be16 port);
1312 int (*udp_tnl_del_port)(struct efx_nic *efx, struct efx_udp_tunnel tnl);
1315 unsigned int txd_ptr_tbl_base;
1316 unsigned int rxd_ptr_tbl_base;
1317 unsigned int buf_tbl_base;
1318 unsigned int evq_ptr_tbl_base;
1319 unsigned int evq_rptr_tbl_base;
1321 unsigned int rx_prefix_size;
1322 unsigned int rx_hash_offset;
1323 unsigned int rx_ts_offset;
1324 unsigned int rx_buffer_padding;
1325 bool can_rx_scatter;
1326 bool always_rx_scatter;
1327 bool option_descriptors;
1328 unsigned int min_interrupt_mode;
1329 unsigned int max_interrupt_mode;
1330 unsigned int timer_period_max;
1331 netdev_features_t offload_features;
1333 unsigned int max_rx_ip_filters;
1334 u32 hwtstamp_filters;
1335 unsigned int rx_hash_key_size;
1338 /**************************************************************************
1340 * Prototypes and inline functions
1342 *************************************************************************/
1344 static inline struct efx_channel *
1345 efx_get_channel(struct efx_nic *efx, unsigned index)
1347 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels);
1348 return efx->channel[index];
1351 /* Iterate over all used channels */
1352 #define efx_for_each_channel(_channel, _efx) \
1353 for (_channel = (_efx)->channel[0]; \
1355 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1356 (_efx)->channel[_channel->channel + 1] : NULL)
1358 /* Iterate over all used channels in reverse */
1359 #define efx_for_each_channel_rev(_channel, _efx) \
1360 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1362 _channel = _channel->channel ? \
1363 (_efx)->channel[_channel->channel - 1] : NULL)
1365 static inline struct efx_tx_queue *
1366 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1368 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels ||
1369 type >= EFX_TXQ_TYPES);
1370 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1373 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1375 return channel->channel - channel->efx->tx_channel_offset <
1376 channel->efx->n_tx_channels;
1379 static inline struct efx_tx_queue *
1380 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1382 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_tx_queues(channel) ||
1383 type >= EFX_TXQ_TYPES);
1384 return &channel->tx_queue[type];
1387 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1389 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1390 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1393 /* Iterate over all TX queues belonging to a channel */
1394 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1395 if (!efx_channel_has_tx_queues(_channel)) \
1398 for (_tx_queue = (_channel)->tx_queue; \
1399 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1400 efx_tx_queue_used(_tx_queue); \
1403 /* Iterate over all possible TX queues belonging to a channel */
1404 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1405 if (!efx_channel_has_tx_queues(_channel)) \
1408 for (_tx_queue = (_channel)->tx_queue; \
1409 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1412 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1414 return channel->rx_queue.core_index >= 0;
1417 static inline struct efx_rx_queue *
1418 efx_channel_get_rx_queue(struct efx_channel *channel)
1420 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_rx_queue(channel));
1421 return &channel->rx_queue;
1424 /* Iterate over all RX queues belonging to a channel */
1425 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1426 if (!efx_channel_has_rx_queue(_channel)) \
1429 for (_rx_queue = &(_channel)->rx_queue; \
1433 static inline struct efx_channel *
1434 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1436 return container_of(rx_queue, struct efx_channel, rx_queue);
1439 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1441 return efx_rx_queue_channel(rx_queue)->channel;
1444 /* Returns a pointer to the specified receive buffer in the RX
1447 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1450 return &rx_queue->buffer[index];
1454 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1456 * This calculates the maximum frame length that will be used for a
1457 * given MTU. The frame length will be equal to the MTU plus a
1458 * constant amount of header space and padding. This is the quantity
1459 * that the net driver will program into the MAC as the maximum frame
1462 * The 10G MAC requires 8-byte alignment on the frame
1463 * length, so we round up to the nearest 8.
1465 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1466 * XGMII cycle). If the frame length reaches the maximum value in the
1467 * same cycle, the XMAC can miss the IPG altogether. We work around
1468 * this by adding a further 16 bytes.
1470 #define EFX_FRAME_PAD 16
1471 #define EFX_MAX_FRAME_LEN(mtu) \
1472 (ALIGN(((mtu) + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + EFX_FRAME_PAD), 8))
1474 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1476 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1478 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1480 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1483 /* Get all supported features.
1484 * If a feature is not fixed, it is present in hw_features.
1485 * If a feature is fixed, it does not present in hw_features, but
1486 * always in features.
1488 static inline netdev_features_t efx_supported_features(const struct efx_nic *efx)
1490 const struct net_device *net_dev = efx->net_dev;
1492 return net_dev->features | net_dev->hw_features;
1495 /* Get the current TX queue insert index. */
1496 static inline unsigned int
1497 efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue)
1499 return tx_queue->insert_count & tx_queue->ptr_mask;
1502 /* Get a TX buffer. */
1503 static inline struct efx_tx_buffer *
1504 __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue)
1506 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)];
1509 /* Get a TX buffer, checking it's not currently in use. */
1510 static inline struct efx_tx_buffer *
1511 efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue)
1513 struct efx_tx_buffer *buffer =
1514 __efx_tx_queue_get_insert_buffer(tx_queue);
1516 EFX_WARN_ON_ONCE_PARANOID(buffer->len);
1517 EFX_WARN_ON_ONCE_PARANOID(buffer->flags);
1518 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len);
1523 #endif /* EFX_NET_DRIVER_H */