1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2008-2013 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/delay.h>
11 #include <asm/cmpxchg.h>
12 #include "net_driver.h"
15 #include "farch_regs.h"
16 #include "mcdi_pcol.h"
19 /**************************************************************************
21 * Management-Controller-to-Driver Interface
23 **************************************************************************
26 #define MCDI_RPC_TIMEOUT (10 * HZ)
28 /* A reboot/assertion causes the MCDI status word to be set after the
29 * command word is set or a REBOOT event is sent. If we notice a reboot
30 * via these mechanisms then wait 250ms for the status word to be set.
32 #define MCDI_STATUS_DELAY_US 100
33 #define MCDI_STATUS_DELAY_COUNT 2500
34 #define MCDI_STATUS_SLEEP_MS \
35 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
38 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
40 struct efx_mcdi_async_param {
41 struct list_head list;
45 efx_mcdi_async_completer *complete;
47 /* followed by request/response buffer */
50 static void efx_mcdi_timeout_async(unsigned long context);
51 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
52 bool *was_attached_out);
53 static bool efx_mcdi_poll_once(struct efx_nic *efx);
55 static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
57 EFX_BUG_ON_PARANOID(!efx->mcdi);
58 return &efx->mcdi->iface;
61 int efx_mcdi_init(struct efx_nic *efx)
63 struct efx_mcdi_iface *mcdi;
64 bool already_attached;
67 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
73 init_waitqueue_head(&mcdi->wq);
74 spin_lock_init(&mcdi->iface_lock);
75 mcdi->state = MCDI_STATE_QUIESCENT;
76 mcdi->mode = MCDI_MODE_POLL;
77 spin_lock_init(&mcdi->async_lock);
78 INIT_LIST_HEAD(&mcdi->async_list);
79 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
82 (void) efx_mcdi_poll_reboot(efx);
83 mcdi->new_epoch = true;
85 /* Recover from a failed assertion before probing */
86 rc = efx_mcdi_handle_assertion(efx);
90 /* Let the MC (and BMC, if this is a LOM) know that the driver
91 * is loaded. We should do this before we reset the NIC.
93 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
95 netif_err(efx, probe, efx->net_dev,
96 "Unable to register driver with MCPU\n");
100 /* Not a fatal error */
101 netif_err(efx, probe, efx->net_dev,
102 "Host already registered with MCPU\n");
107 void efx_mcdi_fini(struct efx_nic *efx)
112 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
114 /* Relinquish the device (back to the BMC, if this is a LOM) */
115 efx_mcdi_drv_attach(efx, false, NULL);
120 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
121 const efx_dword_t *inbuf, size_t inlen)
123 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
128 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
130 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
131 spin_lock_bh(&mcdi->iface_lock);
133 spin_unlock_bh(&mcdi->iface_lock);
135 seqno = mcdi->seqno & SEQ_MASK;
137 if (mcdi->mode == MCDI_MODE_EVENTS)
138 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
140 if (efx->type->mcdi_max_ver == 1) {
142 EFX_POPULATE_DWORD_7(hdr[0],
143 MCDI_HEADER_RESPONSE, 0,
144 MCDI_HEADER_RESYNC, 1,
145 MCDI_HEADER_CODE, cmd,
146 MCDI_HEADER_DATALEN, inlen,
147 MCDI_HEADER_SEQ, seqno,
148 MCDI_HEADER_XFLAGS, xflags,
149 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
153 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
154 EFX_POPULATE_DWORD_7(hdr[0],
155 MCDI_HEADER_RESPONSE, 0,
156 MCDI_HEADER_RESYNC, 1,
157 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
158 MCDI_HEADER_DATALEN, 0,
159 MCDI_HEADER_SEQ, seqno,
160 MCDI_HEADER_XFLAGS, xflags,
161 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
162 EFX_POPULATE_DWORD_2(hdr[1],
163 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
164 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
168 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
170 mcdi->new_epoch = false;
173 static int efx_mcdi_errno(unsigned int mcdi_err)
178 #define TRANSLATE_ERROR(name) \
179 case MC_CMD_ERR_ ## name: \
181 TRANSLATE_ERROR(EPERM);
182 TRANSLATE_ERROR(ENOENT);
183 TRANSLATE_ERROR(EINTR);
184 TRANSLATE_ERROR(EAGAIN);
185 TRANSLATE_ERROR(EACCES);
186 TRANSLATE_ERROR(EBUSY);
187 TRANSLATE_ERROR(EINVAL);
188 TRANSLATE_ERROR(EDEADLK);
189 TRANSLATE_ERROR(ENOSYS);
190 TRANSLATE_ERROR(ETIME);
191 TRANSLATE_ERROR(EALREADY);
192 TRANSLATE_ERROR(ENOSPC);
193 #undef TRANSLATE_ERROR
194 case MC_CMD_ERR_ALLOC_FAIL:
196 case MC_CMD_ERR_MAC_EXIST:
203 static void efx_mcdi_read_response_header(struct efx_nic *efx)
205 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
206 unsigned int respseq, respcmd, error;
209 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
210 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
211 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
212 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
214 if (respcmd != MC_CMD_V2_EXTN) {
215 mcdi->resp_hdr_len = 4;
216 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
218 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
219 mcdi->resp_hdr_len = 8;
220 mcdi->resp_data_len =
221 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
224 if (error && mcdi->resp_data_len == 0) {
225 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
227 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
228 netif_err(efx, hw, efx->net_dev,
229 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
230 respseq, mcdi->seqno);
233 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
235 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
241 static bool efx_mcdi_poll_once(struct efx_nic *efx)
243 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
246 if (!efx->type->mcdi_poll_response(efx))
249 spin_lock_bh(&mcdi->iface_lock);
250 efx_mcdi_read_response_header(efx);
251 spin_unlock_bh(&mcdi->iface_lock);
256 static int efx_mcdi_poll(struct efx_nic *efx)
258 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
259 unsigned long time, finish;
263 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
264 rc = efx_mcdi_poll_reboot(efx);
266 spin_lock_bh(&mcdi->iface_lock);
268 mcdi->resp_hdr_len = 0;
269 mcdi->resp_data_len = 0;
270 spin_unlock_bh(&mcdi->iface_lock);
274 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
275 * because generally mcdi responses are fast. After that, back off
276 * and poll once a jiffy (approximately)
279 finish = jiffies + MCDI_RPC_TIMEOUT;
286 schedule_timeout_uninterruptible(1);
291 if (efx_mcdi_poll_once(efx))
294 if (time_after(time, finish))
298 /* Return rc=0 like wait_event_timeout() */
302 /* Test and clear MC-rebooted flag for this port/function; reset
303 * software state as necessary.
305 int efx_mcdi_poll_reboot(struct efx_nic *efx)
310 return efx->type->mcdi_poll_reboot(efx);
313 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
315 return cmpxchg(&mcdi->state,
316 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
317 MCDI_STATE_QUIESCENT;
320 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
322 /* Wait until the interface becomes QUIESCENT and we win the race
323 * to mark it RUNNING_SYNC.
326 cmpxchg(&mcdi->state,
327 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
328 MCDI_STATE_QUIESCENT);
331 static int efx_mcdi_await_completion(struct efx_nic *efx)
333 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
335 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
336 MCDI_RPC_TIMEOUT) == 0)
339 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
340 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
341 * completed the request first, then we'll just end up completing the
342 * request again, which is safe.
344 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
345 * wait_event_timeout() implicitly provides.
347 if (mcdi->mode == MCDI_MODE_POLL)
348 return efx_mcdi_poll(efx);
353 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
354 * requester. Return whether this was done. Does not take any locks.
356 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
358 if (cmpxchg(&mcdi->state,
359 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
360 MCDI_STATE_RUNNING_SYNC) {
368 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
370 if (mcdi->mode == MCDI_MODE_EVENTS) {
371 struct efx_mcdi_async_param *async;
372 struct efx_nic *efx = mcdi->efx;
374 /* Process the asynchronous request queue */
375 spin_lock_bh(&mcdi->async_lock);
376 async = list_first_entry_or_null(
377 &mcdi->async_list, struct efx_mcdi_async_param, list);
379 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
380 efx_mcdi_send_request(efx, async->cmd,
381 (const efx_dword_t *)(async + 1),
383 mod_timer(&mcdi->async_timer,
384 jiffies + MCDI_RPC_TIMEOUT);
386 spin_unlock_bh(&mcdi->async_lock);
392 mcdi->state = MCDI_STATE_QUIESCENT;
396 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
397 * asynchronous completion function, and release the interface.
398 * Return whether this was done. Must be called in bh-disabled
399 * context. Will take iface_lock and async_lock.
401 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
403 struct efx_nic *efx = mcdi->efx;
404 struct efx_mcdi_async_param *async;
405 size_t hdr_len, data_len;
409 if (cmpxchg(&mcdi->state,
410 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
411 MCDI_STATE_RUNNING_ASYNC)
414 spin_lock(&mcdi->iface_lock);
416 /* Ensure that if the completion event arrives later,
417 * the seqno check in efx_mcdi_ev_cpl() will fail
426 hdr_len = mcdi->resp_hdr_len;
427 data_len = mcdi->resp_data_len;
429 spin_unlock(&mcdi->iface_lock);
431 /* Stop the timer. In case the timer function is running, we
432 * must wait for it to return so that there is no possibility
433 * of it aborting the next request.
436 del_timer_sync(&mcdi->async_timer);
438 spin_lock(&mcdi->async_lock);
439 async = list_first_entry(&mcdi->async_list,
440 struct efx_mcdi_async_param, list);
441 list_del(&async->list);
442 spin_unlock(&mcdi->async_lock);
444 outbuf = (efx_dword_t *)(async + 1);
445 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
446 min(async->outlen, data_len));
447 async->complete(efx, async->cookie, rc, outbuf, data_len);
450 efx_mcdi_release(mcdi);
455 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
456 unsigned int datalen, unsigned int mcdi_err)
458 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
461 spin_lock(&mcdi->iface_lock);
463 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
465 /* The request has been cancelled */
468 netif_err(efx, hw, efx->net_dev,
469 "MC response mismatch tx seq 0x%x rx "
470 "seq 0x%x\n", seqno, mcdi->seqno);
472 if (efx->type->mcdi_max_ver >= 2) {
473 /* MCDI v2 responses don't fit in an event */
474 efx_mcdi_read_response_header(efx);
476 mcdi->resprc = efx_mcdi_errno(mcdi_err);
477 mcdi->resp_hdr_len = 4;
478 mcdi->resp_data_len = datalen;
484 spin_unlock(&mcdi->iface_lock);
487 if (!efx_mcdi_complete_async(mcdi, false))
488 (void) efx_mcdi_complete_sync(mcdi);
490 /* If the interface isn't RUNNING_ASYNC or
491 * RUNNING_SYNC then we've received a duplicate
492 * completion after we've already transitioned back to
493 * QUIESCENT. [A subsequent invocation would increment
494 * seqno, so would have failed the seqno check].
499 static void efx_mcdi_timeout_async(unsigned long context)
501 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
503 efx_mcdi_complete_async(mcdi, true);
507 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
509 if (efx->type->mcdi_max_ver < 0 ||
510 (efx->type->mcdi_max_ver < 2 &&
511 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
514 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
515 (efx->type->mcdi_max_ver < 2 &&
516 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
522 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
523 const efx_dword_t *inbuf, size_t inlen,
524 efx_dword_t *outbuf, size_t outlen,
525 size_t *outlen_actual)
529 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
532 return efx_mcdi_rpc_finish(efx, cmd, inlen,
533 outbuf, outlen, outlen_actual);
536 int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
537 const efx_dword_t *inbuf, size_t inlen)
539 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
542 rc = efx_mcdi_check_supported(efx, cmd, inlen);
546 if (efx->mc_bist_for_other_fn)
549 efx_mcdi_acquire_sync(mcdi);
550 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
555 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
556 * @efx: NIC through which to issue the command
557 * @cmd: Command type number
558 * @inbuf: Command parameters
559 * @inlen: Length of command parameters, in bytes
560 * @outlen: Length to allocate for response buffer, in bytes
561 * @complete: Function to be called on completion or cancellation.
562 * @cookie: Arbitrary value to be passed to @complete.
564 * This function does not sleep and therefore may be called in atomic
565 * context. It will fail if event queues are disabled or if MCDI
566 * event completions have been disabled due to an error.
568 * If it succeeds, the @complete function will be called exactly once
569 * in atomic context, when one of the following occurs:
570 * (a) the completion event is received (in NAPI context)
571 * (b) event queues are disabled (in the process that disables them)
572 * (c) the request times-out (in timer context)
575 efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
576 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
577 efx_mcdi_async_completer *complete, unsigned long cookie)
579 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
580 struct efx_mcdi_async_param *async;
583 rc = efx_mcdi_check_supported(efx, cmd, inlen);
587 if (efx->mc_bist_for_other_fn)
590 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
596 async->inlen = inlen;
597 async->outlen = outlen;
598 async->complete = complete;
599 async->cookie = cookie;
600 memcpy(async + 1, inbuf, inlen);
602 spin_lock_bh(&mcdi->async_lock);
604 if (mcdi->mode == MCDI_MODE_EVENTS) {
605 list_add_tail(&async->list, &mcdi->async_list);
607 /* If this is at the front of the queue, try to start it
610 if (mcdi->async_list.next == &async->list &&
611 efx_mcdi_acquire_async(mcdi)) {
612 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
613 mod_timer(&mcdi->async_timer,
614 jiffies + MCDI_RPC_TIMEOUT);
621 spin_unlock_bh(&mcdi->async_lock);
626 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
627 efx_dword_t *outbuf, size_t outlen,
628 size_t *outlen_actual)
630 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
633 if (mcdi->mode == MCDI_MODE_POLL)
634 rc = efx_mcdi_poll(efx);
636 rc = efx_mcdi_await_completion(efx);
639 netif_err(efx, hw, efx->net_dev,
640 "MC command 0x%x inlen %d mode %d timed out\n",
641 cmd, (int)inlen, mcdi->mode);
643 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
644 netif_err(efx, hw, efx->net_dev,
645 "MCDI request was completed without an event\n");
649 /* Close the race with efx_mcdi_ev_cpl() executing just too late
650 * and completing a request we've just cancelled, by ensuring
651 * that the seqno check therein fails.
653 spin_lock_bh(&mcdi->iface_lock);
656 spin_unlock_bh(&mcdi->iface_lock);
660 size_t hdr_len, data_len;
662 /* At the very least we need a memory barrier here to ensure
663 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
664 * a spurious efx_mcdi_ev_cpl() running concurrently by
665 * acquiring the iface_lock. */
666 spin_lock_bh(&mcdi->iface_lock);
668 hdr_len = mcdi->resp_hdr_len;
669 data_len = mcdi->resp_data_len;
670 spin_unlock_bh(&mcdi->iface_lock);
675 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
676 min(outlen, data_len));
677 if (outlen_actual != NULL)
678 *outlen_actual = data_len;
679 } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
680 ; /* Don't reset if MC_CMD_REBOOT returns EIO */
681 else if (rc == -EIO || rc == -EINTR) {
682 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
684 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
686 netif_dbg(efx, hw, efx->net_dev,
687 "MC command 0x%x inlen %d failed rc=%d\n",
688 cmd, (int)inlen, -rc);
690 if (rc == -EIO || rc == -EINTR) {
691 msleep(MCDI_STATUS_SLEEP_MS);
692 efx_mcdi_poll_reboot(efx);
693 mcdi->new_epoch = true;
697 efx_mcdi_release(mcdi);
701 /* Switch to polled MCDI completions. This can be called in various
702 * error conditions with various locks held, so it must be lockless.
703 * Caller is responsible for flushing asynchronous requests later.
705 void efx_mcdi_mode_poll(struct efx_nic *efx)
707 struct efx_mcdi_iface *mcdi;
712 mcdi = efx_mcdi(efx);
713 if (mcdi->mode == MCDI_MODE_POLL)
716 /* We can switch from event completion to polled completion, because
717 * mcdi requests are always completed in shared memory. We do this by
718 * switching the mode to POLL'd then completing the request.
719 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
721 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
722 * which efx_mcdi_complete_sync() provides for us.
724 mcdi->mode = MCDI_MODE_POLL;
726 efx_mcdi_complete_sync(mcdi);
729 /* Flush any running or queued asynchronous requests, after event processing
732 void efx_mcdi_flush_async(struct efx_nic *efx)
734 struct efx_mcdi_async_param *async, *next;
735 struct efx_mcdi_iface *mcdi;
740 mcdi = efx_mcdi(efx);
742 /* We must be in polling mode so no more requests can be queued */
743 BUG_ON(mcdi->mode != MCDI_MODE_POLL);
745 del_timer_sync(&mcdi->async_timer);
747 /* If a request is still running, make sure we give the MC
748 * time to complete it so that the response won't overwrite our
751 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
753 mcdi->state = MCDI_STATE_QUIESCENT;
756 /* Nothing else will access the async list now, so it is safe
757 * to walk it without holding async_lock. If we hold it while
758 * calling a completer then lockdep may warn that we have
759 * acquired locks in the wrong order.
761 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
762 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
763 list_del(&async->list);
768 void efx_mcdi_mode_event(struct efx_nic *efx)
770 struct efx_mcdi_iface *mcdi;
775 mcdi = efx_mcdi(efx);
777 if (mcdi->mode == MCDI_MODE_EVENTS)
780 /* We can't switch from polled to event completion in the middle of a
781 * request, because the completion method is specified in the request.
782 * So acquire the interface to serialise the requestors. We don't need
783 * to acquire the iface_lock to change the mode here, but we do need a
784 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
785 * efx_mcdi_acquire() provides.
787 efx_mcdi_acquire_sync(mcdi);
788 mcdi->mode = MCDI_MODE_EVENTS;
789 efx_mcdi_release(mcdi);
792 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
794 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
796 /* If there is an outstanding MCDI request, it has been terminated
797 * either by a BADASSERT or REBOOT event. If the mcdi interface is
798 * in polled mode, then do nothing because the MC reboot handler will
799 * set the header correctly. However, if the mcdi interface is waiting
800 * for a CMDDONE event it won't receive it [and since all MCDI events
801 * are sent to the same queue, we can't be racing with
804 * If there is an outstanding asynchronous request, we can't
805 * complete it now (efx_mcdi_complete() would deadlock). The
806 * reset process will take care of this.
808 * There's a race here with efx_mcdi_send_request(), because
809 * we might receive a REBOOT event *before* the request has
810 * been copied out. In polled mode (during startup) this is
811 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
812 * event mode, this condition is just an edge-case of
813 * receiving a REBOOT event after posting the MCDI
814 * request. Did the mc reboot before or after the copyout? The
815 * best we can do always is just return failure.
817 spin_lock(&mcdi->iface_lock);
818 if (efx_mcdi_complete_sync(mcdi)) {
819 if (mcdi->mode == MCDI_MODE_EVENTS) {
821 mcdi->resp_hdr_len = 0;
822 mcdi->resp_data_len = 0;
828 /* Consume the status word since efx_mcdi_rpc_finish() won't */
829 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
830 if (efx_mcdi_poll_reboot(efx))
832 udelay(MCDI_STATUS_DELAY_US);
834 mcdi->new_epoch = true;
836 /* Nobody was waiting for an MCDI request, so trigger a reset */
837 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
840 spin_unlock(&mcdi->iface_lock);
843 /* The MC is going down in to BIST mode. set the BIST flag to block
844 * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
845 * (which doesn't actually execute a reset, it waits for the controlling
846 * function to reset it).
848 static void efx_mcdi_ev_bist(struct efx_nic *efx)
850 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
852 spin_lock(&mcdi->iface_lock);
853 efx->mc_bist_for_other_fn = true;
854 if (efx_mcdi_complete_sync(mcdi)) {
855 if (mcdi->mode == MCDI_MODE_EVENTS) {
857 mcdi->resp_hdr_len = 0;
858 mcdi->resp_data_len = 0;
862 mcdi->new_epoch = true;
863 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
864 spin_unlock(&mcdi->iface_lock);
867 /* Called from falcon_process_eventq for MCDI events */
868 void efx_mcdi_process_event(struct efx_channel *channel,
871 struct efx_nic *efx = channel->efx;
872 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
873 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
876 case MCDI_EVENT_CODE_BADSSERT:
877 netif_err(efx, hw, efx->net_dev,
878 "MC watchdog or assertion failure at 0x%x\n", data);
879 efx_mcdi_ev_death(efx, -EINTR);
882 case MCDI_EVENT_CODE_PMNOTICE:
883 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
886 case MCDI_EVENT_CODE_CMDDONE:
888 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
889 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
890 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
893 case MCDI_EVENT_CODE_LINKCHANGE:
894 efx_mcdi_process_link_change(efx, event);
896 case MCDI_EVENT_CODE_SENSOREVT:
897 efx_mcdi_sensor_event(efx, event);
899 case MCDI_EVENT_CODE_SCHEDERR:
900 netif_dbg(efx, hw, efx->net_dev,
901 "MC Scheduler alert (0x%x)\n", data);
903 case MCDI_EVENT_CODE_REBOOT:
904 case MCDI_EVENT_CODE_MC_REBOOT:
905 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
906 efx_mcdi_ev_death(efx, -EIO);
908 case MCDI_EVENT_CODE_MC_BIST:
909 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
910 efx_mcdi_ev_bist(efx);
912 case MCDI_EVENT_CODE_MAC_STATS_DMA:
913 /* MAC stats are gather lazily. We can ignore this. */
915 case MCDI_EVENT_CODE_FLR:
916 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
918 case MCDI_EVENT_CODE_PTP_RX:
919 case MCDI_EVENT_CODE_PTP_FAULT:
920 case MCDI_EVENT_CODE_PTP_PPS:
921 efx_ptp_event(efx, event);
923 case MCDI_EVENT_CODE_TX_FLUSH:
924 case MCDI_EVENT_CODE_RX_FLUSH:
925 /* Two flush events will be sent: one to the same event
926 * queue as completions, and one to event queue 0.
927 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
928 * flag will be set, and we should ignore the event
929 * because we want to wait for all completions.
931 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
932 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
933 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
934 efx_ef10_handle_drain_event(efx);
936 case MCDI_EVENT_CODE_TX_ERR:
937 case MCDI_EVENT_CODE_RX_ERR:
938 netif_err(efx, hw, efx->net_dev,
939 "%s DMA error (event: "EFX_QWORD_FMT")\n",
940 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
941 EFX_QWORD_VAL(*event));
942 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
945 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
950 /**************************************************************************
952 * Specific request functions
954 **************************************************************************
957 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
959 MCDI_DECLARE_BUF(outbuf,
960 max(MC_CMD_GET_VERSION_OUT_LEN,
961 MC_CMD_GET_CAPABILITIES_OUT_LEN));
963 const __le16 *ver_words;
967 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
968 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
969 outbuf, sizeof(outbuf), &outlength);
972 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
977 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
978 offset = snprintf(buf, len, "%u.%u.%u.%u",
979 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
980 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
982 /* EF10 may have multiple datapath firmware variants within a
983 * single version. Report which variants are running.
985 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
986 BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
987 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
988 outbuf, sizeof(outbuf), &outlength);
989 if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
991 buf + offset, len - offset, " rx? tx?");
994 buf + offset, len - offset, " rx%x tx%x",
996 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
998 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
1000 /* It's theoretically possible for the string to exceed 31
1001 * characters, though in practice the first three version
1002 * components are short enough that this doesn't happen.
1004 if (WARN_ON(offset >= len))
1011 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1015 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1018 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1019 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1023 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1024 driver_operating ? 1 : 0);
1025 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1026 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1028 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1029 outbuf, sizeof(outbuf), &outlen);
1032 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1037 /* We currently assume we have control of the external link
1038 * and are completely trusted by firmware. Abort probing
1039 * if that's not true for this function.
1041 if (driver_operating &&
1042 outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN &&
1043 (MCDI_DWORD(outbuf, DRV_ATTACH_EXT_OUT_FUNC_FLAGS) &
1044 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1045 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
1046 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1047 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
1048 netif_err(efx, probe, efx->net_dev,
1049 "This driver version only supports one function per port\n");
1053 if (was_attached != NULL)
1054 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1058 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1062 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1063 u16 *fw_subtype_list, u32 *capabilities)
1065 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1067 int port_num = efx_port_num(efx);
1070 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1072 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1073 outbuf, sizeof(outbuf), &outlen);
1077 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1085 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1086 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
1088 if (fw_subtype_list) {
1090 i < MCDI_VAR_ARRAY_LEN(outlen,
1091 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1093 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1094 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1095 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1096 fw_subtype_list[i] = 0;
1100 *capabilities = MCDI_DWORD(outbuf,
1101 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1103 *capabilities = MCDI_DWORD(outbuf,
1104 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1110 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1111 __func__, rc, (int)outlen);
1116 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1118 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1123 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1125 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1127 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1128 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1130 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1132 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1140 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1144 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1146 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1150 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1152 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1153 outbuf, sizeof(outbuf), &outlen);
1156 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1161 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1165 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1170 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1171 size_t *size_out, size_t *erase_size_out,
1172 bool *protected_out)
1174 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1175 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1179 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1181 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1182 outbuf, sizeof(outbuf), &outlen);
1185 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1190 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1191 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1192 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1193 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1197 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1201 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1203 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1204 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1207 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1209 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1210 outbuf, sizeof(outbuf), NULL);
1214 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1215 case MC_CMD_NVRAM_TEST_PASS:
1216 case MC_CMD_NVRAM_TEST_NOTSUPP:
1223 int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1229 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1234 while (nvram_types != 0) {
1235 if (nvram_types & 1) {
1236 rc = efx_mcdi_nvram_test(efx, type);
1247 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1250 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1254 static int efx_mcdi_read_assertion(struct efx_nic *efx)
1256 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1257 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1258 unsigned int flags, index;
1264 /* Attempt to read any stored assertion state before we reboot
1265 * the mcfw out of the assertion handler. Retry twice, once
1266 * because a boot-time assertion might cause this command to fail
1267 * with EINTR. And once again because GET_ASSERTS can race with
1268 * MC_CMD_REBOOT running on the other port. */
1271 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1272 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
1273 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1274 outbuf, sizeof(outbuf), &outlen);
1275 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1279 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1282 /* Print out any recorded assertion state */
1283 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1284 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1287 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1288 ? "system-level assertion"
1289 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1290 ? "thread-level assertion"
1291 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1293 : "unknown assertion";
1294 netif_err(efx, hw, efx->net_dev,
1295 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1296 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1297 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1299 /* Print out the registers */
1301 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1303 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1305 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1311 static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1313 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1315 /* If the MC is running debug firmware, it might now be
1316 * waiting for a debugger to attach, but we just want it to
1317 * reboot. We set a flag that makes the command a no-op if it
1318 * has already done so. We don't know what return code to
1319 * expect (0 or -EIO), so ignore it.
1321 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1322 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1323 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1324 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1328 int efx_mcdi_handle_assertion(struct efx_nic *efx)
1332 rc = efx_mcdi_read_assertion(efx);
1336 efx_mcdi_exit_assertion(efx);
1341 void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1343 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1346 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1347 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1348 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1350 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1352 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1354 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1357 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1361 static int efx_mcdi_reset_port(struct efx_nic *efx)
1363 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
1365 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1370 static int efx_mcdi_reset_mc(struct efx_nic *efx)
1372 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1375 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1376 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1377 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1379 /* White is black, and up is down */
1384 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1388 enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1390 return RESET_TYPE_RECOVER_OR_ALL;
1393 int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1397 /* Recover from a failed assertion pre-reset */
1398 rc = efx_mcdi_handle_assertion(efx);
1402 if (method == RESET_TYPE_WORLD)
1403 return efx_mcdi_reset_mc(efx);
1405 return efx_mcdi_reset_port(efx);
1408 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1409 const u8 *mac, int *id_out)
1411 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1412 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1416 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1417 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1418 MC_CMD_FILTER_MODE_SIMPLE);
1419 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1421 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1422 outbuf, sizeof(outbuf), &outlen);
1426 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1431 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1437 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1444 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1446 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1450 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1452 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1456 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1457 outbuf, sizeof(outbuf), &outlen);
1461 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1466 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1472 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1477 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1479 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
1482 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1484 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1492 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1496 int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1498 struct efx_channel *channel;
1499 struct efx_rx_queue *rx_queue;
1500 MCDI_DECLARE_BUF(inbuf,
1501 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
1504 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1505 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1508 efx_for_each_channel(channel, efx) {
1509 efx_for_each_channel_rx_queue(rx_queue, channel) {
1510 if (rx_queue->flush_pending) {
1511 rx_queue->flush_pending = false;
1512 atomic_dec(&efx->rxq_flush_pending);
1513 MCDI_SET_ARRAY_DWORD(
1514 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1515 count, efx_rx_queue_index(rx_queue));
1521 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1522 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
1528 int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1532 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1539 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1543 int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1545 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1547 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1548 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1549 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1550 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1554 #ifdef CONFIG_SFC_MTD
1556 #define EFX_MCDI_NVRAM_LEN_MAX 128
1558 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1560 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1563 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1565 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1567 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1575 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1579 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1580 loff_t offset, u8 *buffer, size_t length)
1582 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1583 MCDI_DECLARE_BUF(outbuf,
1584 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1588 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1589 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1590 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1592 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1593 outbuf, sizeof(outbuf), &outlen);
1597 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1601 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1605 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1606 loff_t offset, const u8 *buffer, size_t length)
1608 MCDI_DECLARE_BUF(inbuf,
1609 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1612 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1613 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1614 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1615 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1617 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1619 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1620 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1628 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1632 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1633 loff_t offset, size_t length)
1635 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1638 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1639 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1640 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1642 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1644 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1652 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1656 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1658 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1661 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1663 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1665 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1673 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1677 int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1678 size_t len, size_t *retlen, u8 *buffer)
1680 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1681 struct efx_nic *efx = mtd->priv;
1682 loff_t offset = start;
1683 loff_t end = min_t(loff_t, start + len, mtd->size);
1687 while (offset < end) {
1688 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1689 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1697 *retlen = offset - start;
1701 int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1703 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1704 struct efx_nic *efx = mtd->priv;
1705 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1706 loff_t end = min_t(loff_t, start + len, mtd->size);
1707 size_t chunk = part->common.mtd.erasesize;
1710 if (!part->updating) {
1711 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1714 part->updating = true;
1717 /* The MCDI interface can in fact do multiple erase blocks at once;
1718 * but erasing may be slow, so we make multiple calls here to avoid
1719 * tripping the MCDI RPC timeout. */
1720 while (offset < end) {
1721 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1731 int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1732 size_t len, size_t *retlen, const u8 *buffer)
1734 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1735 struct efx_nic *efx = mtd->priv;
1736 loff_t offset = start;
1737 loff_t end = min_t(loff_t, start + len, mtd->size);
1741 if (!part->updating) {
1742 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1745 part->updating = true;
1748 while (offset < end) {
1749 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1750 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1758 *retlen = offset - start;
1762 int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1764 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1765 struct efx_nic *efx = mtd->priv;
1768 if (part->updating) {
1769 part->updating = false;
1770 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1776 void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1778 struct efx_mcdi_mtd_partition *mcdi_part =
1779 container_of(part, struct efx_mcdi_mtd_partition, common);
1780 struct efx_nic *efx = part->mtd.priv;
1782 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1783 efx->name, part->type_name, mcdi_part->fw_subtype);
1786 #endif /* CONFIG_SFC_MTD */