3 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
5 Maintained by Jeff Garzik <jgarzik@pobox.com>
6 Copyright 2000-2002 Jeff Garzik
8 Much code comes from Donald Becker's rtl8139.c driver,
9 versions 1.13 and older. This driver was originally based
10 on rtl8139.c version 1.07. Header of rtl8139.c version 1.13:
14 Written 1997-2001 by Donald Becker.
15 This software may be used and distributed according to the
16 terms of the GNU General Public License (GPL), incorporated
17 herein by reference. Drivers based on or derived from this
18 code fall under the GPL and must retain the authorship,
19 copyright and license notice. This file is not a complete
20 program and may only be used when the entire operating
21 system is licensed under the GPL.
23 This driver is for boards based on the RTL8129 and RTL8139
26 The author may be reached as becker@scyld.com, or C/O Scyld
27 Computing Corporation 410 Severn Ave., Suite 210 Annapolis
30 Support and updates available at
31 http://www.scyld.com/network/rtl8139.html
33 Twister-tuning table provided by Kinston
34 <shangh@realtek.com.tw>.
38 This software may be used and distributed according to the terms
39 of the GNU General Public License, incorporated herein by reference.
43 Donald Becker - he wrote the original driver, kudos to him!
44 (but please don't e-mail him for support, this isn't his driver)
46 Tigran Aivazian - bug fixes, skbuff free cleanup
48 Martin Mares - suggestions for PCI cleanup
50 David S. Miller - PCI DMA and softnet updates
52 Ernst Gill - fixes ported from BSD driver
54 Daniel Kobras - identified specific locations of
55 posted MMIO write bugginess
57 Gerard Sharp - bug fix, testing and feedback
59 David Ford - Rx ring wrap fix
61 Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
62 to find and fix a crucial bug on older chipsets.
64 Donald Becker/Chris Butterworth/Marcus Westergren -
65 Noticed various Rx packet size-related buglets.
67 Santiago Garcia Mantinan - testing and feedback
69 Jens David - 2.2.x kernel backports
71 Martin Dennett - incredibly helpful insight on undocumented
72 features of the 8139 chips
74 Jean-Jacques Michel - bug fix
76 Tobias Ringström - Rx interrupt status checking suggestion
78 Andrew Morton - Clear blocked signals, avoid
79 buffer overrun setting current->comm.
81 Kalle Olavi Niemitalo - Wake-on-LAN ioctls
83 Robert Kuebel - Save kernel thread from dying on any signal.
85 Submitting bug reports:
87 "rtl8139-diag -mmmaaavvveefN" output
88 enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
92 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
94 #define DRV_NAME "8139too"
95 #define DRV_VERSION "0.9.28"
98 #include <linux/module.h>
99 #include <linux/kernel.h>
100 #include <linux/compiler.h>
101 #include <linux/pci.h>
102 #include <linux/init.h>
103 #include <linux/interrupt.h>
104 #include <linux/netdevice.h>
105 #include <linux/etherdevice.h>
106 #include <linux/rtnetlink.h>
107 #include <linux/delay.h>
108 #include <linux/ethtool.h>
109 #include <linux/mii.h>
110 #include <linux/completion.h>
111 #include <linux/crc32.h>
112 #include <linux/io.h>
113 #include <linux/uaccess.h>
114 #include <linux/gfp.h>
115 #include <linux/if_vlan.h>
118 #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION
120 /* Default Message level */
121 #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
126 /* define to 1, 2 or 3 to enable copious debugging info */
127 #define RTL8139_DEBUG 0
129 /* define to 1 to disable lightweight runtime debugging checks */
130 #undef RTL8139_NDEBUG
133 #ifdef RTL8139_NDEBUG
134 # define assert(expr) do {} while (0)
136 # define assert(expr) \
137 if (unlikely(!(expr))) { \
138 pr_err("Assertion failed! %s,%s,%s,line=%d\n", \
139 #expr, __FILE__, __func__, __LINE__); \
144 /* A few user-configurable values. */
147 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
148 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
150 /* Whether to use MMIO or PIO. Default to MMIO. */
151 #ifdef CONFIG_8139TOO_PIO
152 static bool use_io = true;
154 static bool use_io = false;
157 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
158 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
159 static int multicast_filter_limit = 32;
161 /* bitmapped message enable number */
162 static int debug = -1;
166 * Warning: 64K ring has hardware issues and may lock up.
168 #if defined(CONFIG_SH_DREAMCAST)
169 #define RX_BUF_IDX 0 /* 8K ring */
171 #define RX_BUF_IDX 2 /* 32K ring */
173 #define RX_BUF_LEN (8192 << RX_BUF_IDX)
174 #define RX_BUF_PAD 16
175 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
177 #if RX_BUF_LEN == 65536
178 #define RX_BUF_TOT_LEN RX_BUF_LEN
180 #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
183 /* Number of Tx descriptor registers. */
184 #define NUM_TX_DESC 4
186 /* max supported ethernet frame size -- must be at least (dev->mtu+18+4).*/
187 #define MAX_ETH_FRAME_SIZE 1792
189 /* max supported payload size */
190 #define MAX_ETH_DATA_SIZE (MAX_ETH_FRAME_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN)
192 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+18+4). */
193 #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE
194 #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC)
196 /* PCI Tuning Parameters
197 Threshold is bytes transferred to chip before transmission starts. */
198 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
200 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */
201 #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */
202 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
203 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
204 #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */
206 /* Operational parameters that usually are not changed. */
207 /* Time in jiffies before concluding the transmitter is hung. */
208 #define TX_TIMEOUT (6*HZ)
212 HAS_MII_XCVR = 0x010000,
213 HAS_CHIP_XCVR = 0x020000,
214 HAS_LNK_CHNG = 0x040000,
217 #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */
218 #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */
219 #define RTL_MIN_IO_SIZE 0x80
220 #define RTL8139B_IO_SIZE 256
222 #define RTL8129_CAPS HAS_MII_XCVR
223 #define RTL8139_CAPS (HAS_CHIP_XCVR|HAS_LNK_CHNG)
231 /* indexed by board_t, above */
232 static const struct {
236 { "RealTek RTL8139", RTL8139_CAPS },
237 { "RealTek RTL8129", RTL8129_CAPS },
241 static const struct pci_device_id rtl8139_pci_tbl[] = {
242 {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
243 {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
244 {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
245 {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
246 {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
247 {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
248 {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
249 {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
250 {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
251 {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
252 {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
253 {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
254 {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
255 {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
256 {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
257 {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
258 {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
259 {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
260 {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
262 #ifdef CONFIG_SH_SECUREEDGE5410
263 /* Bogus 8139 silicon reports 8129 without external PROM :-( */
264 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
266 #ifdef CONFIG_8139TOO_8129
267 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
270 /* some crazy cards report invalid vendor ids like
271 * 0x0001 here. The other ids are valid and constant,
272 * so we simply don't match on the main vendor id.
274 {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
275 {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
276 {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
280 MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
283 const char str[ETH_GSTRING_LEN];
284 } ethtool_stats_keys[] = {
288 { "rx_lost_in_ring" },
291 /* The rest of these values should never change. */
293 /* Symbolic offsets to registers. */
294 enum RTL8139_registers {
295 MAC0 = 0, /* Ethernet hardware address. */
296 MAR0 = 8, /* Multicast filter. */
297 TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */
298 TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */
307 Timer = 0x48, /* A general-purpose counter. */
308 RxMissed = 0x4C, /* 24 bits valid, write clears. */
315 Config4 = 0x5A, /* absent on RTL-8139A */
319 BasicModeCtrl = 0x62,
320 BasicModeStatus = 0x64,
323 NWayExpansion = 0x6A,
324 /* Undocumented registers, but required for proper operation. */
325 FIFOTMS = 0x70, /* FIFO Control and test. */
326 CSCR = 0x74, /* Chip Status and Configuration Register. */
328 FlashReg = 0xD4, /* Communication with Flash ROM, four bytes. */
329 PARA7c = 0x7c, /* Magic transceiver parameter register. */
330 Config5 = 0xD8, /* absent on RTL-8139A */
334 MultiIntrClear = 0xF000,
336 Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
346 /* Interrupt register bits, using my own meaningful names. */
347 enum IntrStatusBits {
358 RxAckBits = RxFIFOOver | RxOverflow | RxOK,
365 TxOutOfWindow = 0x20000000,
366 TxAborted = 0x40000000,
367 TxCarrierLost = 0x80000000,
370 RxMulticast = 0x8000,
372 RxBroadcast = 0x2000,
373 RxBadSymbol = 0x0020,
381 /* Bits in RxConfig. */
385 AcceptBroadcast = 0x08,
386 AcceptMulticast = 0x04,
388 AcceptAllPhys = 0x01,
391 /* Bits in TxConfig. */
392 enum tx_config_bits {
393 /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
395 TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */
396 TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */
397 TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */
398 TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */
400 TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
401 TxCRC = (1 << 16), /* DISABLE Tx pkt CRC append */
402 TxClearAbt = (1 << 0), /* Clear abort (WO) */
403 TxDMAShift = 8, /* DMA burst value (0-7) is shifted X many bits */
404 TxRetryShift = 4, /* TXRR value (0-15) is shifted X many bits */
406 TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
409 /* Bits in Config1 */
411 Cfg1_PM_Enable = 0x01,
412 Cfg1_VPD_Enable = 0x02,
415 LWAKE = 0x10, /* not on 8139, 8139A */
416 Cfg1_Driver_Load = 0x20,
419 SLEEP = (1 << 1), /* only on 8139, 8139A */
420 PWRDN = (1 << 0), /* only on 8139, 8139A */
423 /* Bits in Config3 */
425 Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */
426 Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
427 Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
428 Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */
429 Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */
430 Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
431 Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */
432 Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
435 /* Bits in Config4 */
437 LWPTN = (1 << 2), /* not on 8139, 8139A */
440 /* Bits in Config5 */
442 Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */
443 Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */
444 Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */
445 Cfg5_FIFOAddrPtr= (1 << 3), /* Realtek internal SRAM testing */
446 Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */
447 Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */
448 Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */
452 /* rx fifo threshold */
454 RxCfgFIFONone = (7 << RxCfgFIFOShift),
458 RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
460 /* rx ring buffer length */
462 RxCfgRcv16K = (1 << 11),
463 RxCfgRcv32K = (1 << 12),
464 RxCfgRcv64K = (1 << 11) | (1 << 12),
466 /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
470 /* Twister tuning parameters from RealTek.
471 Completely undocumented, but required to tune bad links on some boards. */
473 CSCR_LinkOKBit = 0x0400,
474 CSCR_LinkChangeBit = 0x0800,
475 CSCR_LinkStatusBits = 0x0f000,
476 CSCR_LinkDownOffCmd = 0x003c0,
477 CSCR_LinkDownCmd = 0x0f3c0,
482 Cfg9346_Unlock = 0xC0,
499 HasHltClk = (1 << 0),
503 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
504 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
505 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1)
507 /* directly indexed by chip_t, above */
508 static const struct {
510 u32 version; /* from RTL8139C/RTL8139D docs */
512 } rtl_chip_info[] = {
514 HW_REVID(1, 0, 0, 0, 0, 0, 0),
519 HW_REVID(1, 1, 0, 0, 0, 0, 0),
524 HW_REVID(1, 1, 1, 0, 0, 0, 0),
525 HasHltClk, /* XXX undocumented? */
529 HW_REVID(1, 1, 1, 0, 0, 1, 0),
530 HasHltClk, /* XXX undocumented? */
534 HW_REVID(1, 1, 1, 1, 0, 0, 0),
539 HW_REVID(1, 1, 1, 1, 1, 0, 0),
544 HW_REVID(1, 1, 1, 0, 1, 0, 0),
549 HW_REVID(1, 1, 1, 1, 0, 1, 0),
554 HW_REVID(1, 1, 1, 0, 1, 0, 1),
555 HasHltClk /* XXX undocumented? */
560 HW_REVID(1, 1, 1, 0, 1, 1, 1),
565 struct rtl_extra_stats {
566 unsigned long early_rx;
567 unsigned long tx_buf_mapped;
568 unsigned long tx_timeouts;
569 unsigned long rx_lost_in_ring;
572 struct rtl8139_stats {
575 struct u64_stats_sync syncp;
578 struct rtl8139_private {
579 void __iomem *mmio_addr;
581 struct pci_dev *pci_dev;
583 struct napi_struct napi;
584 struct net_device *dev;
586 unsigned char *rx_ring;
587 unsigned int cur_rx; /* RX buf index of next pkt */
588 struct rtl8139_stats rx_stats;
589 dma_addr_t rx_ring_dma;
591 unsigned int tx_flag;
592 unsigned long cur_tx;
593 unsigned long dirty_tx;
594 struct rtl8139_stats tx_stats;
595 unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */
596 unsigned char *tx_bufs; /* Tx bounce buffer region. */
597 dma_addr_t tx_bufs_dma;
599 signed char phys[4]; /* MII device addresses. */
601 /* Twister tune state. */
602 char twistie, twist_row, twist_col;
604 unsigned int watchdog_fired : 1;
605 unsigned int default_port : 4; /* Last dev->if_port value. */
606 unsigned int have_thread : 1;
613 struct rtl_extra_stats xstats;
615 struct delayed_work thread;
617 struct mii_if_info mii;
618 unsigned int regs_len;
619 unsigned long fifo_copy_timeout;
622 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
623 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
624 MODULE_LICENSE("GPL");
625 MODULE_VERSION(DRV_VERSION);
627 module_param(use_io, bool, 0);
628 MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO");
629 module_param(multicast_filter_limit, int, 0);
630 module_param_array(media, int, NULL, 0);
631 module_param_array(full_duplex, int, NULL, 0);
632 module_param(debug, int, 0);
633 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
634 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
635 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
636 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
638 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
639 static int rtl8139_open (struct net_device *dev);
640 static int mdio_read (struct net_device *dev, int phy_id, int location);
641 static void mdio_write (struct net_device *dev, int phy_id, int location,
643 static void rtl8139_start_thread(struct rtl8139_private *tp);
644 static void rtl8139_tx_timeout (struct net_device *dev);
645 static void rtl8139_init_ring (struct net_device *dev);
646 static netdev_tx_t rtl8139_start_xmit (struct sk_buff *skb,
647 struct net_device *dev);
648 #ifdef CONFIG_NET_POLL_CONTROLLER
649 static void rtl8139_poll_controller(struct net_device *dev);
651 static int rtl8139_set_mac_address(struct net_device *dev, void *p);
652 static int rtl8139_poll(struct napi_struct *napi, int budget);
653 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
654 static int rtl8139_close (struct net_device *dev);
655 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
656 static struct rtnl_link_stats64 *rtl8139_get_stats64(struct net_device *dev,
657 struct rtnl_link_stats64
659 static void rtl8139_set_rx_mode (struct net_device *dev);
660 static void __set_rx_mode (struct net_device *dev);
661 static void rtl8139_hw_start (struct net_device *dev);
662 static void rtl8139_thread (struct work_struct *work);
663 static void rtl8139_tx_timeout_task(struct work_struct *work);
664 static const struct ethtool_ops rtl8139_ethtool_ops;
666 /* write MMIO register, with flush */
667 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
668 #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
669 #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
670 #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
672 /* write MMIO register */
673 #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg))
674 #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg))
675 #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg))
677 /* read MMIO register */
678 #define RTL_R8(reg) ioread8 (ioaddr + (reg))
679 #define RTL_R16(reg) ioread16 (ioaddr + (reg))
680 #define RTL_R32(reg) ioread32 (ioaddr + (reg))
683 static const u16 rtl8139_intr_mask =
684 PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
685 TxErr | TxOK | RxErr | RxOK;
687 static const u16 rtl8139_norx_intr_mask =
688 PCIErr | PCSTimeout | RxUnderrun |
689 TxErr | TxOK | RxErr ;
692 static const unsigned int rtl8139_rx_config =
693 RxCfgRcv8K | RxNoWrap |
694 (RX_FIFO_THRESH << RxCfgFIFOShift) |
695 (RX_DMA_BURST << RxCfgDMAShift);
696 #elif RX_BUF_IDX == 1
697 static const unsigned int rtl8139_rx_config =
698 RxCfgRcv16K | RxNoWrap |
699 (RX_FIFO_THRESH << RxCfgFIFOShift) |
700 (RX_DMA_BURST << RxCfgDMAShift);
701 #elif RX_BUF_IDX == 2
702 static const unsigned int rtl8139_rx_config =
703 RxCfgRcv32K | RxNoWrap |
704 (RX_FIFO_THRESH << RxCfgFIFOShift) |
705 (RX_DMA_BURST << RxCfgDMAShift);
706 #elif RX_BUF_IDX == 3
707 static const unsigned int rtl8139_rx_config =
709 (RX_FIFO_THRESH << RxCfgFIFOShift) |
710 (RX_DMA_BURST << RxCfgDMAShift);
712 #error "Invalid configuration for 8139_RXBUF_IDX"
715 static const unsigned int rtl8139_tx_config =
716 TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
718 static void __rtl8139_cleanup_dev (struct net_device *dev)
720 struct rtl8139_private *tp = netdev_priv(dev);
721 struct pci_dev *pdev;
723 assert (dev != NULL);
724 assert (tp->pci_dev != NULL);
728 pci_iounmap (pdev, tp->mmio_addr);
730 /* it's ok to call this even if we have no regions to free */
731 pci_release_regions (pdev);
737 static void rtl8139_chip_reset (void __iomem *ioaddr)
741 /* Soft reset the chip. */
742 RTL_W8 (ChipCmd, CmdReset);
744 /* Check that the chip has finished the reset. */
745 for (i = 1000; i > 0; i--) {
747 if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
754 static struct net_device *rtl8139_init_board(struct pci_dev *pdev)
756 struct device *d = &pdev->dev;
757 void __iomem *ioaddr;
758 struct net_device *dev;
759 struct rtl8139_private *tp;
761 int rc, disable_dev_on_err = 0;
763 unsigned long io_len;
765 static const struct {
769 { IORESOURCE_IO, "PIO" },
770 { IORESOURCE_MEM, "MMIO" }
773 assert (pdev != NULL);
775 /* dev and priv zeroed in alloc_etherdev */
776 dev = alloc_etherdev (sizeof (*tp));
778 return ERR_PTR(-ENOMEM);
780 SET_NETDEV_DEV(dev, &pdev->dev);
782 tp = netdev_priv(dev);
785 /* enable device (incl. PCI PM wakeup and hotplug setup) */
786 rc = pci_enable_device (pdev);
790 rc = pci_request_regions (pdev, DRV_NAME);
793 disable_dev_on_err = 1;
795 pci_set_master (pdev);
797 u64_stats_init(&tp->rx_stats.syncp);
798 u64_stats_init(&tp->tx_stats.syncp);
801 /* PIO bar register comes first. */
804 io_len = pci_resource_len(pdev, bar);
806 dev_dbg(d, "%s region size = 0x%02lX\n", res[bar].type, io_len);
808 if (!(pci_resource_flags(pdev, bar) & res[bar].mask)) {
809 dev_err(d, "region #%d not a %s resource, aborting\n", bar,
814 if (io_len < RTL_MIN_IO_SIZE) {
815 dev_err(d, "Invalid PCI %s region size(s), aborting\n",
821 ioaddr = pci_iomap(pdev, bar, 0);
823 dev_err(d, "cannot map %s\n", res[bar].type);
831 tp->regs_len = io_len;
832 tp->mmio_addr = ioaddr;
834 /* Bring old chips out of low-power mode. */
835 RTL_W8 (HltClk, 'R');
837 /* check for missing/broken hardware */
838 if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
839 dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
844 /* identify chip attached to board */
845 version = RTL_R32 (TxConfig) & HW_REVID_MASK;
846 for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
847 if (version == rtl_chip_info[i].version) {
852 /* if unknown chip, assume array element #0, original RTL-8139 in this case */
854 dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n");
855 dev_dbg(&pdev->dev, "TxConfig = 0x%x\n", RTL_R32 (TxConfig));
859 pr_debug("chipset id (%d) == index %d, '%s'\n",
860 version, i, rtl_chip_info[i].name);
862 if (tp->chipset >= CH_8139B) {
863 u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
864 pr_debug("PCI PM wakeup\n");
865 if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
868 new_tmp8 |= Cfg1_PM_Enable;
869 if (new_tmp8 != tmp8) {
870 RTL_W8 (Cfg9346, Cfg9346_Unlock);
871 RTL_W8 (Config1, tmp8);
872 RTL_W8 (Cfg9346, Cfg9346_Lock);
874 if (rtl_chip_info[tp->chipset].flags & HasLWake) {
875 tmp8 = RTL_R8 (Config4);
877 RTL_W8 (Cfg9346, Cfg9346_Unlock);
878 RTL_W8 (Config4, tmp8 & ~LWPTN);
879 RTL_W8 (Cfg9346, Cfg9346_Lock);
883 pr_debug("Old chip wakeup\n");
884 tmp8 = RTL_R8 (Config1);
885 tmp8 &= ~(SLEEP | PWRDN);
886 RTL_W8 (Config1, tmp8);
889 rtl8139_chip_reset (ioaddr);
894 __rtl8139_cleanup_dev (dev);
895 if (disable_dev_on_err)
896 pci_disable_device (pdev);
900 static int rtl8139_set_features(struct net_device *dev, netdev_features_t features)
902 struct rtl8139_private *tp = netdev_priv(dev);
904 netdev_features_t changed = features ^ dev->features;
905 void __iomem *ioaddr = tp->mmio_addr;
907 if (!(changed & (NETIF_F_RXALL)))
910 spin_lock_irqsave(&tp->lock, flags);
912 if (changed & NETIF_F_RXALL) {
913 int rx_mode = tp->rx_config;
914 if (features & NETIF_F_RXALL)
915 rx_mode |= (AcceptErr | AcceptRunt);
917 rx_mode &= ~(AcceptErr | AcceptRunt);
918 tp->rx_config = rtl8139_rx_config | rx_mode;
919 RTL_W32_F(RxConfig, tp->rx_config);
922 spin_unlock_irqrestore(&tp->lock, flags);
927 static int rtl8139_change_mtu(struct net_device *dev, int new_mtu)
929 if (new_mtu < 68 || new_mtu > MAX_ETH_DATA_SIZE)
935 static const struct net_device_ops rtl8139_netdev_ops = {
936 .ndo_open = rtl8139_open,
937 .ndo_stop = rtl8139_close,
938 .ndo_get_stats64 = rtl8139_get_stats64,
939 .ndo_change_mtu = rtl8139_change_mtu,
940 .ndo_validate_addr = eth_validate_addr,
941 .ndo_set_mac_address = rtl8139_set_mac_address,
942 .ndo_start_xmit = rtl8139_start_xmit,
943 .ndo_set_rx_mode = rtl8139_set_rx_mode,
944 .ndo_do_ioctl = netdev_ioctl,
945 .ndo_tx_timeout = rtl8139_tx_timeout,
946 #ifdef CONFIG_NET_POLL_CONTROLLER
947 .ndo_poll_controller = rtl8139_poll_controller,
949 .ndo_set_features = rtl8139_set_features,
952 static int rtl8139_init_one(struct pci_dev *pdev,
953 const struct pci_device_id *ent)
955 struct net_device *dev = NULL;
956 struct rtl8139_private *tp;
957 int i, addr_len, option;
958 void __iomem *ioaddr;
959 static int board_idx = -1;
961 assert (pdev != NULL);
962 assert (ent != NULL);
966 /* when we're built into the kernel, the driver version message
967 * is only printed if at least one 8139 board has been found
971 static int printed_version;
972 if (!printed_version++)
973 pr_info(RTL8139_DRIVER_NAME "\n");
977 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
978 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
980 "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip, use 8139cp\n",
981 pdev->vendor, pdev->device, pdev->revision);
985 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
986 pdev->device == PCI_DEVICE_ID_REALTEK_8139 &&
987 pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS &&
988 pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) {
989 pr_info("OQO Model 2 detected. Forcing PIO\n");
993 dev = rtl8139_init_board (pdev);
997 assert (dev != NULL);
998 tp = netdev_priv(dev);
1001 ioaddr = tp->mmio_addr;
1002 assert (ioaddr != NULL);
1004 addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
1005 for (i = 0; i < 3; i++)
1006 ((__le16 *) (dev->dev_addr))[i] =
1007 cpu_to_le16(read_eeprom (ioaddr, i + 7, addr_len));
1009 /* The Rtl8139-specific entries in the device structure. */
1010 dev->netdev_ops = &rtl8139_netdev_ops;
1011 dev->ethtool_ops = &rtl8139_ethtool_ops;
1012 dev->watchdog_timeo = TX_TIMEOUT;
1013 netif_napi_add(dev, &tp->napi, rtl8139_poll, 64);
1015 /* note: the hardware is not capable of sg/csum/highdma, however
1016 * through the use of skb_copy_and_csum_dev we enable these
1019 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
1020 dev->vlan_features = dev->features;
1022 dev->hw_features |= NETIF_F_RXALL;
1023 dev->hw_features |= NETIF_F_RXFCS;
1025 /* tp zeroed and aligned in alloc_etherdev */
1026 tp = netdev_priv(dev);
1028 /* note: tp->chipset set in rtl8139_init_board */
1029 tp->drv_flags = board_info[ent->driver_data].hw_flags;
1030 tp->mmio_addr = ioaddr;
1032 (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
1033 spin_lock_init (&tp->lock);
1034 spin_lock_init (&tp->rx_lock);
1035 INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
1037 tp->mii.mdio_read = mdio_read;
1038 tp->mii.mdio_write = mdio_write;
1039 tp->mii.phy_id_mask = 0x3f;
1040 tp->mii.reg_num_mask = 0x1f;
1042 /* dev is fully set up and ready to use now */
1043 pr_debug("about to register device named %s (%p)...\n",
1045 i = register_netdev (dev);
1046 if (i) goto err_out;
1048 pci_set_drvdata (pdev, dev);
1050 netdev_info(dev, "%s at 0x%p, %pM, IRQ %d\n",
1051 board_info[ent->driver_data].name,
1052 ioaddr, dev->dev_addr, pdev->irq);
1054 netdev_dbg(dev, "Identified 8139 chip type '%s'\n",
1055 rtl_chip_info[tp->chipset].name);
1057 /* Find the connected MII xcvrs.
1058 Doing this in open() would allow detecting external xcvrs later, but
1059 takes too much time. */
1060 #ifdef CONFIG_8139TOO_8129
1061 if (tp->drv_flags & HAS_MII_XCVR) {
1062 int phy, phy_idx = 0;
1063 for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
1064 int mii_status = mdio_read(dev, phy, 1);
1065 if (mii_status != 0xffff && mii_status != 0x0000) {
1066 u16 advertising = mdio_read(dev, phy, 4);
1067 tp->phys[phy_idx++] = phy;
1068 netdev_info(dev, "MII transceiver %d status 0x%04x advertising %04x\n",
1069 phy, mii_status, advertising);
1073 netdev_info(dev, "No MII transceivers found! Assuming SYM transceiver\n");
1079 tp->mii.phy_id = tp->phys[0];
1081 /* The lower four bits are the media type. */
1082 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
1084 tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
1085 tp->default_port = option & 0xFF;
1086 if (tp->default_port)
1087 tp->mii.force_media = 1;
1089 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0)
1090 tp->mii.full_duplex = full_duplex[board_idx];
1091 if (tp->mii.full_duplex) {
1092 netdev_info(dev, "Media type forced to Full Duplex\n");
1093 /* Changing the MII-advertised media because might prevent
1095 tp->mii.force_media = 1;
1097 if (tp->default_port) {
1098 netdev_info(dev, " Forcing %dMbps %s-duplex operation\n",
1099 (option & 0x20 ? 100 : 10),
1100 (option & 0x10 ? "full" : "half"));
1101 mdio_write(dev, tp->phys[0], 0,
1102 ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */
1103 ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
1106 /* Put the chip into low-power mode. */
1107 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
1108 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */
1113 __rtl8139_cleanup_dev (dev);
1114 pci_disable_device (pdev);
1119 static void rtl8139_remove_one(struct pci_dev *pdev)
1121 struct net_device *dev = pci_get_drvdata (pdev);
1122 struct rtl8139_private *tp = netdev_priv(dev);
1124 assert (dev != NULL);
1126 cancel_delayed_work_sync(&tp->thread);
1128 unregister_netdev (dev);
1130 __rtl8139_cleanup_dev (dev);
1131 pci_disable_device (pdev);
1135 /* Serial EEPROM section. */
1137 /* EEPROM_Ctrl bits. */
1138 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
1139 #define EE_CS 0x08 /* EEPROM chip select. */
1140 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
1141 #define EE_WRITE_0 0x00
1142 #define EE_WRITE_1 0x02
1143 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
1144 #define EE_ENB (0x80 | EE_CS)
1146 /* Delay between EEPROM clock transitions.
1147 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
1150 #define eeprom_delay() (void)RTL_R8(Cfg9346)
1152 /* The EEPROM commands include the alway-set leading bit. */
1153 #define EE_WRITE_CMD (5)
1154 #define EE_READ_CMD (6)
1155 #define EE_ERASE_CMD (7)
1157 static int read_eeprom(void __iomem *ioaddr, int location, int addr_len)
1160 unsigned retval = 0;
1161 int read_cmd = location | (EE_READ_CMD << addr_len);
1163 RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
1164 RTL_W8 (Cfg9346, EE_ENB);
1167 /* Shift the read command bits out. */
1168 for (i = 4 + addr_len; i >= 0; i--) {
1169 int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
1170 RTL_W8 (Cfg9346, EE_ENB | dataval);
1172 RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
1175 RTL_W8 (Cfg9346, EE_ENB);
1178 for (i = 16; i > 0; i--) {
1179 RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
1182 (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
1184 RTL_W8 (Cfg9346, EE_ENB);
1188 /* Terminate the EEPROM access. */
1195 /* MII serial management: mostly bogus for now. */
1196 /* Read and write the MII management registers using software-generated
1197 serial MDIO protocol.
1198 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
1199 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
1200 "overclocking" issues. */
1201 #define MDIO_DIR 0x80
1202 #define MDIO_DATA_OUT 0x04
1203 #define MDIO_DATA_IN 0x02
1204 #define MDIO_CLK 0x01
1205 #define MDIO_WRITE0 (MDIO_DIR)
1206 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
1208 #define mdio_delay() RTL_R8(Config4)
1211 static const char mii_2_8139_map[8] = {
1223 #ifdef CONFIG_8139TOO_8129
1224 /* Syncronize the MII management interface by shifting 32 one bits out. */
1225 static void mdio_sync (void __iomem *ioaddr)
1229 for (i = 32; i >= 0; i--) {
1230 RTL_W8 (Config4, MDIO_WRITE1);
1232 RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
1238 static int mdio_read (struct net_device *dev, int phy_id, int location)
1240 struct rtl8139_private *tp = netdev_priv(dev);
1242 #ifdef CONFIG_8139TOO_8129
1243 void __iomem *ioaddr = tp->mmio_addr;
1244 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
1248 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
1249 void __iomem *ioaddr = tp->mmio_addr;
1250 return location < 8 && mii_2_8139_map[location] ?
1251 RTL_R16 (mii_2_8139_map[location]) : 0;
1254 #ifdef CONFIG_8139TOO_8129
1256 /* Shift the read command bits out. */
1257 for (i = 15; i >= 0; i--) {
1258 int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
1260 RTL_W8 (Config4, MDIO_DIR | dataval);
1262 RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
1266 /* Read the two transition, 16 data, and wire-idle bits. */
1267 for (i = 19; i > 0; i--) {
1268 RTL_W8 (Config4, 0);
1270 retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
1271 RTL_W8 (Config4, MDIO_CLK);
1276 return (retval >> 1) & 0xffff;
1280 static void mdio_write (struct net_device *dev, int phy_id, int location,
1283 struct rtl8139_private *tp = netdev_priv(dev);
1284 #ifdef CONFIG_8139TOO_8129
1285 void __iomem *ioaddr = tp->mmio_addr;
1286 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
1290 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
1291 void __iomem *ioaddr = tp->mmio_addr;
1292 if (location == 0) {
1293 RTL_W8 (Cfg9346, Cfg9346_Unlock);
1294 RTL_W16 (BasicModeCtrl, value);
1295 RTL_W8 (Cfg9346, Cfg9346_Lock);
1296 } else if (location < 8 && mii_2_8139_map[location])
1297 RTL_W16 (mii_2_8139_map[location], value);
1301 #ifdef CONFIG_8139TOO_8129
1304 /* Shift the command bits out. */
1305 for (i = 31; i >= 0; i--) {
1307 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
1308 RTL_W8 (Config4, dataval);
1310 RTL_W8 (Config4, dataval | MDIO_CLK);
1313 /* Clear out extra bits. */
1314 for (i = 2; i > 0; i--) {
1315 RTL_W8 (Config4, 0);
1317 RTL_W8 (Config4, MDIO_CLK);
1324 static int rtl8139_open (struct net_device *dev)
1326 struct rtl8139_private *tp = netdev_priv(dev);
1327 void __iomem *ioaddr = tp->mmio_addr;
1328 const int irq = tp->pci_dev->irq;
1331 retval = request_irq(irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev);
1335 tp->tx_bufs = dma_alloc_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
1336 &tp->tx_bufs_dma, GFP_KERNEL);
1337 tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
1338 &tp->rx_ring_dma, GFP_KERNEL);
1339 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
1343 dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
1344 tp->tx_bufs, tp->tx_bufs_dma);
1346 dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
1347 tp->rx_ring, tp->rx_ring_dma);
1353 napi_enable(&tp->napi);
1355 tp->mii.full_duplex = tp->mii.force_media;
1356 tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
1358 rtl8139_init_ring (dev);
1359 rtl8139_hw_start (dev);
1360 netif_start_queue (dev);
1362 netif_dbg(tp, ifup, dev,
1363 "%s() ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n",
1365 (unsigned long long)pci_resource_start (tp->pci_dev, 1),
1366 irq, RTL_R8 (MediaStatus),
1367 tp->mii.full_duplex ? "full" : "half");
1369 rtl8139_start_thread(tp);
1375 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
1377 struct rtl8139_private *tp = netdev_priv(dev);
1379 if (tp->phys[0] >= 0) {
1380 mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
1384 /* Start the hardware at open or resume. */
1385 static void rtl8139_hw_start (struct net_device *dev)
1387 struct rtl8139_private *tp = netdev_priv(dev);
1388 void __iomem *ioaddr = tp->mmio_addr;
1392 /* Bring old chips out of low-power mode. */
1393 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
1394 RTL_W8 (HltClk, 'R');
1396 rtl8139_chip_reset (ioaddr);
1398 /* unlock Config[01234] and BMCR register writes */
1399 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
1400 /* Restore our idea of the MAC address. */
1401 RTL_W32_F (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0)));
1402 RTL_W32_F (MAC0 + 4, le16_to_cpu (*(__le16 *) (dev->dev_addr + 4)));
1406 /* init Rx ring buffer DMA address */
1407 RTL_W32_F (RxBuf, tp->rx_ring_dma);
1409 /* Must enable Tx/Rx before setting transfer thresholds! */
1410 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1412 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
1413 RTL_W32 (RxConfig, tp->rx_config);
1414 RTL_W32 (TxConfig, rtl8139_tx_config);
1416 rtl_check_media (dev, 1);
1418 if (tp->chipset >= CH_8139B) {
1419 /* Disable magic packet scanning, which is enabled
1420 * when PM is enabled in Config1. It can be reenabled
1421 * via ETHTOOL_SWOL if desired. */
1422 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
1425 netdev_dbg(dev, "init buffer addresses\n");
1427 /* Lock Config[01234] and BMCR register writes */
1428 RTL_W8 (Cfg9346, Cfg9346_Lock);
1430 /* init Tx buffer DMA addresses */
1431 for (i = 0; i < NUM_TX_DESC; i++)
1432 RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
1434 RTL_W32 (RxMissed, 0);
1436 rtl8139_set_rx_mode (dev);
1438 /* no early-rx interrupts */
1439 RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
1441 /* make sure RxTx has started */
1442 tmp = RTL_R8 (ChipCmd);
1443 if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
1444 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1446 /* Enable all known interrupts by setting the interrupt mask. */
1447 RTL_W16 (IntrMask, rtl8139_intr_mask);
1451 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1452 static void rtl8139_init_ring (struct net_device *dev)
1454 struct rtl8139_private *tp = netdev_priv(dev);
1461 for (i = 0; i < NUM_TX_DESC; i++)
1462 tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
1466 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
1467 static int next_tick = 3 * HZ;
1469 #ifndef CONFIG_8139TOO_TUNE_TWISTER
1470 static inline void rtl8139_tune_twister (struct net_device *dev,
1471 struct rtl8139_private *tp) {}
1473 enum TwisterParamVals {
1474 PARA78_default = 0x78fa8388,
1475 PARA7c_default = 0xcb38de43, /* param[0][3] */
1476 PARA7c_xxx = 0xcb38de43,
1479 static const unsigned long param[4][4] = {
1480 {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
1481 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1482 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1483 {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
1486 static void rtl8139_tune_twister (struct net_device *dev,
1487 struct rtl8139_private *tp)
1490 void __iomem *ioaddr = tp->mmio_addr;
1492 /* This is a complicated state machine to configure the "twister" for
1493 impedance/echos based on the cable length.
1494 All of this is magic and undocumented.
1496 switch (tp->twistie) {
1498 if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
1499 /* We have link beat, let us tune the twister. */
1500 RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
1501 tp->twistie = 2; /* Change to state 2. */
1502 next_tick = HZ / 10;
1504 /* Just put in some reasonable defaults for when beat returns. */
1505 RTL_W16 (CSCR, CSCR_LinkDownCmd);
1506 RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */
1507 RTL_W32 (PARA78, PARA78_default);
1508 RTL_W32 (PARA7c, PARA7c_default);
1509 tp->twistie = 0; /* Bail from future actions. */
1513 /* Read how long it took to hear the echo. */
1514 linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
1515 if (linkcase == 0x7000)
1517 else if (linkcase == 0x3000)
1519 else if (linkcase == 0x1000)
1524 tp->twistie = 3; /* Change to state 2. */
1525 next_tick = HZ / 10;
1528 /* Put out four tuning parameters, one per 100msec. */
1529 if (tp->twist_col == 0)
1530 RTL_W16 (FIFOTMS, 0);
1531 RTL_W32 (PARA7c, param[(int) tp->twist_row]
1532 [(int) tp->twist_col]);
1533 next_tick = HZ / 10;
1534 if (++tp->twist_col >= 4) {
1535 /* For short cables we are done.
1536 For long cables (row == 3) check for mistune. */
1538 (tp->twist_row == 3) ? 4 : 0;
1542 /* Special case for long cables: check for mistune. */
1543 if ((RTL_R16 (CSCR) &
1544 CSCR_LinkStatusBits) == 0x7000) {
1548 RTL_W32 (PARA7c, 0xfb38de03);
1550 next_tick = HZ / 10;
1554 /* Retune for shorter cable (column 2). */
1555 RTL_W32 (FIFOTMS, 0x20);
1556 RTL_W32 (PARA78, PARA78_default);
1557 RTL_W32 (PARA7c, PARA7c_default);
1558 RTL_W32 (FIFOTMS, 0x00);
1562 next_tick = HZ / 10;
1570 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
1572 static inline void rtl8139_thread_iter (struct net_device *dev,
1573 struct rtl8139_private *tp,
1574 void __iomem *ioaddr)
1578 mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
1580 if (!tp->mii.force_media && mii_lpa != 0xffff) {
1581 int duplex = ((mii_lpa & LPA_100FULL) ||
1582 (mii_lpa & 0x01C0) == 0x0040);
1583 if (tp->mii.full_duplex != duplex) {
1584 tp->mii.full_duplex = duplex;
1587 netdev_info(dev, "Setting %s-duplex based on MII #%d link partner ability of %04x\n",
1588 tp->mii.full_duplex ? "full" : "half",
1589 tp->phys[0], mii_lpa);
1591 netdev_info(dev, "media is unconnected, link down, or incompatible connection\n");
1594 RTL_W8 (Cfg9346, Cfg9346_Unlock);
1595 RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
1596 RTL_W8 (Cfg9346, Cfg9346_Lock);
1601 next_tick = HZ * 60;
1603 rtl8139_tune_twister (dev, tp);
1605 netdev_dbg(dev, "Media selection tick, Link partner %04x\n",
1607 netdev_dbg(dev, "Other registers are IntMask %04x IntStatus %04x\n",
1608 RTL_R16(IntrMask), RTL_R16(IntrStatus));
1609 netdev_dbg(dev, "Chip config %02x %02x\n",
1610 RTL_R8(Config0), RTL_R8(Config1));
1613 static void rtl8139_thread (struct work_struct *work)
1615 struct rtl8139_private *tp =
1616 container_of(work, struct rtl8139_private, thread.work);
1617 struct net_device *dev = tp->mii.dev;
1618 unsigned long thr_delay = next_tick;
1622 if (!netif_running(dev))
1625 if (tp->watchdog_fired) {
1626 tp->watchdog_fired = 0;
1627 rtl8139_tx_timeout_task(work);
1629 rtl8139_thread_iter(dev, tp, tp->mmio_addr);
1631 if (tp->have_thread)
1632 schedule_delayed_work(&tp->thread, thr_delay);
1637 static void rtl8139_start_thread(struct rtl8139_private *tp)
1640 if (tp->chipset == CH_8139_K)
1642 else if (tp->drv_flags & HAS_LNK_CHNG)
1645 tp->have_thread = 1;
1646 tp->watchdog_fired = 0;
1648 schedule_delayed_work(&tp->thread, next_tick);
1651 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
1656 /* XXX account for unsent Tx packets in tp->stats.tx_dropped */
1659 static void rtl8139_tx_timeout_task (struct work_struct *work)
1661 struct rtl8139_private *tp =
1662 container_of(work, struct rtl8139_private, thread.work);
1663 struct net_device *dev = tp->mii.dev;
1664 void __iomem *ioaddr = tp->mmio_addr;
1668 netdev_dbg(dev, "Transmit timeout, status %02x %04x %04x media %02x\n",
1669 RTL_R8(ChipCmd), RTL_R16(IntrStatus),
1670 RTL_R16(IntrMask), RTL_R8(MediaStatus));
1671 /* Emit info to figure out what went wrong. */
1672 netdev_dbg(dev, "Tx queue start entry %ld dirty entry %ld\n",
1673 tp->cur_tx, tp->dirty_tx);
1674 for (i = 0; i < NUM_TX_DESC; i++)
1675 netdev_dbg(dev, "Tx descriptor %d is %08x%s\n",
1676 i, RTL_R32(TxStatus0 + (i * 4)),
1677 i == tp->dirty_tx % NUM_TX_DESC ?
1678 " (queue head)" : "");
1680 tp->xstats.tx_timeouts++;
1682 /* disable Tx ASAP, if not already */
1683 tmp8 = RTL_R8 (ChipCmd);
1684 if (tmp8 & CmdTxEnb)
1685 RTL_W8 (ChipCmd, CmdRxEnb);
1687 spin_lock_bh(&tp->rx_lock);
1688 /* Disable interrupts by clearing the interrupt mask. */
1689 RTL_W16 (IntrMask, 0x0000);
1691 /* Stop a shared interrupt from scavenging while we are. */
1692 spin_lock_irq(&tp->lock);
1693 rtl8139_tx_clear (tp);
1694 spin_unlock_irq(&tp->lock);
1696 /* ...and finally, reset everything */
1697 if (netif_running(dev)) {
1698 rtl8139_hw_start (dev);
1699 netif_wake_queue (dev);
1701 spin_unlock_bh(&tp->rx_lock);
1704 static void rtl8139_tx_timeout (struct net_device *dev)
1706 struct rtl8139_private *tp = netdev_priv(dev);
1708 tp->watchdog_fired = 1;
1709 if (!tp->have_thread) {
1710 INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
1711 schedule_delayed_work(&tp->thread, next_tick);
1715 static netdev_tx_t rtl8139_start_xmit (struct sk_buff *skb,
1716 struct net_device *dev)
1718 struct rtl8139_private *tp = netdev_priv(dev);
1719 void __iomem *ioaddr = tp->mmio_addr;
1721 unsigned int len = skb->len;
1722 unsigned long flags;
1724 /* Calculate the next Tx descriptor entry. */
1725 entry = tp->cur_tx % NUM_TX_DESC;
1727 /* Note: the chip doesn't have auto-pad! */
1728 if (likely(len < TX_BUF_SIZE)) {
1730 memset(tp->tx_buf[entry], 0, ETH_ZLEN);
1731 skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
1732 dev_kfree_skb_any(skb);
1734 dev_kfree_skb_any(skb);
1735 dev->stats.tx_dropped++;
1736 return NETDEV_TX_OK;
1739 spin_lock_irqsave(&tp->lock, flags);
1741 * Writing to TxStatus triggers a DMA transfer of the data
1742 * copied to tp->tx_buf[entry] above. Use a memory barrier
1743 * to make sure that the device sees the updated data.
1746 RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
1747 tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
1751 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
1752 netif_stop_queue (dev);
1753 spin_unlock_irqrestore(&tp->lock, flags);
1755 netif_dbg(tp, tx_queued, dev, "Queued Tx packet size %u to slot %d\n",
1758 return NETDEV_TX_OK;
1762 static void rtl8139_tx_interrupt (struct net_device *dev,
1763 struct rtl8139_private *tp,
1764 void __iomem *ioaddr)
1766 unsigned long dirty_tx, tx_left;
1768 assert (dev != NULL);
1769 assert (ioaddr != NULL);
1771 dirty_tx = tp->dirty_tx;
1772 tx_left = tp->cur_tx - dirty_tx;
1773 while (tx_left > 0) {
1774 int entry = dirty_tx % NUM_TX_DESC;
1777 txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
1779 if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
1780 break; /* It still hasn't been Txed */
1782 /* Note: TxCarrierLost is always asserted at 100mbps. */
1783 if (txstatus & (TxOutOfWindow | TxAborted)) {
1784 /* There was an major error, log it. */
1785 netif_dbg(tp, tx_err, dev, "Transmit error, Tx status %08x\n",
1787 dev->stats.tx_errors++;
1788 if (txstatus & TxAborted) {
1789 dev->stats.tx_aborted_errors++;
1790 RTL_W32 (TxConfig, TxClearAbt);
1791 RTL_W16 (IntrStatus, TxErr);
1794 if (txstatus & TxCarrierLost)
1795 dev->stats.tx_carrier_errors++;
1796 if (txstatus & TxOutOfWindow)
1797 dev->stats.tx_window_errors++;
1799 if (txstatus & TxUnderrun) {
1800 /* Add 64 to the Tx FIFO threshold. */
1801 if (tp->tx_flag < 0x00300000)
1802 tp->tx_flag += 0x00020000;
1803 dev->stats.tx_fifo_errors++;
1805 dev->stats.collisions += (txstatus >> 24) & 15;
1806 u64_stats_update_begin(&tp->tx_stats.syncp);
1807 tp->tx_stats.packets++;
1808 tp->tx_stats.bytes += txstatus & 0x7ff;
1809 u64_stats_update_end(&tp->tx_stats.syncp);
1816 #ifndef RTL8139_NDEBUG
1817 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
1818 netdev_err(dev, "Out-of-sync dirty pointer, %ld vs. %ld\n",
1819 dirty_tx, tp->cur_tx);
1820 dirty_tx += NUM_TX_DESC;
1822 #endif /* RTL8139_NDEBUG */
1824 /* only wake the queue if we did work, and the queue is stopped */
1825 if (tp->dirty_tx != dirty_tx) {
1826 tp->dirty_tx = dirty_tx;
1828 netif_wake_queue (dev);
1833 /* TODO: clean this up! Rx reset need not be this intensive */
1834 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1835 struct rtl8139_private *tp, void __iomem *ioaddr)
1838 #ifdef CONFIG_8139_OLD_RX_RESET
1842 netif_dbg(tp, rx_err, dev, "Ethernet frame had errors, status %08x\n",
1844 dev->stats.rx_errors++;
1845 if (!(rx_status & RxStatusOK)) {
1846 if (rx_status & RxTooLong) {
1847 netdev_dbg(dev, "Oversized Ethernet frame, status %04x!\n",
1849 /* A.C.: The chip hangs here. */
1851 if (rx_status & (RxBadSymbol | RxBadAlign))
1852 dev->stats.rx_frame_errors++;
1853 if (rx_status & (RxRunt | RxTooLong))
1854 dev->stats.rx_length_errors++;
1855 if (rx_status & RxCRCErr)
1856 dev->stats.rx_crc_errors++;
1858 tp->xstats.rx_lost_in_ring++;
1861 #ifndef CONFIG_8139_OLD_RX_RESET
1862 tmp8 = RTL_R8 (ChipCmd);
1863 RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
1864 RTL_W8 (ChipCmd, tmp8);
1865 RTL_W32 (RxConfig, tp->rx_config);
1868 /* Reset the receiver, based on RealTek recommendation. (Bug?) */
1870 /* disable receive */
1871 RTL_W8_F (ChipCmd, CmdTxEnb);
1873 while (--tmp_work > 0) {
1875 tmp8 = RTL_R8 (ChipCmd);
1876 if (!(tmp8 & CmdRxEnb))
1880 netdev_warn(dev, "rx stop wait too long\n");
1881 /* restart receive */
1883 while (--tmp_work > 0) {
1884 RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
1886 tmp8 = RTL_R8 (ChipCmd);
1887 if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
1891 netdev_warn(dev, "tx/rx enable wait too long\n");
1893 /* and reinitialize all rx related registers */
1894 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
1895 /* Must enable Tx/Rx before setting transfer thresholds! */
1896 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1898 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
1899 RTL_W32 (RxConfig, tp->rx_config);
1902 netdev_dbg(dev, "init buffer addresses\n");
1904 /* Lock Config[01234] and BMCR register writes */
1905 RTL_W8 (Cfg9346, Cfg9346_Lock);
1907 /* init Rx ring buffer DMA address */
1908 RTL_W32_F (RxBuf, tp->rx_ring_dma);
1910 /* A.C.: Reset the multicast list. */
1911 __set_rx_mode (dev);
1916 static inline void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
1917 u32 offset, unsigned int size)
1919 u32 left = RX_BUF_LEN - offset;
1922 skb_copy_to_linear_data(skb, ring + offset, left);
1923 skb_copy_to_linear_data_offset(skb, left, ring, size - left);
1925 skb_copy_to_linear_data(skb, ring + offset, size);
1929 static void rtl8139_isr_ack(struct rtl8139_private *tp)
1931 void __iomem *ioaddr = tp->mmio_addr;
1934 status = RTL_R16 (IntrStatus) & RxAckBits;
1936 /* Clear out errors and receive interrupts */
1937 if (likely(status != 0)) {
1938 if (unlikely(status & (RxFIFOOver | RxOverflow))) {
1939 tp->dev->stats.rx_errors++;
1940 if (status & RxFIFOOver)
1941 tp->dev->stats.rx_fifo_errors++;
1943 RTL_W16_F (IntrStatus, RxAckBits);
1947 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
1950 void __iomem *ioaddr = tp->mmio_addr;
1952 unsigned char *rx_ring = tp->rx_ring;
1953 unsigned int cur_rx = tp->cur_rx;
1954 unsigned int rx_size = 0;
1956 netdev_dbg(dev, "In %s(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n",
1957 __func__, (u16)cur_rx,
1958 RTL_R16(RxBufAddr), RTL_R16(RxBufPtr), RTL_R8(ChipCmd));
1960 while (netif_running(dev) && received < budget &&
1961 (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
1962 u32 ring_offset = cur_rx % RX_BUF_LEN;
1964 unsigned int pkt_size;
1965 struct sk_buff *skb;
1969 /* read size+status of next frame from DMA ring buffer */
1970 rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset));
1971 rx_size = rx_status >> 16;
1972 if (likely(!(dev->features & NETIF_F_RXFCS)))
1973 pkt_size = rx_size - 4;
1977 netif_dbg(tp, rx_status, dev, "%s() status %04x, size %04x, cur %04x\n",
1978 __func__, rx_status, rx_size, cur_rx);
1979 #if RTL8139_DEBUG > 2
1980 print_hex_dump(KERN_DEBUG, "Frame contents: ",
1981 DUMP_PREFIX_OFFSET, 16, 1,
1982 &rx_ring[ring_offset], 70, true);
1985 /* Packet copy from FIFO still in progress.
1986 * Theoretically, this should never happen
1987 * since EarlyRx is disabled.
1989 if (unlikely(rx_size == 0xfff0)) {
1990 if (!tp->fifo_copy_timeout)
1991 tp->fifo_copy_timeout = jiffies + 2;
1992 else if (time_after(jiffies, tp->fifo_copy_timeout)) {
1993 netdev_dbg(dev, "hung FIFO. Reset\n");
1997 netif_dbg(tp, intr, dev, "fifo copy in progress\n");
1998 tp->xstats.early_rx++;
2003 tp->fifo_copy_timeout = 0;
2005 /* If Rx err or invalid rx_size/rx_status received
2006 * (which happens if we get lost in the ring),
2007 * Rx process gets reset, so we abort any further
2010 if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
2012 (!(rx_status & RxStatusOK)))) {
2013 if ((dev->features & NETIF_F_RXALL) &&
2014 (rx_size <= (MAX_ETH_FRAME_SIZE + 4)) &&
2016 (!(rx_status & RxStatusOK))) {
2017 /* Length is at least mostly OK, but pkt has
2018 * error. I'm hoping we can handle some of these
2019 * errors without resetting the chip. --Ben
2021 dev->stats.rx_errors++;
2022 if (rx_status & RxCRCErr) {
2023 dev->stats.rx_crc_errors++;
2026 if (rx_status & RxRunt) {
2027 dev->stats.rx_length_errors++;
2031 rtl8139_rx_err (rx_status, dev, tp, ioaddr);
2037 /* Malloc up new buffer, compatible with net-2e. */
2038 /* Omit the four octet CRC from the length. */
2040 skb = napi_alloc_skb(&tp->napi, pkt_size);
2043 wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
2045 skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size);
2047 skb_put (skb, pkt_size);
2049 skb->protocol = eth_type_trans (skb, dev);
2051 u64_stats_update_begin(&tp->rx_stats.syncp);
2052 tp->rx_stats.packets++;
2053 tp->rx_stats.bytes += pkt_size;
2054 u64_stats_update_end(&tp->rx_stats.syncp);
2056 netif_receive_skb (skb);
2058 dev->stats.rx_dropped++;
2062 cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
2063 RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
2065 rtl8139_isr_ack(tp);
2068 if (unlikely(!received || rx_size == 0xfff0))
2069 rtl8139_isr_ack(tp);
2071 netdev_dbg(dev, "Done %s(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n",
2073 RTL_R16(RxBufAddr), RTL_R16(RxBufPtr), RTL_R8(ChipCmd));
2075 tp->cur_rx = cur_rx;
2078 * The receive buffer should be mostly empty.
2079 * Tell NAPI to reenable the Rx irq.
2081 if (tp->fifo_copy_timeout)
2089 static void rtl8139_weird_interrupt (struct net_device *dev,
2090 struct rtl8139_private *tp,
2091 void __iomem *ioaddr,
2092 int status, int link_changed)
2094 netdev_dbg(dev, "Abnormal interrupt, status %08x\n", status);
2096 assert (dev != NULL);
2097 assert (tp != NULL);
2098 assert (ioaddr != NULL);
2100 /* Update the error count. */
2101 dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
2102 RTL_W32 (RxMissed, 0);
2104 if ((status & RxUnderrun) && link_changed &&
2105 (tp->drv_flags & HAS_LNK_CHNG)) {
2106 rtl_check_media(dev, 0);
2107 status &= ~RxUnderrun;
2110 if (status & (RxUnderrun | RxErr))
2111 dev->stats.rx_errors++;
2113 if (status & PCSTimeout)
2114 dev->stats.rx_length_errors++;
2115 if (status & RxUnderrun)
2116 dev->stats.rx_fifo_errors++;
2117 if (status & PCIErr) {
2119 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
2120 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
2122 netdev_err(dev, "PCI Bus error %04x\n", pci_cmd_status);
2126 static int rtl8139_poll(struct napi_struct *napi, int budget)
2128 struct rtl8139_private *tp = container_of(napi, struct rtl8139_private, napi);
2129 struct net_device *dev = tp->dev;
2130 void __iomem *ioaddr = tp->mmio_addr;
2133 spin_lock(&tp->rx_lock);
2135 if (likely(RTL_R16(IntrStatus) & RxAckBits))
2136 work_done += rtl8139_rx(dev, tp, budget);
2138 if (work_done < budget) {
2139 unsigned long flags;
2141 * Order is important since data can get interrupted
2142 * again when we think we are done.
2144 spin_lock_irqsave(&tp->lock, flags);
2145 __napi_complete(napi);
2146 RTL_W16_F(IntrMask, rtl8139_intr_mask);
2147 spin_unlock_irqrestore(&tp->lock, flags);
2149 spin_unlock(&tp->rx_lock);
2154 /* The interrupt handler does all of the Rx thread work and cleans up
2155 after the Tx thread. */
2156 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
2158 struct net_device *dev = (struct net_device *) dev_instance;
2159 struct rtl8139_private *tp = netdev_priv(dev);
2160 void __iomem *ioaddr = tp->mmio_addr;
2161 u16 status, ackstat;
2162 int link_changed = 0; /* avoid bogus "uninit" warning */
2165 spin_lock (&tp->lock);
2166 status = RTL_R16 (IntrStatus);
2169 if (unlikely((status & rtl8139_intr_mask) == 0))
2174 /* h/w no longer present (hotplug?) or major error, bail */
2175 if (unlikely(status == 0xFFFF))
2178 /* close possible race's with dev_close */
2179 if (unlikely(!netif_running(dev))) {
2180 RTL_W16 (IntrMask, 0);
2184 /* Acknowledge all of the current interrupt sources ASAP, but
2185 an first get an additional status bit from CSCR. */
2186 if (unlikely(status & RxUnderrun))
2187 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
2189 ackstat = status & ~(RxAckBits | TxErr);
2191 RTL_W16 (IntrStatus, ackstat);
2193 /* Receive packets are processed by poll routine.
2194 If not running start it now. */
2195 if (status & RxAckBits){
2196 if (napi_schedule_prep(&tp->napi)) {
2197 RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
2198 __napi_schedule(&tp->napi);
2202 /* Check uncommon events with one test. */
2203 if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
2204 rtl8139_weird_interrupt (dev, tp, ioaddr,
2205 status, link_changed);
2207 if (status & (TxOK | TxErr)) {
2208 rtl8139_tx_interrupt (dev, tp, ioaddr);
2210 RTL_W16 (IntrStatus, TxErr);
2213 spin_unlock (&tp->lock);
2215 netdev_dbg(dev, "exiting interrupt, intr_status=%#4.4x\n",
2216 RTL_R16(IntrStatus));
2217 return IRQ_RETVAL(handled);
2220 #ifdef CONFIG_NET_POLL_CONTROLLER
2222 * Polling receive - used by netconsole and other diagnostic tools
2223 * to allow network i/o with interrupts disabled.
2225 static void rtl8139_poll_controller(struct net_device *dev)
2227 struct rtl8139_private *tp = netdev_priv(dev);
2228 const int irq = tp->pci_dev->irq;
2231 rtl8139_interrupt(irq, dev);
2236 static int rtl8139_set_mac_address(struct net_device *dev, void *p)
2238 struct rtl8139_private *tp = netdev_priv(dev);
2239 void __iomem *ioaddr = tp->mmio_addr;
2240 struct sockaddr *addr = p;
2242 if (!is_valid_ether_addr(addr->sa_data))
2243 return -EADDRNOTAVAIL;
2245 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2247 spin_lock_irq(&tp->lock);
2249 RTL_W8_F(Cfg9346, Cfg9346_Unlock);
2250 RTL_W32_F(MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
2251 RTL_W32_F(MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
2252 RTL_W8_F(Cfg9346, Cfg9346_Lock);
2254 spin_unlock_irq(&tp->lock);
2259 static int rtl8139_close (struct net_device *dev)
2261 struct rtl8139_private *tp = netdev_priv(dev);
2262 void __iomem *ioaddr = tp->mmio_addr;
2263 unsigned long flags;
2265 netif_stop_queue(dev);
2266 napi_disable(&tp->napi);
2268 netif_dbg(tp, ifdown, dev, "Shutting down ethercard, status was 0x%04x\n",
2269 RTL_R16(IntrStatus));
2271 spin_lock_irqsave (&tp->lock, flags);
2273 /* Stop the chip's Tx and Rx DMA processes. */
2274 RTL_W8 (ChipCmd, 0);
2276 /* Disable interrupts by clearing the interrupt mask. */
2277 RTL_W16 (IntrMask, 0);
2279 /* Update the error counts. */
2280 dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
2281 RTL_W32 (RxMissed, 0);
2283 spin_unlock_irqrestore (&tp->lock, flags);
2285 free_irq(tp->pci_dev->irq, dev);
2287 rtl8139_tx_clear (tp);
2289 dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
2290 tp->rx_ring, tp->rx_ring_dma);
2291 dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
2292 tp->tx_bufs, tp->tx_bufs_dma);
2296 /* Green! Put the chip in low-power mode. */
2297 RTL_W8 (Cfg9346, Cfg9346_Unlock);
2299 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
2300 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */
2306 /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to
2307 kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
2308 other threads or interrupts aren't messing with the 8139. */
2309 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2311 struct rtl8139_private *tp = netdev_priv(dev);
2312 void __iomem *ioaddr = tp->mmio_addr;
2314 spin_lock_irq(&tp->lock);
2315 if (rtl_chip_info[tp->chipset].flags & HasLWake) {
2316 u8 cfg3 = RTL_R8 (Config3);
2317 u8 cfg5 = RTL_R8 (Config5);
2319 wol->supported = WAKE_PHY | WAKE_MAGIC
2320 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
2323 if (cfg3 & Cfg3_LinkUp)
2324 wol->wolopts |= WAKE_PHY;
2325 if (cfg3 & Cfg3_Magic)
2326 wol->wolopts |= WAKE_MAGIC;
2327 /* (KON)FIXME: See how netdev_set_wol() handles the
2328 following constants. */
2329 if (cfg5 & Cfg5_UWF)
2330 wol->wolopts |= WAKE_UCAST;
2331 if (cfg5 & Cfg5_MWF)
2332 wol->wolopts |= WAKE_MCAST;
2333 if (cfg5 & Cfg5_BWF)
2334 wol->wolopts |= WAKE_BCAST;
2336 spin_unlock_irq(&tp->lock);
2340 /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes
2341 that wol points to kernel memory and other threads or interrupts
2342 aren't messing with the 8139. */
2343 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2345 struct rtl8139_private *tp = netdev_priv(dev);
2346 void __iomem *ioaddr = tp->mmio_addr;
2350 support = ((rtl_chip_info[tp->chipset].flags & HasLWake)
2351 ? (WAKE_PHY | WAKE_MAGIC
2352 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
2354 if (wol->wolopts & ~support)
2357 spin_lock_irq(&tp->lock);
2358 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
2359 if (wol->wolopts & WAKE_PHY)
2360 cfg3 |= Cfg3_LinkUp;
2361 if (wol->wolopts & WAKE_MAGIC)
2363 RTL_W8 (Cfg9346, Cfg9346_Unlock);
2364 RTL_W8 (Config3, cfg3);
2365 RTL_W8 (Cfg9346, Cfg9346_Lock);
2367 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
2368 /* (KON)FIXME: These are untested. We may have to set the
2369 CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
2371 if (wol->wolopts & WAKE_UCAST)
2373 if (wol->wolopts & WAKE_MCAST)
2375 if (wol->wolopts & WAKE_BCAST)
2377 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */
2378 spin_unlock_irq(&tp->lock);
2383 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2385 struct rtl8139_private *tp = netdev_priv(dev);
2386 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
2387 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
2388 strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info));
2389 info->regdump_len = tp->regs_len;
2392 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2394 struct rtl8139_private *tp = netdev_priv(dev);
2395 spin_lock_irq(&tp->lock);
2396 mii_ethtool_gset(&tp->mii, cmd);
2397 spin_unlock_irq(&tp->lock);
2401 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2403 struct rtl8139_private *tp = netdev_priv(dev);
2405 spin_lock_irq(&tp->lock);
2406 rc = mii_ethtool_sset(&tp->mii, cmd);
2407 spin_unlock_irq(&tp->lock);
2411 static int rtl8139_nway_reset(struct net_device *dev)
2413 struct rtl8139_private *tp = netdev_priv(dev);
2414 return mii_nway_restart(&tp->mii);
2417 static u32 rtl8139_get_link(struct net_device *dev)
2419 struct rtl8139_private *tp = netdev_priv(dev);
2420 return mii_link_ok(&tp->mii);
2423 static u32 rtl8139_get_msglevel(struct net_device *dev)
2425 struct rtl8139_private *tp = netdev_priv(dev);
2426 return tp->msg_enable;
2429 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
2431 struct rtl8139_private *tp = netdev_priv(dev);
2432 tp->msg_enable = datum;
2435 static int rtl8139_get_regs_len(struct net_device *dev)
2437 struct rtl8139_private *tp;
2438 /* TODO: we are too slack to do reg dumping for pio, for now */
2441 tp = netdev_priv(dev);
2442 return tp->regs_len;
2445 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
2447 struct rtl8139_private *tp;
2449 /* TODO: we are too slack to do reg dumping for pio, for now */
2452 tp = netdev_priv(dev);
2454 regs->version = RTL_REGS_VER;
2456 spin_lock_irq(&tp->lock);
2457 memcpy_fromio(regbuf, tp->mmio_addr, regs->len);
2458 spin_unlock_irq(&tp->lock);
2461 static int rtl8139_get_sset_count(struct net_device *dev, int sset)
2465 return RTL_NUM_STATS;
2471 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2473 struct rtl8139_private *tp = netdev_priv(dev);
2475 data[0] = tp->xstats.early_rx;
2476 data[1] = tp->xstats.tx_buf_mapped;
2477 data[2] = tp->xstats.tx_timeouts;
2478 data[3] = tp->xstats.rx_lost_in_ring;
2481 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2483 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2486 static const struct ethtool_ops rtl8139_ethtool_ops = {
2487 .get_drvinfo = rtl8139_get_drvinfo,
2488 .get_settings = rtl8139_get_settings,
2489 .set_settings = rtl8139_set_settings,
2490 .get_regs_len = rtl8139_get_regs_len,
2491 .get_regs = rtl8139_get_regs,
2492 .nway_reset = rtl8139_nway_reset,
2493 .get_link = rtl8139_get_link,
2494 .get_msglevel = rtl8139_get_msglevel,
2495 .set_msglevel = rtl8139_set_msglevel,
2496 .get_wol = rtl8139_get_wol,
2497 .set_wol = rtl8139_set_wol,
2498 .get_strings = rtl8139_get_strings,
2499 .get_sset_count = rtl8139_get_sset_count,
2500 .get_ethtool_stats = rtl8139_get_ethtool_stats,
2503 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2505 struct rtl8139_private *tp = netdev_priv(dev);
2508 if (!netif_running(dev))
2511 spin_lock_irq(&tp->lock);
2512 rc = generic_mii_ioctl(&tp->mii, if_mii(rq), cmd, NULL);
2513 spin_unlock_irq(&tp->lock);
2519 static struct rtnl_link_stats64 *
2520 rtl8139_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
2522 struct rtl8139_private *tp = netdev_priv(dev);
2523 void __iomem *ioaddr = tp->mmio_addr;
2524 unsigned long flags;
2527 if (netif_running(dev)) {
2528 spin_lock_irqsave (&tp->lock, flags);
2529 dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
2530 RTL_W32 (RxMissed, 0);
2531 spin_unlock_irqrestore (&tp->lock, flags);
2534 netdev_stats_to_stats64(stats, &dev->stats);
2537 start = u64_stats_fetch_begin_irq(&tp->rx_stats.syncp);
2538 stats->rx_packets = tp->rx_stats.packets;
2539 stats->rx_bytes = tp->rx_stats.bytes;
2540 } while (u64_stats_fetch_retry_irq(&tp->rx_stats.syncp, start));
2543 start = u64_stats_fetch_begin_irq(&tp->tx_stats.syncp);
2544 stats->tx_packets = tp->tx_stats.packets;
2545 stats->tx_bytes = tp->tx_stats.bytes;
2546 } while (u64_stats_fetch_retry_irq(&tp->tx_stats.syncp, start));
2551 /* Set or clear the multicast filter for this adaptor.
2552 This routine is not state sensitive and need not be SMP locked. */
2554 static void __set_rx_mode (struct net_device *dev)
2556 struct rtl8139_private *tp = netdev_priv(dev);
2557 void __iomem *ioaddr = tp->mmio_addr;
2558 u32 mc_filter[2]; /* Multicast hash filter */
2562 netdev_dbg(dev, "rtl8139_set_rx_mode(%04x) done -- Rx config %08x\n",
2563 dev->flags, RTL_R32(RxConfig));
2565 /* Note: do not reorder, GCC is clever about common statements. */
2566 if (dev->flags & IFF_PROMISC) {
2568 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2570 mc_filter[1] = mc_filter[0] = 0xffffffff;
2571 } else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
2572 (dev->flags & IFF_ALLMULTI)) {
2573 /* Too many to filter perfectly -- accept all multicasts. */
2574 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2575 mc_filter[1] = mc_filter[0] = 0xffffffff;
2577 struct netdev_hw_addr *ha;
2578 rx_mode = AcceptBroadcast | AcceptMyPhys;
2579 mc_filter[1] = mc_filter[0] = 0;
2580 netdev_for_each_mc_addr(ha, dev) {
2581 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2583 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2584 rx_mode |= AcceptMulticast;
2588 if (dev->features & NETIF_F_RXALL)
2589 rx_mode |= (AcceptErr | AcceptRunt);
2591 /* We can safely update without stopping the chip. */
2592 tmp = rtl8139_rx_config | rx_mode;
2593 if (tp->rx_config != tmp) {
2594 RTL_W32_F (RxConfig, tmp);
2595 tp->rx_config = tmp;
2597 RTL_W32_F (MAR0 + 0, mc_filter[0]);
2598 RTL_W32_F (MAR0 + 4, mc_filter[1]);
2601 static void rtl8139_set_rx_mode (struct net_device *dev)
2603 unsigned long flags;
2604 struct rtl8139_private *tp = netdev_priv(dev);
2606 spin_lock_irqsave (&tp->lock, flags);
2608 spin_unlock_irqrestore (&tp->lock, flags);
2613 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
2615 struct net_device *dev = pci_get_drvdata (pdev);
2616 struct rtl8139_private *tp = netdev_priv(dev);
2617 void __iomem *ioaddr = tp->mmio_addr;
2618 unsigned long flags;
2620 pci_save_state (pdev);
2622 if (!netif_running (dev))
2625 netif_device_detach (dev);
2627 spin_lock_irqsave (&tp->lock, flags);
2629 /* Disable interrupts, stop Tx and Rx. */
2630 RTL_W16 (IntrMask, 0);
2631 RTL_W8 (ChipCmd, 0);
2633 /* Update the error counts. */
2634 dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
2635 RTL_W32 (RxMissed, 0);
2637 spin_unlock_irqrestore (&tp->lock, flags);
2639 pci_set_power_state (pdev, PCI_D3hot);
2645 static int rtl8139_resume (struct pci_dev *pdev)
2647 struct net_device *dev = pci_get_drvdata (pdev);
2649 pci_restore_state (pdev);
2650 if (!netif_running (dev))
2652 pci_set_power_state (pdev, PCI_D0);
2653 rtl8139_init_ring (dev);
2654 rtl8139_hw_start (dev);
2655 netif_device_attach (dev);
2659 #endif /* CONFIG_PM */
2662 static struct pci_driver rtl8139_pci_driver = {
2664 .id_table = rtl8139_pci_tbl,
2665 .probe = rtl8139_init_one,
2666 .remove = rtl8139_remove_one,
2668 .suspend = rtl8139_suspend,
2669 .resume = rtl8139_resume,
2670 #endif /* CONFIG_PM */
2674 static int __init rtl8139_init_module (void)
2676 /* when we're a module, we always print a version message,
2677 * even if no 8139 board is found.
2680 pr_info(RTL8139_DRIVER_NAME "\n");
2683 return pci_register_driver(&rtl8139_pci_driver);
2687 static void __exit rtl8139_cleanup_module (void)
2689 pci_unregister_driver (&rtl8139_pci_driver);
2693 module_init(rtl8139_init_module);
2694 module_exit(rtl8139_cleanup_module);