drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38
  39 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  40         .read_crb                       = qlcnic_83xx_read_crb,
  41         .write_crb                      = qlcnic_83xx_write_crb,
  42         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  43         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  44         .get_mac_address                = qlcnic_83xx_get_mac_address,
  45         .setup_intr                     = qlcnic_83xx_setup_intr,
  46         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  47         .mbx_cmd                        = qlcnic_sriov_vf_mbx_op,
  48         .get_func_no                    = qlcnic_83xx_get_func_no,
  49         .api_lock                       = qlcnic_83xx_cam_lock,
  50         .api_unlock                     = qlcnic_83xx_cam_unlock,
  51         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  52         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  53         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  54         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  55         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  56         .setup_link_event               = qlcnic_83xx_setup_link_event,
  57         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  58         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  59         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  60         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  61         .napi_enable                    = qlcnic_83xx_napi_enable,
  62         .napi_disable                   = qlcnic_83xx_napi_disable,
  63         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  64         .config_rss                     = qlcnic_83xx_config_rss,
  65         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  66         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  67         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  68         .get_board_info                 = qlcnic_83xx_get_port_info,
  69         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  70 };
  71
  72 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  73         .config_bridged_mode    = qlcnic_config_bridged_mode,
  74         .config_led             = qlcnic_config_led,
  75         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  76         .napi_add               = qlcnic_83xx_napi_add,
  77         .napi_del               = qlcnic_83xx_napi_del,
  78         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  79         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  80 };
  81
  82 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  83         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  84         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  85         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  86         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  87 };
  88
  89 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  90 {
  91         return (val & (1 << QLC_BC_MSG)) ? true : false;
  92 }
  93
  94 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  95 {
  96         return (val & (1 << QLC_BC_CFREE)) ? true : false;
  97 }
  98
  99 static inline bool qlcnic_sriov_flr_check(u32 val)
 100 {
 101         return (val & (1 << QLC_BC_FLR)) ? true : false;
 102 }
 103
 104 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 105 {
 106         return (val >> 4) & 0xff;
 107 }
 108
 109 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 110 {
 111         struct pci_dev *dev = adapter->pdev;
 112         int pos;
 113         u16 stride, offset;
 114
 115         if (qlcnic_sriov_vf_check(adapter))
 116                 return 0;
 117
 118         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 119         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 120         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 121
 122         return (dev->devfn + offset + stride * vf_id) & 0xff;
 123 }
 124
 125 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 126 {
 127         struct qlcnic_sriov *sriov;
 128         struct qlcnic_back_channel *bc;
 129         struct workqueue_struct *wq;
 130         struct qlcnic_vport *vp;
 131         struct qlcnic_vf_info *vf;
 132         int err, i;
 133
 134         if (!qlcnic_sriov_enable_check(adapter))
 135                 return -EIO;
 136
 137         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 138         if (!sriov)
 139                 return -ENOMEM;
 140
 141         adapter->ahw->sriov = sriov;
 142         sriov->num_vfs = num_vfs;
 143         bc = &sriov->bc;
 144         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 145                                  num_vfs, GFP_KERNEL);
 146         if (!sriov->vf_info) {
 147                 err = -ENOMEM;
 148                 goto qlcnic_free_sriov;
 149         }
 150
 151         wq = create_singlethread_workqueue("bc-trans");
 152         if (wq == NULL) {
 153                 err = -ENOMEM;
 154                 dev_err(&adapter->pdev->dev,
 155                         "Cannot create bc-trans workqueue\n");
 156                 goto qlcnic_free_vf_info;
 157         }
 158
 159         bc->bc_trans_wq = wq;
 160
 161         wq = create_singlethread_workqueue("async");
 162         if (wq == NULL) {
 163                 err = -ENOMEM;
 164                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 165                 goto qlcnic_destroy_trans_wq;
 166         }
 167
 168         bc->bc_async_wq =  wq;
 169         INIT_LIST_HEAD(&bc->async_list);
 170
 171         for (i = 0; i < num_vfs; i++) {
 172                 vf = &sriov->vf_info[i];
 173                 vf->adapter = adapter;
 174                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 175                 mutex_init(&vf->send_cmd_lock);
 176                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 177                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 178                 spin_lock_init(&vf->rcv_act.lock);
 179                 spin_lock_init(&vf->rcv_pend.lock);
 180                 init_completion(&vf->ch_free_cmpl);
 181
 182                 if (qlcnic_sriov_pf_check(adapter)) {
 183                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 184                         if (!vp) {
 185                                 err = -ENOMEM;
 186                                 goto qlcnic_destroy_async_wq;
 187                         }
 188                         sriov->vf_info[i].vp = vp;
 189                         vp->max_tx_bw = MAX_BW;
 190                         random_ether_addr(vp->mac);
 191                         dev_info(&adapter->pdev->dev,
 192                                  "MAC Address %pM is configured for VF %d\n",
 193                                  vp->mac, i);
 194                 }
 195         }
 196
 197         return 0;
 198
 199 qlcnic_destroy_async_wq:
 200         destroy_workqueue(bc->bc_async_wq);
 201
 202 qlcnic_destroy_trans_wq:
 203         destroy_workqueue(bc->bc_trans_wq);
 204
 205 qlcnic_free_vf_info:
 206         kfree(sriov->vf_info);
 207
 208 qlcnic_free_sriov:
 209         kfree(adapter->ahw->sriov);
 210         return err;
 211 }
 212
 213 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 214 {
 215         struct qlcnic_bc_trans *trans;
 216         struct qlcnic_cmd_args cmd;
 217         unsigned long flags;
 218
 219         spin_lock_irqsave(&t_list->lock, flags);
 220
 221         while (!list_empty(&t_list->wait_list)) {
 222                 trans = list_first_entry(&t_list->wait_list,
 223                                          struct qlcnic_bc_trans, list);
 224                 list_del(&trans->list);
 225                 t_list->count--;
 226                 cmd.req.arg = (u32 *)trans->req_pay;
 227                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 228                 qlcnic_free_mbx_args(&cmd);
 229                 qlcnic_sriov_cleanup_transaction(trans);
 230         }
 231
 232         spin_unlock_irqrestore(&t_list->lock, flags);
 233 }
 234
 235 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 236 {
 237         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 238         struct qlcnic_back_channel *bc = &sriov->bc;
 239         struct qlcnic_vf_info *vf;
 240         int i;
 241
 242         if (!qlcnic_sriov_enable_check(adapter))
 243                 return;
 244
 245         qlcnic_sriov_cleanup_async_list(bc);
 246         destroy_workqueue(bc->bc_async_wq);
 247
 248         for (i = 0; i < sriov->num_vfs; i++) {
 249                 vf = &sriov->vf_info[i];
 250                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 251                 cancel_work_sync(&vf->trans_work);
 252                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 253         }
 254
 255         destroy_workqueue(bc->bc_trans_wq);
 256
 257         for (i = 0; i < sriov->num_vfs; i++)
 258                 kfree(sriov->vf_info[i].vp);
 259
 260         kfree(sriov->vf_info);
 261         kfree(adapter->ahw->sriov);
 262 }
 263
 264 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 265 {
 266         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 267         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 268         __qlcnic_sriov_cleanup(adapter);
 269 }
 270
 271 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 272 {
 273         if (qlcnic_sriov_pf_check(adapter))
 274                 qlcnic_sriov_pf_cleanup(adapter);
 275
 276         if (qlcnic_sriov_vf_check(adapter))
 277                 qlcnic_sriov_vf_cleanup(adapter);
 278 }
 279
 280 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 281                                     u32 *pay, u8 pci_func, u8 size)
 282 {
 283         struct qlcnic_hardware_context *ahw = adapter->ahw;
 284         unsigned long flags;
 285         u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, val;
 286         u16 opcode;
 287         u8 mbx_err_code;
 288         int i, j;
 289
 290         opcode = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 291
 292         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
 293                 dev_info(&adapter->pdev->dev,
 294                          "Mailbox cmd attempted, 0x%x\n", opcode);
 295                 dev_info(&adapter->pdev->dev, "Mailbox detached\n");
 296                 return 0;
 297         }
 298
 299         spin_lock_irqsave(&ahw->mbx_lock, flags);
 300
 301         mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
 302         if (mbx_val) {
 303                 QLCDB(adapter, DRV, "Mailbox cmd attempted, 0x%x\n", opcode);
 304                 spin_unlock_irqrestore(&ahw->mbx_lock, flags);
 305                 return QLCNIC_RCODE_TIMEOUT;
 306         }
 307         /* Fill in mailbox registers */
 308         val = size + (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 309         mbx_cmd = 0x31 | (val << 16) | (adapter->ahw->fw_hal_version << 29);
 310
 311         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
 312         mbx_cmd = 0x1 | (1 << 4);
 313
 314         if (qlcnic_sriov_pf_check(adapter))
 315                 mbx_cmd |= (pci_func << 5);
 316
 317         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1));
 318         for (i = 2, j = 0; j < (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 319                         i++, j++) {
 320                 writel(*(hdr++), QLCNIC_MBX_HOST(ahw, i));
 321         }
 322         for (j = 0; j < size; j++, i++)
 323                 writel(*(pay++), QLCNIC_MBX_HOST(ahw, i));
 324
 325         /* Signal FW about the impending command */
 326         QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
 327
 328         /* Waiting for the mailbox cmd to complete and while waiting here
 329          * some AEN might arrive. If more than 5 seconds expire we can
 330          * assume something is wrong.
 331          */
 332 poll:
 333         rsp = qlcnic_83xx_mbx_poll(adapter);
 334         if (rsp != QLCNIC_RCODE_TIMEOUT) {
 335                 /* Get the FW response data */
 336                 fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
 337                 if (fw_data &  QLCNIC_MBX_ASYNC_EVENT) {
 338                         __qlcnic_83xx_process_aen(adapter);
 339                         mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
 340                         if (mbx_val)
 341                                 goto poll;
 342                 }
 343                 mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
 344                 rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
 345                 opcode = QLCNIC_MBX_RSP(fw_data);
 346
 347                 switch (mbx_err_code) {
 348                 case QLCNIC_MBX_RSP_OK:
 349                 case QLCNIC_MBX_PORT_RSP_OK:
 350                         rsp = QLCNIC_RCODE_SUCCESS;
 351                         break;
 352                 default:
 353                         if (opcode == QLCNIC_CMD_CONFIG_MAC_VLAN) {
 354                                 rsp = qlcnic_83xx_mac_rcode(adapter);
 355                                 if (!rsp)
 356                                         goto out;
 357                         }
 358                         dev_err(&adapter->pdev->dev,
 359                                 "MBX command 0x%x failed with err:0x%x\n",
 360                                 opcode, mbx_err_code);
 361                         rsp = mbx_err_code;
 362                         break;
 363                 }
 364                 goto out;
 365         }
 366
 367         dev_err(&adapter->pdev->dev, "MBX command 0x%x timed out\n",
 368                 QLCNIC_MBX_RSP(mbx_cmd));
 369         rsp = QLCNIC_RCODE_TIMEOUT;
 370 out:
 371         /* clear fw mbx control register */
 372         QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
 373         spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
 374         return rsp;
 375 }
 376
 377 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 378 {
 379         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 380         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 381         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 382         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 383         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 384         adapter->max_rds_rings = MAX_RDS_RINGS;
 385 }
 386
 387 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 388                                    struct qlcnic_info *npar_info, u16 vport_id)
 389 {
 390         struct device *dev = &adapter->pdev->dev;
 391         struct qlcnic_cmd_args cmd;
 392         int err;
 393         u32 status;
 394
 395         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 396         if (err)
 397                 return err;
 398
 399         cmd.req.arg[1] = vport_id << 16 | 0x1;
 400         err = qlcnic_issue_cmd(adapter, &cmd);
 401         if (err) {
 402                 dev_err(&adapter->pdev->dev,
 403                         "Failed to get vport info, err=%d\n", err);
 404                 qlcnic_free_mbx_args(&cmd);
 405                 return err;
 406         }
 407
 408         status = cmd.rsp.arg[2] & 0xffff;
 409         if (status & BIT_0)
 410                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 411         if (status & BIT_1)
 412                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 413         if (status & BIT_2)
 414                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 415         if (status & BIT_3)
 416                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 417         if (status & BIT_4)
 418                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 419         if (status & BIT_5)
 420                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 421         if (status & BIT_6)
 422                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 423         if (status & BIT_7)
 424                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 425         if (status & BIT_8)
 426                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 427         if (status & BIT_9)
 428                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 429
 430         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 431         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 432         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 433         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 434
 435         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 436                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 437                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 438                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 439                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 440                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 441                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 442                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 443                  npar_info->max_rx_mcast_mac_filters,
 444                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 445                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 446                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 447                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 448                  npar_info->max_remote_ipv6_addrs);
 449
 450         qlcnic_free_mbx_args(&cmd);
 451         return err;
 452 }
 453
 454 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 455                                       struct qlcnic_cmd_args *cmd)
 456 {
 457         adapter->rx_pvid = (cmd->rsp.arg[1] >> 16) & 0xffff;
 458         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 459         return 0;
 460 }
 461
 462 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 463                                             struct qlcnic_cmd_args *cmd)
 464 {
 465         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 466         int i, num_vlans;
 467         u16 *vlans;
 468
 469         if (sriov->allowed_vlans)
 470                 return 0;
 471
 472         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 473         if (!sriov->any_vlan)
 474                 return 0;
 475
 476         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 477         num_vlans = sriov->num_allowed_vlans;
 478         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 479         if (!sriov->allowed_vlans)
 480                 return -ENOMEM;
 481
 482         vlans = (u16 *)&cmd->rsp.arg[3];
 483         for (i = 0; i < num_vlans; i++)
 484                 sriov->allowed_vlans[i] = vlans[i];
 485
 486         return 0;
 487 }
 488
 489 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 490 {
 491         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 492         struct qlcnic_cmd_args cmd;
 493         int ret;
 494
 495         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 496         if (ret)
 497                 return ret;
 498
 499         ret = qlcnic_issue_cmd(adapter, &cmd);
 500         if (ret) {
 501                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 502                         ret);
 503         } else {
 504                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 505                 switch (sriov->vlan_mode) {
 506                 case QLC_GUEST_VLAN_MODE:
 507                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 508                         break;
 509                 case QLC_PVID_MODE:
 510                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 511                         break;
 512                 }
 513         }
 514
 515         qlcnic_free_mbx_args(&cmd);
 516         return ret;
 517 }
 518
 519 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 520 {
 521         struct qlcnic_info nic_info;
 522         struct qlcnic_hardware_context *ahw = adapter->ahw;
 523         int err;
 524
 525         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 526         if (err)
 527                 return err;
 528
 529         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 530         if (err)
 531                 return -EIO;
 532
 533         err = qlcnic_sriov_get_vf_acl(adapter);
 534         if (err)
 535                 return err;
 536
 537         if (qlcnic_83xx_get_port_info(adapter))
 538                 return -EIO;
 539
 540         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 541         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 542         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 543                  adapter->ahw->fw_hal_version);
 544
 545         ahw->physical_port = (u8) nic_info.phys_port;
 546         ahw->switch_mode = nic_info.switch_mode;
 547         ahw->max_mtu = nic_info.max_mtu;
 548         ahw->op_mode = nic_info.op_mode;
 549         ahw->capabilities = nic_info.capabilities;
 550         return 0;
 551 }
 552
 553 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 554                                  int pci_using_dac)
 555 {
 556         int err;
 557
 558         INIT_LIST_HEAD(&adapter->vf_mc_list);
 559         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 560                 dev_warn(&adapter->pdev->dev,
 561                          "83xx adapter do not support MSI interrupts\n");
 562
 563         err = qlcnic_setup_intr(adapter, 1);
 564         if (err) {
 565                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 566                 goto err_out_disable_msi;
 567         }
 568
 569         err = qlcnic_83xx_setup_mbx_intr(adapter);
 570         if (err)
 571                 goto err_out_disable_msi;
 572
 573         err = qlcnic_sriov_init(adapter, 1);
 574         if (err)
 575                 goto err_out_disable_mbx_intr;
 576
 577         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 578         if (err)
 579                 goto err_out_cleanup_sriov;
 580
 581         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 582         if (err)
 583                 goto err_out_disable_bc_intr;
 584
 585         err = qlcnic_sriov_vf_init_driver(adapter);
 586         if (err)
 587                 goto err_out_send_channel_term;
 588
 589         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 590         if (err)
 591                 goto err_out_send_channel_term;
 592
 593         pci_set_drvdata(adapter->pdev, adapter);
 594         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 595                  adapter->netdev->name);
 596         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 597                              adapter->ahw->idc.delay);
 598         return 0;
 599
 600 err_out_send_channel_term:
 601         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 602
 603 err_out_disable_bc_intr:
 604         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 605
 606 err_out_cleanup_sriov:
 607         __qlcnic_sriov_cleanup(adapter);
 608
 609 err_out_disable_mbx_intr:
 610         qlcnic_83xx_free_mbx_intr(adapter);
 611
 612 err_out_disable_msi:
 613         qlcnic_teardown_intr(adapter);
 614         return err;
 615 }
 616
 617 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 618 {
 619         u32 state;
 620
 621         do {
 622                 msleep(20);
 623                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 624                         return -EIO;
 625                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 626         } while (state != QLC_83XX_IDC_DEV_READY);
 627
 628         return 0;
 629 }
 630
 631 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 632 {
 633         struct qlcnic_hardware_context *ahw = adapter->ahw;
 634         int err;
 635
 636         spin_lock_init(&ahw->mbx_lock);
 637         set_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
 638         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 639         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 640         ahw->reset_context = 0;
 641         adapter->fw_fail_cnt = 0;
 642         ahw->msix_supported = 1;
 643         adapter->need_fw_reset = 0;
 644         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 645
 646         err = qlcnic_sriov_check_dev_ready(adapter);
 647         if (err)
 648                 return err;
 649
 650         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 651         if (err)
 652                 return err;
 653
 654         if (qlcnic_read_mac_addr(adapter))
 655                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 656
 657         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 658         return 0;
 659 }
 660
 661 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 662 {
 663         struct qlcnic_hardware_context *ahw = adapter->ahw;
 664
 665         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 666         dev_info(&adapter->pdev->dev,
 667                  "HAL Version: %d Non Privileged SRIOV function\n",
 668                  ahw->fw_hal_version);
 669         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 670         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 671         return;
 672 }
 673
 674 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 675 {
 676         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 677         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 678         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 679 }
 680
 681 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 682 {
 683         u32 pay_size;
 684
 685         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 686
 687         if (pay_size)
 688                 pay_size = QLC_BC_PAYLOAD_SZ;
 689         else
 690                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 691
 692         return pay_size;
 693 }
 694
 695 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 696 {
 697         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 698         u8 i;
 699
 700         if (qlcnic_sriov_vf_check(adapter))
 701                 return 0;
 702
 703         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 704                 if (vf_info[i].pci_func == pci_func)
 705                         return i;
 706         }
 707
 708         return -EINVAL;
 709 }
 710
 711 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 712 {
 713         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 714         if (!*trans)
 715                 return -ENOMEM;
 716
 717         init_completion(&(*trans)->resp_cmpl);
 718         return 0;
 719 }
 720
 721 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 722                                             u32 size)
 723 {
 724         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 725         if (!*hdr)
 726                 return -ENOMEM;
 727
 728         return 0;
 729 }
 730
 731 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 732 {
 733         const struct qlcnic_mailbox_metadata *mbx_tbl;
 734         int i, size;
 735
 736         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 737         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 738
 739         for (i = 0; i < size; i++) {
 740                 if (type == mbx_tbl[i].cmd) {
 741                         mbx->op_type = QLC_BC_CMD;
 742                         mbx->req.num = mbx_tbl[i].in_args;
 743                         mbx->rsp.num = mbx_tbl[i].out_args;
 744                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 745                                                GFP_ATOMIC);
 746                         if (!mbx->req.arg)
 747                                 return -ENOMEM;
 748                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 749                                                GFP_ATOMIC);
 750                         if (!mbx->rsp.arg) {
 751                                 kfree(mbx->req.arg);
 752                                 mbx->req.arg = NULL;
 753                                 return -ENOMEM;
 754                         }
 755                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 756                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 757                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 758                                            (3 << 29));
 759                         return 0;
 760                 }
 761         }
 762         return -EINVAL;
 763 }
 764
 765 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 766                                        struct qlcnic_cmd_args *cmd,
 767                                        u16 seq, u8 msg_type)
 768 {
 769         struct qlcnic_bc_hdr *hdr;
 770         int i;
 771         u32 num_regs, bc_pay_sz;
 772         u16 remainder;
 773         u8 cmd_op, num_frags, t_num_frags;
 774
 775         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 776         if (msg_type == QLC_BC_COMMAND) {
 777                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 778                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 779                 num_regs = cmd->req.num;
 780                 trans->req_pay_size = (num_regs * 4);
 781                 num_regs = cmd->rsp.num;
 782                 trans->rsp_pay_size = (num_regs * 4);
 783                 cmd_op = cmd->req.arg[0] & 0xff;
 784                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 785                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 786                 if (remainder)
 787                         num_frags++;
 788                 t_num_frags = num_frags;
 789                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 790                         return -ENOMEM;
 791                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 792                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 793                 if (remainder)
 794                         num_frags++;
 795                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 796                         return -ENOMEM;
 797                 num_frags  = t_num_frags;
 798                 hdr = trans->req_hdr;
 799         }  else {
 800                 cmd->req.arg = (u32 *)trans->req_pay;
 801                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 802                 cmd_op = cmd->req.arg[0] & 0xff;
 803                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 804                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 805                 if (remainder)
 806                         num_frags++;
 807                 cmd->req.num = trans->req_pay_size / 4;
 808                 cmd->rsp.num = trans->rsp_pay_size / 4;
 809                 hdr = trans->rsp_hdr;
 810         }
 811
 812         trans->trans_id = seq;
 813         trans->cmd_id = cmd_op;
 814         for (i = 0; i < num_frags; i++) {
 815                 hdr[i].version = 2;
 816                 hdr[i].msg_type = msg_type;
 817                 hdr[i].op_type = cmd->op_type;
 818                 hdr[i].num_cmds = 1;
 819                 hdr[i].num_frags = num_frags;
 820                 hdr[i].frag_num = i + 1;
 821                 hdr[i].cmd_op = cmd_op;
 822                 hdr[i].seq_id = seq;
 823         }
 824         return 0;
 825 }
 826
 827 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 828 {
 829         if (!trans)
 830                 return;
 831         kfree(trans->req_hdr);
 832         kfree(trans->rsp_hdr);
 833         kfree(trans);
 834 }
 835
 836 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 837                                     struct qlcnic_bc_trans *trans, u8 type)
 838 {
 839         struct qlcnic_trans_list *t_list;
 840         unsigned long flags;
 841         int ret = 0;
 842
 843         if (type == QLC_BC_RESPONSE) {
 844                 t_list = &vf->rcv_act;
 845                 spin_lock_irqsave(&t_list->lock, flags);
 846                 t_list->count--;
 847                 list_del(&trans->list);
 848                 if (t_list->count > 0)
 849                         ret = 1;
 850                 spin_unlock_irqrestore(&t_list->lock, flags);
 851         }
 852         if (type == QLC_BC_COMMAND) {
 853                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 854                         msleep(100);
 855                 vf->send_cmd = NULL;
 856                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 857         }
 858         return ret;
 859 }
 860
 861 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 862                                          struct qlcnic_vf_info *vf,
 863                                          work_func_t func)
 864 {
 865         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 866             vf->adapter->need_fw_reset)
 867                 return;
 868
 869         INIT_WORK(&vf->trans_work, func);
 870         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 871 }
 872
 873 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 874 {
 875         struct completion *cmpl = &trans->resp_cmpl;
 876
 877         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 878                 trans->trans_state = QLC_END;
 879         else
 880                 trans->trans_state = QLC_ABORT;
 881
 882         return;
 883 }
 884
 885 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 886                                             u8 type)
 887 {
 888         if (type == QLC_BC_RESPONSE) {
 889                 trans->curr_rsp_frag++;
 890                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 891                         trans->trans_state = QLC_INIT;
 892                 else
 893                         trans->trans_state = QLC_END;
 894         } else {
 895                 trans->curr_req_frag++;
 896                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 897                         trans->trans_state = QLC_INIT;
 898                 else
 899                         trans->trans_state = QLC_WAIT_FOR_RESP;
 900         }
 901 }
 902
 903 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 904                                                u8 type)
 905 {
 906         struct qlcnic_vf_info *vf = trans->vf;
 907         struct completion *cmpl = &vf->ch_free_cmpl;
 908
 909         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 910                 trans->trans_state = QLC_ABORT;
 911                 return;
 912         }
 913
 914         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 915         qlcnic_sriov_handle_multi_frags(trans, type);
 916 }
 917
 918 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 919                                      u32 *hdr, u32 *pay, u32 size)
 920 {
 921         struct qlcnic_hardware_context *ahw = adapter->ahw;
 922         u32 fw_mbx;
 923         u8 i, max = 2, hdr_size, j;
 924
 925         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 926         max = (size / sizeof(u32)) + hdr_size;
 927
 928         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 929         for (i = 2, j = 0; j < hdr_size; i++, j++)
 930                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 931         for (; j < max; i++, j++)
 932                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 933 }
 934
 935 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 936 {
 937         int ret = -EBUSY;
 938         u32 timeout = 10000;
 939
 940         do {
 941                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 942                         ret = 0;
 943                         break;
 944                 }
 945                 mdelay(1);
 946         } while (--timeout);
 947
 948         return ret;
 949 }
 950
 951 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 952 {
 953         struct qlcnic_vf_info *vf = trans->vf;
 954         u32 pay_size, hdr_size;
 955         u32 *hdr, *pay;
 956         int ret;
 957         u8 pci_func = trans->func_id;
 958
 959         if (__qlcnic_sriov_issue_bc_post(vf))
 960                 return -EBUSY;
 961
 962         if (type == QLC_BC_COMMAND) {
 963                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 964                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 965                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 966                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 967                                                        trans->curr_req_frag);
 968                 pay_size = (pay_size / sizeof(u32));
 969         } else {
 970                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 971                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 972                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 973                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 974                                                        trans->curr_rsp_frag);
 975                 pay_size = (pay_size / sizeof(u32));
 976         }
 977
 978         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 979                                        pci_func, pay_size);
 980         return ret;
 981 }
 982
 983 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 984                                       struct qlcnic_vf_info *vf, u8 type)
 985 {
 986         bool flag = true;
 987         int err = -EIO;
 988
 989         while (flag) {
 990                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 991                     vf->adapter->need_fw_reset)
 992                         trans->trans_state = QLC_ABORT;
 993
 994                 switch (trans->trans_state) {
 995                 case QLC_INIT:
 996                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 997                         if (qlcnic_sriov_issue_bc_post(trans, type))
 998                                 trans->trans_state = QLC_ABORT;
 999                         break;
1000                 case QLC_WAIT_FOR_CHANNEL_FREE:
1001                         qlcnic_sriov_wait_for_channel_free(trans, type);
1002                         break;
1003                 case QLC_WAIT_FOR_RESP:
1004                         qlcnic_sriov_wait_for_resp(trans);
1005                         break;
1006                 case QLC_END:
1007                         err = 0;
1008                         flag = false;
1009                         break;
1010                 case QLC_ABORT:
1011                         err = -EIO;
1012                         flag = false;
1013                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
1014                         break;
1015                 default:
1016                         err = -EIO;
1017                         flag = false;
1018                 }
1019         }
1020         return err;
1021 }
1022
1023 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
1024                                     struct qlcnic_bc_trans *trans, int pci_func)
1025 {
1026         struct qlcnic_vf_info *vf;
1027         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
1028
1029         if (index < 0)
1030                 return -EIO;
1031
1032         vf = &adapter->ahw->sriov->vf_info[index];
1033         trans->vf = vf;
1034         trans->func_id = pci_func;
1035
1036         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
1037                 if (qlcnic_sriov_pf_check(adapter))
1038                         return -EIO;
1039                 if (qlcnic_sriov_vf_check(adapter) &&
1040                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
1041                         return -EIO;
1042         }
1043
1044         mutex_lock(&vf->send_cmd_lock);
1045         vf->send_cmd = trans;
1046         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1047         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1048         mutex_unlock(&vf->send_cmd_lock);
1049         return err;
1050 }
1051
1052 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1053                                           struct qlcnic_bc_trans *trans,
1054                                           struct qlcnic_cmd_args *cmd)
1055 {
1056 #ifdef CONFIG_QLCNIC_SRIOV
1057         if (qlcnic_sriov_pf_check(adapter)) {
1058                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1059                 return;
1060         }
1061 #endif
1062         cmd->rsp.arg[0] |= (0x9 << 25);
1063         return;
1064 }
1065
1066 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1067 {
1068         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1069                                                  trans_work);
1070         struct qlcnic_bc_trans *trans = NULL;
1071         struct qlcnic_adapter *adapter  = vf->adapter;
1072         struct qlcnic_cmd_args cmd;
1073         u8 req;
1074
1075         if (adapter->need_fw_reset)
1076                 return;
1077
1078         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1079                 return;
1080
1081         trans = list_first_entry(&vf->rcv_act.wait_list,
1082                                  struct qlcnic_bc_trans, list);
1083         adapter = vf->adapter;
1084
1085         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1086                                         QLC_BC_RESPONSE))
1087                 goto cleanup_trans;
1088
1089         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1090         trans->trans_state = QLC_INIT;
1091         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1092
1093 cleanup_trans:
1094         qlcnic_free_mbx_args(&cmd);
1095         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1096         qlcnic_sriov_cleanup_transaction(trans);
1097         if (req)
1098                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1099                                              qlcnic_sriov_process_bc_cmd);
1100 }
1101
1102 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1103                                         struct qlcnic_vf_info *vf)
1104 {
1105         struct qlcnic_bc_trans *trans;
1106         u32 pay_size;
1107
1108         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1109                 return;
1110
1111         trans = vf->send_cmd;
1112
1113         if (trans == NULL)
1114                 goto clear_send;
1115
1116         if (trans->trans_id != hdr->seq_id)
1117                 goto clear_send;
1118
1119         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1120                                                trans->curr_rsp_frag);
1121         qlcnic_sriov_pull_bc_msg(vf->adapter,
1122                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1123                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1124                                  pay_size);
1125         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1126                 goto clear_send;
1127
1128         complete(&trans->resp_cmpl);
1129
1130 clear_send:
1131         clear_bit(QLC_BC_VF_SEND, &vf->state);
1132 }
1133
1134 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1135                                 struct qlcnic_vf_info *vf,
1136                                 struct qlcnic_bc_trans *trans)
1137 {
1138         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1139
1140         t_list->count++;
1141         list_add_tail(&trans->list, &t_list->wait_list);
1142         if (t_list->count == 1)
1143                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1144                                              qlcnic_sriov_process_bc_cmd);
1145         return 0;
1146 }
1147
1148 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1149                                      struct qlcnic_vf_info *vf,
1150                                      struct qlcnic_bc_trans *trans)
1151 {
1152         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1153
1154         spin_lock(&t_list->lock);
1155
1156         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1157
1158         spin_unlock(&t_list->lock);
1159         return 0;
1160 }
1161
1162 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1163                                               struct qlcnic_vf_info *vf,
1164                                               struct qlcnic_bc_hdr *hdr)
1165 {
1166         struct qlcnic_bc_trans *trans = NULL;
1167         struct list_head *node;
1168         u32 pay_size, curr_frag;
1169         u8 found = 0, active = 0;
1170
1171         spin_lock(&vf->rcv_pend.lock);
1172         if (vf->rcv_pend.count > 0) {
1173                 list_for_each(node, &vf->rcv_pend.wait_list) {
1174                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1175                         if (trans->trans_id == hdr->seq_id) {
1176                                 found = 1;
1177                                 break;
1178                         }
1179                 }
1180         }
1181
1182         if (found) {
1183                 curr_frag = trans->curr_req_frag;
1184                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1185                                                        curr_frag);
1186                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1187                                          (u32 *)(trans->req_hdr + curr_frag),
1188                                          (u32 *)(trans->req_pay + curr_frag),
1189                                          pay_size);
1190                 trans->curr_req_frag++;
1191                 if (trans->curr_req_frag >= hdr->num_frags) {
1192                         vf->rcv_pend.count--;
1193                         list_del(&trans->list);
1194                         active = 1;
1195                 }
1196         }
1197         spin_unlock(&vf->rcv_pend.lock);
1198
1199         if (active)
1200                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1201                         qlcnic_sriov_cleanup_transaction(trans);
1202
1203         return;
1204 }
1205
1206 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1207                                        struct qlcnic_bc_hdr *hdr,
1208                                        struct qlcnic_vf_info *vf)
1209 {
1210         struct qlcnic_bc_trans *trans;
1211         struct qlcnic_adapter *adapter = vf->adapter;
1212         struct qlcnic_cmd_args cmd;
1213         u32 pay_size;
1214         int err;
1215         u8 cmd_op;
1216
1217         if (adapter->need_fw_reset)
1218                 return;
1219
1220         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1221             hdr->op_type != QLC_BC_CMD &&
1222             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1223                 return;
1224
1225         if (hdr->frag_num > 1) {
1226                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1227                 return;
1228         }
1229
1230         cmd_op = hdr->cmd_op;
1231         if (qlcnic_sriov_alloc_bc_trans(&trans))
1232                 return;
1233
1234         if (hdr->op_type == QLC_BC_CMD)
1235                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1236         else
1237                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1238
1239         if (err) {
1240                 qlcnic_sriov_cleanup_transaction(trans);
1241                 return;
1242         }
1243
1244         cmd.op_type = hdr->op_type;
1245         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1246                                         QLC_BC_COMMAND)) {
1247                 qlcnic_free_mbx_args(&cmd);
1248                 qlcnic_sriov_cleanup_transaction(trans);
1249                 return;
1250         }
1251
1252         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1253                                          trans->curr_req_frag);
1254         qlcnic_sriov_pull_bc_msg(vf->adapter,
1255                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1256                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1257                                  pay_size);
1258         trans->func_id = vf->pci_func;
1259         trans->vf = vf;
1260         trans->trans_id = hdr->seq_id;
1261         trans->curr_req_frag++;
1262
1263         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1264                 return;
1265
1266         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1267                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1268                         qlcnic_free_mbx_args(&cmd);
1269                         qlcnic_sriov_cleanup_transaction(trans);
1270                 }
1271         } else {
1272                 spin_lock(&vf->rcv_pend.lock);
1273                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1274                 vf->rcv_pend.count++;
1275                 spin_unlock(&vf->rcv_pend.lock);
1276         }
1277 }
1278
1279 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1280                                           struct qlcnic_vf_info *vf)
1281 {
1282         struct qlcnic_bc_hdr hdr;
1283         u32 *ptr = (u32 *)&hdr;
1284         u8 msg_type, i;
1285
1286         for (i = 2; i < 6; i++)
1287                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1288         msg_type = hdr.msg_type;
1289
1290         switch (msg_type) {
1291         case QLC_BC_COMMAND:
1292                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1293                 break;
1294         case QLC_BC_RESPONSE:
1295                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1296                 break;
1297         }
1298 }
1299
1300 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1301                                           struct qlcnic_vf_info *vf)
1302 {
1303         struct qlcnic_adapter *adapter = vf->adapter;
1304
1305         if (qlcnic_sriov_pf_check(adapter))
1306                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1307         else
1308                 dev_err(&adapter->pdev->dev,
1309                         "Invalid event to VF. VF should not get FLR event\n");
1310 }
1311
1312 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1313 {
1314         struct qlcnic_vf_info *vf;
1315         struct qlcnic_sriov *sriov;
1316         int index;
1317         u8 pci_func;
1318
1319         sriov = adapter->ahw->sriov;
1320         pci_func = qlcnic_sriov_target_func_id(event);
1321         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1322
1323         if (index < 0)
1324                 return;
1325
1326         vf = &sriov->vf_info[index];
1327         vf->pci_func = pci_func;
1328
1329         if (qlcnic_sriov_channel_free_check(event))
1330                 complete(&vf->ch_free_cmpl);
1331
1332         if (qlcnic_sriov_flr_check(event)) {
1333                 qlcnic_sriov_handle_flr_event(sriov, vf);
1334                 return;
1335         }
1336
1337         if (qlcnic_sriov_bc_msg_check(event))
1338                 qlcnic_sriov_handle_msg_event(sriov, vf);
1339 }
1340
1341 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1342 {
1343         struct qlcnic_cmd_args cmd;
1344         int err;
1345
1346         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1347                 return 0;
1348
1349         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1350                 return -ENOMEM;
1351
1352         if (enable)
1353                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1354
1355         err = qlcnic_83xx_mbx_op(adapter, &cmd);
1356
1357         if (err != QLCNIC_RCODE_SUCCESS) {
1358                 dev_err(&adapter->pdev->dev,
1359                         "Failed to %s bc events, err=%d\n",
1360                         (enable ? "enable" : "disable"), err);
1361         }
1362
1363         qlcnic_free_mbx_args(&cmd);
1364         return err;
1365 }
1366
1367 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1368                                      struct qlcnic_bc_trans *trans)
1369 {
1370         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1371         u32 state;
1372
1373         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1374         if (state == QLC_83XX_IDC_DEV_READY) {
1375                 msleep(20);
1376                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1377                 trans->trans_state = QLC_INIT;
1378                 if (++adapter->fw_fail_cnt > max)
1379                         return -EIO;
1380                 else
1381                         return 0;
1382         }
1383
1384         return -EIO;
1385 }
1386
1387 static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
1388                                   struct qlcnic_cmd_args *cmd)
1389 {
1390         struct qlcnic_hardware_context *ahw = adapter->ahw;
1391         struct device *dev = &adapter->pdev->dev;
1392         struct qlcnic_bc_trans *trans;
1393         int err;
1394         u32 rsp_data, opcode, mbx_err_code, rsp;
1395         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1396         u8 func = ahw->pci_func;
1397
1398         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1399         if (rsp)
1400                 return rsp;
1401
1402         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1403         if (rsp)
1404                 goto cleanup_transaction;
1405
1406 retry:
1407         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
1408                 rsp = -EIO;
1409                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1410                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1411                 goto err_out;
1412         }
1413
1414         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1415         if (err) {
1416                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1417                         (cmd->req.arg[0] & 0xffff), func);
1418                 rsp = QLCNIC_RCODE_TIMEOUT;
1419
1420                 /* After adapter reset PF driver may take some time to
1421                  * respond to VF's request. Retry request till maximum retries.
1422                  */
1423                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1424                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1425                         goto retry;
1426
1427                 goto err_out;
1428         }
1429
1430         rsp_data = cmd->rsp.arg[0];
1431         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1432         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1433
1434         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1435             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1436                 rsp = QLCNIC_RCODE_SUCCESS;
1437         } else {
1438                 rsp = mbx_err_code;
1439                 if (!rsp)
1440                         rsp = 1;
1441                 dev_err(dev,
1442                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1443                         opcode, mbx_err_code, func);
1444         }
1445
1446 err_out:
1447         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1448                 ahw->reset_context = 1;
1449                 adapter->need_fw_reset = 1;
1450                 clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
1451         }
1452
1453 cleanup_transaction:
1454         qlcnic_sriov_cleanup_transaction(trans);
1455         return rsp;
1456 }
1457
1458 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1459 {
1460         struct qlcnic_cmd_args cmd;
1461         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1462         int ret;
1463
1464         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1465                 return -ENOMEM;
1466
1467         ret = qlcnic_issue_cmd(adapter, &cmd);
1468         if (ret) {
1469                 dev_err(&adapter->pdev->dev,
1470                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1471                         ret);
1472                 goto out;
1473         }
1474
1475         cmd_op = (cmd.rsp.arg[0] & 0xff);
1476         if (cmd.rsp.arg[0] >> 25 == 2)
1477                 return 2;
1478         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1479                 set_bit(QLC_BC_VF_STATE, &vf->state);
1480         else
1481                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1482
1483 out:
1484         qlcnic_free_mbx_args(&cmd);
1485         return ret;
1486 }
1487
1488 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1489 {
1490         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1491         struct qlcnic_mac_list_s *cur;
1492         struct list_head *head, tmp_list;
1493
1494         INIT_LIST_HEAD(&tmp_list);
1495         head = &adapter->vf_mc_list;
1496         netif_addr_lock_bh(netdev);
1497
1498         while (!list_empty(head)) {
1499                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1500                 list_move(&cur->list, &tmp_list);
1501         }
1502
1503         netif_addr_unlock_bh(netdev);
1504
1505         while (!list_empty(&tmp_list)) {
1506                 cur = list_entry((&tmp_list)->next,
1507                                  struct qlcnic_mac_list_s, list);
1508                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1509                 list_del(&cur->list);
1510                 kfree(cur);
1511         }
1512 }
1513
1514 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1515 {
1516         struct list_head *head = &bc->async_list;
1517         struct qlcnic_async_work_list *entry;
1518
1519         while (!list_empty(head)) {
1520                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1521                                    list);
1522                 cancel_work_sync(&entry->work);
1523                 list_del(&entry->list);
1524                 kfree(entry);
1525         }
1526 }
1527
1528 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1529 {
1530         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1531         u16 vlan;
1532
1533         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1534                 return;
1535
1536         vlan = adapter->ahw->sriov->vlan;
1537         __qlcnic_set_multi(netdev, vlan);
1538 }
1539
1540 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1541 {
1542         struct qlcnic_async_work_list *entry;
1543         struct net_device *netdev;
1544
1545         entry = container_of(work, struct qlcnic_async_work_list, work);
1546         netdev = (struct net_device *)entry->ptr;
1547
1548         qlcnic_sriov_vf_set_multi(netdev);
1549         return;
1550 }
1551
1552 static struct qlcnic_async_work_list *
1553 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1554 {
1555         struct list_head *node;
1556         struct qlcnic_async_work_list *entry = NULL;
1557         u8 empty = 0;
1558
1559         list_for_each(node, &bc->async_list) {
1560                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1561                 if (!work_pending(&entry->work)) {
1562                         empty = 1;
1563                         break;
1564                 }
1565         }
1566
1567         if (!empty) {
1568                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1569                                 GFP_ATOMIC);
1570                 if (entry == NULL)
1571                         return NULL;
1572                 list_add_tail(&entry->list, &bc->async_list);
1573         }
1574
1575         return entry;
1576 }
1577
1578 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1579                                                 work_func_t func, void *data)
1580 {
1581         struct qlcnic_async_work_list *entry = NULL;
1582
1583         entry = qlcnic_sriov_get_free_node_async_work(bc);
1584         if (!entry)
1585                 return;
1586
1587         entry->ptr = data;
1588         INIT_WORK(&entry->work, func);
1589         queue_work(bc->bc_async_wq, &entry->work);
1590 }
1591
1592 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1593 {
1594
1595         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1596         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1597
1598         if (adapter->need_fw_reset)
1599                 return;
1600
1601         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1602                                             netdev);
1603 }
1604
1605 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1606 {
1607         int err;
1608
1609         set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
1610         qlcnic_83xx_enable_mbx_intrpt(adapter);
1611
1612         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1613         if (err)
1614                 return err;
1615
1616         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1617         if (err)
1618                 goto err_out_cleanup_bc_intr;
1619
1620         err = qlcnic_sriov_vf_init_driver(adapter);
1621         if (err)
1622                 goto err_out_term_channel;
1623
1624         return 0;
1625
1626 err_out_term_channel:
1627         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1628
1629 err_out_cleanup_bc_intr:
1630         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1631         return err;
1632 }
1633
1634 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1635 {
1636         struct net_device *netdev = adapter->netdev;
1637
1638         if (netif_running(netdev)) {
1639                 if (!qlcnic_up(adapter, netdev))
1640                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1641         }
1642
1643         netif_device_attach(netdev);
1644 }
1645
1646 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1647 {
1648         struct qlcnic_hardware_context *ahw = adapter->ahw;
1649         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1650         struct net_device *netdev = adapter->netdev;
1651         u8 i, max_ints = ahw->num_msix - 1;
1652
1653         qlcnic_83xx_disable_mbx_intr(adapter);
1654         netif_device_detach(netdev);
1655         if (netif_running(netdev))
1656                 qlcnic_down(adapter, netdev);
1657
1658         for (i = 0; i < max_ints; i++) {
1659                 intr_tbl[i].id = i;
1660                 intr_tbl[i].enabled = 0;
1661                 intr_tbl[i].src = 0;
1662         }
1663         ahw->reset_context = 0;
1664 }
1665
1666 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1667 {
1668         struct qlcnic_hardware_context *ahw = adapter->ahw;
1669         struct device *dev = &adapter->pdev->dev;
1670         struct qlc_83xx_idc *idc = &ahw->idc;
1671         u8 func = ahw->pci_func;
1672         u32 state;
1673
1674         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1675             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1676                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1677                         qlcnic_sriov_vf_attach(adapter);
1678                         adapter->fw_fail_cnt = 0;
1679                         dev_info(dev,
1680                                  "%s: Reinitalization of VF 0x%x done after FW reset\n",
1681                                  __func__, func);
1682                 } else {
1683                         dev_err(dev,
1684                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1685                                 __func__, func);
1686                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1687                         dev_info(dev, "Current state 0x%x after FW reset\n",
1688                                  state);
1689                 }
1690         }
1691
1692         return 0;
1693 }
1694
1695 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1696 {
1697         struct qlcnic_hardware_context *ahw = adapter->ahw;
1698         struct device *dev = &adapter->pdev->dev;
1699         struct qlc_83xx_idc *idc = &ahw->idc;
1700         u8 func = ahw->pci_func;
1701         u32 state;
1702
1703         adapter->reset_ctx_cnt++;
1704
1705         /* Skip the context reset and check if FW is hung */
1706         if (adapter->reset_ctx_cnt < 3) {
1707                 adapter->need_fw_reset = 1;
1708                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1709                 dev_info(dev,
1710                          "Resetting context, wait here to check if FW is in failed state\n");
1711                 return 0;
1712         }
1713
1714         /* Check if number of resets exceed the threshold.
1715          * If it exceeds the threshold just fail the VF.
1716          */
1717         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1718                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1719                 adapter->tx_timeo_cnt = 0;
1720                 adapter->fw_fail_cnt = 0;
1721                 adapter->reset_ctx_cnt = 0;
1722                 qlcnic_sriov_vf_detach(adapter);
1723                 dev_err(dev,
1724                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1725                 return -EIO;
1726         }
1727
1728         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1729         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1730                  __func__, adapter->reset_ctx_cnt, func);
1731         set_bit(__QLCNIC_RESETTING, &adapter->state);
1732         adapter->need_fw_reset = 1;
1733         clear_bit(QLC_83XX_MBX_READY, &idc->status);
1734         qlcnic_sriov_vf_detach(adapter);
1735         adapter->need_fw_reset = 0;
1736
1737         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1738                 qlcnic_sriov_vf_attach(adapter);
1739                 adapter->netdev->trans_start = jiffies;
1740                 adapter->tx_timeo_cnt = 0;
1741                 adapter->reset_ctx_cnt = 0;
1742                 adapter->fw_fail_cnt = 0;
1743                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1744         } else {
1745                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1746                         __func__, func);
1747                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1748                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1749         }
1750
1751         return 0;
1752 }
1753
1754 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1755 {
1756         struct qlcnic_hardware_context *ahw = adapter->ahw;
1757         int ret = 0;
1758
1759         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1760                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1761         else if (ahw->reset_context)
1762                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1763
1764         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1765         return ret;
1766 }
1767
1768 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1769 {
1770         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1771
1772         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1773         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1774                 qlcnic_sriov_vf_detach(adapter);
1775
1776         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1777         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1778         return -EIO;
1779 }
1780
1781 static int
1782 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1783 {
1784         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1785
1786         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1787         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1788                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1789                 adapter->tx_timeo_cnt = 0;
1790                 adapter->reset_ctx_cnt = 0;
1791                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1792                 qlcnic_sriov_vf_detach(adapter);
1793         }
1794
1795         return 0;
1796 }
1797
1798 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1799 {
1800         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1801         u8 func = adapter->ahw->pci_func;
1802
1803         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1804                 dev_err(&adapter->pdev->dev,
1805                         "Firmware hang detected by VF 0x%x\n", func);
1806                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1807                 adapter->tx_timeo_cnt = 0;
1808                 adapter->reset_ctx_cnt = 0;
1809                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1810                 qlcnic_sriov_vf_detach(adapter);
1811         }
1812         return 0;
1813 }
1814
1815 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1816 {
1817         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1818         return 0;
1819 }
1820
1821 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1822 {
1823         struct qlcnic_adapter *adapter;
1824         struct qlc_83xx_idc *idc;
1825         int ret = 0;
1826
1827         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1828         idc = &adapter->ahw->idc;
1829         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1830
1831         switch (idc->curr_state) {
1832         case QLC_83XX_IDC_DEV_READY:
1833                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1834                 break;
1835         case QLC_83XX_IDC_DEV_NEED_RESET:
1836         case QLC_83XX_IDC_DEV_INIT:
1837                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1838                 break;
1839         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1840                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1841                 break;
1842         case QLC_83XX_IDC_DEV_FAILED:
1843                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1844                 break;
1845         case QLC_83XX_IDC_DEV_QUISCENT:
1846                 break;
1847         default:
1848                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1849         }
1850
1851         idc->prev_state = idc->curr_state;
1852         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1853                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1854                                      idc->delay);
1855 }
1856
1857 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1858 {
1859         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1860                 msleep(20);
1861
1862         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1863         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1864         cancel_delayed_work_sync(&adapter->fw_work);
1865 }
1866
1867 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1868                                           u16 vid, u8 enable)
1869 {
1870         u16 vlan = sriov->vlan;
1871         u8 allowed = 0;
1872         int i;
1873
1874         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1875                 return -EINVAL;
1876
1877         if (enable) {
1878                 if (vlan)
1879                         return -EINVAL;
1880
1881                 if (sriov->any_vlan) {
1882                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1883                                 if (sriov->allowed_vlans[i] == vid)
1884                                         allowed = 1;
1885                         }
1886
1887                         if (!allowed)
1888                                 return -EINVAL;
1889                 }
1890         } else {
1891                 if (!vlan || vlan != vid)
1892                         return -EINVAL;
1893         }
1894
1895         return 0;
1896 }
1897
1898 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1899                                    u16 vid, u8 enable)
1900 {
1901         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1902         struct qlcnic_cmd_args cmd;
1903         int ret;
1904
1905         if (vid == 0)
1906                 return 0;
1907
1908         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1909         if (ret)
1910                 return ret;
1911
1912         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1913                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1914         if (ret)
1915                 return ret;
1916
1917         cmd.req.arg[1] = (enable & 1) | vid << 16;
1918
1919         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1920         ret = qlcnic_issue_cmd(adapter, &cmd);
1921         if (ret) {
1922                 dev_err(&adapter->pdev->dev,
1923                         "Failed to configure guest VLAN, err=%d\n", ret);
1924         } else {
1925                 qlcnic_free_mac_list(adapter);
1926
1927                 if (enable)
1928                         sriov->vlan = vid;
1929                 else
1930                         sriov->vlan = 0;
1931
1932                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1933         }
1934
1935         qlcnic_free_mbx_args(&cmd);
1936         return ret;
1937 }
1938
1939 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1940 {
1941         struct list_head *head = &adapter->mac_list;
1942         struct qlcnic_mac_list_s *cur;
1943         u16 vlan;
1944
1945         vlan = adapter->ahw->sriov->vlan;
1946
1947         while (!list_empty(head)) {
1948                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1949                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1950                                           vlan, QLCNIC_MAC_DEL);
1951                 list_del(&cur->list);
1952                 kfree(cur);
1953         }
1954 }