1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
11 #include <linux/compiler.h>
12 #include <linux/version.h>
13 #include <linux/workqueue.h>
14 #include <linux/netdevice.h>
15 #include <linux/interrupt.h>
16 #include <linux/bitmap.h>
17 #include <linux/kernel.h>
18 #include <linux/mutex.h>
20 #include <linux/qed/common_hsi.h>
21 #include <linux/qed/eth_common.h>
22 #include <linux/qed/qed_if.h>
23 #include <linux/qed/qed_chain.h>
24 #include <linux/qed/qed_eth_if.h>
26 #define QEDE_MAJOR_VERSION 8
27 #define QEDE_MINOR_VERSION 7
28 #define QEDE_REVISION_VERSION 1
29 #define QEDE_ENGINEERING_VERSION 20
30 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \
31 __stringify(QEDE_MINOR_VERSION) "." \
32 __stringify(QEDE_REVISION_VERSION) "." \
33 __stringify(QEDE_ENGINEERING_VERSION)
35 #define DRV_MODULE_SYM qede
45 u64 mftag_filter_discards;
46 u64 mac_filter_discards;
56 u64 coalesced_aborts_num;
57 u64 non_coalesced_pkts;
61 u64 rx_64_byte_packets;
62 u64 rx_65_to_127_byte_packets;
63 u64 rx_128_to_255_byte_packets;
64 u64 rx_256_to_511_byte_packets;
65 u64 rx_512_to_1023_byte_packets;
66 u64 rx_1024_to_1518_byte_packets;
67 u64 rx_1519_to_1522_byte_packets;
68 u64 rx_1519_to_2047_byte_packets;
69 u64 rx_2048_to_4095_byte_packets;
70 u64 rx_4096_to_9216_byte_packets;
71 u64 rx_9217_to_16383_byte_packets;
73 u64 rx_mac_crtl_frames;
77 u64 rx_carrier_errors;
78 u64 rx_oversize_packets;
80 u64 rx_undersize_packets;
82 u64 tx_64_byte_packets;
83 u64 tx_65_to_127_byte_packets;
84 u64 tx_128_to_255_byte_packets;
85 u64 tx_256_to_511_byte_packets;
86 u64 tx_512_to_1023_byte_packets;
87 u64 tx_1024_to_1518_byte_packets;
88 u64 tx_1519_to_2047_byte_packets;
89 u64 tx_2048_to_4095_byte_packets;
90 u64 tx_4096_to_9216_byte_packets;
91 u64 tx_9217_to_16383_byte_packets;
94 u64 tx_lpi_entry_count;
95 u64 tx_total_collisions;
98 u64 tx_mac_ctrl_frames;
102 struct list_head list;
108 struct qed_dev *cdev;
109 struct net_device *ndev;
110 struct pci_dev *pdev;
115 const struct qed_eth_ops *ops;
117 struct qed_dev_eth_info dev_info;
118 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
119 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues * \
120 (edev)->dev_info.num_tc)
122 struct qede_fastpath *fp_array;
126 #define QEDE_RSS_CNT(edev) ((edev)->num_rss)
127 #define QEDE_TSS_CNT(edev) ((edev)->num_rss * \
129 #define QEDE_TSS_IDX(edev, txqidx) ((txqidx) % (edev)->num_rss)
130 #define QEDE_TC_IDX(edev, txqidx) ((txqidx) / (edev)->num_rss)
131 #define QEDE_TX_QUEUE(edev, txqidx) \
132 (&(edev)->fp_array[QEDE_TSS_IDX((edev), (txqidx))].txqs[QEDE_TC_IDX( \
135 struct qed_int_info int_info;
136 unsigned char primary_mac[ETH_ALEN];
138 /* Smaller private varaiant of the RTNL lock */
139 struct mutex qede_lock;
140 u32 state; /* Protected by qede_lock */
142 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
143 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8)
144 /* Max supported alignment is 256 (8 shift)
145 * minimal alignment shift 6 is optimal for 57xxx HW performance
147 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
148 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
149 * at the end of skb->data, to avoid wasting a full cache line.
150 * This reduces memory use (skb->truesize).
152 #define QEDE_FW_RX_ALIGN_END \
153 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \
154 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
156 struct qede_stats stats;
157 #define QEDE_RSS_INDIR_INITED BIT(0)
158 #define QEDE_RSS_KEY_INITED BIT(1)
159 #define QEDE_RSS_CAPS_INITED BIT(2)
160 u32 rss_params_inited; /* bit-field to track initialized rss params */
161 struct qed_update_vport_rss_params rss_params;
162 u16 q_num_rx_buffers; /* Must be a power of two */
163 u16 q_num_tx_buffers; /* Must be a power of two */
166 struct list_head vlan_list;
167 u16 configured_vlans;
168 u16 non_configured_vlans;
169 bool accept_any_vlan;
170 struct delayed_work sp_task;
171 unsigned long sp_flags;
181 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
184 #define MAX_NUM_PRI 8
186 /* The driver supports the new build_skb() API:
187 * RX ring buffer contains pointer to kmalloc() data only,
188 * skb are built only after the frame was DMA-ed.
193 unsigned int page_offset;
196 enum qede_agg_state {
197 QEDE_AGG_STATE_NONE = 0,
198 QEDE_AGG_STATE_START = 1,
199 QEDE_AGG_STATE_ERROR = 2
202 struct qede_agg_info {
203 struct sw_rx_data replace_buf;
204 dma_addr_t replace_buf_mapping;
205 struct sw_rx_data start_buf;
206 dma_addr_t start_buf_mapping;
207 struct eth_fast_path_rx_tpa_start_cqe start_cqe;
208 enum qede_agg_state agg_state;
214 struct qede_rx_queue {
216 struct sw_rx_data *sw_rx_ring;
219 struct qed_chain rx_bd_ring;
220 struct qed_chain rx_comp_ring;
221 void __iomem *hw_rxq_prod_addr;
224 struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM];
227 unsigned int rx_buf_seg_size;
237 struct eth_db_data data;
244 /* Set on the first BD descriptor when there is a split BD */
245 #define QEDE_TSO_SPLIT_BD BIT(0)
248 struct qede_tx_queue {
249 int index; /* Queue index */
251 struct sw_tx_bd *sw_tx_ring;
254 struct qed_chain tx_pbl;
255 void __iomem *doorbell_addr;
261 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
262 le32_to_cpu((bd)->addr.lo))
263 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \
265 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
266 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
267 (bd)->nbytes = cpu_to_le16(len); \
269 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
271 struct qede_fastpath {
272 struct qede_dev *edev;
274 struct napi_struct napi;
275 struct qed_sb_info *sb_info;
276 struct qede_rx_queue *rxq;
277 struct qede_tx_queue *txqs;
279 #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8)
280 char name[VEC_NAME_SIZE];
283 /* Debug print definitions */
284 #define DP_NAME(edev) ((edev)->ndev->name)
287 #define XMIT_L4_CSUM BIT(0)
288 #define XMIT_LSO BIT(1)
289 #define XMIT_ENC BIT(2)
291 #define QEDE_CSUM_ERROR BIT(0)
292 #define QEDE_CSUM_UNNECESSARY BIT(1)
293 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2)
295 #define QEDE_SP_RX_MODE 1
296 #define QEDE_SP_VXLAN_PORT_CONFIG 2
297 #define QEDE_SP_GENEVE_PORT_CONFIG 3
299 union qede_reload_args {
303 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level);
304 void qede_set_ethtool_ops(struct net_device *netdev);
305 void qede_reload(struct qede_dev *edev,
306 void (*func)(struct qede_dev *edev,
307 union qede_reload_args *args),
308 union qede_reload_args *args);
309 int qede_change_mtu(struct net_device *dev, int new_mtu);
310 void qede_fill_by_demand_stats(struct qede_dev *edev);
311 bool qede_has_rx_work(struct qede_rx_queue *rxq);
312 int qede_txq_has_work(struct qede_tx_queue *txq);
313 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, struct qede_dev *edev,
316 #define RX_RING_SIZE_POW 13
317 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW))
318 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
319 #define NUM_RX_BDS_MIN 128
320 #define NUM_RX_BDS_DEF NUM_RX_BDS_MAX
322 #define TX_RING_SIZE_POW 13
323 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW))
324 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
325 #define NUM_TX_BDS_MIN 128
326 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX
328 #define QEDE_RX_HDR_SIZE 256
329 #define for_each_rss(i) for (i = 0; i < edev->num_rss; i++)
331 #endif /* _QEDE_H_ */