1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
4 #include <linux/printk.h>
5 #include <linux/dynamic_debug.h>
6 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/utsname.h>
9 #include <generated/utsrelease.h>
12 #include "ionic_bus.h"
13 #include "ionic_lif.h"
14 #include "ionic_debugfs.h"
16 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
17 MODULE_AUTHOR("Pensando Systems, Inc");
18 MODULE_LICENSE("GPL");
20 static const char *ionic_error_to_str(enum ionic_status_code code)
23 case IONIC_RC_SUCCESS:
24 return "IONIC_RC_SUCCESS";
25 case IONIC_RC_EVERSION:
26 return "IONIC_RC_EVERSION";
27 case IONIC_RC_EOPCODE:
28 return "IONIC_RC_EOPCODE";
30 return "IONIC_RC_EIO";
32 return "IONIC_RC_EPERM";
34 return "IONIC_RC_EQID";
36 return "IONIC_RC_EQTYPE";
38 return "IONIC_RC_ENOENT";
40 return "IONIC_RC_EINTR";
42 return "IONIC_RC_EAGAIN";
44 return "IONIC_RC_ENOMEM";
46 return "IONIC_RC_EFAULT";
48 return "IONIC_RC_EBUSY";
50 return "IONIC_RC_EEXIST";
52 return "IONIC_RC_EINVAL";
54 return "IONIC_RC_ENOSPC";
56 return "IONIC_RC_ERANGE";
57 case IONIC_RC_BAD_ADDR:
58 return "IONIC_RC_BAD_ADDR";
59 case IONIC_RC_DEV_CMD:
60 return "IONIC_RC_DEV_CMD";
61 case IONIC_RC_ENOSUPP:
62 return "IONIC_RC_ENOSUPP";
64 return "IONIC_RC_ERROR";
66 return "IONIC_RC_ERDMA";
67 case IONIC_RC_EBAD_FW:
68 return "IONIC_RC_EBAD_FW";
70 return "IONIC_RC_UNKNOWN";
74 static int ionic_error_to_errno(enum ionic_status_code code)
77 case IONIC_RC_SUCCESS:
79 case IONIC_RC_EVERSION:
83 case IONIC_RC_ENOSUPP:
101 case IONIC_RC_ERANGE:
103 case IONIC_RC_BAD_ADDR:
105 case IONIC_RC_EOPCODE:
107 case IONIC_RC_DEV_CMD:
116 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
120 return "IONIC_CMD_NOP";
122 return "IONIC_CMD_INIT";
123 case IONIC_CMD_RESET:
124 return "IONIC_CMD_RESET";
125 case IONIC_CMD_IDENTIFY:
126 return "IONIC_CMD_IDENTIFY";
127 case IONIC_CMD_GETATTR:
128 return "IONIC_CMD_GETATTR";
129 case IONIC_CMD_SETATTR:
130 return "IONIC_CMD_SETATTR";
131 case IONIC_CMD_PORT_IDENTIFY:
132 return "IONIC_CMD_PORT_IDENTIFY";
133 case IONIC_CMD_PORT_INIT:
134 return "IONIC_CMD_PORT_INIT";
135 case IONIC_CMD_PORT_RESET:
136 return "IONIC_CMD_PORT_RESET";
137 case IONIC_CMD_PORT_GETATTR:
138 return "IONIC_CMD_PORT_GETATTR";
139 case IONIC_CMD_PORT_SETATTR:
140 return "IONIC_CMD_PORT_SETATTR";
141 case IONIC_CMD_LIF_INIT:
142 return "IONIC_CMD_LIF_INIT";
143 case IONIC_CMD_LIF_RESET:
144 return "IONIC_CMD_LIF_RESET";
145 case IONIC_CMD_LIF_IDENTIFY:
146 return "IONIC_CMD_LIF_IDENTIFY";
147 case IONIC_CMD_LIF_SETATTR:
148 return "IONIC_CMD_LIF_SETATTR";
149 case IONIC_CMD_LIF_GETATTR:
150 return "IONIC_CMD_LIF_GETATTR";
151 case IONIC_CMD_LIF_SETPHC:
152 return "IONIC_CMD_LIF_SETPHC";
153 case IONIC_CMD_RX_MODE_SET:
154 return "IONIC_CMD_RX_MODE_SET";
155 case IONIC_CMD_RX_FILTER_ADD:
156 return "IONIC_CMD_RX_FILTER_ADD";
157 case IONIC_CMD_RX_FILTER_DEL:
158 return "IONIC_CMD_RX_FILTER_DEL";
159 case IONIC_CMD_Q_IDENTIFY:
160 return "IONIC_CMD_Q_IDENTIFY";
161 case IONIC_CMD_Q_INIT:
162 return "IONIC_CMD_Q_INIT";
163 case IONIC_CMD_Q_CONTROL:
164 return "IONIC_CMD_Q_CONTROL";
165 case IONIC_CMD_RDMA_RESET_LIF:
166 return "IONIC_CMD_RDMA_RESET_LIF";
167 case IONIC_CMD_RDMA_CREATE_EQ:
168 return "IONIC_CMD_RDMA_CREATE_EQ";
169 case IONIC_CMD_RDMA_CREATE_CQ:
170 return "IONIC_CMD_RDMA_CREATE_CQ";
171 case IONIC_CMD_RDMA_CREATE_ADMINQ:
172 return "IONIC_CMD_RDMA_CREATE_ADMINQ";
173 case IONIC_CMD_FW_DOWNLOAD:
174 return "IONIC_CMD_FW_DOWNLOAD";
175 case IONIC_CMD_FW_CONTROL:
176 return "IONIC_CMD_FW_CONTROL";
177 case IONIC_CMD_FW_DOWNLOAD_V1:
178 return "IONIC_CMD_FW_DOWNLOAD_V1";
179 case IONIC_CMD_FW_CONTROL_V1:
180 return "IONIC_CMD_FW_CONTROL_V1";
181 case IONIC_CMD_VF_GETATTR:
182 return "IONIC_CMD_VF_GETATTR";
183 case IONIC_CMD_VF_SETATTR:
184 return "IONIC_CMD_VF_SETATTR";
186 return "DEVCMD_UNKNOWN";
190 static void ionic_adminq_flush(struct ionic_lif *lif)
192 struct ionic_desc_info *desc_info;
193 unsigned long irqflags;
194 struct ionic_queue *q;
196 spin_lock_irqsave(&lif->adminq_lock, irqflags);
197 if (!lif->adminqcq) {
198 spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
202 q = &lif->adminqcq->q;
204 while (q->tail_idx != q->head_idx) {
205 desc_info = &q->info[q->tail_idx];
206 memset(desc_info->desc, 0, sizeof(union ionic_adminq_cmd));
207 desc_info->cb = NULL;
208 desc_info->cb_arg = NULL;
209 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
211 spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
214 static int ionic_adminq_check_err(struct ionic_lif *lif,
215 struct ionic_admin_ctx *ctx,
218 struct net_device *netdev = lif->netdev;
219 const char *opcode_str;
220 const char *status_str;
223 if (ctx->comp.comp.status || timeout) {
224 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
225 status_str = ionic_error_to_str(ctx->comp.comp.status);
226 err = timeout ? -ETIMEDOUT :
227 ionic_error_to_errno(ctx->comp.comp.status);
229 netdev_err(netdev, "%s (%d) failed: %s (%d)\n",
230 opcode_str, ctx->cmd.cmd.opcode,
231 timeout ? "TIMEOUT" : status_str, err);
234 ionic_adminq_flush(lif);
240 static void ionic_adminq_cb(struct ionic_queue *q,
241 struct ionic_desc_info *desc_info,
242 struct ionic_cq_info *cq_info, void *cb_arg)
244 struct ionic_admin_ctx *ctx = cb_arg;
245 struct ionic_admin_comp *comp;
250 comp = cq_info->cq_desc;
252 memcpy(&ctx->comp, comp, sizeof(*comp));
254 dev_dbg(q->dev, "comp admin queue command:\n");
255 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,
256 &ctx->comp, sizeof(ctx->comp), true);
258 complete_all(&ctx->work);
261 int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
263 struct ionic_desc_info *desc_info;
264 unsigned long irqflags;
265 struct ionic_queue *q;
268 spin_lock_irqsave(&lif->adminq_lock, irqflags);
269 if (!lif->adminqcq) {
270 spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
274 q = &lif->adminqcq->q;
276 if (!ionic_q_has_space(q, 1)) {
281 err = ionic_heartbeat_check(lif->ionic);
285 desc_info = &q->info[q->head_idx];
286 memcpy(desc_info->desc, &ctx->cmd, sizeof(ctx->cmd));
288 dev_dbg(&lif->netdev->dev, "post admin queue command:\n");
289 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
290 &ctx->cmd, sizeof(ctx->cmd), true);
292 ionic_q_post(q, true, ionic_adminq_cb, ctx);
295 spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
300 int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx, int err)
302 struct net_device *netdev = lif->netdev;
303 unsigned long remaining;
307 if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
308 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
309 netdev_err(netdev, "Posting of %s (%d) failed: %d\n",
310 name, ctx->cmd.cmd.opcode, err);
315 remaining = wait_for_completion_timeout(&ctx->work,
316 HZ * (ulong)DEVCMD_TIMEOUT);
317 return ionic_adminq_check_err(lif, ctx, (remaining == 0));
320 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
324 err = ionic_adminq_post(lif, ctx);
326 return ionic_adminq_wait(lif, ctx, err);
329 static void ionic_dev_cmd_clean(struct ionic *ionic)
331 union __iomem ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs;
333 iowrite32(0, ®s->doorbell);
334 memset_io(®s->cmd, 0, sizeof(regs->cmd));
337 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds)
339 struct ionic_dev *idev = &ionic->idev;
340 unsigned long start_time;
341 unsigned long max_wait;
342 unsigned long duration;
348 /* Wait for dev cmd to complete, retrying if we get EAGAIN,
349 * but don't wait any longer than max_seconds.
351 max_wait = jiffies + (max_seconds * HZ);
353 opcode = readb(&idev->dev_cmd_regs->cmd.cmd.opcode);
354 start_time = jiffies;
356 done = ionic_dev_cmd_done(idev);
359 usleep_range(100, 200);
361 /* Don't check the heartbeat on FW_CONTROL commands as they are
362 * notorious for interrupting the firmware's heartbeat update.
364 if (opcode != IONIC_CMD_FW_CONTROL)
365 hb = ionic_heartbeat_check(ionic);
366 } while (!done && !hb && time_before(jiffies, max_wait));
367 duration = jiffies - start_time;
369 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n",
370 ionic_opcode_to_str(opcode), opcode,
371 done, duration / HZ, duration);
374 /* It is possible (but unlikely) that FW was busy and missed a
375 * heartbeat check but is still alive and will process this
376 * request, so don't clean the dev_cmd in this case.
378 dev_dbg(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n",
379 ionic_opcode_to_str(opcode), opcode);
383 if (!done && !time_before(jiffies, max_wait)) {
384 ionic_dev_cmd_clean(ionic);
385 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n",
386 ionic_opcode_to_str(opcode), opcode, max_seconds);
390 err = ionic_dev_cmd_status(&ionic->idev);
392 if (err == IONIC_RC_EAGAIN &&
393 time_before(jiffies, (max_wait - HZ))) {
394 dev_dbg(ionic->dev, "DEV_CMD %s (%d), %s (%d) retrying...\n",
395 ionic_opcode_to_str(opcode), opcode,
396 ionic_error_to_str(err), err);
399 iowrite32(0, &idev->dev_cmd_regs->done);
400 iowrite32(1, &idev->dev_cmd_regs->doorbell);
404 if (!(opcode == IONIC_CMD_FW_CONTROL && err == IONIC_RC_EAGAIN))
405 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n",
406 ionic_opcode_to_str(opcode), opcode,
407 ionic_error_to_str(err), err);
409 return ionic_error_to_errno(err);
415 int ionic_setup(struct ionic *ionic)
419 err = ionic_dev_setup(ionic);
427 int ionic_identify(struct ionic *ionic)
429 struct ionic_identity *ident = &ionic->ident;
430 struct ionic_dev *idev = &ionic->idev;
434 memset(ident, 0, sizeof(*ident));
436 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX);
437 strncpy(ident->drv.driver_ver_str, UTS_RELEASE,
438 sizeof(ident->drv.driver_ver_str) - 1);
440 mutex_lock(&ionic->dev_cmd_lock);
442 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data));
443 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz);
445 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);
446 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
448 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data));
449 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz);
451 mutex_unlock(&ionic->dev_cmd_lock);
453 dev_info(ionic->dev, "FW: %s\n", idev->dev_info.fw_version);
456 dev_err(ionic->dev, "Cannot identify ionic: %dn", err);
460 err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC,
463 dev_err(ionic->dev, "Cannot identify LIFs: %d\n", err);
473 int ionic_init(struct ionic *ionic)
475 struct ionic_dev *idev = &ionic->idev;
478 mutex_lock(&ionic->dev_cmd_lock);
479 ionic_dev_cmd_init(idev);
480 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
481 mutex_unlock(&ionic->dev_cmd_lock);
486 int ionic_reset(struct ionic *ionic)
488 struct ionic_dev *idev = &ionic->idev;
491 mutex_lock(&ionic->dev_cmd_lock);
492 ionic_dev_cmd_reset(idev);
493 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
494 mutex_unlock(&ionic->dev_cmd_lock);
499 int ionic_port_identify(struct ionic *ionic)
501 struct ionic_identity *ident = &ionic->ident;
502 struct ionic_dev *idev = &ionic->idev;
506 mutex_lock(&ionic->dev_cmd_lock);
508 ionic_dev_cmd_port_identify(idev);
509 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
511 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data));
512 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz);
515 mutex_unlock(&ionic->dev_cmd_lock);
520 int ionic_port_init(struct ionic *ionic)
522 struct ionic_identity *ident = &ionic->ident;
523 struct ionic_dev *idev = &ionic->idev;
527 if (!idev->port_info) {
528 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
529 idev->port_info = dma_alloc_coherent(ionic->dev,
533 if (!idev->port_info)
537 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data));
539 mutex_lock(&ionic->dev_cmd_lock);
541 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz);
542 ionic_dev_cmd_port_init(idev);
543 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
545 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
546 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
548 mutex_unlock(&ionic->dev_cmd_lock);
550 dev_err(ionic->dev, "Failed to init port\n");
551 dma_free_coherent(ionic->dev, idev->port_info_sz,
552 idev->port_info, idev->port_info_pa);
553 idev->port_info = NULL;
554 idev->port_info_pa = 0;
560 int ionic_port_reset(struct ionic *ionic)
562 struct ionic_dev *idev = &ionic->idev;
565 if (!idev->port_info)
568 mutex_lock(&ionic->dev_cmd_lock);
569 ionic_dev_cmd_port_reset(idev);
570 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
571 mutex_unlock(&ionic->dev_cmd_lock);
573 dma_free_coherent(ionic->dev, idev->port_info_sz,
574 idev->port_info, idev->port_info_pa);
576 idev->port_info = NULL;
577 idev->port_info_pa = 0;
580 dev_err(ionic->dev, "Failed to reset port\n");
585 static int __init ionic_init_module(void)
587 ionic_debugfs_create();
588 return ionic_bus_register_driver();
591 static void __exit ionic_cleanup_module(void)
593 ionic_bus_unregister_driver();
594 ionic_debugfs_destroy();
596 pr_info("%s removed\n", IONIC_DRV_NAME);
599 module_init(ionic_init_module);
600 module_exit(ionic_cleanup_module);