1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
10 #include "ionic_lif.h"
11 #include "ionic_ethtool.h"
12 #include "ionic_stats.h"
14 static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = {
15 #define IONIC_PRIV_F_SW_DBG_STATS BIT(0)
19 #define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings)
21 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
25 for (i = 0; i < ionic_num_stats_grps; i++)
26 ionic_stats_groups[i].get_strings(lif, &buf);
29 static void ionic_get_stats(struct net_device *netdev,
30 struct ethtool_stats *stats, u64 *buf)
32 struct ionic_lif *lif = netdev_priv(netdev);
35 memset(buf, 0, stats->n_stats * sizeof(*buf));
36 for (i = 0; i < ionic_num_stats_grps; i++)
37 ionic_stats_groups[i].get_values(lif, &buf);
40 static int ionic_get_stats_count(struct ionic_lif *lif)
44 for (i = 0; i < ionic_num_stats_grps; i++)
45 num_stats += ionic_stats_groups[i].get_count(lif);
50 static int ionic_get_sset_count(struct net_device *netdev, int sset)
52 struct ionic_lif *lif = netdev_priv(netdev);
57 count = ionic_get_stats_count(lif);
59 case ETH_SS_PRIV_FLAGS:
60 count = IONIC_PRIV_FLAGS_COUNT;
66 static void ionic_get_strings(struct net_device *netdev,
69 struct ionic_lif *lif = netdev_priv(netdev);
73 ionic_get_stats_strings(lif, buf);
75 case ETH_SS_PRIV_FLAGS:
76 memcpy(buf, ionic_priv_flags_strings,
77 IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN);
82 static void ionic_get_drvinfo(struct net_device *netdev,
83 struct ethtool_drvinfo *drvinfo)
85 struct ionic_lif *lif = netdev_priv(netdev);
86 struct ionic *ionic = lif->ionic;
88 strlcpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
89 strlcpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
90 sizeof(drvinfo->fw_version));
91 strlcpy(drvinfo->bus_info, ionic_bus_info(ionic),
92 sizeof(drvinfo->bus_info));
95 static int ionic_get_regs_len(struct net_device *netdev)
97 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
100 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
103 struct ionic_lif *lif = netdev_priv(netdev);
107 regs->version = IONIC_DEV_CMD_REG_VERSION;
110 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
111 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
114 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
115 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
118 static int ionic_get_link_ksettings(struct net_device *netdev,
119 struct ethtool_link_ksettings *ks)
121 struct ionic_lif *lif = netdev_priv(netdev);
122 struct ionic_dev *idev = &lif->ionic->idev;
125 ethtool_link_ksettings_zero_link_mode(ks, supported);
127 if (!idev->port_info) {
128 netdev_err(netdev, "port_info not initialized\n");
132 /* The port_info data is found in a DMA space that the NIC keeps
133 * up-to-date, so there's no need to request the data from the
134 * NIC, we already have it in our memory space.
137 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
139 case IONIC_XCVR_PID_QSFP_100G_CR4:
140 ethtool_link_ksettings_add_link_mode(ks, supported,
144 case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
145 ethtool_link_ksettings_add_link_mode(ks, supported,
149 case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
150 case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
151 case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
152 ethtool_link_ksettings_add_link_mode(ks, supported,
156 case IONIC_XCVR_PID_SFP_10GBASE_AOC:
157 case IONIC_XCVR_PID_SFP_10GBASE_CU:
158 ethtool_link_ksettings_add_link_mode(ks, supported,
164 case IONIC_XCVR_PID_QSFP_100G_SR4:
165 case IONIC_XCVR_PID_QSFP_100G_AOC:
166 ethtool_link_ksettings_add_link_mode(ks, supported,
169 case IONIC_XCVR_PID_QSFP_100G_CWDM4:
170 case IONIC_XCVR_PID_QSFP_100G_PSM4:
171 case IONIC_XCVR_PID_QSFP_100G_LR4:
172 ethtool_link_ksettings_add_link_mode(ks, supported,
173 100000baseLR4_ER4_Full);
175 case IONIC_XCVR_PID_QSFP_100G_ER4:
176 ethtool_link_ksettings_add_link_mode(ks, supported,
177 100000baseLR4_ER4_Full);
179 case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
180 case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
181 ethtool_link_ksettings_add_link_mode(ks, supported,
184 case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
185 ethtool_link_ksettings_add_link_mode(ks, supported,
188 case IONIC_XCVR_PID_SFP_25GBASE_SR:
189 case IONIC_XCVR_PID_SFP_25GBASE_AOC:
190 case IONIC_XCVR_PID_SFP_25GBASE_ACC:
191 ethtool_link_ksettings_add_link_mode(ks, supported,
194 case IONIC_XCVR_PID_SFP_10GBASE_SR:
195 ethtool_link_ksettings_add_link_mode(ks, supported,
198 case IONIC_XCVR_PID_SFP_10GBASE_LR:
199 ethtool_link_ksettings_add_link_mode(ks, supported,
202 case IONIC_XCVR_PID_SFP_10GBASE_LRM:
203 ethtool_link_ksettings_add_link_mode(ks, supported,
206 case IONIC_XCVR_PID_SFP_10GBASE_ER:
207 ethtool_link_ksettings_add_link_mode(ks, supported,
210 case IONIC_XCVR_PID_SFP_10GBASE_T:
211 ethtool_link_ksettings_add_link_mode(ks, supported,
214 case IONIC_XCVR_PID_SFP_1000BASE_T:
215 ethtool_link_ksettings_add_link_mode(ks, supported,
218 case IONIC_XCVR_PID_UNKNOWN:
219 /* This means there's no module plugged in */
222 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
223 idev->port_info->status.xcvr.pid,
224 idev->port_info->status.xcvr.pid);
228 bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported,
229 __ETHTOOL_LINK_MODE_MASK_NBITS);
231 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
232 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
233 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC)
234 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
235 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS)
236 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
238 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
239 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
241 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
243 ks->base.port = PORT_DA;
244 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
245 ks->base.port = PORT_FIBRE;
247 ks->base.port = PORT_NONE;
249 if (ks->base.port != PORT_NONE) {
250 ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
252 if (le16_to_cpu(lif->info->status.link_status))
253 ks->base.duplex = DUPLEX_FULL;
255 ks->base.duplex = DUPLEX_UNKNOWN;
257 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
259 if (idev->port_info->config.an_enable) {
260 ethtool_link_ksettings_add_link_mode(ks, advertising,
262 ks->base.autoneg = AUTONEG_ENABLE;
269 static int ionic_set_link_ksettings(struct net_device *netdev,
270 const struct ethtool_link_ksettings *ks)
272 struct ionic_lif *lif = netdev_priv(netdev);
273 struct ionic_dev *idev = &lif->ionic->idev;
274 struct ionic *ionic = lif->ionic;
278 if (ks->base.autoneg != idev->port_info->config.an_enable) {
279 mutex_lock(&ionic->dev_cmd_lock);
280 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
281 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
282 mutex_unlock(&ionic->dev_cmd_lock);
288 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
289 mutex_lock(&ionic->dev_cmd_lock);
290 ionic_dev_cmd_port_speed(idev, ks->base.speed);
291 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
292 mutex_unlock(&ionic->dev_cmd_lock);
300 static void ionic_get_pauseparam(struct net_device *netdev,
301 struct ethtool_pauseparam *pause)
303 struct ionic_lif *lif = netdev_priv(netdev);
308 pause_type = lif->ionic->idev.port_info->config.pause_type;
310 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
311 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
315 static int ionic_set_pauseparam(struct net_device *netdev,
316 struct ethtool_pauseparam *pause)
318 struct ionic_lif *lif = netdev_priv(netdev);
319 struct ionic *ionic = lif->ionic;
326 /* change both at the same time */
327 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
329 requested_pause |= IONIC_PAUSE_F_RX;
331 requested_pause |= IONIC_PAUSE_F_TX;
333 if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
336 mutex_lock(&ionic->dev_cmd_lock);
337 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
338 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
339 mutex_unlock(&ionic->dev_cmd_lock);
346 static int ionic_get_fecparam(struct net_device *netdev,
347 struct ethtool_fecparam *fec)
349 struct ionic_lif *lif = netdev_priv(netdev);
351 switch (lif->ionic->idev.port_info->config.fec_type) {
352 case IONIC_PORT_FEC_TYPE_NONE:
353 fec->active_fec = ETHTOOL_FEC_OFF;
355 case IONIC_PORT_FEC_TYPE_RS:
356 fec->active_fec = ETHTOOL_FEC_RS;
358 case IONIC_PORT_FEC_TYPE_FC:
359 fec->active_fec = ETHTOOL_FEC_BASER;
363 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER;
368 static int ionic_set_fecparam(struct net_device *netdev,
369 struct ethtool_fecparam *fec)
371 struct ionic_lif *lif = netdev_priv(netdev);
375 if (lif->ionic->idev.port_info->config.an_enable) {
376 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
381 case ETHTOOL_FEC_NONE:
382 fec_type = IONIC_PORT_FEC_TYPE_NONE;
384 case ETHTOOL_FEC_OFF:
385 fec_type = IONIC_PORT_FEC_TYPE_NONE;
388 fec_type = IONIC_PORT_FEC_TYPE_RS;
390 case ETHTOOL_FEC_BASER:
391 fec_type = IONIC_PORT_FEC_TYPE_FC;
393 case ETHTOOL_FEC_AUTO:
395 netdev_err(netdev, "FEC request 0x%04x not supported\n",
400 if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
401 mutex_lock(&lif->ionic->dev_cmd_lock);
402 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
403 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
404 mutex_unlock(&lif->ionic->dev_cmd_lock);
410 static int ionic_get_coalesce(struct net_device *netdev,
411 struct ethtool_coalesce *coalesce)
413 struct ionic_lif *lif = netdev_priv(netdev);
415 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
416 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
418 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
419 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
421 coalesce->use_adaptive_tx_coalesce = 0;
423 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
428 static int ionic_set_coalesce(struct net_device *netdev,
429 struct ethtool_coalesce *coalesce)
431 struct ionic_lif *lif = netdev_priv(netdev);
432 struct ionic_identity *ident;
437 ident = &lif->ionic->ident;
438 if (ident->dev.intr_coal_div == 0) {
439 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
440 ident->dev.intr_coal_div);
444 /* Tx normally shares Rx interrupt, so only change Rx if not split */
445 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
446 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
447 coalesce->use_adaptive_tx_coalesce)) {
448 netdev_warn(netdev, "only rx parameters can be changed\n");
452 /* Convert the usec request to a HW usable value. If they asked
453 * for non-zero and it resolved to zero, bump it up
455 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
456 if (!rx_coal && coalesce->rx_coalesce_usecs)
458 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
459 if (!tx_coal && coalesce->tx_coalesce_usecs)
462 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
463 tx_coal > IONIC_INTR_CTRL_COAL_MAX)
466 /* Save the new values */
467 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
468 lif->rx_coalesce_hw = rx_coal;
470 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
471 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
473 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
474 lif->tx_coalesce_hw = tx_coal;
476 if (coalesce->use_adaptive_rx_coalesce) {
477 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
480 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
484 if (coalesce->use_adaptive_tx_coalesce) {
485 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
488 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
492 if (test_bit(IONIC_LIF_F_UP, lif->state)) {
493 for (i = 0; i < lif->nxqs; i++) {
494 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
495 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
496 lif->rxqcqs[i]->intr.index,
497 lif->rx_coalesce_hw);
498 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
501 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
502 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
503 lif->txqcqs[i]->intr.index,
504 lif->tx_coalesce_hw);
505 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
513 static void ionic_get_ringparam(struct net_device *netdev,
514 struct ethtool_ringparam *ring)
516 struct ionic_lif *lif = netdev_priv(netdev);
518 ring->tx_max_pending = IONIC_MAX_TX_DESC;
519 ring->tx_pending = lif->ntxq_descs;
520 ring->rx_max_pending = IONIC_MAX_RX_DESC;
521 ring->rx_pending = lif->nrxq_descs;
524 static int ionic_set_ringparam(struct net_device *netdev,
525 struct ethtool_ringparam *ring)
527 struct ionic_lif *lif = netdev_priv(netdev);
528 struct ionic_queue_params qparam;
531 ionic_init_queue_params(lif, &qparam);
533 if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
534 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
538 if (!is_power_of_2(ring->tx_pending) ||
539 !is_power_of_2(ring->rx_pending)) {
540 netdev_info(netdev, "Descriptor count must be a power of 2\n");
544 /* if nothing to do return success */
545 if (ring->tx_pending == lif->ntxq_descs &&
546 ring->rx_pending == lif->nrxq_descs)
549 if (ring->tx_pending != lif->ntxq_descs)
550 netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
551 lif->ntxq_descs, ring->tx_pending);
553 if (ring->rx_pending != lif->nrxq_descs)
554 netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
555 lif->nrxq_descs, ring->rx_pending);
557 /* if we're not running, just set the values and return */
558 if (!netif_running(lif->netdev)) {
559 lif->ntxq_descs = ring->tx_pending;
560 lif->nrxq_descs = ring->rx_pending;
564 qparam.ntxq_descs = ring->tx_pending;
565 qparam.nrxq_descs = ring->rx_pending;
566 err = ionic_reconfigure_queues(lif, &qparam);
568 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
573 static void ionic_get_channels(struct net_device *netdev,
574 struct ethtool_channels *ch)
576 struct ionic_lif *lif = netdev_priv(netdev);
578 /* report maximum channels */
579 ch->max_combined = lif->ionic->ntxqs_per_lif;
580 ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
581 ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
583 /* report current channels */
584 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
585 ch->rx_count = lif->nxqs;
586 ch->tx_count = lif->nxqs;
588 ch->combined_count = lif->nxqs;
592 static int ionic_set_channels(struct net_device *netdev,
593 struct ethtool_channels *ch)
595 struct ionic_lif *lif = netdev_priv(netdev);
596 struct ionic_queue_params qparam;
600 ionic_init_queue_params(lif, &qparam);
602 if (ch->rx_count != ch->tx_count) {
603 netdev_info(netdev, "The rx and tx count must be equal\n");
607 if (ch->combined_count && ch->rx_count) {
608 netdev_info(netdev, "Use either combined or rx and tx, not both\n");
612 max_cnt = lif->ionic->ntxqs_per_lif;
613 if (ch->combined_count) {
614 if (ch->combined_count > max_cnt)
617 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
618 netdev_info(lif->netdev, "Sharing queue interrupts\n");
619 else if (ch->combined_count == lif->nxqs)
622 if (lif->nxqs != ch->combined_count)
623 netdev_info(netdev, "Changing queue count from %d to %d\n",
624 lif->nxqs, ch->combined_count);
626 qparam.nxqs = ch->combined_count;
627 qparam.intr_split = 0;
630 if (ch->rx_count > max_cnt)
633 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
634 netdev_info(lif->netdev, "Splitting queue interrupts\n");
635 else if (ch->rx_count == lif->nxqs)
638 if (lif->nxqs != ch->rx_count)
639 netdev_info(netdev, "Changing queue count from %d to %d\n",
640 lif->nxqs, ch->rx_count);
642 qparam.nxqs = ch->rx_count;
643 qparam.intr_split = 1;
646 /* if we're not running, just set the values and return */
647 if (!netif_running(lif->netdev)) {
648 lif->nxqs = qparam.nxqs;
650 if (qparam.intr_split) {
651 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
653 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
654 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
655 lif->tx_coalesce_hw = lif->rx_coalesce_hw;
660 err = ionic_reconfigure_queues(lif, &qparam);
662 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
667 static u32 ionic_get_priv_flags(struct net_device *netdev)
669 struct ionic_lif *lif = netdev_priv(netdev);
672 if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
673 priv_flags |= IONIC_PRIV_F_SW_DBG_STATS;
678 static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags)
680 struct ionic_lif *lif = netdev_priv(netdev);
682 clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state);
683 if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS)
684 set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state);
689 static int ionic_get_rxnfc(struct net_device *netdev,
690 struct ethtool_rxnfc *info, u32 *rules)
692 struct ionic_lif *lif = netdev_priv(netdev);
696 case ETHTOOL_GRXRINGS:
697 info->data = lif->nxqs;
700 netdev_err(netdev, "Command parameter %d is not supported\n",
708 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
710 struct ionic_lif *lif = netdev_priv(netdev);
712 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
715 static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
717 return IONIC_RSS_HASH_KEY_SIZE;
720 static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
723 struct ionic_lif *lif = netdev_priv(netdev);
724 unsigned int i, tbl_sz;
727 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
728 for (i = 0; i < tbl_sz; i++)
729 indir[i] = lif->rss_ind_tbl[i];
733 memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
736 *hfunc = ETH_RSS_HASH_TOP;
741 static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir,
742 const u8 *key, const u8 hfunc)
744 struct ionic_lif *lif = netdev_priv(netdev);
746 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
749 return ionic_lif_rss_config(lif, lif->rss_types, key, indir);
752 static int ionic_set_tunable(struct net_device *dev,
753 const struct ethtool_tunable *tuna,
756 struct ionic_lif *lif = netdev_priv(dev);
759 case ETHTOOL_RX_COPYBREAK:
760 lif->rx_copybreak = *(u32 *)data;
769 static int ionic_get_tunable(struct net_device *netdev,
770 const struct ethtool_tunable *tuna, void *data)
772 struct ionic_lif *lif = netdev_priv(netdev);
775 case ETHTOOL_RX_COPYBREAK:
776 *(u32 *)data = lif->rx_copybreak;
785 static int ionic_get_module_info(struct net_device *netdev,
786 struct ethtool_modinfo *modinfo)
789 struct ionic_lif *lif = netdev_priv(netdev);
790 struct ionic_dev *idev = &lif->ionic->idev;
791 struct ionic_xcvr_status *xcvr;
792 struct sfp_eeprom_base *sfp;
794 xcvr = &idev->port_info->status.xcvr;
795 sfp = (struct sfp_eeprom_base *) xcvr->sprom;
797 /* report the module data type and length */
798 switch (sfp->phys_id) {
800 modinfo->type = ETH_MODULE_SFF_8079;
801 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
803 case SFF8024_ID_QSFP_8436_8636:
804 case SFF8024_ID_QSFP28_8636:
805 modinfo->type = ETH_MODULE_SFF_8436;
806 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
809 netdev_info(netdev, "unknown xcvr type 0x%02x\n",
812 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
819 static int ionic_get_module_eeprom(struct net_device *netdev,
820 struct ethtool_eeprom *ee,
823 struct ionic_lif *lif = netdev_priv(netdev);
824 struct ionic_dev *idev = &lif->ionic->idev;
825 struct ionic_xcvr_status *xcvr;
826 char tbuf[sizeof(xcvr->sprom)];
830 /* The NIC keeps the module prom up-to-date in the DMA space
831 * so we can simply copy the module bytes into the data buffer.
833 xcvr = &idev->port_info->status.xcvr;
834 len = min_t(u32, sizeof(xcvr->sprom), ee->len);
837 memcpy(data, xcvr->sprom, len);
838 memcpy(tbuf, xcvr->sprom, len);
840 /* Let's make sure we got a consistent copy */
841 if (!memcmp(data, tbuf, len))
852 static int ionic_get_ts_info(struct net_device *netdev,
853 struct ethtool_ts_info *info)
855 struct ionic_lif *lif = netdev_priv(netdev);
856 struct ionic *ionic = lif->ionic;
859 if (!lif->phc || !lif->phc->ptp)
860 return ethtool_op_get_ts_info(netdev, info);
862 info->phc_index = ptp_clock_index(lif->phc->ptp);
864 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
865 SOF_TIMESTAMPING_RX_SOFTWARE |
866 SOF_TIMESTAMPING_SOFTWARE |
867 SOF_TIMESTAMPING_TX_HARDWARE |
868 SOF_TIMESTAMPING_RX_HARDWARE |
869 SOF_TIMESTAMPING_RAW_HARDWARE;
873 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
876 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
877 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
878 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
880 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
881 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
882 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
886 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
887 BIT(HWTSTAMP_FILTER_ALL);
889 mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
890 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
891 info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
893 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
894 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
895 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
897 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
898 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
899 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
901 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
902 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
903 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
905 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
906 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
907 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
909 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
910 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
911 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
913 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
914 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
915 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
917 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
918 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
919 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
921 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
922 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
923 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
925 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
926 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
927 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
929 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
930 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
931 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
933 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
934 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
935 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
937 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
938 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
939 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
944 static int ionic_nway_reset(struct net_device *netdev)
946 struct ionic_lif *lif = netdev_priv(netdev);
947 struct ionic *ionic = lif->ionic;
950 /* flap the link to force auto-negotiation */
952 mutex_lock(&ionic->dev_cmd_lock);
954 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
955 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
958 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
959 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
962 mutex_unlock(&ionic->dev_cmd_lock);
967 static const struct ethtool_ops ionic_ethtool_ops = {
968 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
969 ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
970 ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
971 .get_drvinfo = ionic_get_drvinfo,
972 .get_regs_len = ionic_get_regs_len,
973 .get_regs = ionic_get_regs,
974 .get_link = ethtool_op_get_link,
975 .get_link_ksettings = ionic_get_link_ksettings,
976 .set_link_ksettings = ionic_set_link_ksettings,
977 .get_coalesce = ionic_get_coalesce,
978 .set_coalesce = ionic_set_coalesce,
979 .get_ringparam = ionic_get_ringparam,
980 .set_ringparam = ionic_set_ringparam,
981 .get_channels = ionic_get_channels,
982 .set_channels = ionic_set_channels,
983 .get_strings = ionic_get_strings,
984 .get_ethtool_stats = ionic_get_stats,
985 .get_sset_count = ionic_get_sset_count,
986 .get_priv_flags = ionic_get_priv_flags,
987 .set_priv_flags = ionic_set_priv_flags,
988 .get_rxnfc = ionic_get_rxnfc,
989 .get_rxfh_indir_size = ionic_get_rxfh_indir_size,
990 .get_rxfh_key_size = ionic_get_rxfh_key_size,
991 .get_rxfh = ionic_get_rxfh,
992 .set_rxfh = ionic_set_rxfh,
993 .get_tunable = ionic_get_tunable,
994 .set_tunable = ionic_set_tunable,
995 .get_module_info = ionic_get_module_info,
996 .get_module_eeprom = ionic_get_module_eeprom,
997 .get_pauseparam = ionic_get_pauseparam,
998 .set_pauseparam = ionic_set_pauseparam,
999 .get_fecparam = ionic_get_fecparam,
1000 .set_fecparam = ionic_set_fecparam,
1001 .get_ts_info = ionic_get_ts_info,
1002 .nway_reset = ionic_nway_reset,
1005 void ionic_ethtool_set_ops(struct net_device *netdev)
1007 netdev->ethtool_ops = &ionic_ethtool_ops;