Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox...
[linux-2.6-microblaze.git] / drivers / net / ethernet / netronome / nfp / nfpcore / nfp_dev.c
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* Copyright (C) 2019 Netronome Systems, Inc. */
3
4 #include <linux/dma-mapping.h>
5 #include <linux/kernel.h>
6 #include <linux/sizes.h>
7
8 #include "nfp_dev.h"
9
10 const struct nfp_dev_info nfp_dev_info[NFP_DEV_CNT] = {
11         [NFP_DEV_NFP3800] = {
12                 .dma_mask               = DMA_BIT_MASK(48),
13                 .qc_idx_mask            = GENMASK(8, 0),
14                 .qc_addr_offset         = 0x400000,
15                 .min_qc_size            = 512,
16                 .max_qc_size            = SZ_64K,
17
18                 .chip_names             = "NFP3800",
19                 .pcie_cfg_expbar_offset = 0x0a00,
20                 .pcie_expl_offset       = 0xd000,
21                 .qc_area_sz             = 0x100000,
22         },
23         [NFP_DEV_NFP3800_VF] = {
24                 .dma_mask               = DMA_BIT_MASK(48),
25                 .qc_idx_mask            = GENMASK(8, 0),
26                 .qc_addr_offset         = 0,
27                 .min_qc_size            = 512,
28                 .max_qc_size            = SZ_64K,
29         },
30         [NFP_DEV_NFP6000] = {
31                 .dma_mask               = DMA_BIT_MASK(40),
32                 .qc_idx_mask            = GENMASK(7, 0),
33                 .qc_addr_offset         = 0x80000,
34                 .min_qc_size            = 256,
35                 .max_qc_size            = SZ_256K,
36
37                 .chip_names             = "NFP4000/NFP5000/NFP6000",
38                 .pcie_cfg_expbar_offset = 0x0400,
39                 .pcie_expl_offset       = 0x1000,
40                 .qc_area_sz             = 0x80000,
41         },
42         [NFP_DEV_NFP6000_VF] = {
43                 .dma_mask               = DMA_BIT_MASK(40),
44                 .qc_idx_mask            = GENMASK(7, 0),
45                 .qc_addr_offset         = 0,
46                 .min_qc_size            = 256,
47                 .max_qc_size            = SZ_256K,
48         },
49 };