1 // SPDX-License-Identifier: GPL-2.0+
2 /* Microchip Sparx5 Switch driver
4 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
7 #include "sparx5_main_regs.h"
8 #include "sparx5_main.h"
9 #include "sparx5_port.h"
11 /* The IFH bit position of the first VSTAX bit. This is because the
12 * VSTAX bit positions in Data sheet is starting from zero.
16 static void ifh_encode_bitfield(void *ifh, u64 value, u32 pos, u32 width)
19 /* Calculate the Start IFH byte position of this IFH bit position */
20 u32 byte = (35 - (pos / 8));
21 /* Calculate the Start bit position in the Start IFH byte */
23 u64 encode = GENMASK(bit + width - 1, bit) & (value << bit);
25 /* Max width is 5 bytes - 40 bits. In worst case this will
26 * spread over 6 bytes - 48 bits
28 compiletime_assert(width <= 40, "Unsupported width, must be <= 40");
30 /* The b0-b7 goes into the start IFH byte */
32 ifh_hdr[byte] |= (u8)((encode & 0xFF));
33 /* The b8-b15 goes into the next IFH byte */
35 ifh_hdr[byte - 1] |= (u8)((encode & 0xFF00) >> 8);
36 /* The b16-b23 goes into the next IFH byte */
37 if (encode & 0xFF0000)
38 ifh_hdr[byte - 2] |= (u8)((encode & 0xFF0000) >> 16);
39 /* The b24-b31 goes into the next IFH byte */
40 if (encode & 0xFF000000)
41 ifh_hdr[byte - 3] |= (u8)((encode & 0xFF000000) >> 24);
42 /* The b32-b39 goes into the next IFH byte */
43 if (encode & 0xFF00000000)
44 ifh_hdr[byte - 4] |= (u8)((encode & 0xFF00000000) >> 32);
45 /* The b40-b47 goes into the next IFH byte */
46 if (encode & 0xFF0000000000)
47 ifh_hdr[byte - 5] |= (u8)((encode & 0xFF0000000000) >> 40);
50 static void sparx5_set_port_ifh(void *ifh_hdr, u16 portno)
52 /* VSTAX.RSV = 1. MSBit must be 1 */
53 ifh_encode_bitfield(ifh_hdr, 1, VSTAX + 79, 1);
54 /* VSTAX.INGR_DROP_MODE = Enable. Don't make head-of-line blocking */
55 ifh_encode_bitfield(ifh_hdr, 1, VSTAX + 55, 1);
56 /* MISC.CPU_MASK/DPORT = Destination port */
57 ifh_encode_bitfield(ifh_hdr, portno, 29, 8);
58 /* MISC.PIPELINE_PT */
59 ifh_encode_bitfield(ifh_hdr, 16, 37, 5);
60 /* MISC.PIPELINE_ACT */
61 ifh_encode_bitfield(ifh_hdr, 1, 42, 3);
62 /* FWD.SRC_PORT = CPU */
63 ifh_encode_bitfield(ifh_hdr, SPX5_PORT_CPU, 46, 7);
64 /* FWD.SFLOW_ID (disable SFlow sampling) */
65 ifh_encode_bitfield(ifh_hdr, 124, 57, 7);
66 /* FWD.UPDATE_FCS = Enable. Enforce update of FCS. */
67 ifh_encode_bitfield(ifh_hdr, 1, 67, 1);
70 static int sparx5_port_open(struct net_device *ndev)
72 struct sparx5_port *port = netdev_priv(ndev);
75 sparx5_port_enable(port, true);
76 err = phylink_of_phy_connect(port->phylink, port->of_node, 0);
78 netdev_err(ndev, "Could not attach to PHY\n");
82 phylink_start(port->phylink);
86 port->conf.power_down = false;
87 if (port->conf.serdes_reset)
88 err = sparx5_serdes_set(port->sparx5, port, &port->conf);
90 err = phy_power_on(port->serdes);
92 netdev_err(ndev, "%s failed\n", __func__);
98 static int sparx5_port_stop(struct net_device *ndev)
100 struct sparx5_port *port = netdev_priv(ndev);
103 sparx5_port_enable(port, false);
104 phylink_stop(port->phylink);
105 phylink_disconnect_phy(port->phylink);
108 /* power down serdes */
109 port->conf.power_down = true;
110 if (port->conf.serdes_reset)
111 err = sparx5_serdes_set(port->sparx5, port, &port->conf);
113 err = phy_power_off(port->serdes);
115 netdev_err(ndev, "%s failed\n", __func__);
120 static void sparx5_set_rx_mode(struct net_device *dev)
122 struct sparx5_port *port = netdev_priv(dev);
123 struct sparx5 *sparx5 = port->sparx5;
125 if (!test_bit(port->portno, sparx5->bridge_mask))
126 __dev_mc_sync(dev, sparx5_mc_sync, sparx5_mc_unsync);
129 static int sparx5_port_get_phys_port_name(struct net_device *dev,
130 char *buf, size_t len)
132 struct sparx5_port *port = netdev_priv(dev);
135 ret = snprintf(buf, len, "p%d", port->portno);
142 static int sparx5_set_mac_address(struct net_device *dev, void *p)
144 struct sparx5_port *port = netdev_priv(dev);
145 struct sparx5 *sparx5 = port->sparx5;
146 const struct sockaddr *addr = p;
148 if (!is_valid_ether_addr(addr->sa_data))
149 return -EADDRNOTAVAIL;
152 sparx5_mact_forget(sparx5, dev->dev_addr, port->pvid);
155 sparx5_mact_learn(sparx5, PGID_CPU, addr->sa_data, port->pvid);
157 /* Record the address */
158 ether_addr_copy(dev->dev_addr, addr->sa_data);
163 static int sparx5_get_port_parent_id(struct net_device *dev,
164 struct netdev_phys_item_id *ppid)
166 struct sparx5_port *sparx5_port = netdev_priv(dev);
167 struct sparx5 *sparx5 = sparx5_port->sparx5;
169 ppid->id_len = sizeof(sparx5->base_mac);
170 memcpy(&ppid->id, &sparx5->base_mac, ppid->id_len);
175 static const struct net_device_ops sparx5_port_netdev_ops = {
176 .ndo_open = sparx5_port_open,
177 .ndo_stop = sparx5_port_stop,
178 .ndo_start_xmit = sparx5_port_xmit_impl,
179 .ndo_set_rx_mode = sparx5_set_rx_mode,
180 .ndo_get_phys_port_name = sparx5_port_get_phys_port_name,
181 .ndo_set_mac_address = sparx5_set_mac_address,
182 .ndo_validate_addr = eth_validate_addr,
183 .ndo_get_stats64 = sparx5_get_stats64,
184 .ndo_get_port_parent_id = sparx5_get_port_parent_id,
187 bool sparx5_netdevice_check(const struct net_device *dev)
189 return dev && (dev->netdev_ops == &sparx5_port_netdev_ops);
192 struct net_device *sparx5_create_netdev(struct sparx5 *sparx5, u32 portno)
194 struct sparx5_port *spx5_port;
195 struct net_device *ndev;
198 ndev = devm_alloc_etherdev(sparx5->dev, sizeof(struct sparx5_port));
200 return ERR_PTR(-ENOMEM);
202 SET_NETDEV_DEV(ndev, sparx5->dev);
203 spx5_port = netdev_priv(ndev);
204 spx5_port->ndev = ndev;
205 spx5_port->sparx5 = sparx5;
206 spx5_port->portno = portno;
207 sparx5_set_port_ifh(spx5_port->ifh, portno);
209 ndev->netdev_ops = &sparx5_port_netdev_ops;
210 ndev->ethtool_ops = &sparx5_ethtool_ops;
212 val = ether_addr_to_u64(sparx5->base_mac) + portno + 1;
213 u64_to_ether_addr(val, ndev->dev_addr);
218 int sparx5_register_netdevs(struct sparx5 *sparx5)
223 for (portno = 0; portno < SPX5_PORTS; portno++)
224 if (sparx5->ports[portno]) {
225 err = register_netdev(sparx5->ports[portno]->ndev);
228 "port: %02u: netdev registration failed\n",
232 sparx5_port_inj_timer_setup(sparx5->ports[portno]);
237 void sparx5_destroy_netdevs(struct sparx5 *sparx5)
239 struct sparx5_port *port;
242 for (portno = 0; portno < SPX5_PORTS; portno++) {
243 port = sparx5->ports[portno];
244 if (port && port->phylink) {
245 /* Disconnect the phy */
247 sparx5_port_stop(port->ndev);
248 phylink_disconnect_phy(port->phylink);
250 phylink_destroy(port->phylink);
251 port->phylink = NULL;
256 void sparx5_unregister_netdevs(struct sparx5 *sparx5)
260 for (portno = 0; portno < SPX5_PORTS; portno++)
261 if (sparx5->ports[portno])
262 unregister_netdev(sparx5->ports[portno]->ndev);