1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2018 Microchip Technology Inc. */
4 #include <linux/module.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/crc32.h>
9 #include <linux/microchipphy.h>
10 #include <linux/net_tstamp.h>
11 #include <linux/of_mdio.h>
12 #include <linux/of_net.h>
13 #include <linux/phy.h>
14 #include <linux/phy_fixed.h>
15 #include <linux/rtnetlink.h>
16 #include <linux/iopoll.h>
17 #include <linux/crc16.h>
18 #include "lan743x_main.h"
19 #include "lan743x_ethtool.h"
21 #define MMD_ACCESS_ADDRESS 0
22 #define MMD_ACCESS_WRITE 1
23 #define MMD_ACCESS_READ 2
24 #define MMD_ACCESS_READ_INC 3
25 #define PCS_POWER_STATE_DOWN 0x6
26 #define PCS_POWER_STATE_UP 0x4
28 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter)
36 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */
37 ret = lan743x_hs_syslock_acquire(adapter, 100);
39 netif_err(adapter, drv, adapter->netdev,
40 "Sys Lock acquire failed ret:%d\n", ret);
44 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG);
45 lan743x_hs_syslock_release(adapter);
46 hw_cfg = lan743x_csr_read(adapter, HW_CFG);
48 if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
49 hw_cfg & HW_CFG_RST_PROTECT_) {
50 strap = lan743x_csr_read(adapter, STRAP_READ);
51 if (strap & STRAP_READ_SGMII_EN_)
52 adapter->is_sgmii_en = true;
54 adapter->is_sgmii_en = false;
56 chip_rev = lan743x_csr_read(adapter, FPGA_REV);
58 if (chip_rev & FPGA_SGMII_OP)
59 adapter->is_sgmii_en = true;
61 adapter->is_sgmii_en = false;
63 adapter->is_sgmii_en = false;
66 netif_dbg(adapter, drv, adapter->netdev,
67 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis");
70 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter)
72 struct lan743x_csr *csr = &adapter->csr;
73 u32 id_rev = csr->id_rev;
75 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) ||
76 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) {
82 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
84 pci_release_selected_regions(adapter->pdev,
85 pci_select_bars(adapter->pdev,
87 pci_disable_device(adapter->pdev);
90 static int lan743x_pci_init(struct lan743x_adapter *adapter,
93 unsigned long bars = 0;
97 ret = pci_enable_device_mem(pdev);
101 netif_info(adapter, probe, adapter->netdev,
102 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
103 pdev->vendor, pdev->device);
104 bars = pci_select_bars(pdev, IORESOURCE_MEM);
105 if (!test_bit(0, &bars))
108 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
112 pci_set_master(pdev);
116 pci_disable_device(adapter->pdev);
122 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
124 return ioread32(&adapter->csr.csr_address[offset]);
127 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
130 iowrite32(data, &adapter->csr.csr_address[offset]);
133 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
135 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
139 data = lan743x_csr_read(adapter, HW_CFG);
140 data |= HW_CFG_LRST_;
141 lan743x_csr_write(adapter, HW_CFG, data);
143 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
144 !(data & HW_CFG_LRST_), 100000, 10000000);
147 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
148 int offset, u32 bit_mask,
149 int target_value, int usleep_min,
150 int usleep_max, int count)
154 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
155 target_value == ((data & bit_mask) ? 1 : 0),
156 usleep_max, usleep_min * count);
159 static int lan743x_csr_init(struct lan743x_adapter *adapter)
161 struct lan743x_csr *csr = &adapter->csr;
162 resource_size_t bar_start, bar_length;
165 bar_start = pci_resource_start(adapter->pdev, 0);
166 bar_length = pci_resource_len(adapter->pdev, 0);
167 csr->csr_address = devm_ioremap(&adapter->pdev->dev,
168 bar_start, bar_length);
169 if (!csr->csr_address) {
174 csr->id_rev = lan743x_csr_read(adapter, ID_REV);
175 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
176 netif_info(adapter, probe, adapter->netdev,
177 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
178 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
179 FPGA_REV_GET_MINOR_(csr->fpga_rev));
180 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
185 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
186 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
187 case ID_REV_CHIP_REV_A0_:
188 csr->flags |= LAN743X_CSR_FLAG_IS_A0;
189 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
191 case ID_REV_CHIP_REV_B0_:
192 csr->flags |= LAN743X_CSR_FLAG_IS_B0;
196 result = lan743x_csr_light_reset(adapter);
204 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter)
206 struct lan743x_intr *intr = &adapter->intr;
208 /* disable the interrupt to prevent repeated re-triggering */
209 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
210 intr->software_isr_flag = true;
211 wake_up(&intr->software_isr_wq);
214 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
216 struct lan743x_tx *tx = context;
217 struct lan743x_adapter *adapter = tx->adapter;
218 bool enable_flag = true;
220 lan743x_csr_read(adapter, INT_EN_SET);
221 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
222 lan743x_csr_write(adapter, INT_EN_CLR,
223 INT_BIT_DMA_TX_(tx->channel_number));
226 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
227 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
231 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
232 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
234 dmac_int_sts = ioc_bit;
235 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
236 dmac_int_en = lan743x_csr_read(adapter,
239 dmac_int_en = ioc_bit;
241 dmac_int_en &= ioc_bit;
242 dmac_int_sts &= dmac_int_en;
243 if (dmac_int_sts & ioc_bit) {
244 napi_schedule(&tx->napi);
245 enable_flag = false;/* poll func will enable later */
251 lan743x_csr_write(adapter, INT_EN_SET,
252 INT_BIT_DMA_TX_(tx->channel_number));
255 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
257 struct lan743x_rx *rx = context;
258 struct lan743x_adapter *adapter = rx->adapter;
259 bool enable_flag = true;
261 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
262 lan743x_csr_write(adapter, INT_EN_CLR,
263 INT_BIT_DMA_RX_(rx->channel_number));
266 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
267 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
271 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
272 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
274 dmac_int_sts = rx_frame_bit;
275 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
276 dmac_int_en = lan743x_csr_read(adapter,
279 dmac_int_en = rx_frame_bit;
281 dmac_int_en &= rx_frame_bit;
282 dmac_int_sts &= dmac_int_en;
283 if (dmac_int_sts & rx_frame_bit) {
284 napi_schedule(&rx->napi);
285 enable_flag = false;/* poll funct will enable later */
291 lan743x_csr_write(adapter, INT_EN_SET,
292 INT_BIT_DMA_RX_(rx->channel_number));
296 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
298 struct lan743x_adapter *adapter = context;
299 unsigned int channel;
301 if (int_sts & INT_BIT_ALL_RX_) {
302 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
304 u32 int_bit = INT_BIT_DMA_RX_(channel);
306 if (int_sts & int_bit) {
307 lan743x_rx_isr(&adapter->rx[channel],
313 if (int_sts & INT_BIT_ALL_TX_) {
314 for (channel = 0; channel < adapter->used_tx_channels;
316 u32 int_bit = INT_BIT_DMA_TX_(channel);
318 if (int_sts & int_bit) {
319 lan743x_tx_isr(&adapter->tx[channel],
325 if (int_sts & INT_BIT_ALL_OTHER_) {
326 if (int_sts & INT_BIT_SW_GP_) {
327 lan743x_intr_software_isr(adapter);
328 int_sts &= ~INT_BIT_SW_GP_;
330 if (int_sts & INT_BIT_1588_) {
331 lan743x_ptp_isr(adapter);
332 int_sts &= ~INT_BIT_1588_;
336 lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
339 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
341 struct lan743x_vector *vector = ptr;
342 struct lan743x_adapter *adapter = vector->adapter;
343 irqreturn_t result = IRQ_NONE;
347 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
348 int_sts = lan743x_csr_read(adapter, INT_STS);
349 } else if (vector->flags &
350 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
351 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
352 int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
354 /* use mask as implied status */
355 int_sts = vector->int_mask | INT_BIT_MAS_;
358 if (!(int_sts & INT_BIT_MAS_))
361 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
362 /* disable vector interrupt */
363 lan743x_csr_write(adapter,
365 INT_VEC_EN_(vector->vector_index));
367 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
368 /* disable master interrupt */
369 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
371 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
372 int_enables = lan743x_csr_read(adapter, INT_EN_SET);
374 /* use vector mask as implied enable mask */
375 int_enables = vector->int_mask;
378 int_sts &= int_enables;
379 int_sts &= vector->int_mask;
381 if (vector->handler) {
382 vector->handler(vector->context,
383 int_sts, vector->flags);
385 /* disable interrupts on this vector */
386 lan743x_csr_write(adapter, INT_EN_CLR,
389 result = IRQ_HANDLED;
392 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
393 /* enable master interrupt */
394 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
396 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
397 /* enable vector interrupt */
398 lan743x_csr_write(adapter,
400 INT_VEC_EN_(vector->vector_index));
405 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
407 struct lan743x_intr *intr = &adapter->intr;
410 intr->software_isr_flag = false;
412 /* enable and activate test interrupt */
413 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
414 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
416 ret = wait_event_timeout(intr->software_isr_wq,
417 intr->software_isr_flag,
418 msecs_to_jiffies(200));
420 /* disable test interrupt */
421 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
423 return ret > 0 ? 0 : -ENODEV;
426 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
427 int vector_index, u32 flags,
429 lan743x_vector_handler handler,
432 struct lan743x_vector *vector = &adapter->intr.vector_list
436 vector->adapter = adapter;
437 vector->flags = flags;
438 vector->vector_index = vector_index;
439 vector->int_mask = int_mask;
440 vector->handler = handler;
441 vector->context = context;
443 ret = request_irq(vector->irq,
444 lan743x_intr_entry_isr,
445 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
446 IRQF_SHARED : 0, DRIVER_NAME, vector);
448 vector->handler = NULL;
449 vector->context = NULL;
450 vector->int_mask = 0;
456 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
459 struct lan743x_vector *vector = &adapter->intr.vector_list
462 free_irq(vector->irq, vector);
463 vector->handler = NULL;
464 vector->context = NULL;
465 vector->int_mask = 0;
469 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
474 for (index = 0; index < adapter->max_vector_count; index++) {
475 if (adapter->intr.vector_list[index].int_mask & int_mask)
476 return adapter->intr.vector_list[index].flags;
481 static void lan743x_intr_close(struct lan743x_adapter *adapter)
483 struct lan743x_intr *intr = &adapter->intr;
486 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
487 if (adapter->is_pci11x1x)
488 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF);
490 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
492 for (index = 0; index < intr->number_of_vectors; index++) {
493 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
494 lan743x_intr_unregister_isr(adapter, index);
495 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
499 if (intr->flags & INTR_FLAG_MSI_ENABLED) {
500 pci_disable_msi(adapter->pdev);
501 intr->flags &= ~INTR_FLAG_MSI_ENABLED;
504 if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
505 pci_disable_msix(adapter->pdev);
506 intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
510 static int lan743x_intr_open(struct lan743x_adapter *adapter)
512 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT];
513 struct lan743x_intr *intr = &adapter->intr;
514 unsigned int used_tx_channels;
515 u32 int_vec_en_auto_clr = 0;
517 u32 int_vec_map0 = 0;
518 u32 int_vec_map1 = 0;
523 intr->number_of_vectors = 0;
525 /* Try to set up MSIX interrupts */
526 max_vector_count = adapter->max_vector_count;
527 memset(&msix_entries[0], 0,
528 sizeof(struct msix_entry) * max_vector_count);
529 for (index = 0; index < max_vector_count; index++)
530 msix_entries[index].entry = index;
531 used_tx_channels = adapter->used_tx_channels;
532 ret = pci_enable_msix_range(adapter->pdev,
534 1 + used_tx_channels +
535 LAN743X_USED_RX_CHANNELS);
538 intr->flags |= INTR_FLAG_MSIX_ENABLED;
539 intr->number_of_vectors = ret;
540 intr->using_vectors = true;
541 for (index = 0; index < intr->number_of_vectors; index++)
542 intr->vector_list[index].irq = msix_entries
544 netif_info(adapter, ifup, adapter->netdev,
545 "using MSIX interrupts, number of vectors = %d\n",
546 intr->number_of_vectors);
549 /* If MSIX failed try to setup using MSI interrupts */
550 if (!intr->number_of_vectors) {
551 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
552 if (!pci_enable_msi(adapter->pdev)) {
553 intr->flags |= INTR_FLAG_MSI_ENABLED;
554 intr->number_of_vectors = 1;
555 intr->using_vectors = true;
556 intr->vector_list[0].irq =
558 netif_info(adapter, ifup, adapter->netdev,
559 "using MSI interrupts, number of vectors = %d\n",
560 intr->number_of_vectors);
565 /* If MSIX, and MSI failed, setup using legacy interrupt */
566 if (!intr->number_of_vectors) {
567 intr->number_of_vectors = 1;
568 intr->using_vectors = false;
569 intr->vector_list[0].irq = intr->irq;
570 netif_info(adapter, ifup, adapter->netdev,
571 "using legacy interrupts\n");
574 /* At this point we must have at least one irq */
575 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
577 /* map all interrupts to vector 0 */
578 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
579 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
580 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
581 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
582 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
583 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
584 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
586 if (intr->using_vectors) {
587 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
588 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
590 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
591 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
592 LAN743X_VECTOR_FLAG_IRQ_SHARED;
595 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
596 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
597 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
598 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
599 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
600 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
601 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
604 init_waitqueue_head(&intr->software_isr_wq);
606 ret = lan743x_intr_register_isr(adapter, 0, flags,
607 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
609 lan743x_intr_shared_isr, adapter);
612 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
614 if (intr->using_vectors)
615 lan743x_csr_write(adapter, INT_VEC_EN_SET,
618 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
619 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
620 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
621 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
622 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
623 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
624 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
625 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
626 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
627 if (adapter->is_pci11x1x) {
628 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD);
629 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD);
630 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654);
631 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210);
633 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
634 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
636 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
639 /* enable interrupts */
640 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
641 ret = lan743x_intr_test_isr(adapter);
645 if (intr->number_of_vectors > 1) {
646 int number_of_tx_vectors = intr->number_of_vectors - 1;
648 if (number_of_tx_vectors > used_tx_channels)
649 number_of_tx_vectors = used_tx_channels;
650 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
651 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
652 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
653 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
654 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
655 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
657 if (adapter->csr.flags &
658 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
659 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
660 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
661 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
662 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
665 for (index = 0; index < number_of_tx_vectors; index++) {
666 u32 int_bit = INT_BIT_DMA_TX_(index);
667 int vector = index + 1;
669 /* map TX interrupt to vector */
670 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
671 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
673 /* Remove TX interrupt from shared mask */
674 intr->vector_list[0].int_mask &= ~int_bit;
675 ret = lan743x_intr_register_isr(adapter, vector, flags,
676 int_bit, lan743x_tx_isr,
677 &adapter->tx[index]);
680 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
682 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
683 lan743x_csr_write(adapter, INT_VEC_EN_SET,
684 INT_VEC_EN_(vector));
687 if ((intr->number_of_vectors - used_tx_channels) > 1) {
688 int number_of_rx_vectors = intr->number_of_vectors -
689 used_tx_channels - 1;
691 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
692 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
694 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
695 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
696 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
697 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
698 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
699 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
701 if (adapter->csr.flags &
702 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
703 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
704 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
705 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
706 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
707 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
709 for (index = 0; index < number_of_rx_vectors; index++) {
710 int vector = index + 1 + used_tx_channels;
711 u32 int_bit = INT_BIT_DMA_RX_(index);
713 /* map RX interrupt to vector */
714 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
715 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
717 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
718 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
719 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
720 int_vec_en_auto_clr);
723 /* Remove RX interrupt from shared mask */
724 intr->vector_list[0].int_mask &= ~int_bit;
725 ret = lan743x_intr_register_isr(adapter, vector, flags,
726 int_bit, lan743x_rx_isr,
727 &adapter->rx[index]);
730 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
732 lan743x_csr_write(adapter, INT_VEC_EN_SET,
733 INT_VEC_EN_(vector));
739 lan743x_intr_close(adapter);
743 static int lan743x_dp_write(struct lan743x_adapter *adapter,
744 u32 select, u32 addr, u32 length, u32 *buf)
749 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
752 dp_sel = lan743x_csr_read(adapter, DP_SEL);
753 dp_sel &= ~DP_SEL_MASK_;
755 lan743x_csr_write(adapter, DP_SEL, dp_sel);
757 for (i = 0; i < length; i++) {
758 lan743x_csr_write(adapter, DP_ADDR, addr + i);
759 lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
760 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
761 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
769 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
773 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
774 MAC_MII_ACC_PHY_ADDR_MASK_;
775 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
776 MAC_MII_ACC_MIIRINDA_MASK_;
779 ret |= MAC_MII_ACC_MII_READ_;
781 ret |= MAC_MII_ACC_MII_WRITE_;
782 ret |= MAC_MII_ACC_MII_BUSY_;
787 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
791 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
792 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
795 static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
797 struct lan743x_adapter *adapter = bus->priv;
801 /* comfirm MII not busy */
802 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
806 /* set the address, index & direction (read from PHY) */
807 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
808 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
809 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
813 val = lan743x_csr_read(adapter, MAC_MII_DATA);
814 return (int)(val & 0xFFFF);
817 static int lan743x_mdiobus_write(struct mii_bus *bus,
818 int phy_id, int index, u16 regval)
820 struct lan743x_adapter *adapter = bus->priv;
824 /* confirm MII not busy */
825 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
829 lan743x_csr_write(adapter, MAC_MII_DATA, val);
831 /* set the address, index & direction (write to PHY) */
832 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
833 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
834 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
838 static u32 lan743x_mac_mmd_access(int id, int index, int op)
843 dev_addr = (index >> 16) & 0x1f;
844 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
845 MAC_MII_ACC_PHY_ADDR_MASK_;
846 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) &
847 MAC_MII_ACC_MIIMMD_MASK_;
848 if (op == MMD_ACCESS_WRITE)
849 ret |= MAC_MII_ACC_MIICMD_WRITE_;
850 else if (op == MMD_ACCESS_READ)
851 ret |= MAC_MII_ACC_MIICMD_READ_;
852 else if (op == MMD_ACCESS_READ_INC)
853 ret |= MAC_MII_ACC_MIICMD_READ_INC_;
855 ret |= MAC_MII_ACC_MIICMD_ADDR_;
856 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_);
861 static int lan743x_mdiobus_c45_read(struct mii_bus *bus, int phy_id, int index)
863 struct lan743x_adapter *adapter = bus->priv;
867 /* comfirm MII not busy */
868 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
871 if (index & MII_ADDR_C45) {
872 /* Load Register Address */
873 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)(index & 0xffff));
874 mmd_access = lan743x_mac_mmd_access(phy_id, index,
876 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
877 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
881 mmd_access = lan743x_mac_mmd_access(phy_id, index,
883 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
884 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
887 ret = lan743x_csr_read(adapter, MAC_MII_DATA);
888 return (int)(ret & 0xFFFF);
891 ret = lan743x_mdiobus_read(bus, phy_id, index);
895 static int lan743x_mdiobus_c45_write(struct mii_bus *bus,
896 int phy_id, int index, u16 regval)
898 struct lan743x_adapter *adapter = bus->priv;
902 /* confirm MII not busy */
903 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
906 if (index & MII_ADDR_C45) {
907 /* Load Register Address */
908 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)(index & 0xffff));
909 mmd_access = lan743x_mac_mmd_access(phy_id, index,
911 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
912 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
916 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval);
917 mmd_access = lan743x_mac_mmd_access(phy_id, index,
919 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
920 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
922 ret = lan743x_mdiobus_write(bus, phy_id, index, regval);
928 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter)
933 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data,
934 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000);
936 netif_err(adapter, drv, adapter->netdev,
937 "%s: error %d sgmii wait timeout\n", __func__, ret);
942 static int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr)
949 netif_err(adapter, probe, adapter->netdev,
950 "%s mmd should <= 31\n", __func__);
954 mutex_lock(&adapter->sgmii_rw_lock);
955 /* Load Register Address */
956 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
957 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_);
958 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
959 ret = lan743x_sgmii_wait_till_not_busy(adapter);
963 val = lan743x_csr_read(adapter, SGMII_DATA);
964 ret = (int)(val & SGMII_DATA_MASK_);
967 mutex_unlock(&adapter->sgmii_rw_lock);
972 static int lan743x_sgmii_write(struct lan743x_adapter *adapter,
973 u8 mmd, u16 addr, u16 val)
979 netif_err(adapter, probe, adapter->netdev,
980 "%s mmd should <= 31\n", __func__);
983 mutex_lock(&adapter->sgmii_rw_lock);
984 /* Load Register Data */
985 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_));
986 /* Load Register Address */
987 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
988 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_);
989 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
990 ret = lan743x_sgmii_wait_till_not_busy(adapter);
991 mutex_unlock(&adapter->sgmii_rw_lock);
996 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter,
1004 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1005 VR_MII_GEN2_4_MPLL_CTRL0);
1009 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_;
1010 if (baud == VR_MII_BAUD_RATE_1P25GBPS) {
1011 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100;
1012 /* mpll_baud_clk/4 */
1015 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125;
1016 /* mpll_baud_clk/2 */
1020 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1021 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0);
1025 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1026 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1);
1030 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1031 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1);
1034 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter,
1038 return lan743x_sgmii_mpll_set(adapter,
1039 VR_MII_BAUD_RATE_3P125GBPS);
1041 return lan743x_sgmii_mpll_set(adapter,
1042 VR_MII_BAUD_RATE_1P25GBPS);
1045 static int lan743x_is_sgmii_2_5G_mode(struct lan743x_adapter *adapter,
1050 ret = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1051 VR_MII_GEN2_4_MPLL_CTRL1);
1055 if (ret == VR_MII_MPLL_MULTIPLIER_125 ||
1056 ret == VR_MII_MPLL_MULTIPLIER_50)
1064 static int lan743x_sgmii_aneg_update(struct lan743x_adapter *adapter)
1066 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd;
1072 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE)
1073 /* Switch to 2.5 Gbps */
1074 ret = lan743x_sgmii_2_5G_mode_set(adapter, true);
1076 /* Switch to 10/100/1000 Mbps clock */
1077 ret = lan743x_sgmii_2_5G_mode_set(adapter, false);
1081 /* Enable SGMII Auto NEG */
1082 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1086 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL);
1090 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1095 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) {
1096 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100);
1097 mii_ctrl |= BMCR_SPEED1000;
1098 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1099 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1100 /* In order for Auto-Negotiation to operate properly at
1101 * 2.5 Gbps the 1.6ms link timer values must be adjusted
1102 * The VR_MII_LINK_TIMER_CTRL Register must be set to
1103 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the
1104 * VR_MII_DIG_CTRL1 Register set to 1
1106 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1107 VR_MII_LINK_TIMER_CTRL, 0x7A1);
1111 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART);
1112 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_;
1113 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1114 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1117 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR,
1122 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1123 VR_MII_DIG_CTRL1, dgt_ctrl);
1127 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1128 VR_MII_AN_CTRL, an_ctrl);
1131 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state)
1137 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1139 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >>
1140 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state)
1142 usleep_range(1000, 2000);
1143 } while (wait_cnt++ < 10);
1151 static int lan743x_sgmii_config(struct lan743x_adapter *adapter)
1153 struct net_device *netdev = adapter->netdev;
1154 struct phy_device *phydev = netdev->phydev;
1155 enum lan743x_sgmii_lsd lsd = POWER_DOWN;
1160 switch (phydev->speed) {
1162 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER)
1163 lsd = LINK_2500_MASTER;
1165 lsd = LINK_2500_SLAVE;
1168 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER)
1169 lsd = LINK_1000_MASTER;
1171 lsd = LINK_1000_SLAVE;
1186 netif_err(adapter, drv, adapter->netdev,
1187 "Invalid speed %d\n", phydev->speed);
1191 adapter->sgmii_lsd = lsd;
1192 ret = lan743x_sgmii_aneg_update(adapter);
1194 netif_err(adapter, drv, adapter->netdev,
1195 "error %d SGMII cfg failed\n", ret);
1199 ret = lan743x_is_sgmii_2_5G_mode(adapter, &status);
1201 netif_err(adapter, drv, adapter->netdev,
1202 "erro %d SGMII get mode failed\n", ret);
1207 netif_dbg(adapter, drv, adapter->netdev,
1208 "SGMII 2.5G mode enable\n");
1210 netif_dbg(adapter, drv, adapter->netdev,
1211 "SGMII 1G mode enable\n");
1213 /* SGMII/1000/2500BASE-X PCS power down */
1214 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1218 mii_ctl |= BMCR_PDOWN;
1219 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1223 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN);
1227 /* SGMII/1000/2500BASE-X PCS power up */
1228 mii_ctl &= ~BMCR_PDOWN;
1229 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1233 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP);
1240 static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
1243 u32 addr_lo, addr_hi;
1251 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
1252 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
1254 ether_addr_copy(adapter->mac_address, addr);
1255 netif_info(adapter, drv, adapter->netdev,
1256 "MAC address set to %pM\n", addr);
1259 static int lan743x_mac_init(struct lan743x_adapter *adapter)
1261 bool mac_address_valid = true;
1262 struct net_device *netdev;
1263 u32 mac_addr_hi = 0;
1264 u32 mac_addr_lo = 0;
1267 netdev = adapter->netdev;
1269 /* disable auto duplex, and speed detection. Phylib does that */
1270 data = lan743x_csr_read(adapter, MAC_CR);
1271 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
1272 data |= MAC_CR_CNTR_RST_;
1273 lan743x_csr_write(adapter, MAC_CR, data);
1275 if (!is_valid_ether_addr(adapter->mac_address)) {
1276 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
1277 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
1278 adapter->mac_address[0] = mac_addr_lo & 0xFF;
1279 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
1280 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
1281 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
1282 adapter->mac_address[4] = mac_addr_hi & 0xFF;
1283 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
1285 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
1286 mac_addr_lo == 0xFFFFFFFF) {
1287 mac_address_valid = false;
1288 } else if (!is_valid_ether_addr(adapter->mac_address)) {
1289 mac_address_valid = false;
1292 if (!mac_address_valid)
1293 eth_random_addr(adapter->mac_address);
1295 lan743x_mac_set_address(adapter, adapter->mac_address);
1296 eth_hw_addr_set(netdev, adapter->mac_address);
1301 static int lan743x_mac_open(struct lan743x_adapter *adapter)
1305 temp = lan743x_csr_read(adapter, MAC_RX);
1306 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
1307 temp = lan743x_csr_read(adapter, MAC_TX);
1308 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
1312 static void lan743x_mac_close(struct lan743x_adapter *adapter)
1316 temp = lan743x_csr_read(adapter, MAC_TX);
1317 temp &= ~MAC_TX_TXEN_;
1318 lan743x_csr_write(adapter, MAC_TX, temp);
1319 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
1320 1, 1000, 20000, 100);
1322 temp = lan743x_csr_read(adapter, MAC_RX);
1323 temp &= ~MAC_RX_RXEN_;
1324 lan743x_csr_write(adapter, MAC_RX, temp);
1325 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1326 1, 1000, 20000, 100);
1329 static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
1330 bool tx_enable, bool rx_enable)
1332 u32 flow_setting = 0;
1334 /* set maximum pause time because when fifo space frees
1335 * up a zero value pause frame will be sent to release the pause
1337 flow_setting = MAC_FLOW_CR_FCPT_MASK_;
1339 flow_setting |= MAC_FLOW_CR_TX_FCEN_;
1341 flow_setting |= MAC_FLOW_CR_RX_FCEN_;
1342 lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
1345 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
1350 mac_rx = lan743x_csr_read(adapter, MAC_RX);
1351 if (mac_rx & MAC_RX_RXEN_) {
1353 if (mac_rx & MAC_RX_RXD_) {
1354 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1355 mac_rx &= ~MAC_RX_RXD_;
1357 mac_rx &= ~MAC_RX_RXEN_;
1358 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1359 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1360 1, 1000, 20000, 100);
1361 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
1364 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
1365 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN)
1366 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
1367 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1370 mac_rx |= MAC_RX_RXEN_;
1371 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1377 static int lan743x_phy_reset(struct lan743x_adapter *adapter)
1381 /* Only called with in probe, and before mdiobus_register */
1383 data = lan743x_csr_read(adapter, PMT_CTL);
1384 data |= PMT_CTL_ETH_PHY_RST_;
1385 lan743x_csr_write(adapter, PMT_CTL, data);
1387 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
1388 (!(data & PMT_CTL_ETH_PHY_RST_) &&
1389 (data & PMT_CTL_READY_)),
1393 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
1394 u16 local_adv, u16 remote_adv)
1396 struct lan743x_phy *phy = &adapter->phy;
1399 if (phy->fc_autoneg)
1400 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
1402 cap = phy->fc_request_control;
1404 lan743x_mac_flow_ctrl_set_enables(adapter,
1406 cap & FLOW_CTRL_RX);
1409 static int lan743x_phy_init(struct lan743x_adapter *adapter)
1411 return lan743x_phy_reset(adapter);
1414 static void lan743x_phy_link_status_change(struct net_device *netdev)
1416 struct lan743x_adapter *adapter = netdev_priv(netdev);
1417 struct phy_device *phydev = netdev->phydev;
1420 phy_print_status(phydev);
1421 if (phydev->state == PHY_RUNNING) {
1422 int remote_advertisement = 0;
1423 int local_advertisement = 0;
1425 data = lan743x_csr_read(adapter, MAC_CR);
1427 /* set interface mode */
1428 if (phy_interface_is_rgmii(phydev))
1430 data &= ~MAC_CR_MII_EN_;
1433 data |= MAC_CR_MII_EN_;
1435 /* set duplex mode */
1437 data |= MAC_CR_DPX_;
1439 data &= ~MAC_CR_DPX_;
1442 switch (phydev->speed) {
1444 data &= ~MAC_CR_CFG_H_;
1445 data &= ~MAC_CR_CFG_L_;
1448 data &= ~MAC_CR_CFG_H_;
1449 data |= MAC_CR_CFG_L_;
1452 data |= MAC_CR_CFG_H_;
1453 data &= ~MAC_CR_CFG_L_;
1456 data |= MAC_CR_CFG_H_;
1457 data |= MAC_CR_CFG_L_;
1460 lan743x_csr_write(adapter, MAC_CR, data);
1462 local_advertisement =
1463 linkmode_adv_to_mii_adv_t(phydev->advertising);
1464 remote_advertisement =
1465 linkmode_adv_to_mii_adv_t(phydev->lp_advertising);
1467 lan743x_phy_update_flowcontrol(adapter, local_advertisement,
1468 remote_advertisement);
1469 lan743x_ptp_update_latency(adapter, phydev->speed);
1470 if (phydev->interface == PHY_INTERFACE_MODE_SGMII ||
1471 phydev->interface == PHY_INTERFACE_MODE_1000BASEX ||
1472 phydev->interface == PHY_INTERFACE_MODE_2500BASEX)
1473 lan743x_sgmii_config(adapter);
1477 static void lan743x_phy_close(struct lan743x_adapter *adapter)
1479 struct net_device *netdev = adapter->netdev;
1481 phy_stop(netdev->phydev);
1482 phy_disconnect(netdev->phydev);
1483 netdev->phydev = NULL;
1486 static int lan743x_phy_open(struct lan743x_adapter *adapter)
1488 struct net_device *netdev = adapter->netdev;
1489 struct lan743x_phy *phy = &adapter->phy;
1490 struct phy_device *phydev;
1493 /* try devicetree phy, or fixed link */
1494 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node,
1495 lan743x_phy_link_status_change);
1498 /* try internal phy */
1499 phydev = phy_find_first(adapter->mdiobus);
1503 if (adapter->is_pci11x1x)
1504 ret = phy_connect_direct(netdev, phydev,
1505 lan743x_phy_link_status_change,
1506 PHY_INTERFACE_MODE_RGMII);
1508 ret = phy_connect_direct(netdev, phydev,
1509 lan743x_phy_link_status_change,
1510 PHY_INTERFACE_MODE_GMII);
1515 /* MAC doesn't support 1000T Half */
1516 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
1518 /* support both flow controls */
1519 phy_support_asym_pause(phydev);
1520 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
1521 phy->fc_autoneg = phydev->autoneg;
1524 phy_start_aneg(phydev);
1525 phy_attached_info(phydev);
1532 static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1534 lan743x_csr_write(adapter, RFE_RSS_CFG,
1535 RFE_RSS_CFG_UDP_IPV6_EX_ |
1536 RFE_RSS_CFG_TCP_IPV6_EX_ |
1537 RFE_RSS_CFG_IPV6_EX_ |
1538 RFE_RSS_CFG_UDP_IPV6_ |
1539 RFE_RSS_CFG_TCP_IPV6_ |
1541 RFE_RSS_CFG_UDP_IPV4_ |
1542 RFE_RSS_CFG_TCP_IPV4_ |
1544 RFE_RSS_CFG_VALID_HASH_BITS_ |
1545 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1546 RFE_RSS_CFG_RSS_HASH_STORE_ |
1547 RFE_RSS_CFG_RSS_ENABLE_);
1550 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1553 u32 mac_addr_hi = 0;
1554 u32 mac_addr_lo = 0;
1556 /* Add mac address to perfect Filter */
1557 mac_addr = adapter->mac_address;
1558 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1559 (((u32)(mac_addr[1])) << 8) |
1560 (((u32)(mac_addr[2])) << 16) |
1561 (((u32)(mac_addr[3])) << 24));
1562 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1563 (((u32)(mac_addr[5])) << 8));
1565 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1566 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1567 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1570 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1572 struct net_device *netdev = adapter->netdev;
1573 u32 hash_table[DP_SEL_VHF_HASH_LEN];
1577 rfctl = lan743x_csr_read(adapter, RFE_CTL);
1578 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1579 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1580 rfctl |= RFE_CTL_AB_;
1581 if (netdev->flags & IFF_PROMISC) {
1582 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1584 if (netdev->flags & IFF_ALLMULTI)
1585 rfctl |= RFE_CTL_AM_;
1588 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1589 if (netdev_mc_count(netdev)) {
1590 struct netdev_hw_addr *ha;
1593 rfctl |= RFE_CTL_DA_PERFECT_;
1595 netdev_for_each_mc_addr(ha, netdev) {
1596 /* set first 32 into Perfect Filter */
1598 lan743x_csr_write(adapter,
1599 RFE_ADDR_FILT_HI(i), 0);
1601 data = ha->addr[2] | (data << 8);
1602 data = ha->addr[1] | (data << 8);
1603 data = ha->addr[0] | (data << 8);
1604 lan743x_csr_write(adapter,
1605 RFE_ADDR_FILT_LO(i), data);
1607 data = ha->addr[4] | (data << 8);
1608 data |= RFE_ADDR_FILT_HI_VALID_;
1609 lan743x_csr_write(adapter,
1610 RFE_ADDR_FILT_HI(i), data);
1612 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1614 hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1615 rfctl |= RFE_CTL_MCAST_HASH_;
1621 lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1622 DP_SEL_VHF_VLAN_LEN,
1623 DP_SEL_VHF_HASH_LEN, hash_table);
1624 lan743x_csr_write(adapter, RFE_CTL, rfctl);
1627 static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1631 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1632 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1633 0, 1000, 20000, 100);
1634 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1635 case DMA_DESCRIPTOR_SPACING_16:
1636 data = DMAC_CFG_MAX_DSPACE_16_;
1638 case DMA_DESCRIPTOR_SPACING_32:
1639 data = DMAC_CFG_MAX_DSPACE_32_;
1641 case DMA_DESCRIPTOR_SPACING_64:
1642 data = DMAC_CFG_MAX_DSPACE_64_;
1644 case DMA_DESCRIPTOR_SPACING_128:
1645 data = DMAC_CFG_MAX_DSPACE_128_;
1650 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1651 data |= DMAC_CFG_COAL_EN_;
1652 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1653 data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1654 lan743x_csr_write(adapter, DMAC_CFG, data);
1655 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1656 data |= DMAC_COAL_CFG_TIMER_TX_START_;
1657 data |= DMAC_COAL_CFG_FLUSH_INTS_;
1658 data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1659 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1660 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1661 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1662 lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1663 data = DMAC_OBFF_TX_THRES_SET_(0x08);
1664 data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1665 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1669 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1674 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1675 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1676 DMAC_CMD_START_T_(tx_channel)),
1678 DMAC_CMD_STOP_T_(tx_channel)));
1681 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1688 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1689 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1690 usleep_range(1000, 20000);
1693 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1698 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1703 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1704 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1705 DMAC_CMD_START_R_(rx_channel)),
1707 DMAC_CMD_STOP_R_(rx_channel)));
1710 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1717 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1718 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1719 usleep_range(1000, 20000);
1722 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1727 static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1728 int descriptor_index, bool cleanup)
1730 struct lan743x_tx_buffer_info *buffer_info = NULL;
1731 struct lan743x_tx_descriptor *descriptor = NULL;
1732 u32 descriptor_type = 0;
1735 descriptor = &tx->ring_cpu_ptr[descriptor_index];
1736 buffer_info = &tx->buffer_info[descriptor_index];
1737 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1740 descriptor_type = le32_to_cpu(descriptor->data0) &
1741 TX_DESC_DATA0_DTYPE_MASK_;
1742 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1743 goto clean_up_data_descriptor;
1747 clean_up_data_descriptor:
1748 if (buffer_info->dma_ptr) {
1749 if (buffer_info->flags &
1750 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1751 dma_unmap_page(&tx->adapter->pdev->dev,
1752 buffer_info->dma_ptr,
1753 buffer_info->buffer_length,
1756 dma_unmap_single(&tx->adapter->pdev->dev,
1757 buffer_info->dma_ptr,
1758 buffer_info->buffer_length,
1761 buffer_info->dma_ptr = 0;
1762 buffer_info->buffer_length = 0;
1764 if (!buffer_info->skb)
1767 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
1768 dev_kfree_skb_any(buffer_info->skb);
1773 lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1774 dev_kfree_skb_any(buffer_info->skb);
1776 ignore_sync = (buffer_info->flags &
1777 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1778 lan743x_ptp_tx_timestamp_skb(tx->adapter,
1779 buffer_info->skb, ignore_sync);
1783 buffer_info->skb = NULL;
1786 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1789 memset(buffer_info, 0, sizeof(*buffer_info));
1790 memset(descriptor, 0, sizeof(*descriptor));
1793 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1795 return ((++index) % tx->ring_size);
1798 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1800 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) {
1801 lan743x_tx_release_desc(tx, tx->last_head, false);
1802 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1806 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1808 u32 original_head = 0;
1810 original_head = tx->last_head;
1812 lan743x_tx_release_desc(tx, tx->last_head, true);
1813 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1814 } while (tx->last_head != original_head);
1815 memset(tx->ring_cpu_ptr, 0,
1816 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1817 memset(tx->buffer_info, 0,
1818 sizeof(*tx->buffer_info) * (tx->ring_size));
1821 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1822 struct sk_buff *skb)
1824 int result = 1; /* 1 for the main skb buffer */
1827 if (skb_is_gso(skb))
1828 result++; /* requires an extension descriptor */
1829 nr_frags = skb_shinfo(skb)->nr_frags;
1830 result += nr_frags; /* 1 for each fragment buffer */
1834 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1836 int last_head = tx->last_head;
1837 int last_tail = tx->last_tail;
1839 if (last_tail >= last_head)
1840 return tx->ring_size - last_tail + last_head - 1;
1842 return last_head - last_tail - 1;
1845 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1846 bool enable_timestamping,
1847 bool enable_onestep_sync)
1849 if (enable_timestamping)
1850 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1852 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1853 if (enable_onestep_sync)
1854 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1856 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1859 static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1860 unsigned char *first_buffer,
1861 unsigned int first_buffer_length,
1862 unsigned int frame_length,
1866 /* called only from within lan743x_tx_xmit_frame.
1867 * assuming tx->ring_lock has already been acquired.
1869 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1870 struct lan743x_tx_buffer_info *buffer_info = NULL;
1871 struct lan743x_adapter *adapter = tx->adapter;
1872 struct device *dev = &adapter->pdev->dev;
1875 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1876 tx->frame_first = tx->last_tail;
1877 tx->frame_tail = tx->frame_first;
1879 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1880 buffer_info = &tx->buffer_info[tx->frame_tail];
1881 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1883 if (dma_mapping_error(dev, dma_ptr))
1886 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1887 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1888 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1889 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1891 buffer_info->skb = NULL;
1892 buffer_info->dma_ptr = dma_ptr;
1893 buffer_info->buffer_length = first_buffer_length;
1894 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1896 tx->frame_data0 = (first_buffer_length &
1897 TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1898 TX_DESC_DATA0_DTYPE_DATA_ |
1902 tx->frame_data0 |= TX_DESC_DATA0_TSE_;
1905 tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1906 TX_DESC_DATA0_IPE_ |
1909 /* data0 will be programmed in one of other frame assembler functions */
1913 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1914 unsigned int frame_length,
1917 /* called only from within lan743x_tx_xmit_frame.
1918 * assuming tx->ring_lock has already been acquired.
1920 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1921 struct lan743x_tx_buffer_info *buffer_info = NULL;
1923 /* wrap up previous descriptor */
1924 tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1925 if (nr_frags <= 0) {
1926 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1927 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1929 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1930 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1932 /* move to next descriptor */
1933 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1934 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1935 buffer_info = &tx->buffer_info[tx->frame_tail];
1937 /* add extension descriptor */
1938 tx_descriptor->data1 = 0;
1939 tx_descriptor->data2 = 0;
1940 tx_descriptor->data3 = 0;
1942 buffer_info->skb = NULL;
1943 buffer_info->dma_ptr = 0;
1944 buffer_info->buffer_length = 0;
1945 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1947 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1948 TX_DESC_DATA0_DTYPE_EXT_ |
1949 TX_DESC_DATA0_EXT_LSO_;
1951 /* data0 will be programmed in one of other frame assembler functions */
1954 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1955 const skb_frag_t *fragment,
1956 unsigned int frame_length)
1958 /* called only from within lan743x_tx_xmit_frame
1959 * assuming tx->ring_lock has already been acquired
1961 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1962 struct lan743x_tx_buffer_info *buffer_info = NULL;
1963 struct lan743x_adapter *adapter = tx->adapter;
1964 struct device *dev = &adapter->pdev->dev;
1965 unsigned int fragment_length = 0;
1968 fragment_length = skb_frag_size(fragment);
1969 if (!fragment_length)
1972 /* wrap up previous descriptor */
1973 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1974 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1976 /* move to next descriptor */
1977 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1978 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1979 buffer_info = &tx->buffer_info[tx->frame_tail];
1980 dma_ptr = skb_frag_dma_map(dev, fragment,
1983 if (dma_mapping_error(dev, dma_ptr)) {
1986 /* cleanup all previously setup descriptors */
1987 desc_index = tx->frame_first;
1988 while (desc_index != tx->frame_tail) {
1989 lan743x_tx_release_desc(tx, desc_index, true);
1990 desc_index = lan743x_tx_next_index(tx, desc_index);
1993 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1994 tx->frame_first = 0;
1995 tx->frame_data0 = 0;
2000 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
2001 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
2002 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
2003 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
2005 buffer_info->skb = NULL;
2006 buffer_info->dma_ptr = dma_ptr;
2007 buffer_info->buffer_length = fragment_length;
2008 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
2009 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
2011 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
2012 TX_DESC_DATA0_DTYPE_DATA_ |
2015 /* data0 will be programmed in one of other frame assembler functions */
2019 static void lan743x_tx_frame_end(struct lan743x_tx *tx,
2020 struct sk_buff *skb,
2024 /* called only from within lan743x_tx_xmit_frame
2025 * assuming tx->ring_lock has already been acquired
2027 struct lan743x_tx_descriptor *tx_descriptor = NULL;
2028 struct lan743x_tx_buffer_info *buffer_info = NULL;
2029 struct lan743x_adapter *adapter = tx->adapter;
2030 u32 tx_tail_flags = 0;
2032 /* wrap up previous descriptor */
2033 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
2034 TX_DESC_DATA0_DTYPE_DATA_) {
2035 tx->frame_data0 |= TX_DESC_DATA0_LS_;
2036 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
2039 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
2040 buffer_info = &tx->buffer_info[tx->frame_tail];
2041 buffer_info->skb = skb;
2043 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
2045 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
2047 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
2048 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
2049 tx->last_tail = tx->frame_tail;
2053 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2054 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
2055 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
2056 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
2057 TX_TAIL_SET_TOP_INT_EN_;
2059 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2060 tx_tail_flags | tx->frame_tail);
2061 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
2064 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
2065 struct sk_buff *skb)
2067 int required_number_of_descriptors = 0;
2068 unsigned int start_frame_length = 0;
2069 unsigned int frame_length = 0;
2070 unsigned int head_length = 0;
2071 unsigned long irq_flags = 0;
2072 bool do_timestamp = false;
2073 bool ignore_sync = false;
2078 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
2080 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2081 if (required_number_of_descriptors >
2082 lan743x_tx_get_avail_desc(tx)) {
2083 if (required_number_of_descriptors > (tx->ring_size - 1)) {
2084 dev_kfree_skb_irq(skb);
2086 /* save to overflow buffer */
2087 tx->overflow_skb = skb;
2088 netif_stop_queue(tx->adapter->netdev);
2093 /* space available, transmit skb */
2094 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
2095 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
2096 (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
2097 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
2098 do_timestamp = true;
2099 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
2102 head_length = skb_headlen(skb);
2103 frame_length = skb_pagelen(skb);
2104 nr_frags = skb_shinfo(skb)->nr_frags;
2105 start_frame_length = frame_length;
2106 gso = skb_is_gso(skb);
2108 start_frame_length = max(skb_shinfo(skb)->gso_size,
2112 if (lan743x_tx_frame_start(tx,
2113 skb->data, head_length,
2116 skb->ip_summed == CHECKSUM_PARTIAL)) {
2117 dev_kfree_skb_irq(skb);
2123 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
2128 for (j = 0; j < nr_frags; j++) {
2129 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]);
2131 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
2132 /* upon error no need to call
2133 * lan743x_tx_frame_end
2134 * frame assembler clean up was performed inside
2135 * lan743x_tx_frame_add_fragment
2137 dev_kfree_skb_irq(skb);
2143 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
2146 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2147 return NETDEV_TX_OK;
2150 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
2152 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
2153 struct lan743x_adapter *adapter = tx->adapter;
2154 bool start_transmitter = false;
2155 unsigned long irq_flags = 0;
2158 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
2159 lan743x_csr_read(adapter, DMAC_INT_STS);
2160 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
2161 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
2162 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2164 /* clean up tx ring */
2165 lan743x_tx_release_completed_descriptors(tx);
2166 if (netif_queue_stopped(adapter->netdev)) {
2167 if (tx->overflow_skb) {
2168 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <=
2169 lan743x_tx_get_avail_desc(tx))
2170 start_transmitter = true;
2172 netif_wake_queue(adapter->netdev);
2175 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2177 if (start_transmitter) {
2178 /* space is now available, transmit overflow skb */
2179 lan743x_tx_xmit_frame(tx, tx->overflow_skb);
2180 tx->overflow_skb = NULL;
2181 netif_wake_queue(adapter->netdev);
2184 if (!napi_complete(napi))
2188 lan743x_csr_write(adapter, INT_EN_SET,
2189 INT_BIT_DMA_TX_(tx->channel_number));
2190 lan743x_csr_read(adapter, INT_STS);
2196 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
2198 if (tx->head_cpu_ptr) {
2199 dma_free_coherent(&tx->adapter->pdev->dev,
2200 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr,
2202 tx->head_cpu_ptr = NULL;
2203 tx->head_dma_ptr = 0;
2205 kfree(tx->buffer_info);
2206 tx->buffer_info = NULL;
2208 if (tx->ring_cpu_ptr) {
2209 dma_free_coherent(&tx->adapter->pdev->dev,
2210 tx->ring_allocation_size, tx->ring_cpu_ptr,
2212 tx->ring_allocation_size = 0;
2213 tx->ring_cpu_ptr = NULL;
2214 tx->ring_dma_ptr = 0;
2219 static int lan743x_tx_ring_init(struct lan743x_tx *tx)
2221 size_t ring_allocation_size = 0;
2222 void *cpu_ptr = NULL;
2226 tx->ring_size = LAN743X_TX_RING_SIZE;
2227 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
2231 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
2232 DMA_BIT_MASK(64))) {
2233 dev_warn(&tx->adapter->pdev->dev,
2234 "lan743x_: No suitable DMA available\n");
2238 ring_allocation_size = ALIGN(tx->ring_size *
2239 sizeof(struct lan743x_tx_descriptor),
2242 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2243 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2249 tx->ring_allocation_size = ring_allocation_size;
2250 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
2251 tx->ring_dma_ptr = dma_ptr;
2253 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
2258 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
2260 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2261 sizeof(*tx->head_cpu_ptr), &dma_ptr,
2268 tx->head_cpu_ptr = cpu_ptr;
2269 tx->head_dma_ptr = dma_ptr;
2270 if (tx->head_dma_ptr & 0x3) {
2278 lan743x_tx_ring_cleanup(tx);
2282 static void lan743x_tx_close(struct lan743x_tx *tx)
2284 struct lan743x_adapter *adapter = tx->adapter;
2286 lan743x_csr_write(adapter,
2288 DMAC_CMD_STOP_T_(tx->channel_number));
2289 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
2291 lan743x_csr_write(adapter,
2293 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2294 lan743x_csr_write(adapter, INT_EN_CLR,
2295 INT_BIT_DMA_TX_(tx->channel_number));
2296 napi_disable(&tx->napi);
2297 netif_napi_del(&tx->napi);
2299 lan743x_csr_write(adapter, FCT_TX_CTL,
2300 FCT_TX_CTL_DIS_(tx->channel_number));
2301 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2302 FCT_TX_CTL_EN_(tx->channel_number),
2303 0, 1000, 20000, 100);
2305 lan743x_tx_release_all_descriptors(tx);
2307 if (tx->overflow_skb) {
2308 dev_kfree_skb(tx->overflow_skb);
2309 tx->overflow_skb = NULL;
2312 lan743x_tx_ring_cleanup(tx);
2315 static int lan743x_tx_open(struct lan743x_tx *tx)
2317 struct lan743x_adapter *adapter = NULL;
2321 adapter = tx->adapter;
2322 ret = lan743x_tx_ring_init(tx);
2326 /* initialize fifo */
2327 lan743x_csr_write(adapter, FCT_TX_CTL,
2328 FCT_TX_CTL_RESET_(tx->channel_number));
2329 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2330 FCT_TX_CTL_RESET_(tx->channel_number),
2331 0, 1000, 20000, 100);
2334 lan743x_csr_write(adapter, FCT_TX_CTL,
2335 FCT_TX_CTL_EN_(tx->channel_number));
2337 /* reset tx channel */
2338 lan743x_csr_write(adapter, DMAC_CMD,
2339 DMAC_CMD_TX_SWR_(tx->channel_number));
2340 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2341 DMAC_CMD_TX_SWR_(tx->channel_number),
2342 0, 1000, 20000, 100);
2344 /* Write TX_BASE_ADDR */
2345 lan743x_csr_write(adapter,
2346 TX_BASE_ADDRH(tx->channel_number),
2347 DMA_ADDR_HIGH32(tx->ring_dma_ptr));
2348 lan743x_csr_write(adapter,
2349 TX_BASE_ADDRL(tx->channel_number),
2350 DMA_ADDR_LOW32(tx->ring_dma_ptr));
2352 /* Write TX_CFG_B */
2353 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
2354 data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
2355 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
2356 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2357 data |= TX_CFG_B_TDMABL_512_;
2358 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
2360 /* Write TX_CFG_A */
2361 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
2362 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2363 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
2364 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
2365 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
2366 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
2368 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
2370 /* Write TX_HEAD_WRITEBACK_ADDR */
2371 lan743x_csr_write(adapter,
2372 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
2373 DMA_ADDR_HIGH32(tx->head_dma_ptr));
2374 lan743x_csr_write(adapter,
2375 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
2376 DMA_ADDR_LOW32(tx->head_dma_ptr));
2379 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
2383 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2384 (u32)(tx->last_tail));
2385 tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2387 (tx->channel_number));
2388 netif_napi_add_tx_weight(adapter->netdev,
2389 &tx->napi, lan743x_tx_napi_poll,
2391 napi_enable(&tx->napi);
2394 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2395 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
2396 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2397 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
2398 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2399 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
2400 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2401 data |= TX_CFG_C_TX_INT_EN_R2C_;
2402 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
2404 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
2405 lan743x_csr_write(adapter, INT_EN_SET,
2406 INT_BIT_DMA_TX_(tx->channel_number));
2407 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2408 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2410 /* start dmac channel */
2411 lan743x_csr_write(adapter, DMAC_CMD,
2412 DMAC_CMD_START_T_(tx->channel_number));
2416 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
2418 return ((++index) % rx->ring_size);
2421 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index)
2423 /* update the tail once per 8 descriptors */
2424 if ((index & 7) == 7)
2425 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number),
2429 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
2432 struct net_device *netdev = rx->adapter->netdev;
2433 struct device *dev = &rx->adapter->pdev->dev;
2434 struct lan743x_rx_buffer_info *buffer_info;
2435 unsigned int buffer_length, used_length;
2436 struct lan743x_rx_descriptor *descriptor;
2437 struct sk_buff *skb;
2440 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING;
2442 descriptor = &rx->ring_cpu_ptr[index];
2443 buffer_info = &rx->buffer_info[index];
2444 skb = __netdev_alloc_skb(netdev, buffer_length, gfp);
2447 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE);
2448 if (dma_mapping_error(dev, dma_ptr)) {
2449 dev_kfree_skb_any(skb);
2452 if (buffer_info->dma_ptr) {
2453 /* sync used area of buffer only */
2454 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_)
2455 /* frame length is valid only if LS bit is set.
2456 * it's a safe upper bound for the used area in this
2459 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_
2460 (le32_to_cpu(descriptor->data0)),
2461 buffer_info->buffer_length);
2463 used_length = buffer_info->buffer_length;
2464 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr,
2467 dma_unmap_single_attrs(dev, buffer_info->dma_ptr,
2468 buffer_info->buffer_length,
2470 DMA_ATTR_SKIP_CPU_SYNC);
2473 buffer_info->skb = skb;
2474 buffer_info->dma_ptr = dma_ptr;
2475 buffer_info->buffer_length = buffer_length;
2476 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2477 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2478 descriptor->data3 = 0;
2479 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2480 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2481 lan743x_rx_update_tail(rx, index);
2486 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
2488 struct lan743x_rx_buffer_info *buffer_info;
2489 struct lan743x_rx_descriptor *descriptor;
2491 descriptor = &rx->ring_cpu_ptr[index];
2492 buffer_info = &rx->buffer_info[index];
2494 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2495 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2496 descriptor->data3 = 0;
2497 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2498 ((buffer_info->buffer_length) &
2499 RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2500 lan743x_rx_update_tail(rx, index);
2503 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
2505 struct lan743x_rx_buffer_info *buffer_info;
2506 struct lan743x_rx_descriptor *descriptor;
2508 descriptor = &rx->ring_cpu_ptr[index];
2509 buffer_info = &rx->buffer_info[index];
2511 memset(descriptor, 0, sizeof(*descriptor));
2513 if (buffer_info->dma_ptr) {
2514 dma_unmap_single(&rx->adapter->pdev->dev,
2515 buffer_info->dma_ptr,
2516 buffer_info->buffer_length,
2518 buffer_info->dma_ptr = 0;
2521 if (buffer_info->skb) {
2522 dev_kfree_skb(buffer_info->skb);
2523 buffer_info->skb = NULL;
2526 memset(buffer_info, 0, sizeof(*buffer_info));
2529 static struct sk_buff *
2530 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length)
2532 if (skb_linearize(skb)) {
2533 dev_kfree_skb_irq(skb);
2536 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN);
2537 if (skb->len > frame_length) {
2538 skb->tail -= skb->len - frame_length;
2539 skb->len = frame_length;
2544 static int lan743x_rx_process_buffer(struct lan743x_rx *rx)
2546 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr);
2547 struct lan743x_rx_descriptor *descriptor, *desc_ext;
2548 struct net_device *netdev = rx->adapter->netdev;
2549 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2550 struct lan743x_rx_buffer_info *buffer_info;
2551 int frame_length, buffer_length;
2552 int extension_index = -1;
2553 bool is_last, is_first;
2554 struct sk_buff *skb;
2556 if (current_head_index < 0 || current_head_index >= rx->ring_size)
2559 if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
2562 if (rx->last_head == current_head_index)
2565 descriptor = &rx->ring_cpu_ptr[rx->last_head];
2566 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_)
2568 buffer_info = &rx->buffer_info[rx->last_head];
2570 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_;
2571 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_;
2573 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) {
2574 /* extension is expected to follow */
2575 int index = lan743x_rx_next_index(rx, rx->last_head);
2577 if (index == current_head_index)
2578 /* extension not yet available */
2580 desc_ext = &rx->ring_cpu_ptr[index];
2581 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_)
2582 /* extension not yet available */
2584 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_))
2586 extension_index = index;
2589 /* Only the last buffer in a multi-buffer frame contains the total frame
2590 * length. The chip occasionally sends more buffers than strictly
2591 * required to reach the total frame length.
2592 * Handle this by adding all buffers to the skb in their entirety.
2593 * Once the real frame length is known, trim the skb.
2596 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0));
2597 buffer_length = buffer_info->buffer_length;
2599 netdev_dbg(netdev, "%s%schunk: %d/%d",
2600 is_first ? "first " : " ",
2601 is_last ? "last " : " ",
2602 frame_length, buffer_length);
2604 /* save existing skb, allocate new skb and map to dma */
2605 skb = buffer_info->skb;
2606 if (lan743x_rx_init_ring_element(rx, rx->last_head,
2607 GFP_ATOMIC | GFP_DMA)) {
2608 /* failed to allocate next skb.
2609 * Memory is very low.
2610 * Drop this packet and reuse buffer.
2612 lan743x_rx_reuse_ring_element(rx, rx->last_head);
2613 /* drop packet that was being assembled */
2614 dev_kfree_skb_irq(rx->skb_head);
2615 rx->skb_head = NULL;
2616 goto process_extension;
2619 /* add buffers to skb via skb->frag_list */
2621 skb_reserve(skb, RX_HEAD_PADDING);
2622 skb_put(skb, buffer_length - RX_HEAD_PADDING);
2624 dev_kfree_skb_irq(rx->skb_head);
2626 } else if (rx->skb_head) {
2627 skb_put(skb, buffer_length);
2628 if (skb_shinfo(rx->skb_head)->frag_list)
2629 rx->skb_tail->next = skb;
2631 skb_shinfo(rx->skb_head)->frag_list = skb;
2633 rx->skb_head->len += skb->len;
2634 rx->skb_head->data_len += skb->len;
2635 rx->skb_head->truesize += skb->truesize;
2637 /* packet to assemble has already been dropped because one or
2638 * more of its buffers could not be allocated
2640 netdev_dbg(netdev, "drop buffer intended for dropped packet");
2641 dev_kfree_skb_irq(skb);
2645 if (extension_index >= 0) {
2649 ts_sec = le32_to_cpu(desc_ext->data1);
2650 ts_nsec = (le32_to_cpu(desc_ext->data2) &
2651 RX_DESC_DATA2_TS_NS_MASK_);
2653 skb_hwtstamps(rx->skb_head)->hwtstamp =
2654 ktime_set(ts_sec, ts_nsec);
2655 lan743x_rx_reuse_ring_element(rx, extension_index);
2656 rx->last_head = extension_index;
2657 netdev_dbg(netdev, "process extension");
2660 if (is_last && rx->skb_head)
2661 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length);
2663 if (is_last && rx->skb_head) {
2664 rx->skb_head->protocol = eth_type_trans(rx->skb_head,
2665 rx->adapter->netdev);
2666 netdev_dbg(netdev, "sending %d byte frame to OS",
2668 napi_gro_receive(&rx->napi, rx->skb_head);
2669 rx->skb_head = NULL;
2673 /* push tail and head forward */
2674 rx->last_tail = rx->last_head;
2675 rx->last_head = lan743x_rx_next_index(rx, rx->last_head);
2676 result = RX_PROCESS_RESULT_BUFFER_RECEIVED;
2681 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2683 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2684 struct lan743x_adapter *adapter = rx->adapter;
2685 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2686 u32 rx_tail_flags = 0;
2689 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2690 /* clear int status bit before reading packet */
2691 lan743x_csr_write(adapter, DMAC_INT_STS,
2692 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2694 for (count = 0; count < weight; count++) {
2695 result = lan743x_rx_process_buffer(rx);
2696 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO)
2699 rx->frame_count += count;
2700 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED)
2703 if (!napi_complete_done(napi, count))
2706 /* re-arm interrupts, must write to rx tail on some chip variants */
2707 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2708 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2709 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2710 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2712 lan743x_csr_write(adapter, INT_EN_SET,
2713 INT_BIT_DMA_RX_(rx->channel_number));
2717 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2718 rx_tail_flags | rx->last_tail);
2723 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2725 if (rx->buffer_info && rx->ring_cpu_ptr) {
2728 for (index = 0; index < rx->ring_size; index++)
2729 lan743x_rx_release_ring_element(rx, index);
2732 if (rx->head_cpu_ptr) {
2733 dma_free_coherent(&rx->adapter->pdev->dev,
2734 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr,
2736 rx->head_cpu_ptr = NULL;
2737 rx->head_dma_ptr = 0;
2740 kfree(rx->buffer_info);
2741 rx->buffer_info = NULL;
2743 if (rx->ring_cpu_ptr) {
2744 dma_free_coherent(&rx->adapter->pdev->dev,
2745 rx->ring_allocation_size, rx->ring_cpu_ptr,
2747 rx->ring_allocation_size = 0;
2748 rx->ring_cpu_ptr = NULL;
2749 rx->ring_dma_ptr = 0;
2756 static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2758 size_t ring_allocation_size = 0;
2759 dma_addr_t dma_ptr = 0;
2760 void *cpu_ptr = NULL;
2764 rx->ring_size = LAN743X_RX_RING_SIZE;
2765 if (rx->ring_size <= 1) {
2769 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2773 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2774 DMA_BIT_MASK(64))) {
2775 dev_warn(&rx->adapter->pdev->dev,
2776 "lan743x_: No suitable DMA available\n");
2780 ring_allocation_size = ALIGN(rx->ring_size *
2781 sizeof(struct lan743x_rx_descriptor),
2784 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2785 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2790 rx->ring_allocation_size = ring_allocation_size;
2791 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2792 rx->ring_dma_ptr = dma_ptr;
2794 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
2800 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2802 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2803 sizeof(*rx->head_cpu_ptr), &dma_ptr,
2810 rx->head_cpu_ptr = cpu_ptr;
2811 rx->head_dma_ptr = dma_ptr;
2812 if (rx->head_dma_ptr & 0x3) {
2818 for (index = 0; index < rx->ring_size; index++) {
2819 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL);
2826 netif_warn(rx->adapter, ifup, rx->adapter->netdev,
2827 "Error allocating memory for LAN743x\n");
2829 lan743x_rx_ring_cleanup(rx);
2833 static void lan743x_rx_close(struct lan743x_rx *rx)
2835 struct lan743x_adapter *adapter = rx->adapter;
2837 lan743x_csr_write(adapter, FCT_RX_CTL,
2838 FCT_RX_CTL_DIS_(rx->channel_number));
2839 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2840 FCT_RX_CTL_EN_(rx->channel_number),
2841 0, 1000, 20000, 100);
2843 lan743x_csr_write(adapter, DMAC_CMD,
2844 DMAC_CMD_STOP_R_(rx->channel_number));
2845 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2847 lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2848 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2849 lan743x_csr_write(adapter, INT_EN_CLR,
2850 INT_BIT_DMA_RX_(rx->channel_number));
2851 napi_disable(&rx->napi);
2853 netif_napi_del(&rx->napi);
2855 lan743x_rx_ring_cleanup(rx);
2858 static int lan743x_rx_open(struct lan743x_rx *rx)
2860 struct lan743x_adapter *adapter = rx->adapter;
2864 rx->frame_count = 0;
2865 ret = lan743x_rx_ring_init(rx);
2869 netif_napi_add(adapter->netdev,
2870 &rx->napi, lan743x_rx_napi_poll,
2873 lan743x_csr_write(adapter, DMAC_CMD,
2874 DMAC_CMD_RX_SWR_(rx->channel_number));
2875 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2876 DMAC_CMD_RX_SWR_(rx->channel_number),
2877 0, 1000, 20000, 100);
2879 /* set ring base address */
2880 lan743x_csr_write(adapter,
2881 RX_BASE_ADDRH(rx->channel_number),
2882 DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2883 lan743x_csr_write(adapter,
2884 RX_BASE_ADDRL(rx->channel_number),
2885 DMA_ADDR_LOW32(rx->ring_dma_ptr));
2887 /* set rx write back address */
2888 lan743x_csr_write(adapter,
2889 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2890 DMA_ADDR_HIGH32(rx->head_dma_ptr));
2891 lan743x_csr_write(adapter,
2892 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2893 DMA_ADDR_LOW32(rx->head_dma_ptr));
2894 data = RX_CFG_A_RX_HP_WB_EN_;
2895 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2896 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2897 RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2898 RX_CFG_A_RX_PF_THRES_SET_(16) |
2899 RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2903 lan743x_csr_write(adapter,
2904 RX_CFG_A(rx->channel_number), data);
2907 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2908 data &= ~RX_CFG_B_RX_PAD_MASK_;
2909 if (!RX_HEAD_PADDING)
2910 data |= RX_CFG_B_RX_PAD_0_;
2912 data |= RX_CFG_B_RX_PAD_2_;
2913 data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2914 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2915 data |= RX_CFG_B_TS_ALL_RX_;
2916 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2917 data |= RX_CFG_B_RDMABL_512_;
2919 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2920 rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2922 (rx->channel_number));
2926 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2927 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2928 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2929 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2930 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2931 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2932 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2933 data |= RX_CFG_C_RX_INT_EN_R2C_;
2934 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2936 rx->last_tail = ((u32)(rx->ring_size - 1));
2937 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2939 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2940 if (rx->last_head) {
2945 napi_enable(&rx->napi);
2947 lan743x_csr_write(adapter, INT_EN_SET,
2948 INT_BIT_DMA_RX_(rx->channel_number));
2949 lan743x_csr_write(adapter, DMAC_INT_STS,
2950 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2951 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2952 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2953 lan743x_csr_write(adapter, DMAC_CMD,
2954 DMAC_CMD_START_R_(rx->channel_number));
2956 /* initialize fifo */
2957 lan743x_csr_write(adapter, FCT_RX_CTL,
2958 FCT_RX_CTL_RESET_(rx->channel_number));
2959 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2960 FCT_RX_CTL_RESET_(rx->channel_number),
2961 0, 1000, 20000, 100);
2962 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2963 FCT_FLOW_CTL_REQ_EN_ |
2964 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2965 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2968 lan743x_csr_write(adapter, FCT_RX_CTL,
2969 FCT_RX_CTL_EN_(rx->channel_number));
2973 netif_napi_del(&rx->napi);
2974 lan743x_rx_ring_cleanup(rx);
2980 static int lan743x_netdev_close(struct net_device *netdev)
2982 struct lan743x_adapter *adapter = netdev_priv(netdev);
2985 for (index = 0; index < adapter->used_tx_channels; index++)
2986 lan743x_tx_close(&adapter->tx[index]);
2988 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
2989 lan743x_rx_close(&adapter->rx[index]);
2991 lan743x_ptp_close(adapter);
2993 lan743x_phy_close(adapter);
2995 lan743x_mac_close(adapter);
2997 lan743x_intr_close(adapter);
3002 static int lan743x_netdev_open(struct net_device *netdev)
3004 struct lan743x_adapter *adapter = netdev_priv(netdev);
3008 ret = lan743x_intr_open(adapter);
3012 ret = lan743x_mac_open(adapter);
3016 ret = lan743x_phy_open(adapter);
3020 ret = lan743x_ptp_open(adapter);
3024 lan743x_rfe_open(adapter);
3026 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3027 ret = lan743x_rx_open(&adapter->rx[index]);
3032 for (index = 0; index < adapter->used_tx_channels; index++) {
3033 ret = lan743x_tx_open(&adapter->tx[index]);
3040 for (index = 0; index < adapter->used_tx_channels; index++) {
3041 if (adapter->tx[index].ring_cpu_ptr)
3042 lan743x_tx_close(&adapter->tx[index]);
3046 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3047 if (adapter->rx[index].ring_cpu_ptr)
3048 lan743x_rx_close(&adapter->rx[index]);
3050 lan743x_ptp_close(adapter);
3053 lan743x_phy_close(adapter);
3056 lan743x_mac_close(adapter);
3059 lan743x_intr_close(adapter);
3062 netif_warn(adapter, ifup, adapter->netdev,
3063 "Error opening LAN743x\n");
3067 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
3068 struct net_device *netdev)
3070 struct lan743x_adapter *adapter = netdev_priv(netdev);
3073 if (adapter->is_pci11x1x)
3074 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS;
3076 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb);
3079 static int lan743x_netdev_ioctl(struct net_device *netdev,
3080 struct ifreq *ifr, int cmd)
3082 if (!netif_running(netdev))
3084 if (cmd == SIOCSHWTSTAMP)
3085 return lan743x_ptp_ioctl(netdev, ifr, cmd);
3086 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
3089 static void lan743x_netdev_set_multicast(struct net_device *netdev)
3091 struct lan743x_adapter *adapter = netdev_priv(netdev);
3093 lan743x_rfe_set_multicast(adapter);
3096 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
3098 struct lan743x_adapter *adapter = netdev_priv(netdev);
3101 ret = lan743x_mac_set_mtu(adapter, new_mtu);
3103 netdev->mtu = new_mtu;
3107 static void lan743x_netdev_get_stats64(struct net_device *netdev,
3108 struct rtnl_link_stats64 *stats)
3110 struct lan743x_adapter *adapter = netdev_priv(netdev);
3112 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
3113 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
3114 stats->rx_bytes = lan743x_csr_read(adapter,
3115 STAT_RX_UNICAST_BYTE_COUNT) +
3116 lan743x_csr_read(adapter,
3117 STAT_RX_BROADCAST_BYTE_COUNT) +
3118 lan743x_csr_read(adapter,
3119 STAT_RX_MULTICAST_BYTE_COUNT);
3120 stats->tx_bytes = lan743x_csr_read(adapter,
3121 STAT_TX_UNICAST_BYTE_COUNT) +
3122 lan743x_csr_read(adapter,
3123 STAT_TX_BROADCAST_BYTE_COUNT) +
3124 lan743x_csr_read(adapter,
3125 STAT_TX_MULTICAST_BYTE_COUNT);
3126 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
3127 lan743x_csr_read(adapter,
3128 STAT_RX_ALIGNMENT_ERRORS) +
3129 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
3130 lan743x_csr_read(adapter,
3131 STAT_RX_UNDERSIZE_FRAME_ERRORS) +
3132 lan743x_csr_read(adapter,
3133 STAT_RX_OVERSIZE_FRAME_ERRORS);
3134 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
3135 lan743x_csr_read(adapter,
3136 STAT_TX_EXCESS_DEFERRAL_ERRORS) +
3137 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
3138 stats->rx_dropped = lan743x_csr_read(adapter,
3139 STAT_RX_DROPPED_FRAMES);
3140 stats->tx_dropped = lan743x_csr_read(adapter,
3141 STAT_TX_EXCESSIVE_COLLISION);
3142 stats->multicast = lan743x_csr_read(adapter,
3143 STAT_RX_MULTICAST_FRAMES) +
3144 lan743x_csr_read(adapter,
3145 STAT_TX_MULTICAST_FRAMES);
3146 stats->collisions = lan743x_csr_read(adapter,
3147 STAT_TX_SINGLE_COLLISIONS) +
3148 lan743x_csr_read(adapter,
3149 STAT_TX_MULTIPLE_COLLISIONS) +
3150 lan743x_csr_read(adapter,
3151 STAT_TX_LATE_COLLISIONS);
3154 static int lan743x_netdev_set_mac_address(struct net_device *netdev,
3157 struct lan743x_adapter *adapter = netdev_priv(netdev);
3158 struct sockaddr *sock_addr = addr;
3161 ret = eth_prepare_mac_addr_change(netdev, sock_addr);
3164 eth_hw_addr_set(netdev, sock_addr->sa_data);
3165 lan743x_mac_set_address(adapter, sock_addr->sa_data);
3166 lan743x_rfe_update_mac_address(adapter);
3170 static const struct net_device_ops lan743x_netdev_ops = {
3171 .ndo_open = lan743x_netdev_open,
3172 .ndo_stop = lan743x_netdev_close,
3173 .ndo_start_xmit = lan743x_netdev_xmit_frame,
3174 .ndo_eth_ioctl = lan743x_netdev_ioctl,
3175 .ndo_set_rx_mode = lan743x_netdev_set_multicast,
3176 .ndo_change_mtu = lan743x_netdev_change_mtu,
3177 .ndo_get_stats64 = lan743x_netdev_get_stats64,
3178 .ndo_set_mac_address = lan743x_netdev_set_mac_address,
3181 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
3183 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3186 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
3188 mdiobus_unregister(adapter->mdiobus);
3191 static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
3193 unregister_netdev(adapter->netdev);
3195 lan743x_mdiobus_cleanup(adapter);
3196 lan743x_hardware_cleanup(adapter);
3197 lan743x_pci_cleanup(adapter);
3200 static int lan743x_hardware_init(struct lan743x_adapter *adapter,
3201 struct pci_dev *pdev)
3203 struct lan743x_tx *tx;
3207 adapter->is_pci11x1x = is_pci11x1x_chip(adapter);
3208 if (adapter->is_pci11x1x) {
3209 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS;
3210 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS;
3211 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT;
3212 pci11x1x_strap_get_status(adapter);
3213 spin_lock_init(&adapter->eth_syslock_spinlock);
3214 mutex_init(&adapter->sgmii_rw_lock);
3216 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS;
3217 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS;
3218 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT;
3221 adapter->intr.irq = adapter->pdev->irq;
3222 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3224 ret = lan743x_gpio_init(adapter);
3228 ret = lan743x_mac_init(adapter);
3232 ret = lan743x_phy_init(adapter);
3236 ret = lan743x_ptp_init(adapter);
3240 lan743x_rfe_update_mac_address(adapter);
3242 ret = lan743x_dmac_init(adapter);
3246 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3247 adapter->rx[index].adapter = adapter;
3248 adapter->rx[index].channel_number = index;
3251 for (index = 0; index < adapter->used_tx_channels; index++) {
3252 tx = &adapter->tx[index];
3253 tx->adapter = adapter;
3254 tx->channel_number = index;
3255 spin_lock_init(&tx->ring_lock);
3261 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
3266 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
3267 if (!(adapter->mdiobus)) {
3272 adapter->mdiobus->priv = (void *)adapter;
3273 if (adapter->is_pci11x1x) {
3274 if (adapter->is_sgmii_en) {
3275 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3276 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;
3277 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_;
3278 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3279 netif_dbg(adapter, drv, adapter->netdev,
3280 "SGMII operation\n");
3281 adapter->mdiobus->probe_capabilities = MDIOBUS_C22_C45;
3282 adapter->mdiobus->read = lan743x_mdiobus_c45_read;
3283 adapter->mdiobus->write = lan743x_mdiobus_c45_write;
3284 adapter->mdiobus->name = "lan743x-mdiobus-c45";
3285 netif_dbg(adapter, drv, adapter->netdev,
3286 "lan743x-mdiobus-c45\n");
3288 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3289 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_;
3290 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;
3291 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3292 netif_dbg(adapter, drv, adapter->netdev,
3293 "RGMII operation\n");
3294 // Only C22 support when RGMII I/F
3295 adapter->mdiobus->probe_capabilities = MDIOBUS_C22;
3296 adapter->mdiobus->read = lan743x_mdiobus_read;
3297 adapter->mdiobus->write = lan743x_mdiobus_write;
3298 adapter->mdiobus->name = "lan743x-mdiobus";
3299 netif_dbg(adapter, drv, adapter->netdev,
3300 "lan743x-mdiobus\n");
3303 adapter->mdiobus->read = lan743x_mdiobus_read;
3304 adapter->mdiobus->write = lan743x_mdiobus_write;
3305 adapter->mdiobus->name = "lan743x-mdiobus";
3306 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n");
3309 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
3310 "pci-%s", pci_name(adapter->pdev));
3312 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
3313 /* LAN7430 uses internal phy at address 1 */
3314 adapter->mdiobus->phy_mask = ~(u32)BIT(1);
3316 /* register mdiobus */
3317 ret = mdiobus_register(adapter->mdiobus);
3326 /* lan743x_pcidev_probe - Device Initialization Routine
3327 * @pdev: PCI device information struct
3328 * @id: entry in lan743x_pci_tbl
3330 * Returns 0 on success, negative on failure
3332 * initializes an adapter identified by a pci_dev structure.
3333 * The OS initialization, configuring of the adapter private structure,
3334 * and a hardware reset occur.
3336 static int lan743x_pcidev_probe(struct pci_dev *pdev,
3337 const struct pci_device_id *id)
3339 struct lan743x_adapter *adapter = NULL;
3340 struct net_device *netdev = NULL;
3343 if (id->device == PCI_DEVICE_ID_SMSC_A011 ||
3344 id->device == PCI_DEVICE_ID_SMSC_A041) {
3345 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3346 sizeof(struct lan743x_adapter),
3347 PCI11X1X_USED_TX_CHANNELS,
3348 LAN743X_USED_RX_CHANNELS);
3350 netdev = devm_alloc_etherdev(&pdev->dev,
3351 sizeof(struct lan743x_adapter));
3357 SET_NETDEV_DEV(netdev, &pdev->dev);
3358 pci_set_drvdata(pdev, netdev);
3359 adapter = netdev_priv(netdev);
3360 adapter->netdev = netdev;
3361 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
3362 NETIF_MSG_LINK | NETIF_MSG_IFUP |
3363 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
3364 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
3366 of_get_mac_address(pdev->dev.of_node, adapter->mac_address);
3368 ret = lan743x_pci_init(adapter, pdev);
3372 ret = lan743x_csr_init(adapter);
3376 ret = lan743x_hardware_init(adapter, pdev);
3380 ret = lan743x_mdiobus_init(adapter);
3382 goto cleanup_hardware;
3384 adapter->netdev->netdev_ops = &lan743x_netdev_ops;
3385 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
3386 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
3387 adapter->netdev->hw_features = adapter->netdev->features;
3389 /* carrier off reporting is important to ethtool even BEFORE open */
3390 netif_carrier_off(netdev);
3392 ret = register_netdev(adapter->netdev);
3394 goto cleanup_mdiobus;
3398 lan743x_mdiobus_cleanup(adapter);
3401 lan743x_hardware_cleanup(adapter);
3404 lan743x_pci_cleanup(adapter);
3407 pr_warn("Initialization failed\n");
3412 * lan743x_pcidev_remove - Device Removal Routine
3413 * @pdev: PCI device information struct
3415 * this is called by the PCI subsystem to alert the driver
3416 * that it should release a PCI device. This could be caused by a
3417 * Hot-Plug event, or because the driver is going to be removed from
3420 static void lan743x_pcidev_remove(struct pci_dev *pdev)
3422 struct net_device *netdev = pci_get_drvdata(pdev);
3423 struct lan743x_adapter *adapter = netdev_priv(netdev);
3425 lan743x_full_cleanup(adapter);
3428 static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
3430 struct net_device *netdev = pci_get_drvdata(pdev);
3431 struct lan743x_adapter *adapter = netdev_priv(netdev);
3434 netif_device_detach(netdev);
3436 /* close netdev when netdev is at running state.
3437 * For instance, it is true when system goes to sleep by pm-suspend
3438 * However, it is false when system goes to sleep by suspend GUI menu
3440 if (netif_running(netdev))
3441 lan743x_netdev_close(netdev);
3445 pci_save_state(pdev);
3448 /* clean up lan743x portion */
3449 lan743x_hardware_cleanup(adapter);
3452 #ifdef CONFIG_PM_SLEEP
3453 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
3455 return bitrev16(crc16(0xFFFF, buf, len));
3458 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
3460 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3461 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3462 const u8 arp_type[2] = { 0x08, 0x06 };
3470 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
3471 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
3473 /* clear wake settings */
3474 pmtctl = lan743x_csr_read(adapter, PMT_CTL);
3475 pmtctl |= PMT_CTL_WUPS_MASK_;
3476 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
3477 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
3478 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
3480 macrx = lan743x_csr_read(adapter, MAC_RX);
3485 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
3487 if (adapter->wolopts & WAKE_PHY) {
3488 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
3489 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
3491 if (adapter->wolopts & WAKE_MAGIC) {
3492 wucsr |= MAC_WUCSR_MPEN_;
3493 macrx |= MAC_RX_RXEN_;
3494 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3496 if (adapter->wolopts & WAKE_UCAST) {
3497 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
3498 macrx |= MAC_RX_RXEN_;
3499 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3500 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3502 if (adapter->wolopts & WAKE_BCAST) {
3503 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
3504 macrx |= MAC_RX_RXEN_;
3505 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3506 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3508 if (adapter->wolopts & WAKE_MCAST) {
3509 /* IPv4 multicast */
3510 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
3511 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3512 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3513 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3514 (crc & MAC_WUF_CFG_CRC16_MASK_));
3515 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
3516 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3517 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3518 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3521 /* IPv6 multicast */
3522 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
3523 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3524 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3525 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3526 (crc & MAC_WUF_CFG_CRC16_MASK_));
3527 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
3528 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3529 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3530 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3533 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3534 macrx |= MAC_RX_RXEN_;
3535 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3536 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3538 if (adapter->wolopts & WAKE_ARP) {
3539 /* set MAC_WUF_CFG & WUF_MASK
3540 * for packettype (offset 12,13) = ARP (0x0806)
3542 crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
3543 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3544 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
3545 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3546 (crc & MAC_WUF_CFG_CRC16_MASK_));
3547 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
3548 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3549 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3550 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3553 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3554 macrx |= MAC_RX_RXEN_;
3555 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3556 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3559 if (adapter->wolopts & WAKE_MAGICSECURE) {
3560 sopass = *(u32 *)adapter->sopass;
3561 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass);
3562 sopass = *(u16 *)&adapter->sopass[4];
3563 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass);
3564 wucsr |= MAC_MP_SO_EN_;
3567 lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
3568 lan743x_csr_write(adapter, PMT_CTL, pmtctl);
3569 lan743x_csr_write(adapter, MAC_RX, macrx);
3572 static int lan743x_pm_suspend(struct device *dev)
3574 struct pci_dev *pdev = to_pci_dev(dev);
3575 struct net_device *netdev = pci_get_drvdata(pdev);
3576 struct lan743x_adapter *adapter = netdev_priv(netdev);
3579 lan743x_pcidev_shutdown(pdev);
3581 /* clear all wakes */
3582 lan743x_csr_write(adapter, MAC_WUCSR, 0);
3583 lan743x_csr_write(adapter, MAC_WUCSR2, 0);
3584 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
3586 if (adapter->wolopts)
3587 lan743x_pm_set_wol(adapter);
3589 if (adapter->is_pci11x1x) {
3590 /* Save HW_CFG to config again in PM resume */
3591 data = lan743x_csr_read(adapter, HW_CFG);
3592 adapter->hw_cfg = data;
3593 data |= (HW_CFG_RST_PROTECT_PCIE_ |
3594 HW_CFG_D3_RESET_DIS_ |
3595 HW_CFG_D3_VAUX_OVR_ |
3596 HW_CFG_HOT_RESET_DIS_ |
3597 HW_CFG_RST_PROTECT_);
3598 lan743x_csr_write(adapter, HW_CFG, data);
3601 /* Host sets PME_En, put D3hot */
3602 return pci_prepare_to_sleep(pdev);
3605 static int lan743x_pm_resume(struct device *dev)
3607 struct pci_dev *pdev = to_pci_dev(dev);
3608 struct net_device *netdev = pci_get_drvdata(pdev);
3609 struct lan743x_adapter *adapter = netdev_priv(netdev);
3612 pci_set_power_state(pdev, PCI_D0);
3613 pci_restore_state(pdev);
3614 pci_save_state(pdev);
3616 /* Restore HW_CFG that was saved during pm suspend */
3617 if (adapter->is_pci11x1x)
3618 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg);
3620 ret = lan743x_hardware_init(adapter, pdev);
3622 netif_err(adapter, probe, adapter->netdev,
3623 "lan743x_hardware_init returned %d\n", ret);
3624 lan743x_pci_cleanup(adapter);
3628 /* open netdev when netdev is at running state while resume.
3629 * For instance, it is true when system wakesup after pm-suspend
3630 * However, it is false when system wakes up after suspend GUI menu
3632 if (netif_running(netdev))
3633 lan743x_netdev_open(netdev);
3635 netif_device_attach(netdev);
3636 ret = lan743x_csr_read(adapter, MAC_WK_SRC);
3637 netif_info(adapter, drv, adapter->netdev,
3638 "Wakeup source : 0x%08X\n", ret);
3643 static const struct dev_pm_ops lan743x_pm_ops = {
3644 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
3646 #endif /* CONFIG_PM_SLEEP */
3648 static const struct pci_device_id lan743x_pcidev_tbl[] = {
3649 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
3650 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
3651 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) },
3652 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) },
3656 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl);
3658 static struct pci_driver lan743x_pcidev_driver = {
3659 .name = DRIVER_NAME,
3660 .id_table = lan743x_pcidev_tbl,
3661 .probe = lan743x_pcidev_probe,
3662 .remove = lan743x_pcidev_remove,
3663 #ifdef CONFIG_PM_SLEEP
3664 .driver.pm = &lan743x_pm_ops,
3666 .shutdown = lan743x_pcidev_shutdown,
3669 module_pci_driver(lan743x_pcidev_driver);
3671 MODULE_AUTHOR(DRIVER_AUTHOR);
3672 MODULE_DESCRIPTION(DRIVER_DESC);
3673 MODULE_LICENSE("GPL");