drivers/net/ethernet/mellanox/mlxsw/spectrum.c

   1 /*
   2  * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
   3  * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
   5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
   6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the names of the copyright holders nor the names of its
  17  *    contributors may be used to endorse or promote products derived from
  18  *    this software without specific prior written permission.
  19  *
  20  * Alternatively, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") version 2 as published by the Free
  22  * Software Foundation.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  34  * POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/types.h>
  40 #include <linux/pci.h>
  41 #include <linux/netdevice.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/slab.h>
  45 #include <linux/device.h>
  46 #include <linux/skbuff.h>
  47 #include <linux/if_vlan.h>
  48 #include <linux/if_bridge.h>
  49 #include <linux/workqueue.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/bitops.h>
  52 #include <linux/list.h>
  53 #include <linux/notifier.h>
  54 #include <linux/dcbnl.h>
  55 #include <linux/inetdevice.h>
  56 #include <net/switchdev.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_mirred.h>
  59 #include <net/netevent.h>
  60 #include <net/tc_act/tc_sample.h>
  61 #include <net/addrconf.h>
  62
  63 #include "spectrum.h"
  64 #include "pci.h"
  65 #include "core.h"
  66 #include "reg.h"
  67 #include "port.h"
  68 #include "trap.h"
  69 #include "txheader.h"
  70 #include "spectrum_cnt.h"
  71 #include "spectrum_dpipe.h"
  72 #include "spectrum_acl_flex_actions.h"
  73 #include "../mlxfw/mlxfw.h"
  74
  75 #define MLXSW_FWREV_MAJOR 13
  76 #define MLXSW_FWREV_MINOR 1420
  77 #define MLXSW_FWREV_SUBMINOR 122
  78
  79 static const struct mlxsw_fw_rev mlxsw_sp_supported_fw_rev = {
  80         .major = MLXSW_FWREV_MAJOR,
  81         .minor = MLXSW_FWREV_MINOR,
  82         .subminor = MLXSW_FWREV_SUBMINOR
  83 };
  84
  85 #define MLXSW_SP_FW_FILENAME \
  86         "mellanox/mlxsw_spectrum-" __stringify(MLXSW_FWREV_MAJOR) \
  87         "." __stringify(MLXSW_FWREV_MINOR) \
  88         "." __stringify(MLXSW_FWREV_SUBMINOR) ".mfa2"
  89
  90 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
  91 static const char mlxsw_sp_driver_version[] = "1.0";
  92
  93 /* tx_hdr_version
  94  * Tx header version.
  95  * Must be set to 1.
  96  */
  97 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
  98
  99 /* tx_hdr_ctl
 100  * Packet control type.
 101  * 0 - Ethernet control (e.g. EMADs, LACP)
 102  * 1 - Ethernet data
 103  */
 104 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
 105
 106 /* tx_hdr_proto
 107  * Packet protocol type. Must be set to 1 (Ethernet).
 108  */
 109 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
 110
 111 /* tx_hdr_rx_is_router
 112  * Packet is sent from the router. Valid for data packets only.
 113  */
 114 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
 115
 116 /* tx_hdr_fid_valid
 117  * Indicates if the 'fid' field is valid and should be used for
 118  * forwarding lookup. Valid for data packets only.
 119  */
 120 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
 121
 122 /* tx_hdr_swid
 123  * Switch partition ID. Must be set to 0.
 124  */
 125 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
 126
 127 /* tx_hdr_control_tclass
 128  * Indicates if the packet should use the control TClass and not one
 129  * of the data TClasses.
 130  */
 131 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
 132
 133 /* tx_hdr_etclass
 134  * Egress TClass to be used on the egress device on the egress port.
 135  */
 136 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
 137
 138 /* tx_hdr_port_mid
 139  * Destination local port for unicast packets.
 140  * Destination multicast ID for multicast packets.
 141  *
 142  * Control packets are directed to a specific egress port, while data
 143  * packets are transmitted through the CPU port (0) into the switch partition,
 144  * where forwarding rules are applied.
 145  */
 146 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
 147
 148 /* tx_hdr_fid
 149  * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
 150  * set, otherwise calculated based on the packet's VID using VID to FID mapping.
 151  * Valid for data packets only.
 152  */
 153 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
 154
 155 /* tx_hdr_type
 156  * 0 - Data packets
 157  * 6 - Control packets
 158  */
 159 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
 160
 161 struct mlxsw_sp_mlxfw_dev {
 162         struct mlxfw_dev mlxfw_dev;
 163         struct mlxsw_sp *mlxsw_sp;
 164 };
 165
 166 static int mlxsw_sp_component_query(struct mlxfw_dev *mlxfw_dev,
 167                                     u16 component_index, u32 *p_max_size,
 168                                     u8 *p_align_bits, u16 *p_max_write_size)
 169 {
 170         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 171                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 172         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 173         char mcqi_pl[MLXSW_REG_MCQI_LEN];
 174         int err;
 175
 176         mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
 177         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcqi), mcqi_pl);
 178         if (err)
 179                 return err;
 180         mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits,
 181                               p_max_write_size);
 182
 183         *p_align_bits = max_t(u8, *p_align_bits, 2);
 184         *p_max_write_size = min_t(u16, *p_max_write_size,
 185                                   MLXSW_REG_MCDA_MAX_DATA_LEN);
 186         return 0;
 187 }
 188
 189 static int mlxsw_sp_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
 190 {
 191         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 192                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 193         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 194         char mcc_pl[MLXSW_REG_MCC_LEN];
 195         u8 control_state;
 196         int err;
 197
 198         mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
 199         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 200         if (err)
 201                 return err;
 202
 203         mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
 204         if (control_state != MLXFW_FSM_STATE_IDLE)
 205                 return -EBUSY;
 206
 207         mlxsw_reg_mcc_pack(mcc_pl,
 208                            MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE,
 209                            0, *fwhandle, 0);
 210         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 211 }
 212
 213 static int mlxsw_sp_fsm_component_update(struct mlxfw_dev *mlxfw_dev,
 214                                          u32 fwhandle, u16 component_index,
 215                                          u32 component_size)
 216 {
 217         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 218                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 219         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 220         char mcc_pl[MLXSW_REG_MCC_LEN];
 221
 222         mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
 223                            component_index, fwhandle, component_size);
 224         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 225 }
 226
 227 static int mlxsw_sp_fsm_block_download(struct mlxfw_dev *mlxfw_dev,
 228                                        u32 fwhandle, u8 *data, u16 size,
 229                                        u32 offset)
 230 {
 231         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 232                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 233         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 234         char mcda_pl[MLXSW_REG_MCDA_LEN];
 235
 236         mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
 237         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcda), mcda_pl);
 238 }
 239
 240 static int mlxsw_sp_fsm_component_verify(struct mlxfw_dev *mlxfw_dev,
 241                                          u32 fwhandle, u16 component_index)
 242 {
 243         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 244                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 245         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 246         char mcc_pl[MLXSW_REG_MCC_LEN];
 247
 248         mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
 249                            component_index, fwhandle, 0);
 250         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 251 }
 252
 253 static int mlxsw_sp_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
 254 {
 255         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 256                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 257         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 258         char mcc_pl[MLXSW_REG_MCC_LEN];
 259
 260         mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0,
 261                            fwhandle, 0);
 262         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 263 }
 264
 265 static int mlxsw_sp_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
 266                                     enum mlxfw_fsm_state *fsm_state,
 267                                     enum mlxfw_fsm_state_err *fsm_state_err)
 268 {
 269         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 270                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 271         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 272         char mcc_pl[MLXSW_REG_MCC_LEN];
 273         u8 control_state;
 274         u8 error_code;
 275         int err;
 276
 277         mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
 278         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 279         if (err)
 280                 return err;
 281
 282         mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
 283         *fsm_state = control_state;
 284         *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code,
 285                                MLXFW_FSM_STATE_ERR_MAX);
 286         return 0;
 287 }
 288
 289 static void mlxsw_sp_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
 290 {
 291         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 292                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 293         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 294         char mcc_pl[MLXSW_REG_MCC_LEN];
 295
 296         mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0,
 297                            fwhandle, 0);
 298         mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 299 }
 300
 301 static void mlxsw_sp_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
 302 {
 303         struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
 304                 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
 305         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
 306         char mcc_pl[MLXSW_REG_MCC_LEN];
 307
 308         mlxsw_reg_mcc_pack(mcc_pl,
 309                            MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0,
 310                            fwhandle, 0);
 311         mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
 312 }
 313
 314 static const struct mlxfw_dev_ops mlxsw_sp_mlxfw_dev_ops = {
 315         .component_query        = mlxsw_sp_component_query,
 316         .fsm_lock               = mlxsw_sp_fsm_lock,
 317         .fsm_component_update   = mlxsw_sp_fsm_component_update,
 318         .fsm_block_download     = mlxsw_sp_fsm_block_download,
 319         .fsm_component_verify   = mlxsw_sp_fsm_component_verify,
 320         .fsm_activate           = mlxsw_sp_fsm_activate,
 321         .fsm_query_state        = mlxsw_sp_fsm_query_state,
 322         .fsm_cancel             = mlxsw_sp_fsm_cancel,
 323         .fsm_release            = mlxsw_sp_fsm_release
 324 };
 325
 326 static int mlxsw_sp_firmware_flash(struct mlxsw_sp *mlxsw_sp,
 327                                    const struct firmware *firmware)
 328 {
 329         struct mlxsw_sp_mlxfw_dev mlxsw_sp_mlxfw_dev = {
 330                 .mlxfw_dev = {
 331                         .ops = &mlxsw_sp_mlxfw_dev_ops,
 332                         .psid = mlxsw_sp->bus_info->psid,
 333                         .psid_size = strlen(mlxsw_sp->bus_info->psid),
 334                 },
 335                 .mlxsw_sp = mlxsw_sp
 336         };
 337
 338         return mlxfw_firmware_flash(&mlxsw_sp_mlxfw_dev.mlxfw_dev, firmware);
 339 }
 340
 341 static bool mlxsw_sp_fw_rev_ge(const struct mlxsw_fw_rev *a,
 342                                const struct mlxsw_fw_rev *b)
 343 {
 344         if (a->major != b->major)
 345                 return a->major > b->major;
 346         if (a->minor != b->minor)
 347                 return a->minor > b->minor;
 348         return a->subminor >= b->subminor;
 349 }
 350
 351 static int mlxsw_sp_fw_rev_validate(struct mlxsw_sp *mlxsw_sp)
 352 {
 353         const struct mlxsw_fw_rev *rev = &mlxsw_sp->bus_info->fw_rev;
 354         const struct firmware *firmware;
 355         int err;
 356
 357         if (mlxsw_sp_fw_rev_ge(rev, &mlxsw_sp_supported_fw_rev))
 358                 return 0;
 359
 360         dev_info(mlxsw_sp->bus_info->dev, "The firmware version %d.%d.%d out of data\n",
 361                  rev->major, rev->minor, rev->subminor);
 362         dev_info(mlxsw_sp->bus_info->dev, "Upgrading firmware using file %s\n",
 363                  MLXSW_SP_FW_FILENAME);
 364
 365         err = request_firmware_direct(&firmware, MLXSW_SP_FW_FILENAME,
 366                                       mlxsw_sp->bus_info->dev);
 367         if (err) {
 368                 dev_err(mlxsw_sp->bus_info->dev, "Could not request firmware file %s\n",
 369                         MLXSW_SP_FW_FILENAME);
 370                 return err;
 371         }
 372
 373         err = mlxsw_sp_firmware_flash(mlxsw_sp, firmware);
 374         release_firmware(firmware);
 375         return err;
 376 }
 377
 378 int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
 379                               unsigned int counter_index, u64 *packets,
 380                               u64 *bytes)
 381 {
 382         char mgpc_pl[MLXSW_REG_MGPC_LEN];
 383         int err;
 384
 385         mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_NOP,
 386                             MLXSW_REG_FLOW_COUNTER_SET_TYPE_PACKETS_BYTES);
 387         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
 388         if (err)
 389                 return err;
 390         if (packets)
 391                 *packets = mlxsw_reg_mgpc_packet_counter_get(mgpc_pl);
 392         if (bytes)
 393                 *bytes = mlxsw_reg_mgpc_byte_counter_get(mgpc_pl);
 394         return 0;
 395 }
 396
 397 static int mlxsw_sp_flow_counter_clear(struct mlxsw_sp *mlxsw_sp,
 398                                        unsigned int counter_index)
 399 {
 400         char mgpc_pl[MLXSW_REG_MGPC_LEN];
 401
 402         mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_CLEAR,
 403                             MLXSW_REG_FLOW_COUNTER_SET_TYPE_PACKETS_BYTES);
 404         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
 405 }
 406
 407 int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
 408                                 unsigned int *p_counter_index)
 409 {
 410         int err;
 411
 412         err = mlxsw_sp_counter_alloc(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
 413                                      p_counter_index);
 414         if (err)
 415                 return err;
 416         err = mlxsw_sp_flow_counter_clear(mlxsw_sp, *p_counter_index);
 417         if (err)
 418                 goto err_counter_clear;
 419         return 0;
 420
 421 err_counter_clear:
 422         mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
 423                               *p_counter_index);
 424         return err;
 425 }
 426
 427 void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
 428                                 unsigned int counter_index)
 429 {
 430          mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
 431                                counter_index);
 432 }
 433
 434 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
 435                                      const struct mlxsw_tx_info *tx_info)
 436 {
 437         char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
 438
 439         memset(txhdr, 0, MLXSW_TXHDR_LEN);
 440
 441         mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
 442         mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
 443         mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
 444         mlxsw_tx_hdr_swid_set(txhdr, 0);
 445         mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
 446         mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
 447         mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
 448 }
 449
 450 int mlxsw_sp_port_vid_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
 451                               u8 state)
 452 {
 453         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 454         enum mlxsw_reg_spms_state spms_state;
 455         char *spms_pl;
 456         int err;
 457
 458         switch (state) {
 459         case BR_STATE_FORWARDING:
 460                 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
 461                 break;
 462         case BR_STATE_LEARNING:
 463                 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
 464                 break;
 465         case BR_STATE_LISTENING: /* fall-through */
 466         case BR_STATE_DISABLED: /* fall-through */
 467         case BR_STATE_BLOCKING:
 468                 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
 469                 break;
 470         default:
 471                 BUG();
 472         }
 473
 474         spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
 475         if (!spms_pl)
 476                 return -ENOMEM;
 477         mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
 478         mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
 479
 480         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
 481         kfree(spms_pl);
 482         return err;
 483 }
 484
 485 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
 486 {
 487         char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
 488         int err;
 489
 490         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
 491         if (err)
 492                 return err;
 493         mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
 494         return 0;
 495 }
 496
 497 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
 498 {
 499         int i;
 500
 501         if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
 502                 return -EIO;
 503
 504         mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
 505                                                           MAX_SPAN);
 506         mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
 507                                          sizeof(struct mlxsw_sp_span_entry),
 508                                          GFP_KERNEL);
 509         if (!mlxsw_sp->span.entries)
 510                 return -ENOMEM;
 511
 512         for (i = 0; i < mlxsw_sp->span.entries_count; i++)
 513                 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
 514
 515         return 0;
 516 }
 517
 518 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
 519 {
 520         int i;
 521
 522         for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
 523                 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
 524
 525                 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
 526         }
 527         kfree(mlxsw_sp->span.entries);
 528 }
 529
 530 static struct mlxsw_sp_span_entry *
 531 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
 532 {
 533         struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
 534         struct mlxsw_sp_span_entry *span_entry;
 535         char mpat_pl[MLXSW_REG_MPAT_LEN];
 536         u8 local_port = port->local_port;
 537         int index;
 538         int i;
 539         int err;
 540
 541         /* find a free entry to use */
 542         index = -1;
 543         for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
 544                 if (!mlxsw_sp->span.entries[i].used) {
 545                         index = i;
 546                         span_entry = &mlxsw_sp->span.entries[i];
 547                         break;
 548                 }
 549         }
 550         if (index < 0)
 551                 return NULL;
 552
 553         /* create a new port analayzer entry for local_port */
 554         mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
 555         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
 556         if (err)
 557                 return NULL;
 558
 559         span_entry->used = true;
 560         span_entry->id = index;
 561         span_entry->ref_count = 1;
 562         span_entry->local_port = local_port;
 563         return span_entry;
 564 }
 565
 566 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
 567                                         struct mlxsw_sp_span_entry *span_entry)
 568 {
 569         u8 local_port = span_entry->local_port;
 570         char mpat_pl[MLXSW_REG_MPAT_LEN];
 571         int pa_id = span_entry->id;
 572
 573         mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
 574         mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
 575         span_entry->used = false;
 576 }
 577
 578 static struct mlxsw_sp_span_entry *
 579 mlxsw_sp_span_entry_find(struct mlxsw_sp *mlxsw_sp, u8 local_port)
 580 {
 581         int i;
 582
 583         for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
 584                 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
 585
 586                 if (curr->used && curr->local_port == local_port)
 587                         return curr;
 588         }
 589         return NULL;
 590 }
 591
 592 static struct mlxsw_sp_span_entry
 593 *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
 594 {
 595         struct mlxsw_sp_span_entry *span_entry;
 596
 597         span_entry = mlxsw_sp_span_entry_find(port->mlxsw_sp,
 598                                               port->local_port);
 599         if (span_entry) {
 600                 /* Already exists, just take a reference */
 601                 span_entry->ref_count++;
 602                 return span_entry;
 603         }
 604
 605         return mlxsw_sp_span_entry_create(port);
 606 }
 607
 608 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
 609                                    struct mlxsw_sp_span_entry *span_entry)
 610 {
 611         WARN_ON(!span_entry->ref_count);
 612         if (--span_entry->ref_count == 0)
 613                 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
 614         return 0;
 615 }
 616
 617 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
 618 {
 619         struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
 620         struct mlxsw_sp_span_inspected_port *p;
 621         int i;
 622
 623         for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
 624                 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
 625
 626                 list_for_each_entry(p, &curr->bound_ports_list, list)
 627                         if (p->local_port == port->local_port &&
 628                             p->type == MLXSW_SP_SPAN_EGRESS)
 629                                 return true;
 630         }
 631
 632         return false;
 633 }
 634
 635 static int mlxsw_sp_span_mtu_to_buffsize(const struct mlxsw_sp *mlxsw_sp,
 636                                          int mtu)
 637 {
 638         return mlxsw_sp_bytes_cells(mlxsw_sp, mtu * 5 / 2) + 1;
 639 }
 640
 641 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
 642 {
 643         struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
 644         char sbib_pl[MLXSW_REG_SBIB_LEN];
 645         int err;
 646
 647         /* If port is egress mirrored, the shared buffer size should be
 648          * updated according to the mtu value
 649          */
 650         if (mlxsw_sp_span_is_egress_mirror(port)) {
 651                 u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp, mtu);
 652
 653                 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize);
 654                 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
 655                 if (err) {
 656                         netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
 657                         return err;
 658                 }
 659         }
 660
 661         return 0;
 662 }
 663
 664 static struct mlxsw_sp_span_inspected_port *
 665 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
 666                                     struct mlxsw_sp_span_entry *span_entry)
 667 {
 668         struct mlxsw_sp_span_inspected_port *p;
 669
 670         list_for_each_entry(p, &span_entry->bound_ports_list, list)
 671                 if (port->local_port == p->local_port)
 672                         return p;
 673         return NULL;
 674 }
 675
 676 static int
 677 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
 678                                   struct mlxsw_sp_span_entry *span_entry,
 679                                   enum mlxsw_sp_span_type type)
 680 {
 681         struct mlxsw_sp_span_inspected_port *inspected_port;
 682         struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
 683         char mpar_pl[MLXSW_REG_MPAR_LEN];
 684         char sbib_pl[MLXSW_REG_SBIB_LEN];
 685         int pa_id = span_entry->id;
 686         int err;
 687
 688         /* if it is an egress SPAN, bind a shared buffer to it */
 689         if (type == MLXSW_SP_SPAN_EGRESS) {
 690                 u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp,
 691                                                              port->dev->mtu);
 692
 693                 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize);
 694                 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
 695                 if (err) {
 696                         netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
 697                         return err;
 698                 }
 699         }
 700
 701         /* bind the port to the SPAN entry */
 702         mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
 703                             (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
 704         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
 705         if (err)
 706                 goto err_mpar_reg_write;
 707
 708         inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
 709         if (!inspected_port) {
 710                 err = -ENOMEM;
 711                 goto err_inspected_port_alloc;
 712         }
 713         inspected_port->local_port = port->local_port;
 714         inspected_port->type = type;
 715         list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
 716
 717         return 0;
 718
 719 err_mpar_reg_write:
 720 err_inspected_port_alloc:
 721         if (type == MLXSW_SP_SPAN_EGRESS) {
 722                 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
 723                 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
 724         }
 725         return err;
 726 }
 727
 728 static void
 729 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
 730                                     struct mlxsw_sp_span_entry *span_entry,
 731                                     enum mlxsw_sp_span_type type)
 732 {
 733         struct mlxsw_sp_span_inspected_port *inspected_port;
 734         struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
 735         char mpar_pl[MLXSW_REG_MPAR_LEN];
 736         char sbib_pl[MLXSW_REG_SBIB_LEN];
 737         int pa_id = span_entry->id;
 738
 739         inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
 740         if (!inspected_port)
 741                 return;
 742
 743         /* remove the inspected port */
 744         mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
 745                             (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
 746         mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
 747
 748         /* remove the SBIB buffer if it was egress SPAN */
 749         if (type == MLXSW_SP_SPAN_EGRESS) {
 750                 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
 751                 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
 752         }
 753
 754         mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
 755
 756         list_del(&inspected_port->list);
 757         kfree(inspected_port);
 758 }
 759
 760 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
 761                                     struct mlxsw_sp_port *to,
 762                                     enum mlxsw_sp_span_type type)
 763 {
 764         struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
 765         struct mlxsw_sp_span_entry *span_entry;
 766         int err;
 767
 768         span_entry = mlxsw_sp_span_entry_get(to);
 769         if (!span_entry)
 770                 return -ENOENT;
 771
 772         netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
 773                    span_entry->id);
 774
 775         err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
 776         if (err)
 777                 goto err_port_bind;
 778
 779         return 0;
 780
 781 err_port_bind:
 782         mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
 783         return err;
 784 }
 785
 786 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
 787                                         u8 destination_port,
 788                                         enum mlxsw_sp_span_type type)
 789 {
 790         struct mlxsw_sp_span_entry *span_entry;
 791
 792         span_entry = mlxsw_sp_span_entry_find(from->mlxsw_sp,
 793                                               destination_port);
 794         if (!span_entry) {
 795                 netdev_err(from->dev, "no span entry found\n");
 796                 return;
 797         }
 798
 799         netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
 800                    span_entry->id);
 801         mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
 802 }
 803
 804 static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
 805                                     bool enable, u32 rate)
 806 {
 807         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 808         char mpsc_pl[MLXSW_REG_MPSC_LEN];
 809
 810         mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
 811         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
 812 }
 813
 814 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
 815                                           bool is_up)
 816 {
 817         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 818         char paos_pl[MLXSW_REG_PAOS_LEN];
 819
 820         mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
 821                             is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
 822                             MLXSW_PORT_ADMIN_STATUS_DOWN);
 823         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
 824 }
 825
 826 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
 827                                       unsigned char *addr)
 828 {
 829         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 830         char ppad_pl[MLXSW_REG_PPAD_LEN];
 831
 832         mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
 833         mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
 834         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
 835 }
 836
 837 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
 838 {
 839         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 840         unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
 841
 842         ether_addr_copy(addr, mlxsw_sp->base_mac);
 843         addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
 844         return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
 845 }
 846
 847 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
 848 {
 849         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 850         char pmtu_pl[MLXSW_REG_PMTU_LEN];
 851         int max_mtu;
 852         int err;
 853
 854         mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
 855         mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
 856         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 857         if (err)
 858                 return err;
 859         max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
 860
 861         if (mtu > max_mtu)
 862                 return -EINVAL;
 863
 864         mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
 865         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 866 }
 867
 868 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
 869 {
 870         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 871         char pspa_pl[MLXSW_REG_PSPA_LEN];
 872
 873         mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
 874         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
 875 }
 876
 877 int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port, bool enable)
 878 {
 879         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 880         char svpe_pl[MLXSW_REG_SVPE_LEN];
 881
 882         mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
 883         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
 884 }
 885
 886 int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
 887                                    bool learn_enable)
 888 {
 889         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 890         char *spvmlr_pl;
 891         int err;
 892
 893         spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
 894         if (!spvmlr_pl)
 895                 return -ENOMEM;
 896         mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
 897                               learn_enable);
 898         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
 899         kfree(spvmlr_pl);
 900         return err;
 901 }
 902
 903 static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
 904                                     u16 vid)
 905 {
 906         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 907         char spvid_pl[MLXSW_REG_SPVID_LEN];
 908
 909         mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
 910         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
 911 }
 912
 913 static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
 914                                             bool allow)
 915 {
 916         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 917         char spaft_pl[MLXSW_REG_SPAFT_LEN];
 918
 919         mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
 920         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
 921 }
 922
 923 int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
 924 {
 925         int err;
 926
 927         if (!vid) {
 928                 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
 929                 if (err)
 930                         return err;
 931         } else {
 932                 err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);
 933                 if (err)
 934                         return err;
 935                 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, true);
 936                 if (err)
 937                         goto err_port_allow_untagged_set;
 938         }
 939
 940         mlxsw_sp_port->pvid = vid;
 941         return 0;
 942
 943 err_port_allow_untagged_set:
 944         __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);
 945         return err;
 946 }
 947
 948 static int
 949 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
 950 {
 951         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 952         char sspr_pl[MLXSW_REG_SSPR_LEN];
 953
 954         mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
 955         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
 956 }
 957
 958 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
 959                                          u8 local_port, u8 *p_module,
 960                                          u8 *p_width, u8 *p_lane)
 961 {
 962         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 963         int err;
 964
 965         mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
 966         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
 967         if (err)
 968                 return err;
 969         *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
 970         *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
 971         *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
 972         return 0;
 973 }
 974
 975 static int mlxsw_sp_port_module_map(struct mlxsw_sp_port *mlxsw_sp_port,
 976                                     u8 module, u8 width, u8 lane)
 977 {
 978         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 979         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 980         int i;
 981
 982         mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
 983         mlxsw_reg_pmlp_width_set(pmlp_pl, width);
 984         for (i = 0; i < width; i++) {
 985                 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
 986                 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i);  /* Rx & Tx */
 987         }
 988
 989         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
 990 }
 991
 992 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp_port *mlxsw_sp_port)
 993 {
 994         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 995         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 996
 997         mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
 998         mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
 999         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
1000 }
1001
1002 static int mlxsw_sp_port_open(struct net_device *dev)
1003 {
1004         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1005         int err;
1006
1007         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1008         if (err)
1009                 return err;
1010         netif_start_queue(dev);
1011         return 0;
1012 }
1013
1014 static int mlxsw_sp_port_stop(struct net_device *dev)
1015 {
1016         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1017
1018         netif_stop_queue(dev);
1019         return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1020 }
1021
1022 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
1023                                       struct net_device *dev)
1024 {
1025         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1026         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1027         struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1028         const struct mlxsw_tx_info tx_info = {
1029                 .local_port = mlxsw_sp_port->local_port,
1030                 .is_emad = false,
1031         };
1032         u64 len;
1033         int err;
1034
1035         if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
1036                 return NETDEV_TX_BUSY;
1037
1038         if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
1039                 struct sk_buff *skb_orig = skb;
1040
1041                 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
1042                 if (!skb) {
1043                         this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
1044                         dev_kfree_skb_any(skb_orig);
1045                         return NETDEV_TX_OK;
1046                 }
1047                 dev_consume_skb_any(skb_orig);
1048         }
1049
1050         if (eth_skb_pad(skb)) {
1051                 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
1052                 return NETDEV_TX_OK;
1053         }
1054
1055         mlxsw_sp_txhdr_construct(skb, &tx_info);
1056         /* TX header is consumed by HW on the way so we shouldn't count its
1057          * bytes as being sent.
1058          */
1059         len = skb->len - MLXSW_TXHDR_LEN;
1060
1061         /* Due to a race we might fail here because of a full queue. In that
1062          * unlikely case we simply drop the packet.
1063          */
1064         err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
1065
1066         if (!err) {
1067                 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1068                 u64_stats_update_begin(&pcpu_stats->syncp);
1069                 pcpu_stats->tx_packets++;
1070                 pcpu_stats->tx_bytes += len;
1071                 u64_stats_update_end(&pcpu_stats->syncp);
1072         } else {
1073                 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
1074                 dev_kfree_skb_any(skb);
1075         }
1076         return NETDEV_TX_OK;
1077 }
1078
1079 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
1080 {
1081 }
1082
1083 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
1084 {
1085         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1086         struct sockaddr *addr = p;
1087         int err;
1088
1089         if (!is_valid_ether_addr(addr->sa_data))
1090                 return -EADDRNOTAVAIL;
1091
1092         err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
1093         if (err)
1094                 return err;
1095         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1096         return 0;
1097 }
1098
1099 static u16 mlxsw_sp_pg_buf_threshold_get(const struct mlxsw_sp *mlxsw_sp,
1100                                          int mtu)
1101 {
1102         return 2 * mlxsw_sp_bytes_cells(mlxsw_sp, mtu);
1103 }
1104
1105 #define MLXSW_SP_CELL_FACTOR 2  /* 2 * cell_size / (IPG + cell_size + 1) */
1106
1107 static u16 mlxsw_sp_pfc_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
1108                                   u16 delay)
1109 {
1110         delay = mlxsw_sp_bytes_cells(mlxsw_sp, DIV_ROUND_UP(delay,
1111                                                             BITS_PER_BYTE));
1112         return MLXSW_SP_CELL_FACTOR * delay + mlxsw_sp_bytes_cells(mlxsw_sp,
1113                                                                    mtu);
1114 }
1115
1116 /* Maximum delay buffer needed in case of PAUSE frames, in bytes.
1117  * Assumes 100m cable and maximum MTU.
1118  */
1119 #define MLXSW_SP_PAUSE_DELAY 58752
1120
1121 static u16 mlxsw_sp_pg_buf_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
1122                                      u16 delay, bool pfc, bool pause)
1123 {
1124         if (pfc)
1125                 return mlxsw_sp_pfc_delay_get(mlxsw_sp, mtu, delay);
1126         else if (pause)
1127                 return mlxsw_sp_bytes_cells(mlxsw_sp, MLXSW_SP_PAUSE_DELAY);
1128         else
1129                 return 0;
1130 }
1131
1132 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres,
1133                                  bool lossy)
1134 {
1135         if (lossy)
1136                 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, index, size);
1137         else
1138                 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, index, size,
1139                                                     thres);
1140 }
1141
1142 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
1143                                  u8 *prio_tc, bool pause_en,
1144                                  struct ieee_pfc *my_pfc)
1145 {
1146         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1147         u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
1148         u16 delay = !!my_pfc ? my_pfc->delay : 0;
1149         char pbmc_pl[MLXSW_REG_PBMC_LEN];
1150         int i, j, err;
1151
1152         mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
1153         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
1154         if (err)
1155                 return err;
1156
1157         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1158                 bool configure = false;
1159                 bool pfc = false;
1160                 bool lossy;
1161                 u16 thres;
1162
1163                 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
1164                         if (prio_tc[j] == i) {
1165                                 pfc = pfc_en & BIT(j);
1166                                 configure = true;
1167                                 break;
1168                         }
1169                 }
1170
1171                 if (!configure)
1172                         continue;
1173
1174                 lossy = !(pfc || pause_en);
1175                 thres = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu);
1176                 delay = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, pfc,
1177                                                   pause_en);
1178                 mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres + delay, thres, lossy);
1179         }
1180
1181         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
1182 }
1183
1184 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
1185                                       int mtu, bool pause_en)
1186 {
1187         u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
1188         bool dcb_en = !!mlxsw_sp_port->dcb.ets;
1189         struct ieee_pfc *my_pfc;
1190         u8 *prio_tc;
1191
1192         prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
1193         my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
1194
1195         return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
1196                                             pause_en, my_pfc);
1197 }
1198
1199 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
1200 {
1201         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1202         bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1203         int err;
1204
1205         err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
1206         if (err)
1207                 return err;
1208         err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
1209         if (err)
1210                 goto err_span_port_mtu_update;
1211         err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
1212         if (err)
1213                 goto err_port_mtu_set;
1214         dev->mtu = mtu;
1215         return 0;
1216
1217 err_port_mtu_set:
1218         mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
1219 err_span_port_mtu_update:
1220         mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1221         return err;
1222 }
1223
1224 static int
1225 mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
1226                              struct rtnl_link_stats64 *stats)
1227 {
1228         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229         struct mlxsw_sp_port_pcpu_stats *p;
1230         u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
1231         u32 tx_dropped = 0;
1232         unsigned int start;
1233         int i;
1234
1235         for_each_possible_cpu(i) {
1236                 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
1237                 do {
1238                         start = u64_stats_fetch_begin_irq(&p->syncp);
1239                         rx_packets      = p->rx_packets;
1240                         rx_bytes        = p->rx_bytes;
1241                         tx_packets      = p->tx_packets;
1242                         tx_bytes        = p->tx_bytes;
1243                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
1244
1245                 stats->rx_packets       += rx_packets;
1246                 stats->rx_bytes         += rx_bytes;
1247                 stats->tx_packets       += tx_packets;
1248                 stats->tx_bytes         += tx_bytes;
1249                 /* tx_dropped is u32, updated without syncp protection. */
1250                 tx_dropped      += p->tx_dropped;
1251         }
1252         stats->tx_dropped       = tx_dropped;
1253         return 0;
1254 }
1255
1256 static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
1257 {
1258         switch (attr_id) {
1259         case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1260                 return true;
1261         }
1262
1263         return false;
1264 }
1265
1266 static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
1267                                            void *sp)
1268 {
1269         switch (attr_id) {
1270         case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1271                 return mlxsw_sp_port_get_sw_stats64(dev, sp);
1272         }
1273
1274         return -EINVAL;
1275 }
1276
1277 static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
1278                                        int prio, char *ppcnt_pl)
1279 {
1280         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1281         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1282
1283         mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
1284         return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1285 }
1286
1287 static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
1288                                       struct rtnl_link_stats64 *stats)
1289 {
1290         char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1291         int err;
1292
1293         err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
1294                                           0, ppcnt_pl);
1295         if (err)
1296                 goto out;
1297
1298         stats->tx_packets =
1299                 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
1300         stats->rx_packets =
1301                 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
1302         stats->tx_bytes =
1303                 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
1304         stats->rx_bytes =
1305                 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
1306         stats->multicast =
1307                 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
1308
1309         stats->rx_crc_errors =
1310                 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
1311         stats->rx_frame_errors =
1312                 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
1313
1314         stats->rx_length_errors = (
1315                 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
1316                 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
1317                 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
1318
1319         stats->rx_errors = (stats->rx_crc_errors +
1320                 stats->rx_frame_errors + stats->rx_length_errors);
1321
1322 out:
1323         return err;
1324 }
1325
1326 static void update_stats_cache(struct work_struct *work)
1327 {
1328         struct mlxsw_sp_port *mlxsw_sp_port =
1329                 container_of(work, struct mlxsw_sp_port,
1330                              hw_stats.update_dw.work);
1331
1332         if (!netif_carrier_ok(mlxsw_sp_port->dev))
1333                 goto out;
1334
1335         mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
1336                                    mlxsw_sp_port->hw_stats.cache);
1337
1338 out:
1339         mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
1340                                MLXSW_HW_STATS_UPDATE_TIME);
1341 }
1342
1343 /* Return the stats from a cache that is updated periodically,
1344  * as this function might get called in an atomic context.
1345  */
1346 static void
1347 mlxsw_sp_port_get_stats64(struct net_device *dev,
1348                           struct rtnl_link_stats64 *stats)
1349 {
1350         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1351
1352         memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
1353 }
1354
1355 static int __mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
1356                                     u16 vid_begin, u16 vid_end,
1357                                     bool is_member, bool untagged)
1358 {
1359         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1360         char *spvm_pl;
1361         int err;
1362
1363         spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
1364         if (!spvm_pl)
1365                 return -ENOMEM;
1366
1367         mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
1368                             vid_end, is_member, untagged);
1369         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
1370         kfree(spvm_pl);
1371         return err;
1372 }
1373
1374 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
1375                            u16 vid_end, bool is_member, bool untagged)
1376 {
1377         u16 vid, vid_e;
1378         int err;
1379
1380         for (vid = vid_begin; vid <= vid_end;
1381              vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
1382                 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
1383                             vid_end);
1384
1385                 err = __mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
1386                                                is_member, untagged);
1387                 if (err)
1388                         return err;
1389         }
1390
1391         return 0;
1392 }
1393
1394 static void mlxsw_sp_port_vlan_flush(struct mlxsw_sp_port *mlxsw_sp_port)
1395 {
1396         struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan, *tmp;
1397
1398         list_for_each_entry_safe(mlxsw_sp_port_vlan, tmp,
1399                                  &mlxsw_sp_port->vlans_list, list)
1400                 mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan);
1401 }
1402
1403 static struct mlxsw_sp_port_vlan *
1404 mlxsw_sp_port_vlan_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
1405 {
1406         struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
1407         bool untagged = vid == 1;
1408         int err;
1409
1410         err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, true, untagged);
1411         if (err)
1412                 return ERR_PTR(err);
1413
1414         mlxsw_sp_port_vlan = kzalloc(sizeof(*mlxsw_sp_port_vlan), GFP_KERNEL);
1415         if (!mlxsw_sp_port_vlan) {
1416                 err = -ENOMEM;
1417                 goto err_port_vlan_alloc;
1418         }
1419
1420         mlxsw_sp_port_vlan->mlxsw_sp_port = mlxsw_sp_port;
1421         mlxsw_sp_port_vlan->vid = vid;
1422         list_add(&mlxsw_sp_port_vlan->list, &mlxsw_sp_port->vlans_list);
1423
1424         return mlxsw_sp_port_vlan;
1425
1426 err_port_vlan_alloc:
1427         mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
1428         return ERR_PTR(err);
1429 }
1430
1431 static void
1432 mlxsw_sp_port_vlan_destroy(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
1433 {
1434         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp_port_vlan->mlxsw_sp_port;
1435         u16 vid = mlxsw_sp_port_vlan->vid;
1436
1437         list_del(&mlxsw_sp_port_vlan->list);
1438         kfree(mlxsw_sp_port_vlan);
1439         mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
1440 }
1441
1442 struct mlxsw_sp_port_vlan *
1443 mlxsw_sp_port_vlan_get(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
1444 {
1445         struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
1446
1447         mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
1448         if (mlxsw_sp_port_vlan)
1449                 return mlxsw_sp_port_vlan;
1450
1451         return mlxsw_sp_port_vlan_create(mlxsw_sp_port, vid);
1452 }
1453
1454 void mlxsw_sp_port_vlan_put(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
1455 {
1456         struct mlxsw_sp_fid *fid = mlxsw_sp_port_vlan->fid;
1457
1458         if (mlxsw_sp_port_vlan->bridge_port)
1459                 mlxsw_sp_port_vlan_bridge_leave(mlxsw_sp_port_vlan);
1460         else if (fid)
1461                 mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan);
1462
1463         mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
1464 }
1465
1466 static int mlxsw_sp_port_add_vid(struct net_device *dev,
1467                                  __be16 __always_unused proto, u16 vid)
1468 {
1469         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1470
1471         /* VLAN 0 is added to HW filter when device goes up, but it is
1472          * reserved in our case, so simply return.
1473          */
1474         if (!vid)
1475                 return 0;
1476
1477         return PTR_ERR_OR_ZERO(mlxsw_sp_port_vlan_get(mlxsw_sp_port, vid));
1478 }
1479
1480 static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1481                                   __be16 __always_unused proto, u16 vid)
1482 {
1483         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1484         struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
1485
1486         /* VLAN 0 is removed from HW filter when device goes down, but
1487          * it is reserved in our case, so simply return.
1488          */
1489         if (!vid)
1490                 return 0;
1491
1492         mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
1493         if (!mlxsw_sp_port_vlan)
1494                 return 0;
1495         mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan);
1496
1497         return 0;
1498 }
1499
1500 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1501                                             size_t len)
1502 {
1503         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1504         u8 module = mlxsw_sp_port->mapping.module;
1505         u8 width = mlxsw_sp_port->mapping.width;
1506         u8 lane = mlxsw_sp_port->mapping.lane;
1507         int err;
1508
1509         if (!mlxsw_sp_port->split)
1510                 err = snprintf(name, len, "p%d", module + 1);
1511         else
1512                 err = snprintf(name, len, "p%ds%d", module + 1,
1513                                lane / width);
1514
1515         if (err >= len)
1516                 return -EINVAL;
1517
1518         return 0;
1519 }
1520
1521 static struct mlxsw_sp_port_mall_tc_entry *
1522 mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1523                                  unsigned long cookie) {
1524         struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1525
1526         list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1527                 if (mall_tc_entry->cookie == cookie)
1528                         return mall_tc_entry;
1529
1530         return NULL;
1531 }
1532
1533 static int
1534 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1535                                       struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
1536                                       const struct tc_action *a,
1537                                       bool ingress)
1538 {
1539         struct net *net = dev_net(mlxsw_sp_port->dev);
1540         enum mlxsw_sp_span_type span_type;
1541         struct mlxsw_sp_port *to_port;
1542         struct net_device *to_dev;
1543         int ifindex;
1544
1545         ifindex = tcf_mirred_ifindex(a);
1546         to_dev = __dev_get_by_index(net, ifindex);
1547         if (!to_dev) {
1548                 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1549                 return -EINVAL;
1550         }
1551
1552         if (!mlxsw_sp_port_dev_check(to_dev)) {
1553                 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1554                 return -EOPNOTSUPP;
1555         }
1556         to_port = netdev_priv(to_dev);
1557
1558         mirror->to_local_port = to_port->local_port;
1559         mirror->ingress = ingress;
1560         span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1561         return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1562 }
1563
1564 static void
1565 mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1566                                       struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1567 {
1568         enum mlxsw_sp_span_type span_type;
1569
1570         span_type = mirror->ingress ?
1571                         MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1572         mlxsw_sp_span_mirror_remove(mlxsw_sp_port, mirror->to_local_port,
1573                                     span_type);
1574 }
1575
1576 static int
1577 mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1578                                       struct tc_cls_matchall_offload *cls,
1579                                       const struct tc_action *a,
1580                                       bool ingress)
1581 {
1582         int err;
1583
1584         if (!mlxsw_sp_port->sample)
1585                 return -EOPNOTSUPP;
1586         if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1587                 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1588                 return -EEXIST;
1589         }
1590         if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1591                 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1592                 return -EOPNOTSUPP;
1593         }
1594
1595         rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1596                            tcf_sample_psample_group(a));
1597         mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1598         mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1599         mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1600
1601         err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1602         if (err)
1603                 goto err_port_sample_set;
1604         return 0;
1605
1606 err_port_sample_set:
1607         RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1608         return err;
1609 }
1610
1611 static void
1612 mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1613 {
1614         if (!mlxsw_sp_port->sample)
1615                 return;
1616
1617         mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1618         RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1619 }
1620
1621 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1622                                           struct tc_cls_matchall_offload *f,
1623                                           bool ingress)
1624 {
1625         struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1626         __be16 protocol = f->common.protocol;
1627         const struct tc_action *a;
1628         LIST_HEAD(actions);
1629         int err;
1630
1631         if (!tcf_exts_has_one_action(f->exts)) {
1632                 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1633                 return -EOPNOTSUPP;
1634         }
1635
1636         mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1637         if (!mall_tc_entry)
1638                 return -ENOMEM;
1639         mall_tc_entry->cookie = f->cookie;
1640
1641         tcf_exts_to_list(f->exts, &actions);
1642         a = list_first_entry(&actions, struct tc_action, list);
1643
1644         if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1645                 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1646
1647                 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1648                 mirror = &mall_tc_entry->mirror;
1649                 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1650                                                             mirror, a, ingress);
1651         } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1652                 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1653                 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, f,
1654                                                             a, ingress);
1655         } else {
1656                 err = -EOPNOTSUPP;
1657         }
1658
1659         if (err)
1660                 goto err_add_action;
1661
1662         list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1663         return 0;
1664
1665 err_add_action:
1666         kfree(mall_tc_entry);
1667         return err;
1668 }
1669
1670 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1671                                            struct tc_cls_matchall_offload *f)
1672 {
1673         struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1674
1675         mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1676                                                          f->cookie);
1677         if (!mall_tc_entry) {
1678                 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1679                 return;
1680         }
1681         list_del(&mall_tc_entry->list);
1682
1683         switch (mall_tc_entry->type) {
1684         case MLXSW_SP_PORT_MALL_MIRROR:
1685                 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1686                                                       &mall_tc_entry->mirror);
1687                 break;
1688         case MLXSW_SP_PORT_MALL_SAMPLE:
1689                 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1690                 break;
1691         default:
1692                 WARN_ON(1);
1693         }
1694
1695         kfree(mall_tc_entry);
1696 }
1697
1698 static int mlxsw_sp_setup_tc_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1699                                           struct tc_cls_matchall_offload *f)
1700 {
1701         bool ingress;
1702
1703         if (is_classid_clsact_ingress(f->common.classid))
1704                 ingress = true;
1705         else if (is_classid_clsact_egress(f->common.classid))
1706                 ingress = false;
1707         else
1708                 return -EOPNOTSUPP;
1709
1710         if (f->common.chain_index)
1711                 return -EOPNOTSUPP;
1712
1713         switch (f->command) {
1714         case TC_CLSMATCHALL_REPLACE:
1715                 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port, f,
1716                                                       ingress);
1717         case TC_CLSMATCHALL_DESTROY:
1718                 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port, f);
1719                 return 0;
1720         default:
1721                 return -EOPNOTSUPP;
1722         }
1723 }
1724
1725 static int
1726 mlxsw_sp_setup_tc_cls_flower(struct mlxsw_sp_port *mlxsw_sp_port,
1727                              struct tc_cls_flower_offload *f)
1728 {
1729         bool ingress;
1730
1731         if (is_classid_clsact_ingress(f->common.classid))
1732                 ingress = true;
1733         else if (is_classid_clsact_egress(f->common.classid))
1734                 ingress = false;
1735         else
1736                 return -EOPNOTSUPP;
1737
1738         switch (f->command) {
1739         case TC_CLSFLOWER_REPLACE:
1740                 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress, f);
1741         case TC_CLSFLOWER_DESTROY:
1742                 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress, f);
1743                 return 0;
1744         case TC_CLSFLOWER_STATS:
1745                 return mlxsw_sp_flower_stats(mlxsw_sp_port, ingress, f);
1746         default:
1747                 return -EOPNOTSUPP;
1748         }
1749 }
1750
1751 static int mlxsw_sp_setup_tc(struct net_device *dev, enum tc_setup_type type,
1752                              void *type_data)
1753 {
1754         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1755
1756         switch (type) {
1757         case TC_SETUP_CLSMATCHALL:
1758                 return mlxsw_sp_setup_tc_cls_matchall(mlxsw_sp_port, type_data);
1759         case TC_SETUP_CLSFLOWER:
1760                 return mlxsw_sp_setup_tc_cls_flower(mlxsw_sp_port, type_data);
1761         default:
1762                 return -EOPNOTSUPP;
1763         }
1764 }
1765
1766 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1767         .ndo_open               = mlxsw_sp_port_open,
1768         .ndo_stop               = mlxsw_sp_port_stop,
1769         .ndo_start_xmit         = mlxsw_sp_port_xmit,
1770         .ndo_setup_tc           = mlxsw_sp_setup_tc,
1771         .ndo_set_rx_mode        = mlxsw_sp_set_rx_mode,
1772         .ndo_set_mac_address    = mlxsw_sp_port_set_mac_address,
1773         .ndo_change_mtu         = mlxsw_sp_port_change_mtu,
1774         .ndo_get_stats64        = mlxsw_sp_port_get_stats64,
1775         .ndo_has_offload_stats  = mlxsw_sp_port_has_offload_stats,
1776         .ndo_get_offload_stats  = mlxsw_sp_port_get_offload_stats,
1777         .ndo_vlan_rx_add_vid    = mlxsw_sp_port_add_vid,
1778         .ndo_vlan_rx_kill_vid   = mlxsw_sp_port_kill_vid,
1779         .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1780 };
1781
1782 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1783                                       struct ethtool_drvinfo *drvinfo)
1784 {
1785         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1786         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1787
1788         strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1789         strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1790                 sizeof(drvinfo->version));
1791         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1792                  "%d.%d.%d",
1793                  mlxsw_sp->bus_info->fw_rev.major,
1794                  mlxsw_sp->bus_info->fw_rev.minor,
1795                  mlxsw_sp->bus_info->fw_rev.subminor);
1796         strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1797                 sizeof(drvinfo->bus_info));
1798 }
1799
1800 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1801                                          struct ethtool_pauseparam *pause)
1802 {
1803         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1804
1805         pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1806         pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1807 }
1808
1809 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1810                                    struct ethtool_pauseparam *pause)
1811 {
1812         char pfcc_pl[MLXSW_REG_PFCC_LEN];
1813
1814         mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1815         mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1816         mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1817
1818         return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1819                                pfcc_pl);
1820 }
1821
1822 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1823                                         struct ethtool_pauseparam *pause)
1824 {
1825         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1826         bool pause_en = pause->tx_pause || pause->rx_pause;
1827         int err;
1828
1829         if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1830                 netdev_err(dev, "PFC already enabled on port\n");
1831                 return -EINVAL;
1832         }
1833
1834         if (pause->autoneg) {
1835                 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1836                 return -EINVAL;
1837         }
1838
1839         err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1840         if (err) {
1841                 netdev_err(dev, "Failed to configure port's headroom\n");
1842                 return err;
1843         }
1844
1845         err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1846         if (err) {
1847                 netdev_err(dev, "Failed to set PAUSE parameters\n");
1848                 goto err_port_pause_configure;
1849         }
1850
1851         mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1852         mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1853
1854         return 0;
1855
1856 err_port_pause_configure:
1857         pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1858         mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1859         return err;
1860 }
1861
1862 struct mlxsw_sp_port_hw_stats {
1863         char str[ETH_GSTRING_LEN];
1864         u64 (*getter)(const char *payload);
1865         bool cells_bytes;
1866 };
1867
1868 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1869         {
1870                 .str = "a_frames_transmitted_ok",
1871                 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1872         },
1873         {
1874                 .str = "a_frames_received_ok",
1875                 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1876         },
1877         {
1878                 .str = "a_frame_check_sequence_errors",
1879                 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1880         },
1881         {
1882                 .str = "a_alignment_errors",
1883                 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1884         },
1885         {
1886                 .str = "a_octets_transmitted_ok",
1887                 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1888         },
1889         {
1890                 .str = "a_octets_received_ok",
1891                 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1892         },
1893         {
1894                 .str = "a_multicast_frames_xmitted_ok",
1895                 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1896         },
1897         {
1898                 .str = "a_broadcast_frames_xmitted_ok",
1899                 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1900         },
1901         {
1902                 .str = "a_multicast_frames_received_ok",
1903                 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1904         },
1905         {
1906                 .str = "a_broadcast_frames_received_ok",
1907                 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1908         },
1909         {
1910                 .str = "a_in_range_length_errors",
1911                 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1912         },
1913         {
1914                 .str = "a_out_of_range_length_field",
1915                 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1916         },
1917         {
1918                 .str = "a_frame_too_long_errors",
1919                 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1920         },
1921         {
1922                 .str = "a_symbol_error_during_carrier",
1923                 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1924         },
1925         {
1926                 .str = "a_mac_control_frames_transmitted",
1927                 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1928         },
1929         {
1930                 .str = "a_mac_control_frames_received",
1931                 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1932         },
1933         {
1934                 .str = "a_unsupported_opcodes_received",
1935                 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1936         },
1937         {
1938                 .str = "a_pause_mac_ctrl_frames_received",
1939                 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1940         },
1941         {
1942                 .str = "a_pause_mac_ctrl_frames_xmitted",
1943                 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1944         },
1945 };
1946
1947 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1948
1949 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1950         {
1951                 .str = "rx_octets_prio",
1952                 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1953         },
1954         {
1955                 .str = "rx_frames_prio",
1956                 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1957         },
1958         {
1959                 .str = "tx_octets_prio",
1960                 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1961         },
1962         {
1963                 .str = "tx_frames_prio",
1964                 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1965         },
1966         {
1967                 .str = "rx_pause_prio",
1968                 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1969         },
1970         {
1971                 .str = "rx_pause_duration_prio",
1972                 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1973         },
1974         {
1975                 .str = "tx_pause_prio",
1976                 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1977         },
1978         {
1979                 .str = "tx_pause_duration_prio",
1980                 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1981         },
1982 };
1983
1984 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1985
1986 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1987         {
1988                 .str = "tc_transmit_queue_tc",
1989                 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_get,
1990                 .cells_bytes = true,
1991         },
1992         {
1993                 .str = "tc_no_buffer_discard_uc_tc",
1994                 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1995         },
1996 };
1997
1998 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1999
2000 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
2001                                          (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
2002                                           MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
2003                                          IEEE_8021QAZ_MAX_TCS)
2004
2005 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
2006 {
2007         int i;
2008
2009         for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
2010                 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
2011                          mlxsw_sp_port_hw_prio_stats[i].str, prio);
2012                 *p += ETH_GSTRING_LEN;
2013         }
2014 }
2015
2016 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
2017 {
2018         int i;
2019
2020         for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
2021                 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
2022                          mlxsw_sp_port_hw_tc_stats[i].str, tc);
2023                 *p += ETH_GSTRING_LEN;
2024         }
2025 }
2026
2027 static void mlxsw_sp_port_get_strings(struct net_device *dev,
2028                                       u32 stringset, u8 *data)
2029 {
2030         u8 *p = data;
2031         int i;
2032
2033         switch (stringset) {
2034         case ETH_SS_STATS:
2035                 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
2036                         memcpy(p, mlxsw_sp_port_hw_stats[i].str,
2037                                ETH_GSTRING_LEN);
2038                         p += ETH_GSTRING_LEN;
2039                 }
2040
2041                 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
2042                         mlxsw_sp_port_get_prio_strings(&p, i);
2043
2044                 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
2045                         mlxsw_sp_port_get_tc_strings(&p, i);
2046
2047                 break;
2048         }
2049 }
2050
2051 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
2052                                      enum ethtool_phys_id_state state)
2053 {
2054         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2055         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2056         char mlcr_pl[MLXSW_REG_MLCR_LEN];
2057         bool active;
2058
2059         switch (state) {
2060         case ETHTOOL_ID_ACTIVE:
2061                 active = true;
2062                 break;
2063         case ETHTOOL_ID_INACTIVE:
2064                 active = false;
2065                 break;
2066         default:
2067                 return -EOPNOTSUPP;
2068         }
2069
2070         mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
2071         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
2072 }
2073
2074 static int
2075 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
2076                                int *p_len, enum mlxsw_reg_ppcnt_grp grp)
2077 {
2078         switch (grp) {
2079         case  MLXSW_REG_PPCNT_IEEE_8023_CNT:
2080                 *p_hw_stats = mlxsw_sp_port_hw_stats;
2081                 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
2082                 break;
2083         case MLXSW_REG_PPCNT_PRIO_CNT:
2084                 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
2085                 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
2086                 break;
2087         case MLXSW_REG_PPCNT_TC_CNT:
2088                 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
2089                 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
2090                 break;
2091         default:
2092                 WARN_ON(1);
2093                 return -EOPNOTSUPP;
2094         }
2095         return 0;
2096 }
2097
2098 static void __mlxsw_sp_port_get_stats(struct net_device *dev,
2099                                       enum mlxsw_reg_ppcnt_grp grp, int prio,
2100                                       u64 *data, int data_index)
2101 {
2102         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2103         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2104         struct mlxsw_sp_port_hw_stats *hw_stats;
2105         char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
2106         int i, len;
2107         int err;
2108
2109         err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
2110         if (err)
2111                 return;
2112         mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
2113         for (i = 0; i < len; i++) {
2114                 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
2115                 if (!hw_stats[i].cells_bytes)
2116                         continue;
2117                 data[data_index + i] = mlxsw_sp_cells_bytes(mlxsw_sp,
2118                                                             data[data_index + i]);
2119         }
2120 }
2121
2122 static void mlxsw_sp_port_get_stats(struct net_device *dev,
2123                                     struct ethtool_stats *stats, u64 *data)
2124 {
2125         int i, data_index = 0;
2126
2127         /* IEEE 802.3 Counters */
2128         __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
2129                                   data, data_index);
2130         data_index = MLXSW_SP_PORT_HW_STATS_LEN;
2131
2132         /* Per-Priority Counters */
2133         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2134                 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
2135                                           data, data_index);
2136                 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
2137         }
2138
2139         /* Per-TC Counters */
2140         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2141                 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
2142                                           data, data_index);
2143                 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
2144         }
2145 }
2146
2147 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
2148 {
2149         switch (sset) {
2150         case ETH_SS_STATS:
2151                 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
2152         default:
2153                 return -EOPNOTSUPP;
2154         }
2155 }
2156
2157 struct mlxsw_sp_port_link_mode {
2158         enum ethtool_link_mode_bit_indices mask_ethtool;
2159         u32 mask;
2160         u32 speed;
2161 };
2162
2163 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
2164         {
2165                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
2166                 .mask_ethtool   = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
2167                 .speed          = SPEED_100,
2168         },
2169         {
2170                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
2171                                   MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
2172                 .mask_ethtool   = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
2173                 .speed          = SPEED_1000,
2174         },
2175         {
2176                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
2177                 .mask_ethtool   = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
2178                 .speed          = SPEED_10000,
2179         },
2180         {
2181                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
2182                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
2183                 .mask_ethtool   = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
2184                 .speed          = SPEED_10000,
2185         },
2186         {
2187                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2188                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2189                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2190                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
2191                 .mask_ethtool   = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
2192                 .speed          = SPEED_10000,
2193         },
2194         {
2195                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
2196                 .mask_ethtool   = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
2197                 .speed          = SPEED_20000,
2198         },
2199         {
2200                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
2201                 .mask_ethtool   = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
2202                 .speed          = SPEED_40000,
2203         },
2204         {
2205                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
2206                 .mask_ethtool   = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
2207                 .speed          = SPEED_40000,
2208         },
2209         {
2210                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
2211                 .mask_ethtool   = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
2212                 .speed          = SPEED_40000,
2213         },
2214         {
2215                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
2216                 .mask_ethtool   = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
2217                 .speed          = SPEED_40000,
2218         },
2219         {
2220                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
2221                 .mask_ethtool   = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
2222                 .speed          = SPEED_25000,
2223         },
2224         {
2225                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
2226                 .mask_ethtool   = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
2227                 .speed          = SPEED_25000,
2228         },
2229         {
2230                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2231                 .mask_ethtool   = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2232                 .speed          = SPEED_25000,
2233         },
2234         {
2235                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2236                 .mask_ethtool   = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2237                 .speed          = SPEED_25000,
2238         },
2239         {
2240                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
2241                 .mask_ethtool   = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
2242                 .speed          = SPEED_50000,
2243         },
2244         {
2245                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
2246                 .mask_ethtool   = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
2247                 .speed          = SPEED_50000,
2248         },
2249         {
2250                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
2251                 .mask_ethtool   = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
2252                 .speed          = SPEED_50000,
2253         },
2254         {
2255                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2256                 .mask_ethtool   = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
2257                 .speed          = SPEED_56000,
2258         },
2259         {
2260                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2261                 .mask_ethtool   = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
2262                 .speed          = SPEED_56000,
2263         },
2264         {
2265                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2266                 .mask_ethtool   = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
2267                 .speed          = SPEED_56000,
2268         },
2269         {
2270                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2271                 .mask_ethtool   = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
2272                 .speed          = SPEED_56000,
2273         },
2274         {
2275                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
2276                 .mask_ethtool   = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
2277                 .speed          = SPEED_100000,
2278         },
2279         {
2280                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
2281                 .mask_ethtool   = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
2282                 .speed          = SPEED_100000,
2283         },
2284         {
2285                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
2286                 .mask_ethtool   = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
2287                 .speed          = SPEED_100000,
2288         },
2289         {
2290                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
2291                 .mask_ethtool   = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
2292                 .speed          = SPEED_100000,
2293         },
2294 };
2295
2296 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
2297
2298 static void
2299 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
2300                                   struct ethtool_link_ksettings *cmd)
2301 {
2302         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2303                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2304                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
2305                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
2306                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
2307                               MLXSW_REG_PTYS_ETH_SPEED_SGMII))
2308                 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
2309
2310         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2311                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
2312                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
2313                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
2314                               MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
2315                 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
2316 }
2317
2318 static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
2319 {
2320         int i;
2321
2322         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2323                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
2324                         __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2325                                   mode);
2326         }
2327 }
2328
2329 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
2330                                             struct ethtool_link_ksettings *cmd)
2331 {
2332         u32 speed = SPEED_UNKNOWN;
2333         u8 duplex = DUPLEX_UNKNOWN;
2334         int i;
2335
2336         if (!carrier_ok)
2337                 goto out;
2338
2339         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2340                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
2341                         speed = mlxsw_sp_port_link_mode[i].speed;
2342                         duplex = DUPLEX_FULL;
2343                         break;
2344                 }
2345         }
2346 out:
2347         cmd->base.speed = speed;
2348         cmd->base.duplex = duplex;
2349 }
2350
2351 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
2352 {
2353         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2354                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
2355                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
2356                               MLXSW_REG_PTYS_ETH_SPEED_SGMII))
2357                 return PORT_FIBRE;
2358
2359         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2360                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
2361                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
2362                 return PORT_DA;
2363
2364         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2365                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
2366                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
2367                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
2368                 return PORT_NONE;
2369
2370         return PORT_OTHER;
2371 }
2372
2373 static u32
2374 mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
2375 {
2376         u32 ptys_proto = 0;
2377         int i;
2378
2379         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2380                 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2381                              cmd->link_modes.advertising))
2382                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2383         }
2384         return ptys_proto;
2385 }
2386
2387 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2388 {
2389         u32 ptys_proto = 0;
2390         int i;
2391
2392         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2393                 if (speed == mlxsw_sp_port_link_mode[i].speed)
2394                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2395         }
2396         return ptys_proto;
2397 }
2398
2399 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2400 {
2401         u32 ptys_proto = 0;
2402         int i;
2403
2404         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2405                 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2406                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2407         }
2408         return ptys_proto;
2409 }
2410
2411 static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2412                                              struct ethtool_link_ksettings *cmd)
2413 {
2414         ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2415         ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2416         ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2417
2418         mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2419         mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2420 }
2421
2422 static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2423                                              struct ethtool_link_ksettings *cmd)
2424 {
2425         if (!autoneg)
2426                 return;
2427
2428         ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2429         mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2430 }
2431
2432 static void
2433 mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2434                                     struct ethtool_link_ksettings *cmd)
2435 {
2436         if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2437                 return;
2438
2439         ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2440         mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2441 }
2442
2443 static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2444                                             struct ethtool_link_ksettings *cmd)
2445 {
2446         u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2447         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2448         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2449         char ptys_pl[MLXSW_REG_PTYS_LEN];
2450         u8 autoneg_status;
2451         bool autoneg;
2452         int err;
2453
2454         autoneg = mlxsw_sp_port->link.autoneg;
2455         mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2456         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2457         if (err)
2458                 return err;
2459         mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2460                                   &eth_proto_oper);
2461
2462         mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2463
2464         mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2465
2466         eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2467         autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2468         mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2469
2470         cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2471         cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2472         mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2473                                         cmd);
2474
2475         return 0;
2476 }
2477
2478 static int
2479 mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2480                                  const struct ethtool_link_ksettings *cmd)
2481 {
2482         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2483         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2484         char ptys_pl[MLXSW_REG_PTYS_LEN];
2485         u32 eth_proto_cap, eth_proto_new;
2486         bool autoneg;
2487         int err;
2488
2489         mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2490         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2491         if (err)
2492                 return err;
2493         mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2494
2495         autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2496         eth_proto_new = autoneg ?
2497                 mlxsw_sp_to_ptys_advert_link(cmd) :
2498                 mlxsw_sp_to_ptys_speed(cmd->base.speed);
2499
2500         eth_proto_new = eth_proto_new & eth_proto_cap;
2501         if (!eth_proto_new) {
2502                 netdev_err(dev, "No supported speed requested\n");
2503                 return -EINVAL;
2504         }
2505
2506         mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2507                                 eth_proto_new);
2508         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2509         if (err)
2510                 return err;
2511
2512         if (!netif_running(dev))
2513                 return 0;
2514
2515         mlxsw_sp_port->link.autoneg = autoneg;
2516
2517         mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2518         mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
2519
2520         return 0;
2521 }
2522
2523 static int mlxsw_sp_flash_device(struct net_device *dev,
2524                                  struct ethtool_flash *flash)
2525 {
2526         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2527         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2528         const struct firmware *firmware;
2529         int err;
2530
2531         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
2532                 return -EOPNOTSUPP;
2533
2534         dev_hold(dev);
2535         rtnl_unlock();
2536
2537         err = request_firmware_direct(&firmware, flash->data, &dev->dev);
2538         if (err)
2539                 goto out;
2540         err = mlxsw_sp_firmware_flash(mlxsw_sp, firmware);
2541         release_firmware(firmware);
2542 out:
2543         rtnl_lock();
2544         dev_put(dev);
2545         return err;
2546 }
2547
2548 #define MLXSW_SP_I2C_ADDR_LOW 0x50
2549 #define MLXSW_SP_I2C_ADDR_HIGH 0x51
2550 #define MLXSW_SP_EEPROM_PAGE_LENGTH 256
2551
2552 static int mlxsw_sp_query_module_eeprom(struct mlxsw_sp_port *mlxsw_sp_port,
2553                                         u16 offset, u16 size, void *data,
2554                                         unsigned int *p_read_size)
2555 {
2556         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2557         char eeprom_tmp[MLXSW_SP_REG_MCIA_EEPROM_SIZE];
2558         char mcia_pl[MLXSW_REG_MCIA_LEN];
2559         u16 i2c_addr;
2560         int status;
2561         int err;
2562
2563         size = min_t(u16, size, MLXSW_SP_REG_MCIA_EEPROM_SIZE);
2564
2565         if (offset < MLXSW_SP_EEPROM_PAGE_LENGTH &&
2566             offset + size > MLXSW_SP_EEPROM_PAGE_LENGTH)
2567                 /* Cross pages read, read until offset 256 in low page */
2568                 size = MLXSW_SP_EEPROM_PAGE_LENGTH - offset;
2569
2570         i2c_addr = MLXSW_SP_I2C_ADDR_LOW;
2571         if (offset >= MLXSW_SP_EEPROM_PAGE_LENGTH) {
2572                 i2c_addr = MLXSW_SP_I2C_ADDR_HIGH;
2573                 offset -= MLXSW_SP_EEPROM_PAGE_LENGTH;
2574         }
2575
2576         mlxsw_reg_mcia_pack(mcia_pl, mlxsw_sp_port->mapping.module,
2577                             0, 0, offset, size, i2c_addr);
2578
2579         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcia), mcia_pl);
2580         if (err)
2581                 return err;
2582
2583         status = mlxsw_reg_mcia_status_get(mcia_pl);
2584         if (status)
2585                 return -EIO;
2586
2587         mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp);
2588         memcpy(data, eeprom_tmp, size);
2589         *p_read_size = size;
2590
2591         return 0;
2592 }
2593
2594 enum mlxsw_sp_eeprom_module_info_rev_id {
2595         MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_UNSPC      = 0x00,
2596         MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8436       = 0x01,
2597         MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8636       = 0x03,
2598 };
2599
2600 enum mlxsw_sp_eeprom_module_info_id {
2601         MLXSW_SP_EEPROM_MODULE_INFO_ID_SFP              = 0x03,
2602         MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP             = 0x0C,
2603         MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP_PLUS        = 0x0D,
2604         MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28           = 0x11,
2605 };
2606
2607 enum mlxsw_sp_eeprom_module_info {
2608         MLXSW_SP_EEPROM_MODULE_INFO_ID,
2609         MLXSW_SP_EEPROM_MODULE_INFO_REV_ID,
2610         MLXSW_SP_EEPROM_MODULE_INFO_SIZE,
2611 };
2612
2613 static int mlxsw_sp_get_module_info(struct net_device *netdev,
2614                                     struct ethtool_modinfo *modinfo)
2615 {
2616         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(netdev);
2617         u8 module_info[MLXSW_SP_EEPROM_MODULE_INFO_SIZE];
2618         u8 module_rev_id, module_id;
2619         unsigned int read_size;
2620         int err;
2621
2622         err = mlxsw_sp_query_module_eeprom(mlxsw_sp_port, 0,
2623                                            MLXSW_SP_EEPROM_MODULE_INFO_SIZE,
2624                                            module_info, &read_size);
2625         if (err)
2626                 return err;
2627
2628         if (read_size < MLXSW_SP_EEPROM_MODULE_INFO_SIZE)
2629                 return -EIO;
2630
2631         module_rev_id = module_info[MLXSW_SP_EEPROM_MODULE_INFO_REV_ID];
2632         module_id = module_info[MLXSW_SP_EEPROM_MODULE_INFO_ID];
2633
2634         switch (module_id) {
2635         case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP:
2636                 modinfo->type       = ETH_MODULE_SFF_8436;
2637                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2638                 break;
2639         case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP_PLUS:
2640         case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28:
2641                 if (module_id  == MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28 ||
2642                     module_rev_id >= MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8636) {
2643                         modinfo->type       = ETH_MODULE_SFF_8636;
2644                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2645                 } else {
2646                         modinfo->type       = ETH_MODULE_SFF_8436;
2647                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2648                 }
2649                 break;
2650         case MLXSW_SP_EEPROM_MODULE_INFO_ID_SFP:
2651                 modinfo->type       = ETH_MODULE_SFF_8472;
2652                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2653                 break;
2654         default:
2655                 return -EINVAL;
2656         }
2657
2658         return 0;
2659 }
2660
2661 static int mlxsw_sp_get_module_eeprom(struct net_device *netdev,
2662                                       struct ethtool_eeprom *ee,
2663                                       u8 *data)
2664 {
2665         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(netdev);
2666         int offset = ee->offset;
2667         unsigned int read_size;
2668         int i = 0;
2669         int err;
2670
2671         if (!ee->len)
2672                 return -EINVAL;
2673
2674         memset(data, 0, ee->len);
2675
2676         while (i < ee->len) {
2677                 err = mlxsw_sp_query_module_eeprom(mlxsw_sp_port, offset,
2678                                                    ee->len - i, data + i,
2679                                                    &read_size);
2680                 if (err) {
2681                         netdev_err(mlxsw_sp_port->dev, "Eeprom query failed\n");
2682                         return err;
2683                 }
2684
2685                 i += read_size;
2686                 offset += read_size;
2687         }
2688
2689         return 0;
2690 }
2691
2692 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2693         .get_drvinfo            = mlxsw_sp_port_get_drvinfo,
2694         .get_link               = ethtool_op_get_link,
2695         .get_pauseparam         = mlxsw_sp_port_get_pauseparam,
2696         .set_pauseparam         = mlxsw_sp_port_set_pauseparam,
2697         .get_strings            = mlxsw_sp_port_get_strings,
2698         .set_phys_id            = mlxsw_sp_port_set_phys_id,
2699         .get_ethtool_stats      = mlxsw_sp_port_get_stats,
2700         .get_sset_count         = mlxsw_sp_port_get_sset_count,
2701         .get_link_ksettings     = mlxsw_sp_port_get_link_ksettings,
2702         .set_link_ksettings     = mlxsw_sp_port_set_link_ksettings,
2703         .flash_device           = mlxsw_sp_flash_device,
2704         .get_module_info        = mlxsw_sp_get_module_info,
2705         .get_module_eeprom      = mlxsw_sp_get_module_eeprom,
2706 };
2707
2708 static int
2709 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2710 {
2711         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2712         u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2713         char ptys_pl[MLXSW_REG_PTYS_LEN];
2714         u32 eth_proto_admin;
2715
2716         eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2717         mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2718                                 eth_proto_admin);
2719         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2720 }
2721
2722 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2723                           enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2724                           bool dwrr, u8 dwrr_weight)
2725 {
2726         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2727         char qeec_pl[MLXSW_REG_QEEC_LEN];
2728
2729         mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2730                             next_index);
2731         mlxsw_reg_qeec_de_set(qeec_pl, true);
2732         mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2733         mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2734         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2735 }
2736
2737 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2738                                   enum mlxsw_reg_qeec_hr hr, u8 index,
2739                                   u8 next_index, u32 maxrate)
2740 {
2741         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2742         char qeec_pl[MLXSW_REG_QEEC_LEN];
2743
2744         mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2745                             next_index);
2746         mlxsw_reg_qeec_mase_set(qeec_pl, true);
2747         mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2748         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2749 }
2750
2751 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2752                               u8 switch_prio, u8 tclass)
2753 {
2754         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2755         char qtct_pl[MLXSW_REG_QTCT_LEN];
2756
2757         mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2758                             tclass);
2759         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2760 }
2761
2762 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2763 {
2764         int err, i;
2765
2766         /* Setup the elements hierarcy, so that each TC is linked to
2767          * one subgroup, which are all member in the same group.
2768          */
2769         err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2770                                     MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2771                                     0);
2772         if (err)
2773                 return err;
2774         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2775                 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2776                                             MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2777                                             0, false, 0);
2778                 if (err)
2779                         return err;
2780         }
2781         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2782                 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2783                                             MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2784                                             false, 0);
2785                 if (err)
2786                         return err;
2787         }
2788
2789         /* Make sure the max shaper is disabled in all hierarcies that
2790          * support it.
2791          */
2792         err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2793                                             MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2794                                             MLXSW_REG_QEEC_MAS_DIS);
2795         if (err)
2796                 return err;
2797         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2798                 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2799                                                     MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2800                                                     i, 0,
2801                                                     MLXSW_REG_QEEC_MAS_DIS);
2802                 if (err)
2803                         return err;
2804         }
2805         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2806                 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2807                                                     MLXSW_REG_QEEC_HIERARCY_TC,
2808                                                     i, i,
2809                                                     MLXSW_REG_QEEC_MAS_DIS);
2810                 if (err)
2811                         return err;
2812         }
2813
2814         /* Map all priorities to traffic class 0. */
2815         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2816                 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2817                 if (err)
2818                         return err;
2819         }
2820
2821         return 0;
2822 }
2823
2824 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2825                                 bool split, u8 module, u8 width, u8 lane)
2826 {
2827         struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
2828         struct mlxsw_sp_port *mlxsw_sp_port;
2829         struct net_device *dev;
2830         int err;
2831
2832         err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2833         if (err) {
2834                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2835                         local_port);
2836                 return err;
2837         }
2838
2839         dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2840         if (!dev) {
2841                 err = -ENOMEM;
2842                 goto err_alloc_etherdev;
2843         }
2844         SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
2845         mlxsw_sp_port = netdev_priv(dev);
2846         mlxsw_sp_port->dev = dev;
2847         mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2848         mlxsw_sp_port->local_port = local_port;
2849         mlxsw_sp_port->pvid = 1;
2850         mlxsw_sp_port->split = split;
2851         mlxsw_sp_port->mapping.module = module;
2852         mlxsw_sp_port->mapping.width = width;
2853         mlxsw_sp_port->mapping.lane = lane;
2854         mlxsw_sp_port->link.autoneg = 1;
2855         INIT_LIST_HEAD(&mlxsw_sp_port->vlans_list);
2856         INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2857
2858         mlxsw_sp_port->pcpu_stats =
2859                 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2860         if (!mlxsw_sp_port->pcpu_stats) {
2861                 err = -ENOMEM;
2862                 goto err_alloc_stats;
2863         }
2864
2865         mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2866                                         GFP_KERNEL);
2867         if (!mlxsw_sp_port->sample) {
2868                 err = -ENOMEM;
2869                 goto err_alloc_sample;
2870         }
2871
2872         mlxsw_sp_port->hw_stats.cache =
2873                 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2874
2875         if (!mlxsw_sp_port->hw_stats.cache) {
2876                 err = -ENOMEM;
2877                 goto err_alloc_hw_stats;
2878         }
2879         INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2880                           &update_stats_cache);
2881
2882         dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2883         dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2884
2885         err = mlxsw_sp_port_module_map(mlxsw_sp_port, module, width, lane);
2886         if (err) {
2887                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to map module\n",
2888                         mlxsw_sp_port->local_port);
2889                 goto err_port_module_map;
2890         }
2891
2892         err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2893         if (err) {
2894                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2895                         mlxsw_sp_port->local_port);
2896                 goto err_port_swid_set;
2897         }
2898
2899         err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2900         if (err) {
2901                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2902                         mlxsw_sp_port->local_port);
2903                 goto err_dev_addr_init;
2904         }
2905
2906         netif_carrier_off(dev);
2907
2908         dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
2909                          NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2910         dev->hw_features |= NETIF_F_HW_TC;
2911
2912         dev->min_mtu = 0;
2913         dev->max_mtu = ETH_MAX_MTU;
2914
2915         /* Each packet needs to have a Tx header (metadata) on top all other
2916          * headers.
2917          */
2918         dev->needed_headroom = MLXSW_TXHDR_LEN;
2919
2920         err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2921         if (err) {
2922                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2923                         mlxsw_sp_port->local_port);
2924                 goto err_port_system_port_mapping_set;
2925         }
2926
2927         err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2928         if (err) {
2929                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2930                         mlxsw_sp_port->local_port);
2931                 goto err_port_speed_by_width_set;
2932         }
2933
2934         err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2935         if (err) {
2936                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2937                         mlxsw_sp_port->local_port);
2938                 goto err_port_mtu_set;
2939         }
2940
2941         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2942         if (err)
2943                 goto err_port_admin_status_set;
2944
2945         err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2946         if (err) {
2947                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2948                         mlxsw_sp_port->local_port);
2949                 goto err_port_buffers_init;
2950         }
2951
2952         err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2953         if (err) {
2954                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2955                         mlxsw_sp_port->local_port);
2956                 goto err_port_ets_init;
2957         }
2958
2959         /* ETS and buffers must be initialized before DCB. */
2960         err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2961         if (err) {
2962                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2963                         mlxsw_sp_port->local_port);
2964                 goto err_port_dcb_init;
2965         }
2966
2967         err = mlxsw_sp_port_fids_init(mlxsw_sp_port);
2968         if (err) {
2969                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize FIDs\n",
2970                         mlxsw_sp_port->local_port);
2971                 goto err_port_fids_init;
2972         }
2973
2974         mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_get(mlxsw_sp_port, 1);
2975         if (IS_ERR(mlxsw_sp_port_vlan)) {
2976                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create VID 1\n",
2977                         mlxsw_sp_port->local_port);
2978                 goto err_port_vlan_get;
2979         }
2980
2981         mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2982         mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2983         err = register_netdev(dev);
2984         if (err) {
2985                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2986                         mlxsw_sp_port->local_port);
2987                 goto err_register_netdev;
2988         }
2989
2990         mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2991                                 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2992                                 module);
2993         mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
2994         return 0;
2995
2996 err_register_netdev:
2997         mlxsw_sp->ports[local_port] = NULL;
2998         mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2999         mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan);
3000 err_port_vlan_get:
3001         mlxsw_sp_port_fids_fini(mlxsw_sp_port);
3002 err_port_fids_init:
3003         mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
3004 err_port_dcb_init:
3005 err_port_ets_init:
3006 err_port_buffers_init:
3007 err_port_admin_status_set:
3008 err_port_mtu_set:
3009 err_port_speed_by_width_set:
3010 err_port_system_port_mapping_set:
3011 err_dev_addr_init:
3012         mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
3013 err_port_swid_set:
3014         mlxsw_sp_port_module_unmap(mlxsw_sp_port);
3015 err_port_module_map:
3016         kfree(mlxsw_sp_port->hw_stats.cache);
3017 err_alloc_hw_stats:
3018         kfree(mlxsw_sp_port->sample);
3019 err_alloc_sample:
3020         free_percpu(mlxsw_sp_port->pcpu_stats);
3021 err_alloc_stats:
3022         free_netdev(dev);
3023 err_alloc_etherdev:
3024         mlxsw_core_port_fini(mlxsw_sp->core, local_port);
3025         return err;
3026 }
3027
3028 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
3029 {
3030         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3031
3032         cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
3033         mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
3034         unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
3035         mlxsw_sp->ports[local_port] = NULL;
3036         mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
3037         mlxsw_sp_port_vlan_flush(mlxsw_sp_port);
3038         mlxsw_sp_port_fids_fini(mlxsw_sp_port);
3039         mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
3040         mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
3041         mlxsw_sp_port_module_unmap(mlxsw_sp_port);
3042         kfree(mlxsw_sp_port->hw_stats.cache);
3043         kfree(mlxsw_sp_port->sample);
3044         free_percpu(mlxsw_sp_port->pcpu_stats);
3045         WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vlans_list));
3046         free_netdev(mlxsw_sp_port->dev);
3047         mlxsw_core_port_fini(mlxsw_sp->core, local_port);
3048 }
3049
3050 static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
3051 {
3052         return mlxsw_sp->ports[local_port] != NULL;
3053 }
3054
3055 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
3056 {
3057         int i;
3058
3059         for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
3060                 if (mlxsw_sp_port_created(mlxsw_sp, i))
3061                         mlxsw_sp_port_remove(mlxsw_sp, i);
3062         kfree(mlxsw_sp->port_to_module);
3063         kfree(mlxsw_sp->ports);
3064 }
3065
3066 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
3067 {
3068         unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
3069         u8 module, width, lane;
3070         size_t alloc_size;
3071         int i;
3072         int err;
3073
3074         alloc_size = sizeof(struct mlxsw_sp_port *) * max_ports;
3075         mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
3076         if (!mlxsw_sp->ports)
3077                 return -ENOMEM;
3078
3079         mlxsw_sp->port_to_module = kcalloc(max_ports, sizeof(u8), GFP_KERNEL);
3080         if (!mlxsw_sp->port_to_module) {
3081                 err = -ENOMEM;
3082                 goto err_port_to_module_alloc;
3083         }
3084
3085         for (i = 1; i < max_ports; i++) {
3086                 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
3087                                                     &width, &lane);
3088                 if (err)
3089                         goto err_port_module_info_get;
3090                 if (!width)
3091                         continue;
3092                 mlxsw_sp->port_to_module[i] = module;
3093                 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
3094                                            module, width, lane);
3095                 if (err)
3096                         goto err_port_create;
3097         }
3098         return 0;
3099
3100 err_port_create:
3101 err_port_module_info_get:
3102         for (i--; i >= 1; i--)
3103                 if (mlxsw_sp_port_created(mlxsw_sp, i))
3104                         mlxsw_sp_port_remove(mlxsw_sp, i);
3105         kfree(mlxsw_sp->port_to_module);
3106 err_port_to_module_alloc:
3107         kfree(mlxsw_sp->ports);
3108         return err;
3109 }
3110
3111 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
3112 {
3113         u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
3114
3115         return local_port - offset;
3116 }
3117
3118 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
3119                                       u8 module, unsigned int count)
3120 {
3121         u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
3122         int err, i;
3123
3124         for (i = 0; i < count; i++) {
3125                 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
3126                                            module, width, i * width);
3127                 if (err)
3128                         goto err_port_create;
3129         }
3130
3131         return 0;
3132
3133 err_port_create:
3134         for (i--; i >= 0; i--)
3135                 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3136                         mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
3137         return err;
3138 }
3139
3140 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
3141                                          u8 base_port, unsigned int count)
3142 {
3143         u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
3144         int i;
3145
3146         /* Split by four means we need to re-create two ports, otherwise
3147          * only one.
3148          */
3149         count = count / 2;
3150
3151         for (i = 0; i < count; i++) {
3152                 local_port = base_port + i * 2;
3153                 module = mlxsw_sp->port_to_module[local_port];
3154
3155                 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
3156                                      width, 0);
3157         }
3158 }
3159
3160 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
3161                                unsigned int count)
3162 {
3163         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3164         struct mlxsw_sp_port *mlxsw_sp_port;
3165         u8 module, cur_width, base_port;
3166         int i;
3167         int err;
3168
3169         mlxsw_sp_port = mlxsw_sp->ports[local_port];
3170         if (!mlxsw_sp_port) {
3171                 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
3172                         local_port);
3173                 return -EINVAL;
3174         }
3175
3176         module = mlxsw_sp_port->mapping.module;
3177         cur_width = mlxsw_sp_port->mapping.width;
3178
3179         if (count != 2 && count != 4) {
3180                 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
3181                 return -EINVAL;
3182         }
3183
3184         if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
3185                 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
3186                 return -EINVAL;
3187         }
3188
3189         /* Make sure we have enough slave (even) ports for the split. */
3190         if (count == 2) {
3191                 base_port = local_port;
3192                 if (mlxsw_sp->ports[base_port + 1]) {
3193                         netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
3194                         return -EINVAL;
3195                 }
3196         } else {
3197                 base_port = mlxsw_sp_cluster_base_port_get(local_port);
3198                 if (mlxsw_sp->ports[base_port + 1] ||
3199                     mlxsw_sp->ports[base_port + 3]) {
3200                         netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
3201                         return -EINVAL;
3202                 }
3203         }
3204
3205         for (i = 0; i < count; i++)
3206                 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3207                         mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
3208
3209         err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
3210         if (err) {
3211                 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
3212                 goto err_port_split_create;
3213         }
3214
3215         return 0;
3216
3217 err_port_split_create:
3218         mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
3219         return err;
3220 }
3221
3222 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
3223 {
3224         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3225         struct mlxsw_sp_port *mlxsw_sp_port;
3226         u8 cur_width, base_port;
3227         unsigned int count;
3228         int i;
3229
3230         mlxsw_sp_port = mlxsw_sp->ports[local_port];
3231         if (!mlxsw_sp_port) {
3232                 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
3233                         local_port);
3234                 return -EINVAL;
3235         }
3236
3237         if (!mlxsw_sp_port->split) {
3238                 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
3239                 return -EINVAL;
3240         }
3241
3242         cur_width = mlxsw_sp_port->mapping.width;
3243         count = cur_width == 1 ? 4 : 2;
3244
3245         base_port = mlxsw_sp_cluster_base_port_get(local_port);
3246
3247         /* Determine which ports to remove. */
3248         if (count == 2 && local_port >= base_port + 2)
3249                 base_port = base_port + 2;
3250
3251         for (i = 0; i < count; i++)
3252                 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3253                         mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
3254
3255         mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
3256
3257         return 0;
3258 }
3259
3260 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
3261                                      char *pude_pl, void *priv)
3262 {
3263         struct mlxsw_sp *mlxsw_sp = priv;
3264         struct mlxsw_sp_port *mlxsw_sp_port;
3265         enum mlxsw_reg_pude_oper_status status;
3266         u8 local_port;
3267
3268         local_port = mlxsw_reg_pude_local_port_get(pude_pl);
3269         mlxsw_sp_port = mlxsw_sp->ports[local_port];
3270         if (!mlxsw_sp_port)
3271                 return;
3272
3273         status = mlxsw_reg_pude_oper_status_get(pude_pl);
3274         if (status == MLXSW_PORT_OPER_STATUS_UP) {
3275                 netdev_info(mlxsw_sp_port->dev, "link up\n");
3276                 netif_carrier_on(mlxsw_sp_port->dev);
3277         } else {
3278                 netdev_info(mlxsw_sp_port->dev, "link down\n");
3279                 netif_carrier_off(mlxsw_sp_port->dev);
3280         }
3281 }
3282
3283 static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
3284                                               u8 local_port, void *priv)
3285 {
3286         struct mlxsw_sp *mlxsw_sp = priv;
3287         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3288         struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
3289
3290         if (unlikely(!mlxsw_sp_port)) {
3291                 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
3292                                      local_port);
3293                 return;
3294         }
3295
3296         skb->dev = mlxsw_sp_port->dev;
3297
3298         pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
3299         u64_stats_update_begin(&pcpu_stats->syncp);
3300         pcpu_stats->rx_packets++;
3301         pcpu_stats->rx_bytes += skb->len;
3302         u64_stats_update_end(&pcpu_stats->syncp);
3303
3304         skb->protocol = eth_type_trans(skb, skb->dev);
3305         netif_receive_skb(skb);
3306 }
3307
3308 static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
3309                                            void *priv)
3310 {
3311         skb->offload_fwd_mark = 1;
3312         return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
3313 }
3314
3315 static void mlxsw_sp_rx_listener_mr_mark_func(struct sk_buff *skb,
3316                                               u8 local_port, void *priv)
3317 {
3318         skb->offload_mr_fwd_mark = 1;
3319         skb->offload_fwd_mark = 1;
3320         return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
3321 }
3322
3323 static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
3324                                              void *priv)
3325 {
3326         struct mlxsw_sp *mlxsw_sp = priv;
3327         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3328         struct psample_group *psample_group;
3329         u32 size;
3330
3331         if (unlikely(!mlxsw_sp_port)) {
3332                 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
3333                                      local_port);
3334                 goto out;
3335         }
3336         if (unlikely(!mlxsw_sp_port->sample)) {
3337                 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
3338                                      local_port);
3339                 goto out;
3340         }
3341
3342         size = mlxsw_sp_port->sample->truncate ?
3343                   mlxsw_sp_port->sample->trunc_size : skb->len;
3344
3345         rcu_read_lock();
3346         psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
3347         if (!psample_group)
3348                 goto out_unlock;
3349         psample_sample_packet(psample_group, skb, size,
3350                               mlxsw_sp_port->dev->ifindex, 0,
3351                               mlxsw_sp_port->sample->rate);
3352 out_unlock:
3353         rcu_read_unlock();
3354 out:
3355         consume_skb(skb);
3356 }
3357
3358 #define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl)  \
3359         MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
3360                   _is_ctrl, SP_##_trap_group, DISCARD)
3361
3362 #define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl)     \
3363         MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action,    \
3364                 _is_ctrl, SP_##_trap_group, DISCARD)
3365
3366 #define MLXSW_SP_RXL_MR_MARK(_trap_id, _action, _trap_group, _is_ctrl)  \
3367         MLXSW_RXL(mlxsw_sp_rx_listener_mr_mark_func, _trap_id, _action, \
3368                 _is_ctrl, SP_##_trap_group, DISCARD)
3369
3370 #define MLXSW_SP_EVENTL(_func, _trap_id)                \
3371         MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
3372
3373 static const struct mlxsw_listener mlxsw_sp_listener[] = {
3374         /* Events */
3375         MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
3376         /* L2 traps */
3377         MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
3378         MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
3379         MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
3380         MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
3381         MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
3382         MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
3383         MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
3384         MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
3385         MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
3386         MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
3387         MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
3388         MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, IP2ME, false),
3389         MLXSW_SP_RXL_MARK(IPV6_MLDV12_LISTENER_QUERY, MIRROR_TO_CPU, IPV6_MLD,
3390                           false),
3391         MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD,
3392                              false),
3393         MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_DONE, TRAP_TO_CPU, IPV6_MLD,
3394                              false),
3395         MLXSW_SP_RXL_NO_MARK(IPV6_MLDV2_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD,
3396                              false),
3397         /* L3 traps */
3398         MLXSW_SP_RXL_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3399         MLXSW_SP_RXL_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3400         MLXSW_SP_RXL_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3401         MLXSW_SP_RXL_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
3402         MLXSW_SP_RXL_MARK(IPV6_UNSPECIFIED_ADDRESS, TRAP_TO_CPU, ROUTER_EXP,
3403                           false),
3404         MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP, false),
3405         MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_SRC, TRAP_TO_CPU, ROUTER_EXP, false),
3406         MLXSW_SP_RXL_MARK(IPV6_ALL_NODES_LINK, TRAP_TO_CPU, ROUTER_EXP, false),
3407         MLXSW_SP_RXL_MARK(IPV6_ALL_ROUTERS_LINK, TRAP_TO_CPU, ROUTER_EXP,
3408                           false),
3409         MLXSW_SP_RXL_MARK(IPV4_OSPF, TRAP_TO_CPU, OSPF, false),
3410         MLXSW_SP_RXL_MARK(IPV6_OSPF, TRAP_TO_CPU, OSPF, false),
3411         MLXSW_SP_RXL_MARK(IPV6_DHCP, TRAP_TO_CPU, DHCP, false),
3412         MLXSW_SP_RXL_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
3413         MLXSW_SP_RXL_MARK(IPV4_BGP, TRAP_TO_CPU, BGP, false),
3414         MLXSW_SP_RXL_MARK(IPV6_BGP, TRAP_TO_CPU, BGP, false),
3415         MLXSW_SP_RXL_MARK(L3_IPV6_ROUTER_SOLICITATION, TRAP_TO_CPU, IPV6_ND,
3416                           false),
3417         MLXSW_SP_RXL_MARK(L3_IPV6_ROUTER_ADVERTISMENT, TRAP_TO_CPU, IPV6_ND,
3418                           false),
3419         MLXSW_SP_RXL_MARK(L3_IPV6_NEIGHBOR_SOLICITATION, TRAP_TO_CPU, IPV6_ND,
3420                           false),
3421         MLXSW_SP_RXL_MARK(L3_IPV6_NEIGHBOR_ADVERTISMENT, TRAP_TO_CPU, IPV6_ND,
3422                           false),
3423         MLXSW_SP_RXL_MARK(L3_IPV6_REDIRECTION, TRAP_TO_CPU, IPV6_ND, false),
3424         MLXSW_SP_RXL_MARK(IPV6_MC_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP,
3425                           false),
3426         MLXSW_SP_RXL_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, HOST_MISS, false),
3427         MLXSW_SP_RXL_MARK(HOST_MISS_IPV6, TRAP_TO_CPU, HOST_MISS, false),
3428         MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV4, TRAP_TO_CPU, ROUTER_EXP, false),
3429         MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV6, TRAP_TO_CPU, ROUTER_EXP, false),
3430         MLXSW_SP_RXL_MARK(IPIP_DECAP_ERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3431         /* PKT Sample trap */
3432         MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
3433                   false, SP_IP2ME, DISCARD),
3434         /* ACL trap */
3435         MLXSW_SP_RXL_NO_MARK(ACL0, TRAP_TO_CPU, IP2ME, false),
3436         /* Multicast Router Traps */
3437         MLXSW_SP_RXL_MARK(IPV4_PIM, TRAP_TO_CPU, PIM, false),
3438         MLXSW_SP_RXL_MARK(RPF, TRAP_TO_CPU, RPF, false),
3439         MLXSW_SP_RXL_MARK(ACL1, TRAP_TO_CPU, MULTICAST, false),
3440         MLXSW_SP_RXL_MR_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false),
3441 };
3442
3443 static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
3444 {
3445         char qpcr_pl[MLXSW_REG_QPCR_LEN];
3446         enum mlxsw_reg_qpcr_ir_units ir_units;
3447         int max_cpu_policers;
3448         bool is_bytes;
3449         u8 burst_size;
3450         u32 rate;
3451         int i, err;
3452
3453         if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
3454                 return -EIO;
3455
3456         max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
3457
3458         ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
3459         for (i = 0; i < max_cpu_policers; i++) {
3460                 is_bytes = false;
3461                 switch (i) {
3462                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3463                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3464                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3465                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3466                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM:
3467                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_RPF:
3468                         rate = 128;
3469                         burst_size = 7;
3470                         break;
3471                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3472                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD:
3473                         rate = 16 * 1024;
3474                         burst_size = 10;
3475                         break;
3476                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP:
3477                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3478                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3479                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_HOST_MISS:
3480                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3481                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3482                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_ND:
3483                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST:
3484                         rate = 1024;
3485                         burst_size = 7;
3486                         break;
3487                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3488                         is_bytes = true;
3489                         rate = 4 * 1024;
3490                         burst_size = 4;
3491                         break;
3492                 default:
3493                         continue;
3494                 }
3495
3496                 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
3497                                     burst_size);
3498                 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
3499                 if (err)
3500                         return err;
3501         }
3502
3503         return 0;
3504 }
3505
3506 static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
3507 {
3508         char htgt_pl[MLXSW_REG_HTGT_LEN];
3509         enum mlxsw_reg_htgt_trap_group i;
3510         int max_cpu_policers;
3511         int max_trap_groups;
3512         u8 priority, tc;
3513         u16 policer_id;
3514         int err;
3515
3516         if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
3517                 return -EIO;
3518
3519         max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
3520         max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
3521
3522         for (i = 0; i < max_trap_groups; i++) {
3523                 policer_id = i;
3524                 switch (i) {
3525                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3526                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3527                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3528                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3529                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM:
3530                         priority = 5;
3531                         tc = 5;
3532                         break;
3533                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP:
3534                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3535                         priority = 4;
3536                         tc = 4;
3537                         break;
3538                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3539                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3540                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD:
3541                         priority = 3;
3542                         tc = 3;
3543                         break;
3544                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3545                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_ND:
3546                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_RPF:
3547                         priority = 2;
3548                         tc = 2;
3549                         break;
3550                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_HOST_MISS:
3551                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3552                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3553                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST:
3554                         priority = 1;
3555                         tc = 1;
3556                         break;
3557                 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
3558                         priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3559                         tc = MLXSW_REG_HTGT_DEFAULT_TC;
3560                         policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
3561                         break;
3562                 default:
3563                         continue;
3564                 }
3565
3566                 if (max_cpu_policers <= policer_id &&
3567                     policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3568                         return -EIO;
3569
3570                 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
3571                 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3572                 if (err)
3573                         return err;
3574         }
3575
3576         return 0;
3577 }
3578
3579 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3580 {
3581         int i;
3582         int err;
3583
3584         err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3585         if (err)
3586                 return err;
3587
3588         err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
3589         if (err)
3590                 return err;
3591
3592         for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
3593                 err = mlxsw_core_trap_register(mlxsw_sp->core,
3594                                                &mlxsw_sp_listener[i],
3595                                                mlxsw_sp);
3596                 if (err)
3597                         goto err_listener_register;
3598
3599         }
3600         return 0;
3601
3602 err_listener_register:
3603         for (i--; i >= 0; i--) {
3604                 mlxsw_core_trap_unregister(mlxsw_sp->core,
3605                                            &mlxsw_sp_listener[i],
3606                                            mlxsw_sp);
3607         }
3608         return err;
3609 }
3610
3611 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3612 {
3613         int i;
3614
3615         for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
3616                 mlxsw_core_trap_unregister(mlxsw_sp->core,
3617                                            &mlxsw_sp_listener[i],
3618                                            mlxsw_sp);
3619         }
3620 }
3621
3622 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3623 {
3624         char slcr_pl[MLXSW_REG_SLCR_LEN];
3625         int err;
3626
3627         mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3628                                      MLXSW_REG_SLCR_LAG_HASH_DMAC |
3629                                      MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3630                                      MLXSW_REG_SLCR_LAG_HASH_VLANID |
3631                                      MLXSW_REG_SLCR_LAG_HASH_SIP |
3632                                      MLXSW_REG_SLCR_LAG_HASH_DIP |
3633                                      MLXSW_REG_SLCR_LAG_HASH_SPORT |
3634                                      MLXSW_REG_SLCR_LAG_HASH_DPORT |
3635                                      MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
3636         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3637         if (err)
3638                 return err;
3639
3640         if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3641             !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
3642                 return -EIO;
3643
3644         mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
3645                                  sizeof(struct mlxsw_sp_upper),
3646                                  GFP_KERNEL);
3647         if (!mlxsw_sp->lags)
3648                 return -ENOMEM;
3649
3650         return 0;
3651 }
3652
3653 static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3654 {
3655         kfree(mlxsw_sp->lags);
3656 }
3657
3658 static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3659 {
3660         char htgt_pl[MLXSW_REG_HTGT_LEN];
3661
3662         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3663                             MLXSW_REG_HTGT_INVALID_POLICER,
3664                             MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3665                             MLXSW_REG_HTGT_DEFAULT_TC);
3666         return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3667 }
3668
3669 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
3670                          const struct mlxsw_bus_info *mlxsw_bus_info)
3671 {
3672         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3673         int err;
3674
3675         mlxsw_sp->core = mlxsw_core;
3676         mlxsw_sp->bus_info = mlxsw_bus_info;
3677
3678         err = mlxsw_sp_fw_rev_validate(mlxsw_sp);
3679         if (err) {
3680                 dev_err(mlxsw_sp->bus_info->dev, "Could not upgrade firmware\n");
3681                 return err;
3682         }
3683
3684         err = mlxsw_sp_base_mac_get(mlxsw_sp);
3685         if (err) {
3686                 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3687                 return err;
3688         }
3689
3690         err = mlxsw_sp_fids_init(mlxsw_sp);
3691         if (err) {
3692                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize FIDs\n");
3693                 return err;
3694         }
3695
3696         err = mlxsw_sp_traps_init(mlxsw_sp);
3697         if (err) {
3698                 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3699                 goto err_traps_init;
3700         }
3701
3702         err = mlxsw_sp_buffers_init(mlxsw_sp);
3703         if (err) {
3704                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3705                 goto err_buffers_init;
3706         }
3707
3708         err = mlxsw_sp_lag_init(mlxsw_sp);
3709         if (err) {
3710                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3711                 goto err_lag_init;
3712         }
3713
3714         err = mlxsw_sp_switchdev_init(mlxsw_sp);
3715         if (err) {
3716                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3717                 goto err_switchdev_init;
3718         }
3719
3720         err = mlxsw_sp_counter_pool_init(mlxsw_sp);
3721         if (err) {
3722                 dev_err(mlxsw_sp->bus_info->dev, "Failed to init counter pool\n");
3723                 goto err_counter_pool_init;
3724         }
3725
3726         err = mlxsw_sp_afa_init(mlxsw_sp);
3727         if (err) {
3728                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL actions\n");
3729                 goto err_afa_init;
3730         }
3731
3732         err = mlxsw_sp_router_init(mlxsw_sp);
3733         if (err) {
3734                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3735                 goto err_router_init;
3736         }
3737
3738         err = mlxsw_sp_span_init(mlxsw_sp);
3739         if (err) {
3740                 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3741                 goto err_span_init;
3742         }
3743
3744         err = mlxsw_sp_acl_init(mlxsw_sp);
3745         if (err) {
3746                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3747                 goto err_acl_init;
3748         }
3749
3750         err = mlxsw_sp_dpipe_init(mlxsw_sp);
3751         if (err) {
3752                 dev_err(mlxsw_sp->bus_info->dev, "Failed to init pipeline debug\n");
3753                 goto err_dpipe_init;
3754         }
3755
3756         err = mlxsw_sp_ports_create(mlxsw_sp);
3757         if (err) {
3758                 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3759                 goto err_ports_create;
3760         }
3761
3762         return 0;
3763
3764 err_ports_create:
3765         mlxsw_sp_dpipe_fini(mlxsw_sp);
3766 err_dpipe_init:
3767         mlxsw_sp_acl_fini(mlxsw_sp);
3768 err_acl_init:
3769         mlxsw_sp_span_fini(mlxsw_sp);
3770 err_span_init:
3771         mlxsw_sp_router_fini(mlxsw_sp);
3772 err_router_init:
3773         mlxsw_sp_afa_fini(mlxsw_sp);
3774 err_afa_init:
3775         mlxsw_sp_counter_pool_fini(mlxsw_sp);
3776 err_counter_pool_init:
3777         mlxsw_sp_switchdev_fini(mlxsw_sp);
3778 err_switchdev_init:
3779         mlxsw_sp_lag_fini(mlxsw_sp);
3780 err_lag_init:
3781         mlxsw_sp_buffers_fini(mlxsw_sp);
3782 err_buffers_init:
3783         mlxsw_sp_traps_fini(mlxsw_sp);
3784 err_traps_init:
3785         mlxsw_sp_fids_fini(mlxsw_sp);
3786         return err;
3787 }
3788
3789 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
3790 {
3791         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3792
3793         mlxsw_sp_ports_remove(mlxsw_sp);
3794         mlxsw_sp_dpipe_fini(mlxsw_sp);
3795         mlxsw_sp_acl_fini(mlxsw_sp);
3796         mlxsw_sp_span_fini(mlxsw_sp);
3797         mlxsw_sp_router_fini(mlxsw_sp);
3798         mlxsw_sp_afa_fini(mlxsw_sp);
3799         mlxsw_sp_counter_pool_fini(mlxsw_sp);
3800         mlxsw_sp_switchdev_fini(mlxsw_sp);
3801         mlxsw_sp_lag_fini(mlxsw_sp);
3802         mlxsw_sp_buffers_fini(mlxsw_sp);
3803         mlxsw_sp_traps_fini(mlxsw_sp);
3804         mlxsw_sp_fids_fini(mlxsw_sp);
3805 }
3806
3807 static const struct mlxsw_config_profile mlxsw_sp_config_profile = {
3808         .used_max_vepa_channels         = 1,
3809         .max_vepa_channels              = 0,
3810         .used_max_mid                   = 1,
3811         .max_mid                        = MLXSW_SP_MID_MAX,
3812         .used_max_pgt                   = 1,
3813         .max_pgt                        = 0,
3814         .used_flood_tables              = 1,
3815         .used_flood_mode                = 1,
3816         .flood_mode                     = 3,
3817         .max_fid_offset_flood_tables    = 3,
3818         .fid_offset_flood_table_size    = VLAN_N_VID - 1,
3819         .max_fid_flood_tables           = 3,
3820         .fid_flood_table_size           = MLXSW_SP_FID_8021D_MAX,
3821         .used_max_ib_mc                 = 1,
3822         .max_ib_mc                      = 0,
3823         .used_max_pkey                  = 1,
3824         .max_pkey                       = 0,
3825         .used_kvd_split_data            = 1,
3826         .kvd_hash_granularity           = MLXSW_SP_KVD_GRANULARITY,
3827         .kvd_hash_single_parts          = 2,
3828         .kvd_hash_double_parts          = 1,
3829         .kvd_linear_size                = MLXSW_SP_KVD_LINEAR_SIZE,
3830         .swid_config                    = {
3831                 {
3832                         .used_type      = 1,
3833                         .type           = MLXSW_PORT_SWID_TYPE_ETH,
3834                 }
3835         },
3836         .resource_query_enable          = 1,
3837 };
3838
3839 static struct mlxsw_driver mlxsw_sp_driver = {
3840         .kind                           = mlxsw_sp_driver_name,
3841         .priv_size                      = sizeof(struct mlxsw_sp),
3842         .init                           = mlxsw_sp_init,
3843         .fini                           = mlxsw_sp_fini,
3844         .basic_trap_groups_set          = mlxsw_sp_basic_trap_groups_set,
3845         .port_split                     = mlxsw_sp_port_split,
3846         .port_unsplit                   = mlxsw_sp_port_unsplit,
3847         .sb_pool_get                    = mlxsw_sp_sb_pool_get,
3848         .sb_pool_set                    = mlxsw_sp_sb_pool_set,
3849         .sb_port_pool_get               = mlxsw_sp_sb_port_pool_get,
3850         .sb_port_pool_set               = mlxsw_sp_sb_port_pool_set,
3851         .sb_tc_pool_bind_get            = mlxsw_sp_sb_tc_pool_bind_get,
3852         .sb_tc_pool_bind_set            = mlxsw_sp_sb_tc_pool_bind_set,
3853         .sb_occ_snapshot                = mlxsw_sp_sb_occ_snapshot,
3854         .sb_occ_max_clear               = mlxsw_sp_sb_occ_max_clear,
3855         .sb_occ_port_pool_get           = mlxsw_sp_sb_occ_port_pool_get,
3856         .sb_occ_tc_port_bind_get        = mlxsw_sp_sb_occ_tc_port_bind_get,
3857         .txhdr_construct                = mlxsw_sp_txhdr_construct,
3858         .txhdr_len                      = MLXSW_TXHDR_LEN,
3859         .profile                        = &mlxsw_sp_config_profile,
3860 };
3861
3862 bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3863 {
3864         return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3865 }
3866
3867 static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data)
3868 {
3869         struct mlxsw_sp_port **p_mlxsw_sp_port = data;
3870         int ret = 0;
3871
3872         if (mlxsw_sp_port_dev_check(lower_dev)) {
3873                 *p_mlxsw_sp_port = netdev_priv(lower_dev);
3874                 ret = 1;
3875         }
3876
3877         return ret;
3878 }
3879
3880 struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3881 {
3882         struct mlxsw_sp_port *mlxsw_sp_port;
3883
3884         if (mlxsw_sp_port_dev_check(dev))
3885                 return netdev_priv(dev);
3886
3887         mlxsw_sp_port = NULL;
3888         netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
3889
3890         return mlxsw_sp_port;
3891 }
3892
3893 struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3894 {
3895         struct mlxsw_sp_port *mlxsw_sp_port;
3896
3897         mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3898         return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3899 }
3900
3901 struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3902 {
3903         struct mlxsw_sp_port *mlxsw_sp_port;
3904
3905         if (mlxsw_sp_port_dev_check(dev))
3906                 return netdev_priv(dev);
3907
3908         mlxsw_sp_port = NULL;
3909         netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3910                                       &mlxsw_sp_port);
3911
3912         return mlxsw_sp_port;
3913 }
3914
3915 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3916 {
3917         struct mlxsw_sp_port *mlxsw_sp_port;
3918
3919         rcu_read_lock();
3920         mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3921         if (mlxsw_sp_port)
3922                 dev_hold(mlxsw_sp_port->dev);
3923         rcu_read_unlock();
3924         return mlxsw_sp_port;
3925 }
3926
3927 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3928 {
3929         dev_put(mlxsw_sp_port->dev);
3930 }
3931
3932 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3933 {
3934         char sldr_pl[MLXSW_REG_SLDR_LEN];
3935
3936         mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3937         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3938 }
3939
3940 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3941 {
3942         char sldr_pl[MLXSW_REG_SLDR_LEN];
3943
3944         mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3945         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3946 }
3947
3948 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3949                                      u16 lag_id, u8 port_index)
3950 {
3951         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3952         char slcor_pl[MLXSW_REG_SLCOR_LEN];
3953
3954         mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3955                                       lag_id, port_index);
3956         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3957 }
3958
3959 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3960                                         u16 lag_id)
3961 {
3962         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3963         char slcor_pl[MLXSW_REG_SLCOR_LEN];
3964
3965         mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3966                                          lag_id);
3967         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3968 }
3969
3970 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3971                                         u16 lag_id)
3972 {
3973         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3974         char slcor_pl[MLXSW_REG_SLCOR_LEN];
3975
3976         mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3977                                         lag_id);
3978         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3979 }
3980
3981 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3982                                          u16 lag_id)
3983 {
3984         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3985         char slcor_pl[MLXSW_REG_SLCOR_LEN];
3986
3987         mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3988                                          lag_id);
3989         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3990 }
3991
3992 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3993                                   struct net_device *lag_dev,
3994                                   u16 *p_lag_id)
3995 {
3996         struct mlxsw_sp_upper *lag;
3997         int free_lag_id = -1;
3998         u64 max_lag;
3999         int i;
4000
4001         max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4002         for (i = 0; i < max_lag; i++) {
4003                 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4004                 if (lag->ref_count) {
4005                         if (lag->dev == lag_dev) {
4006                                 *p_lag_id = i;
4007                                 return 0;
4008                         }
4009                 } else if (free_lag_id < 0) {
4010                         free_lag_id = i;
4011                 }
4012         }
4013         if (free_lag_id < 0)
4014                 return -EBUSY;
4015         *p_lag_id = free_lag_id;
4016         return 0;
4017 }
4018
4019 static bool
4020 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4021                           struct net_device *lag_dev,
4022                           struct netdev_lag_upper_info *lag_upper_info)
4023 {
4024         u16 lag_id;
4025
4026         if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4027                 return false;
4028         if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4029                 return false;
4030         return true;
4031 }
4032
4033 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4034                                        u16 lag_id, u8 *p_port_index)
4035 {
4036         u64 max_lag_members;
4037         int i;
4038
4039         max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4040                                              MAX_LAG_MEMBERS);
4041         for (i = 0; i < max_lag_members; i++) {
4042                 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4043                         *p_port_index = i;
4044                         return 0;
4045                 }
4046         }
4047         return -EBUSY;
4048 }
4049
4050 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4051                                   struct net_device *lag_dev)
4052 {
4053         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4054         struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
4055         struct mlxsw_sp_upper *lag;
4056         u16 lag_id;
4057         u8 port_index;
4058         int err;
4059
4060         err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4061         if (err)
4062                 return err;
4063         lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4064         if (!lag->ref_count) {
4065                 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4066                 if (err)
4067                         return err;
4068                 lag->dev = lag_dev;
4069         }
4070
4071         err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4072         if (err)
4073                 return err;
4074         err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4075         if (err)
4076                 goto err_col_port_add;
4077         err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4078         if (err)
4079                 goto err_col_port_enable;
4080
4081         mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4082                                    mlxsw_sp_port->local_port);
4083         mlxsw_sp_port->lag_id = lag_id;
4084         mlxsw_sp_port->lagged = 1;
4085         lag->ref_count++;
4086
4087         /* Port is no longer usable as a router interface */
4088         mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, 1);
4089         if (mlxsw_sp_port_vlan->fid)
4090                 mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan);
4091
4092         return 0;
4093
4094 err_col_port_enable:
4095         mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4096 err_col_port_add:
4097         if (!lag->ref_count)
4098                 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
4099         return err;
4100 }
4101
4102 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4103                                     struct net_device *lag_dev)
4104 {
4105         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4106         u16 lag_id = mlxsw_sp_port->lag_id;
4107         struct mlxsw_sp_upper *lag;
4108
4109         if (!mlxsw_sp_port->lagged)
4110                 return;
4111         lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4112         WARN_ON(lag->ref_count == 0);
4113
4114         mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4115         mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4116
4117         /* Any VLANs configured on the port are no longer valid */
4118         mlxsw_sp_port_vlan_flush(mlxsw_sp_port);
4119
4120         if (lag->ref_count == 1)
4121                 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
4122
4123         mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4124                                      mlxsw_sp_port->local_port);
4125         mlxsw_sp_port->lagged = 0;
4126         lag->ref_count--;
4127
4128         mlxsw_sp_port_vlan_get(mlxsw_sp_port, 1);
4129         /* Make sure untagged frames are allowed to ingress */
4130         mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
4131 }
4132
4133 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4134                                       u16 lag_id)
4135 {
4136         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4137         char sldr_pl[MLXSW_REG_SLDR_LEN];
4138
4139         mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4140                                          mlxsw_sp_port->local_port);
4141         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4142 }
4143
4144 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4145                                          u16 lag_id)
4146 {
4147         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4148         char sldr_pl[MLXSW_REG_SLDR_LEN];
4149
4150         mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4151                                             mlxsw_sp_port->local_port);
4152         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4153 }
4154
4155 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4156                                        bool lag_tx_enabled)
4157 {
4158         if (lag_tx_enabled)
4159                 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4160                                                   mlxsw_sp_port->lag_id);
4161         else
4162                 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4163                                                      mlxsw_sp_port->lag_id);
4164 }
4165
4166 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4167                                      struct netdev_lag_lower_state_info *info)
4168 {
4169         return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4170 }
4171
4172 static int mlxsw_sp_port_stp_set(struct mlxsw_sp_port *mlxsw_sp_port,
4173                                  bool enable)
4174 {
4175         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4176         enum mlxsw_reg_spms_state spms_state;
4177         char *spms_pl;
4178         u16 vid;
4179         int err;
4180
4181         spms_state = enable ? MLXSW_REG_SPMS_STATE_FORWARDING :
4182                               MLXSW_REG_SPMS_STATE_DISCARDING;
4183
4184         spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
4185         if (!spms_pl)
4186                 return -ENOMEM;
4187         mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
4188
4189         for (vid = 0; vid < VLAN_N_VID; vid++)
4190                 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
4191
4192         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
4193         kfree(spms_pl);
4194         return err;
4195 }
4196
4197 static int mlxsw_sp_port_ovs_join(struct mlxsw_sp_port *mlxsw_sp_port)
4198 {
4199         int err;
4200
4201         err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
4202         if (err)
4203                 return err;
4204         err = mlxsw_sp_port_stp_set(mlxsw_sp_port, true);
4205         if (err)
4206                 goto err_port_stp_set;
4207         err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
4208                                      true, false);
4209         if (err)
4210                 goto err_port_vlan_set;
4211         return 0;
4212
4213 err_port_vlan_set:
4214         mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4215 err_port_stp_set:
4216         mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
4217         return err;
4218 }
4219
4220 static void mlxsw_sp_port_ovs_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4221 {
4222         mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
4223                                false, false);
4224         mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4225         mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
4226 }
4227
4228 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *lower_dev,
4229                                                struct net_device *dev,
4230                                                unsigned long event, void *ptr)
4231 {
4232         struct netdev_notifier_changeupper_info *info;
4233         struct mlxsw_sp_port *mlxsw_sp_port;
4234         struct net_device *upper_dev;
4235         struct mlxsw_sp *mlxsw_sp;
4236         int err = 0;
4237
4238         mlxsw_sp_port = netdev_priv(dev);
4239         mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4240         info = ptr;
4241
4242         switch (event) {
4243         case NETDEV_PRECHANGEUPPER:
4244                 upper_dev = info->upper_dev;
4245                 if (!is_vlan_dev(upper_dev) &&
4246                     !netif_is_lag_master(upper_dev) &&
4247                     !netif_is_bridge_master(upper_dev) &&
4248                     !netif_is_ovs_master(upper_dev))
4249                         return -EINVAL;
4250                 if (!info->linking)
4251                         break;
4252                 if (netdev_has_any_upper_dev(upper_dev))
4253                         return -EINVAL;
4254                 if (netif_is_lag_master(upper_dev) &&
4255                     !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4256                                                info->upper_info))
4257                         return -EINVAL;
4258                 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4259                         return -EINVAL;
4260                 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4261                     !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4262                         return -EINVAL;
4263                 if (netif_is_ovs_master(upper_dev) && vlan_uses_dev(dev))
4264                         return -EINVAL;
4265                 if (netif_is_ovs_port(dev) && is_vlan_dev(upper_dev))
4266                         return -EINVAL;
4267                 break;
4268         case NETDEV_CHANGEUPPER:
4269                 upper_dev = info->upper_dev;
4270                 if (netif_is_bridge_master(upper_dev)) {
4271                         if (info->linking)
4272                                 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4273                                                                 lower_dev,
4274                                                                 upper_dev);
4275                         else
4276                                 mlxsw_sp_port_bridge_leave(mlxsw_sp_port,
4277                                                            lower_dev,
4278                                                            upper_dev);
4279                 } else if (netif_is_lag_master(upper_dev)) {
4280                         if (info->linking)
4281                                 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4282                                                              upper_dev);
4283                         else
4284                                 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4285                                                         upper_dev);
4286                 } else if (netif_is_ovs_master(upper_dev)) {
4287                         if (info->linking)
4288                                 err = mlxsw_sp_port_ovs_join(mlxsw_sp_port);
4289                         else
4290                                 mlxsw_sp_port_ovs_leave(mlxsw_sp_port);
4291                 }
4292                 break;
4293         }
4294
4295         return err;
4296 }
4297
4298 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4299                                                unsigned long event, void *ptr)
4300 {
4301         struct netdev_notifier_changelowerstate_info *info;
4302         struct mlxsw_sp_port *mlxsw_sp_port;
4303         int err;
4304
4305         mlxsw_sp_port = netdev_priv(dev);
4306         info = ptr;
4307
4308         switch (event) {
4309         case NETDEV_CHANGELOWERSTATE:
4310                 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4311                         err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4312                                                         info->lower_state_info);
4313                         if (err)
4314                                 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4315                 }
4316                 break;
4317         }
4318
4319         return 0;
4320 }
4321
4322 static int mlxsw_sp_netdevice_port_event(struct net_device *lower_dev,
4323                                          struct net_device *port_dev,
4324                                          unsigned long event, void *ptr)
4325 {
4326         switch (event) {
4327         case NETDEV_PRECHANGEUPPER:
4328         case NETDEV_CHANGEUPPER:
4329                 return mlxsw_sp_netdevice_port_upper_event(lower_dev, port_dev,
4330                                                            event, ptr);
4331         case NETDEV_CHANGELOWERSTATE:
4332                 return mlxsw_sp_netdevice_port_lower_event(port_dev, event,
4333                                                            ptr);
4334         }
4335
4336         return 0;
4337 }
4338
4339 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4340                                         unsigned long event, void *ptr)
4341 {
4342         struct net_device *dev;
4343         struct list_head *iter;
4344         int ret;
4345
4346         netdev_for_each_lower_dev(lag_dev, dev, iter) {
4347                 if (mlxsw_sp_port_dev_check(dev)) {
4348                         ret = mlxsw_sp_netdevice_port_event(lag_dev, dev, event,
4349                                                             ptr);
4350                         if (ret)
4351                                 return ret;
4352                 }
4353         }
4354
4355         return 0;
4356 }
4357
4358 static int mlxsw_sp_netdevice_port_vlan_event(struct net_device *vlan_dev,
4359                                               struct net_device *dev,
4360                                               unsigned long event, void *ptr,
4361                                               u16 vid)
4362 {
4363         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4364         struct netdev_notifier_changeupper_info *info = ptr;
4365         struct net_device *upper_dev;
4366         int err = 0;
4367
4368         switch (event) {
4369         case NETDEV_PRECHANGEUPPER:
4370                 upper_dev = info->upper_dev;
4371                 if (!netif_is_bridge_master(upper_dev))
4372                         return -EINVAL;
4373                 if (!info->linking)
4374                         break;
4375                 if (netdev_has_any_upper_dev(upper_dev))
4376                         return -EINVAL;
4377                 break;
4378         case NETDEV_CHANGEUPPER:
4379                 upper_dev = info->upper_dev;
4380                 if (netif_is_bridge_master(upper_dev)) {
4381                         if (info->linking)
4382                                 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4383                                                                 vlan_dev,
4384                                                                 upper_dev);
4385                         else
4386                                 mlxsw_sp_port_bridge_leave(mlxsw_sp_port,
4387                                                            vlan_dev,
4388                                                            upper_dev);
4389                 } else {
4390                         err = -EINVAL;
4391                         WARN_ON(1);
4392                 }
4393                 break;
4394         }
4395
4396         return err;
4397 }
4398
4399 static int mlxsw_sp_netdevice_lag_port_vlan_event(struct net_device *vlan_dev,
4400                                                   struct net_device *lag_dev,
4401                                                   unsigned long event,
4402                                                   void *ptr, u16 vid)
4403 {
4404         struct net_device *dev;
4405         struct list_head *iter;
4406         int ret;
4407
4408         netdev_for_each_lower_dev(lag_dev, dev, iter) {
4409                 if (mlxsw_sp_port_dev_check(dev)) {
4410                         ret = mlxsw_sp_netdevice_port_vlan_event(vlan_dev, dev,
4411                                                                  event, ptr,
4412                                                                  vid);
4413                         if (ret)
4414                                 return ret;
4415                 }
4416         }
4417
4418         return 0;
4419 }
4420
4421 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4422                                          unsigned long event, void *ptr)
4423 {
4424         struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4425         u16 vid = vlan_dev_vlan_id(vlan_dev);
4426
4427         if (mlxsw_sp_port_dev_check(real_dev))
4428                 return mlxsw_sp_netdevice_port_vlan_event(vlan_dev, real_dev,
4429                                                           event, ptr, vid);
4430         else if (netif_is_lag_master(real_dev))
4431                 return mlxsw_sp_netdevice_lag_port_vlan_event(vlan_dev,
4432                                                               real_dev, event,
4433                                                               ptr, vid);
4434
4435         return 0;
4436 }
4437
4438 static bool mlxsw_sp_is_vrf_event(unsigned long event, void *ptr)
4439 {
4440         struct netdev_notifier_changeupper_info *info = ptr;
4441
4442         if (event != NETDEV_PRECHANGEUPPER && event != NETDEV_CHANGEUPPER)
4443                 return false;
4444         return netif_is_l3_master(info->upper_dev);
4445 }
4446
4447 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4448                                     unsigned long event, void *ptr)
4449 {
4450         struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4451         int err = 0;
4452
4453         if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4454                 err = mlxsw_sp_netdevice_router_port_event(dev);
4455         else if (mlxsw_sp_is_vrf_event(event, ptr))
4456                 err = mlxsw_sp_netdevice_vrf_event(dev, event, ptr);
4457         else if (mlxsw_sp_port_dev_check(dev))
4458                 err = mlxsw_sp_netdevice_port_event(dev, dev, event, ptr);
4459         else if (netif_is_lag_master(dev))
4460                 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
4461         else if (is_vlan_dev(dev))
4462                 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4463
4464         return notifier_from_errno(err);
4465 }
4466
4467 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4468         .notifier_call = mlxsw_sp_netdevice_event,
4469 };
4470
4471 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4472         .notifier_call = mlxsw_sp_inetaddr_event,
4473         .priority = 10, /* Must be called before FIB notifier block */
4474 };
4475
4476 static struct notifier_block mlxsw_sp_inet6addr_nb __read_mostly = {
4477         .notifier_call = mlxsw_sp_inet6addr_event,
4478 };
4479
4480 static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4481         .notifier_call = mlxsw_sp_router_netevent_event,
4482 };
4483
4484 static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4485         {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4486         {0, },
4487 };
4488
4489 static struct pci_driver mlxsw_sp_pci_driver = {
4490         .name = mlxsw_sp_driver_name,
4491         .id_table = mlxsw_sp_pci_id_table,
4492 };
4493
4494 static int __init mlxsw_sp_module_init(void)
4495 {
4496         int err;
4497
4498         register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4499         register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4500         register_inet6addr_notifier(&mlxsw_sp_inet6addr_nb);
4501         register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4502
4503         err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4504         if (err)
4505                 goto err_core_driver_register;
4506
4507         err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4508         if (err)
4509                 goto err_pci_driver_register;
4510
4511         return 0;
4512
4513 err_pci_driver_register:
4514         mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4515 err_core_driver_register:
4516         unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4517         unregister_inet6addr_notifier(&mlxsw_sp_inet6addr_nb);
4518         unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4519         unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4520         return err;
4521 }
4522
4523 static void __exit mlxsw_sp_module_exit(void)
4524 {
4525         mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
4526         mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4527         unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4528         unregister_inet6addr_notifier(&mlxsw_sp_inet6addr_nb);
4529         unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4530         unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4531 }
4532
4533 module_init(mlxsw_sp_module_init);
4534 module_exit(mlxsw_sp_module_exit);
4535
4536 MODULE_LICENSE("Dual BSD/GPL");
4537 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4538 MODULE_DESCRIPTION("Mellanox Spectrum driver");
4539 MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);
4540 MODULE_FIRMWARE(MLXSW_SP_FW_FILENAME);