2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/eswitch.h>
38 #include "mlx5_core.h"
41 /* Mutex to hold while enabling or disabling RoCE */
42 static DEFINE_MUTEX(mlx5_roce_en_lock);
44 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
46 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {};
47 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {};
50 MLX5_SET(query_vport_state_in, in, opcode,
51 MLX5_CMD_OP_QUERY_VPORT_STATE);
52 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
53 MLX5_SET(query_vport_state_in, in, vport_number, vport);
55 MLX5_SET(query_vport_state_in, in, other_vport, 1);
57 err = mlx5_cmd_exec_inout(mdev, query_vport_state, in, out);
61 return MLX5_GET(query_vport_state_out, out, state);
64 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
65 u16 vport, u8 other_vport, u8 state)
67 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {};
69 MLX5_SET(modify_vport_state_in, in, opcode,
70 MLX5_CMD_OP_MODIFY_VPORT_STATE);
71 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
72 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
73 MLX5_SET(modify_vport_state_in, in, other_vport, other_vport);
74 MLX5_SET(modify_vport_state_in, in, admin_state, state);
76 return mlx5_cmd_exec_in(mdev, modify_vport_state, in);
79 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
82 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};
84 MLX5_SET(query_nic_vport_context_in, in, opcode,
85 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
86 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
88 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
90 return mlx5_cmd_exec_inout(mdev, query_nic_vport_context, in, out);
93 int mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,
94 u16 vport, u8 *min_inline)
96 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {};
99 err = mlx5_query_nic_vport_context(mdev, vport, out);
101 *min_inline = MLX5_GET(query_nic_vport_context_out, out,
102 nic_vport_context.min_wqe_inline_mode);
105 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_min_inline);
107 void mlx5_query_min_inline(struct mlx5_core_dev *mdev,
110 switch (MLX5_CAP_ETH(mdev, wqe_inline_mode)) {
111 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
112 if (!mlx5_query_nic_vport_min_inline(mdev, 0, min_inline_mode))
115 case MLX5_CAP_INLINE_MODE_L2:
116 *min_inline_mode = MLX5_INLINE_MODE_L2;
118 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
119 *min_inline_mode = MLX5_INLINE_MODE_NONE;
123 EXPORT_SYMBOL_GPL(mlx5_query_min_inline);
125 int mlx5_modify_nic_vport_min_inline(struct mlx5_core_dev *mdev,
126 u16 vport, u8 min_inline)
128 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {};
131 MLX5_SET(modify_nic_vport_context_in, in,
132 field_select.min_inline, 1);
133 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
134 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
136 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
137 in, nic_vport_context);
138 MLX5_SET(nic_vport_context, nic_vport_ctx,
139 min_wqe_inline_mode, min_inline);
140 MLX5_SET(modify_nic_vport_context_in, in, opcode,
141 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
143 return mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
146 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
147 u16 vport, bool other, u8 *addr)
149 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {};
150 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};
154 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
155 nic_vport_context.permanent_address);
157 MLX5_SET(query_nic_vport_context_in, in, opcode,
158 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
159 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
160 MLX5_SET(query_nic_vport_context_in, in, other_vport, other);
162 err = mlx5_cmd_exec_inout(mdev, query_nic_vport_context, in, out);
164 ether_addr_copy(addr, &out_addr[2]);
168 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
170 int mlx5_query_mac_address(struct mlx5_core_dev *mdev, u8 *addr)
172 return mlx5_query_nic_vport_mac_address(mdev, 0, false, addr);
174 EXPORT_SYMBOL_GPL(mlx5_query_mac_address);
176 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
177 u16 vport, const u8 *addr)
180 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
185 in = kvzalloc(inlen, GFP_KERNEL);
189 MLX5_SET(modify_nic_vport_context_in, in,
190 field_select.permanent_address, 1);
191 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
192 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
194 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
195 in, nic_vport_context);
196 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
199 ether_addr_copy(&perm_mac[2], addr);
200 MLX5_SET(modify_nic_vport_context_in, in, opcode,
201 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
203 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
209 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
211 int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)
213 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
217 out = kvzalloc(outlen, GFP_KERNEL);
221 err = mlx5_query_nic_vport_context(mdev, 0, out);
223 *mtu = MLX5_GET(query_nic_vport_context_out, out,
224 nic_vport_context.mtu);
229 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
231 int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
233 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
237 in = kvzalloc(inlen, GFP_KERNEL);
241 MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
242 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
243 MLX5_SET(modify_nic_vport_context_in, in, opcode,
244 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
246 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
251 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
253 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
255 enum mlx5_list_type list_type,
256 u8 addr_list[][ETH_ALEN],
259 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
268 req_list_size = *list_size;
270 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
271 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
272 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
274 if (req_list_size > max_list_size) {
275 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
276 req_list_size, max_list_size);
277 req_list_size = max_list_size;
280 out_sz = MLX5_ST_SZ_BYTES(query_nic_vport_context_out) +
281 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
283 out = kvzalloc(out_sz, GFP_KERNEL);
287 MLX5_SET(query_nic_vport_context_in, in, opcode,
288 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
289 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
290 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
291 if (vport || mlx5_core_is_ecpf(dev))
292 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
294 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
298 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
300 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
303 *list_size = req_list_size;
304 for (i = 0; i < req_list_size; i++) {
305 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
307 current_uc_mac_address[i]) + 2;
308 ether_addr_copy(addr_list[i], mac_addr);
314 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
316 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
317 enum mlx5_list_type list_type,
318 u8 addr_list[][ETH_ALEN],
321 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {};
329 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
330 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
331 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
333 if (list_size > max_list_size)
336 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
337 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
339 in = kvzalloc(in_sz, GFP_KERNEL);
343 MLX5_SET(modify_nic_vport_context_in, in, opcode,
344 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
345 MLX5_SET(modify_nic_vport_context_in, in,
346 field_select.addresses_list, 1);
348 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
351 MLX5_SET(nic_vport_context, nic_vport_ctx,
352 allowed_list_type, list_type);
353 MLX5_SET(nic_vport_context, nic_vport_ctx,
354 allowed_list_size, list_size);
356 for (i = 0; i < list_size; i++) {
357 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
359 current_uc_mac_address[i]) + 2;
360 ether_addr_copy(curr_mac, addr_list[i]);
363 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
367 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
369 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
373 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
381 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
383 if (list_size > max_list_size)
386 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
387 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
389 memset(out, 0, sizeof(out));
390 in = kvzalloc(in_sz, GFP_KERNEL);
394 MLX5_SET(modify_nic_vport_context_in, in, opcode,
395 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
396 MLX5_SET(modify_nic_vport_context_in, in,
397 field_select.addresses_list, 1);
399 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
402 MLX5_SET(nic_vport_context, nic_vport_ctx,
403 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
404 MLX5_SET(nic_vport_context, nic_vport_ctx,
405 allowed_list_size, list_size);
407 for (i = 0; i < list_size; i++) {
408 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
410 current_uc_mac_address[i]);
411 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
414 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
418 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
420 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
421 u64 *system_image_guid)
424 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
427 out = kvzalloc(outlen, GFP_KERNEL);
431 err = mlx5_query_nic_vport_context(mdev, 0, out);
435 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
436 nic_vport_context.system_image_guid);
441 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
443 int mlx5_query_nic_vport_sd_group(struct mlx5_core_dev *mdev, u8 *sd_group)
445 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
449 out = kvzalloc(outlen, GFP_KERNEL);
453 err = mlx5_query_nic_vport_context(mdev, 0, out);
457 *sd_group = MLX5_GET(query_nic_vport_context_out, out,
458 nic_vport_context.sd_group);
464 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
467 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
469 out = kvzalloc(outlen, GFP_KERNEL);
473 mlx5_query_nic_vport_context(mdev, 0, out);
475 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
476 nic_vport_context.node_guid);
482 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
484 int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
485 u16 vport, u64 node_guid)
487 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
488 void *nic_vport_context;
492 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
495 in = kvzalloc(inlen, GFP_KERNEL);
499 MLX5_SET(modify_nic_vport_context_in, in,
500 field_select.node_guid, 1);
501 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
502 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
504 nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
505 in, nic_vport_context);
506 MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
507 MLX5_SET(modify_nic_vport_context_in, in, opcode,
508 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
510 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
517 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
521 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
523 out = kvzalloc(outlen, GFP_KERNEL);
527 mlx5_query_nic_vport_context(mdev, 0, out);
529 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
530 nic_vport_context.qkey_violation_counter);
536 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
538 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
539 u8 port_num, u16 vf_num, u16 gid_index,
542 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
543 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
544 int is_group_manager;
552 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
553 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
554 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
555 vf_num, gid_index, tbsz);
557 if (gid_index > tbsz && gid_index != 0xffff)
560 if (gid_index == 0xffff)
565 out_sz += nout * sizeof(*gid);
567 in = kvzalloc(in_sz, GFP_KERNEL);
568 out = kvzalloc(out_sz, GFP_KERNEL);
574 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
576 if (is_group_manager) {
577 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
578 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
584 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
586 if (MLX5_CAP_GEN(dev, num_ports) == 2)
587 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
589 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
593 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
594 gid->global.subnet_prefix = tmp->global.subnet_prefix;
595 gid->global.interface_id = tmp->global.interface_id;
602 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
604 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
605 u8 port_num, u16 vf_num, u16 pkey_index,
608 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
609 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
610 int is_group_manager;
619 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
621 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
622 if (pkey_index > tbsz && pkey_index != 0xffff)
625 if (pkey_index == 0xffff)
630 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
632 in = kvzalloc(in_sz, GFP_KERNEL);
633 out = kvzalloc(out_sz, GFP_KERNEL);
639 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
641 if (is_group_manager) {
642 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
643 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
649 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
651 if (MLX5_CAP_GEN(dev, num_ports) == 2)
652 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
654 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
658 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
659 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
660 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
667 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
669 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
670 u8 other_vport, u8 port_num,
672 struct mlx5_hca_vport_context *rep)
674 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
675 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {};
676 int is_group_manager;
681 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
683 out = kvzalloc(out_sz, GFP_KERNEL);
687 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
690 if (is_group_manager) {
691 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
692 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
699 if (MLX5_CAP_GEN(dev, num_ports) == 2)
700 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
702 err = mlx5_cmd_exec_inout(dev, query_hca_vport_context, in, out);
706 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
707 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
708 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
709 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
710 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
711 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
712 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
713 port_physical_state);
714 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
715 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
716 port_physical_state);
717 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
718 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
719 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
720 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
721 cap_mask1_field_select);
722 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
723 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
724 cap_mask2_field_select);
725 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
726 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
728 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
729 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
731 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
732 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
733 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
734 qkey_violation_counter);
735 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
736 pkey_violation_counter);
737 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
738 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
745 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
747 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
750 struct mlx5_hca_vport_context *rep;
753 rep = kvzalloc(sizeof(*rep), GFP_KERNEL);
757 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
759 *sys_image_guid = rep->sys_image_guid;
764 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
766 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
769 struct mlx5_hca_vport_context *rep;
772 rep = kvzalloc(sizeof(*rep), GFP_KERNEL);
776 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
778 *node_guid = rep->node_guid;
783 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
785 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
792 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
795 out = kvzalloc(outlen, GFP_KERNEL);
799 err = mlx5_query_nic_vport_context(mdev, vport, out);
803 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
804 nic_vport_context.promisc_uc);
805 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
806 nic_vport_context.promisc_mc);
807 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
808 nic_vport_context.promisc_all);
814 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
816 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
822 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
825 in = kvzalloc(inlen, GFP_KERNEL);
829 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
830 MLX5_SET(modify_nic_vport_context_in, in,
831 nic_vport_context.promisc_uc, promisc_uc);
832 MLX5_SET(modify_nic_vport_context_in, in,
833 nic_vport_context.promisc_mc, promisc_mc);
834 MLX5_SET(modify_nic_vport_context_in, in,
835 nic_vport_context.promisc_all, promisc_all);
836 MLX5_SET(modify_nic_vport_context_in, in, opcode,
837 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
839 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
845 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
852 int mlx5_nic_vport_update_local_lb(struct mlx5_core_dev *mdev, bool enable)
854 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
858 if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) &&
859 !MLX5_CAP_GEN(mdev, disable_local_lb_uc))
862 in = kvzalloc(inlen, GFP_KERNEL);
866 MLX5_SET(modify_nic_vport_context_in, in,
867 nic_vport_context.disable_mc_local_lb, !enable);
868 MLX5_SET(modify_nic_vport_context_in, in,
869 nic_vport_context.disable_uc_local_lb, !enable);
871 if (MLX5_CAP_GEN(mdev, disable_local_lb_mc))
872 MLX5_SET(modify_nic_vport_context_in, in,
873 field_select.disable_mc_local_lb, 1);
875 if (MLX5_CAP_GEN(mdev, disable_local_lb_uc))
876 MLX5_SET(modify_nic_vport_context_in, in,
877 field_select.disable_uc_local_lb, 1);
878 MLX5_SET(modify_nic_vport_context_in, in, opcode,
879 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
881 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
884 mlx5_core_dbg(mdev, "%s local_lb\n",
885 enable ? "enable" : "disable");
890 EXPORT_SYMBOL_GPL(mlx5_nic_vport_update_local_lb);
892 int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev, bool *status)
894 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
899 out = kvzalloc(outlen, GFP_KERNEL);
903 err = mlx5_query_nic_vport_context(mdev, 0, out);
907 value = MLX5_GET(query_nic_vport_context_out, out,
908 nic_vport_context.disable_mc_local_lb) << MC_LOCAL_LB;
910 value |= MLX5_GET(query_nic_vport_context_out, out,
911 nic_vport_context.disable_uc_local_lb) << UC_LOCAL_LB;
919 EXPORT_SYMBOL_GPL(mlx5_nic_vport_query_local_lb);
921 enum mlx5_vport_roce_state {
922 MLX5_VPORT_ROCE_DISABLED = 0,
923 MLX5_VPORT_ROCE_ENABLED = 1,
926 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
927 enum mlx5_vport_roce_state state)
930 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
933 in = kvzalloc(inlen, GFP_KERNEL);
937 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
938 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
940 MLX5_SET(modify_nic_vport_context_in, in, opcode,
941 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
943 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
950 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
954 mutex_lock(&mlx5_roce_en_lock);
955 if (!mdev->roce.roce_en)
956 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
959 mdev->roce.roce_en++;
960 mutex_unlock(&mlx5_roce_en_lock);
964 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
966 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
970 mutex_lock(&mlx5_roce_en_lock);
971 if (mdev->roce.roce_en) {
972 mdev->roce.roce_en--;
973 if (mdev->roce.roce_en == 0)
974 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
977 mdev->roce.roce_en++;
979 mutex_unlock(&mlx5_roce_en_lock);
982 EXPORT_SYMBOL(mlx5_nic_vport_disable_roce);
984 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
985 int vf, u8 port_num, void *out)
987 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
988 int is_group_manager;
992 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
993 in = kvzalloc(in_sz, GFP_KERNEL);
999 MLX5_SET(query_vport_counter_in, in, opcode,
1000 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
1002 if (is_group_manager) {
1003 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
1004 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
1010 if (MLX5_CAP_GEN(dev, num_ports) == 2)
1011 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
1013 err = mlx5_cmd_exec_inout(dev, query_vport_counter, in, out);
1018 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
1020 int mlx5_query_vport_down_stats(struct mlx5_core_dev *mdev, u16 vport,
1021 u8 other_vport, u64 *rx_discard_vport_down,
1022 u64 *tx_discard_vport_down)
1024 u32 out[MLX5_ST_SZ_DW(query_vnic_env_out)] = {};
1025 u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {};
1028 MLX5_SET(query_vnic_env_in, in, opcode,
1029 MLX5_CMD_OP_QUERY_VNIC_ENV);
1030 MLX5_SET(query_vnic_env_in, in, op_mod, 0);
1031 MLX5_SET(query_vnic_env_in, in, vport_number, vport);
1032 MLX5_SET(query_vnic_env_in, in, other_vport, other_vport);
1034 err = mlx5_cmd_exec_inout(mdev, query_vnic_env, in, out);
1038 *rx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1039 vport_env.receive_discard_vport_down);
1040 *tx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1041 vport_env.transmit_discard_vport_down);
1045 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
1046 u8 other_vport, u8 port_num,
1048 struct mlx5_hca_vport_context *req)
1050 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
1051 int is_group_manager;
1056 mlx5_core_dbg(dev, "vf %d\n", vf);
1057 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
1058 in = kvzalloc(in_sz, GFP_KERNEL);
1062 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
1064 if (is_group_manager) {
1065 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
1066 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
1073 if (MLX5_CAP_GEN(dev, num_ports) > 1)
1074 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
1076 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
1077 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
1078 if (req->field_select & MLX5_HCA_VPORT_SEL_STATE_POLICY)
1079 MLX5_SET(hca_vport_context, ctx, vport_state_policy,
1081 if (req->field_select & MLX5_HCA_VPORT_SEL_PORT_GUID)
1082 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
1083 if (req->field_select & MLX5_HCA_VPORT_SEL_NODE_GUID)
1084 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
1085 MLX5_SET(hca_vport_context, ctx, cap_mask1, req->cap_mask1);
1086 MLX5_SET(hca_vport_context, ctx, cap_mask1_field_select,
1087 req->cap_mask1_perm);
1088 err = mlx5_cmd_exec_in(dev, modify_hca_vport_context, in);
1093 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);
1095 int mlx5_nic_vport_affiliate_multiport(struct mlx5_core_dev *master_mdev,
1096 struct mlx5_core_dev *port_mdev)
1098 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1102 in = kvzalloc(inlen, GFP_KERNEL);
1106 err = mlx5_nic_vport_enable_roce(port_mdev);
1110 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1111 if (MLX5_CAP_GEN_2(master_mdev, sw_vhca_id_valid)) {
1112 MLX5_SET(modify_nic_vport_context_in, in,
1113 nic_vport_context.vhca_id_type, VHCA_ID_TYPE_SW);
1114 MLX5_SET(modify_nic_vport_context_in, in,
1115 nic_vport_context.affiliated_vhca_id,
1116 MLX5_CAP_GEN_2(master_mdev, sw_vhca_id));
1118 MLX5_SET(modify_nic_vport_context_in, in,
1119 nic_vport_context.affiliated_vhca_id,
1120 MLX5_CAP_GEN(master_mdev, vhca_id));
1122 MLX5_SET(modify_nic_vport_context_in, in,
1123 nic_vport_context.affiliation_criteria,
1124 MLX5_CAP_GEN(port_mdev, affiliate_nic_vport_criteria));
1125 MLX5_SET(modify_nic_vport_context_in, in, opcode,
1126 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
1128 err = mlx5_cmd_exec_in(port_mdev, modify_nic_vport_context, in);
1130 mlx5_nic_vport_disable_roce(port_mdev);
1136 EXPORT_SYMBOL_GPL(mlx5_nic_vport_affiliate_multiport);
1138 int mlx5_nic_vport_unaffiliate_multiport(struct mlx5_core_dev *port_mdev)
1140 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1144 in = kvzalloc(inlen, GFP_KERNEL);
1148 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1149 MLX5_SET(modify_nic_vport_context_in, in,
1150 nic_vport_context.affiliated_vhca_id, 0);
1151 MLX5_SET(modify_nic_vport_context_in, in,
1152 nic_vport_context.affiliation_criteria, 0);
1153 MLX5_SET(modify_nic_vport_context_in, in, opcode,
1154 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
1156 err = mlx5_cmd_exec_in(port_mdev, modify_nic_vport_context, in);
1158 mlx5_nic_vport_disable_roce(port_mdev);
1163 EXPORT_SYMBOL_GPL(mlx5_nic_vport_unaffiliate_multiport);
1165 u64 mlx5_query_nic_system_image_guid(struct mlx5_core_dev *mdev)
1167 int port_type_cap = MLX5_CAP_GEN(mdev, port_type);
1171 if (mdev->sys_image_guid)
1172 return mdev->sys_image_guid;
1174 if (port_type_cap == MLX5_CAP_PORT_TYPE_ETH)
1175 err = mlx5_query_nic_vport_system_image_guid(mdev, &tmp);
1177 err = mlx5_query_hca_vport_system_image_guid(mdev, &tmp);
1179 mdev->sys_image_guid = err ? 0 : tmp;
1181 return mdev->sys_image_guid;
1183 EXPORT_SYMBOL_GPL(mlx5_query_nic_system_image_guid);
1185 int mlx5_vport_get_other_func_cap(struct mlx5_core_dev *dev, u16 vport, void *out,
1188 bool ec_vf_func = mlx5_core_is_ec_vf_vport(dev, vport);
1189 u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)] = {};
1191 opmod = (opmod << 1) | (HCA_CAP_OPMOD_GET_MAX & 0x01);
1192 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
1193 MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
1194 MLX5_SET(query_hca_cap_in, in, function_id, mlx5_vport_to_func_id(dev, vport, ec_vf_func));
1195 MLX5_SET(query_hca_cap_in, in, other_function, true);
1196 MLX5_SET(query_hca_cap_in, in, ec_vf_function, ec_vf_func);
1197 return mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);
1199 EXPORT_SYMBOL_GPL(mlx5_vport_get_other_func_cap);
1201 int mlx5_vport_set_other_func_cap(struct mlx5_core_dev *dev, const void *hca_cap,
1202 u16 vport, u16 opmod)
1204 bool ec_vf_func = mlx5_core_is_ec_vf_vport(dev, vport);
1205 int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
1210 set_ctx = kzalloc(set_sz, GFP_KERNEL);
1214 MLX5_SET(set_hca_cap_in, set_ctx, opcode, MLX5_CMD_OP_SET_HCA_CAP);
1215 MLX5_SET(set_hca_cap_in, set_ctx, op_mod, opmod << 1);
1216 set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
1217 memcpy(set_hca_cap, hca_cap, MLX5_ST_SZ_BYTES(cmd_hca_cap));
1218 MLX5_SET(set_hca_cap_in, set_ctx, function_id,
1219 mlx5_vport_to_func_id(dev, vport, ec_vf_func));
1220 MLX5_SET(set_hca_cap_in, set_ctx, other_function, true);
1221 MLX5_SET(set_hca_cap_in, set_ctx, ec_vf_function, ec_vf_func);
1222 ret = mlx5_cmd_exec_in(dev, set_hca_cap, set_ctx);