2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/eswitch.h>
38 #include "mlx5_core.h"
41 /* Mutex to hold while enabling or disabling RoCE */
42 static DEFINE_MUTEX(mlx5_roce_en_lock);
44 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
46 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {};
47 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {};
50 MLX5_SET(query_vport_state_in, in, opcode,
51 MLX5_CMD_OP_QUERY_VPORT_STATE);
52 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
53 MLX5_SET(query_vport_state_in, in, vport_number, vport);
55 MLX5_SET(query_vport_state_in, in, other_vport, 1);
57 err = mlx5_cmd_exec_inout(mdev, query_vport_state, in, out);
61 return MLX5_GET(query_vport_state_out, out, state);
64 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
65 u16 vport, u8 other_vport, u8 state)
67 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {};
69 MLX5_SET(modify_vport_state_in, in, opcode,
70 MLX5_CMD_OP_MODIFY_VPORT_STATE);
71 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
72 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
73 MLX5_SET(modify_vport_state_in, in, other_vport, other_vport);
74 MLX5_SET(modify_vport_state_in, in, admin_state, state);
76 return mlx5_cmd_exec_in(mdev, modify_vport_state, in);
79 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
82 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};
84 MLX5_SET(query_nic_vport_context_in, in, opcode,
85 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
86 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
88 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
90 return mlx5_cmd_exec_inout(mdev, query_nic_vport_context, in, out);
93 int mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,
94 u16 vport, u8 *min_inline)
96 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {};
99 err = mlx5_query_nic_vport_context(mdev, vport, out);
101 *min_inline = MLX5_GET(query_nic_vport_context_out, out,
102 nic_vport_context.min_wqe_inline_mode);
105 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_min_inline);
107 void mlx5_query_min_inline(struct mlx5_core_dev *mdev,
110 switch (MLX5_CAP_ETH(mdev, wqe_inline_mode)) {
111 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
112 if (!mlx5_query_nic_vport_min_inline(mdev, 0, min_inline_mode))
115 case MLX5_CAP_INLINE_MODE_L2:
116 *min_inline_mode = MLX5_INLINE_MODE_L2;
118 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
119 *min_inline_mode = MLX5_INLINE_MODE_NONE;
123 EXPORT_SYMBOL_GPL(mlx5_query_min_inline);
125 int mlx5_modify_nic_vport_min_inline(struct mlx5_core_dev *mdev,
126 u16 vport, u8 min_inline)
128 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {};
131 MLX5_SET(modify_nic_vport_context_in, in,
132 field_select.min_inline, 1);
133 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
134 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
136 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
137 in, nic_vport_context);
138 MLX5_SET(nic_vport_context, nic_vport_ctx,
139 min_wqe_inline_mode, min_inline);
140 MLX5_SET(modify_nic_vport_context_in, in, opcode,
141 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
143 return mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
146 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
147 u16 vport, bool other, u8 *addr)
149 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {};
150 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};
154 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
155 nic_vport_context.permanent_address);
157 MLX5_SET(query_nic_vport_context_in, in, opcode,
158 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
159 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
160 MLX5_SET(query_nic_vport_context_in, in, other_vport, other);
162 err = mlx5_cmd_exec_inout(mdev, query_nic_vport_context, in, out);
164 ether_addr_copy(addr, &out_addr[2]);
168 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
170 int mlx5_query_mac_address(struct mlx5_core_dev *mdev, u8 *addr)
172 return mlx5_query_nic_vport_mac_address(mdev, 0, false, addr);
174 EXPORT_SYMBOL_GPL(mlx5_query_mac_address);
176 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
177 u16 vport, const u8 *addr)
180 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
185 in = kvzalloc(inlen, GFP_KERNEL);
189 MLX5_SET(modify_nic_vport_context_in, in,
190 field_select.permanent_address, 1);
191 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
192 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
194 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
195 in, nic_vport_context);
196 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
199 ether_addr_copy(&perm_mac[2], addr);
200 MLX5_SET(modify_nic_vport_context_in, in, opcode,
201 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
203 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
209 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
211 int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)
213 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
217 out = kvzalloc(outlen, GFP_KERNEL);
221 err = mlx5_query_nic_vport_context(mdev, 0, out);
223 *mtu = MLX5_GET(query_nic_vport_context_out, out,
224 nic_vport_context.mtu);
229 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
231 int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
233 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
237 in = kvzalloc(inlen, GFP_KERNEL);
241 MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
242 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
243 MLX5_SET(modify_nic_vport_context_in, in, opcode,
244 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
246 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
251 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
253 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
255 enum mlx5_list_type list_type,
256 u8 addr_list[][ETH_ALEN],
259 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
268 req_list_size = *list_size;
270 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
271 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
272 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
274 if (req_list_size > max_list_size) {
275 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
276 req_list_size, max_list_size);
277 req_list_size = max_list_size;
280 out_sz = MLX5_ST_SZ_BYTES(query_nic_vport_context_in) +
281 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
283 out = kzalloc(out_sz, GFP_KERNEL);
287 MLX5_SET(query_nic_vport_context_in, in, opcode,
288 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
289 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
290 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
291 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
293 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
297 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
299 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
302 *list_size = req_list_size;
303 for (i = 0; i < req_list_size; i++) {
304 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
306 current_uc_mac_address[i]) + 2;
307 ether_addr_copy(addr_list[i], mac_addr);
313 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
315 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
316 enum mlx5_list_type list_type,
317 u8 addr_list[][ETH_ALEN],
320 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {};
328 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
329 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
330 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
332 if (list_size > max_list_size)
335 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
336 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
338 in = kzalloc(in_sz, GFP_KERNEL);
342 MLX5_SET(modify_nic_vport_context_in, in, opcode,
343 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
344 MLX5_SET(modify_nic_vport_context_in, in,
345 field_select.addresses_list, 1);
347 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
350 MLX5_SET(nic_vport_context, nic_vport_ctx,
351 allowed_list_type, list_type);
352 MLX5_SET(nic_vport_context, nic_vport_ctx,
353 allowed_list_size, list_size);
355 for (i = 0; i < list_size; i++) {
356 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
358 current_uc_mac_address[i]) + 2;
359 ether_addr_copy(curr_mac, addr_list[i]);
362 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
366 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
368 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
372 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
380 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
382 if (list_size > max_list_size)
385 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
386 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
388 memset(out, 0, sizeof(out));
389 in = kzalloc(in_sz, GFP_KERNEL);
393 MLX5_SET(modify_nic_vport_context_in, in, opcode,
394 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
395 MLX5_SET(modify_nic_vport_context_in, in,
396 field_select.addresses_list, 1);
398 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
401 MLX5_SET(nic_vport_context, nic_vport_ctx,
402 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
403 MLX5_SET(nic_vport_context, nic_vport_ctx,
404 allowed_list_size, list_size);
406 for (i = 0; i < list_size; i++) {
407 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
409 current_uc_mac_address[i]);
410 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
413 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
417 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
419 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
420 u64 *system_image_guid)
423 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
425 out = kvzalloc(outlen, GFP_KERNEL);
429 mlx5_query_nic_vport_context(mdev, 0, out);
431 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
432 nic_vport_context.system_image_guid);
438 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
440 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
443 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
445 out = kvzalloc(outlen, GFP_KERNEL);
449 mlx5_query_nic_vport_context(mdev, 0, out);
451 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
452 nic_vport_context.node_guid);
458 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
460 int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
461 u16 vport, u64 node_guid)
463 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
464 void *nic_vport_context;
468 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
471 in = kvzalloc(inlen, GFP_KERNEL);
475 MLX5_SET(modify_nic_vport_context_in, in,
476 field_select.node_guid, 1);
477 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
478 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
480 nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
481 in, nic_vport_context);
482 MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
483 MLX5_SET(modify_nic_vport_context_in, in, opcode,
484 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
486 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
493 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
497 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
499 out = kvzalloc(outlen, GFP_KERNEL);
503 mlx5_query_nic_vport_context(mdev, 0, out);
505 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
506 nic_vport_context.qkey_violation_counter);
512 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
514 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
515 u8 port_num, u16 vf_num, u16 gid_index,
518 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
519 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
520 int is_group_manager;
528 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
529 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
530 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
531 vf_num, gid_index, tbsz);
533 if (gid_index > tbsz && gid_index != 0xffff)
536 if (gid_index == 0xffff)
541 out_sz += nout * sizeof(*gid);
543 in = kzalloc(in_sz, GFP_KERNEL);
544 out = kzalloc(out_sz, GFP_KERNEL);
550 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
552 if (is_group_manager) {
553 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
554 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
560 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
562 if (MLX5_CAP_GEN(dev, num_ports) == 2)
563 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
565 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
569 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
570 gid->global.subnet_prefix = tmp->global.subnet_prefix;
571 gid->global.interface_id = tmp->global.interface_id;
578 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
580 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
581 u8 port_num, u16 vf_num, u16 pkey_index,
584 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
585 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
586 int is_group_manager;
595 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
597 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
598 if (pkey_index > tbsz && pkey_index != 0xffff)
601 if (pkey_index == 0xffff)
606 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
608 in = kzalloc(in_sz, GFP_KERNEL);
609 out = kzalloc(out_sz, GFP_KERNEL);
615 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
617 if (is_group_manager) {
618 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
619 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
625 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
627 if (MLX5_CAP_GEN(dev, num_ports) == 2)
628 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
630 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
634 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
635 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
636 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
643 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
645 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
646 u8 other_vport, u8 port_num,
648 struct mlx5_hca_vport_context *rep)
650 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
651 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {};
652 int is_group_manager;
657 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
659 out = kzalloc(out_sz, GFP_KERNEL);
663 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
666 if (is_group_manager) {
667 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
668 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
675 if (MLX5_CAP_GEN(dev, num_ports) == 2)
676 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
678 err = mlx5_cmd_exec_inout(dev, query_hca_vport_context, in, out);
682 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
683 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
684 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
685 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
686 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
687 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
688 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
689 port_physical_state);
690 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
691 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
692 port_physical_state);
693 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
694 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
695 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
696 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
697 cap_mask1_field_select);
698 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
699 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
700 cap_mask2_field_select);
701 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
702 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
704 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
705 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
707 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
708 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
709 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
710 qkey_violation_counter);
711 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
712 pkey_violation_counter);
713 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
714 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
721 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
723 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
726 struct mlx5_hca_vport_context *rep;
729 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
733 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
735 *sys_image_guid = rep->sys_image_guid;
740 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
742 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
745 struct mlx5_hca_vport_context *rep;
748 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
752 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
754 *node_guid = rep->node_guid;
759 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
761 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
768 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
771 out = kzalloc(outlen, GFP_KERNEL);
775 err = mlx5_query_nic_vport_context(mdev, vport, out);
779 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
780 nic_vport_context.promisc_uc);
781 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
782 nic_vport_context.promisc_mc);
783 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
784 nic_vport_context.promisc_all);
790 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
792 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
798 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
801 in = kvzalloc(inlen, GFP_KERNEL);
805 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
806 MLX5_SET(modify_nic_vport_context_in, in,
807 nic_vport_context.promisc_uc, promisc_uc);
808 MLX5_SET(modify_nic_vport_context_in, in,
809 nic_vport_context.promisc_mc, promisc_mc);
810 MLX5_SET(modify_nic_vport_context_in, in,
811 nic_vport_context.promisc_all, promisc_all);
812 MLX5_SET(modify_nic_vport_context_in, in, opcode,
813 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
815 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
821 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
828 int mlx5_nic_vport_update_local_lb(struct mlx5_core_dev *mdev, bool enable)
830 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
834 if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) &&
835 !MLX5_CAP_GEN(mdev, disable_local_lb_uc))
838 in = kvzalloc(inlen, GFP_KERNEL);
842 MLX5_SET(modify_nic_vport_context_in, in,
843 nic_vport_context.disable_mc_local_lb, !enable);
844 MLX5_SET(modify_nic_vport_context_in, in,
845 nic_vport_context.disable_uc_local_lb, !enable);
847 if (MLX5_CAP_GEN(mdev, disable_local_lb_mc))
848 MLX5_SET(modify_nic_vport_context_in, in,
849 field_select.disable_mc_local_lb, 1);
851 if (MLX5_CAP_GEN(mdev, disable_local_lb_uc))
852 MLX5_SET(modify_nic_vport_context_in, in,
853 field_select.disable_uc_local_lb, 1);
854 MLX5_SET(modify_nic_vport_context_in, in, opcode,
855 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
857 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
860 mlx5_core_dbg(mdev, "%s local_lb\n",
861 enable ? "enable" : "disable");
866 EXPORT_SYMBOL_GPL(mlx5_nic_vport_update_local_lb);
868 int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev, bool *status)
870 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
875 out = kzalloc(outlen, GFP_KERNEL);
879 err = mlx5_query_nic_vport_context(mdev, 0, out);
883 value = MLX5_GET(query_nic_vport_context_out, out,
884 nic_vport_context.disable_mc_local_lb) << MC_LOCAL_LB;
886 value |= MLX5_GET(query_nic_vport_context_out, out,
887 nic_vport_context.disable_uc_local_lb) << UC_LOCAL_LB;
895 EXPORT_SYMBOL_GPL(mlx5_nic_vport_query_local_lb);
897 enum mlx5_vport_roce_state {
898 MLX5_VPORT_ROCE_DISABLED = 0,
899 MLX5_VPORT_ROCE_ENABLED = 1,
902 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
903 enum mlx5_vport_roce_state state)
906 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
909 in = kvzalloc(inlen, GFP_KERNEL);
913 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
914 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
916 MLX5_SET(modify_nic_vport_context_in, in, opcode,
917 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
919 err = mlx5_cmd_exec_in(mdev, modify_nic_vport_context, in);
926 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
930 mutex_lock(&mlx5_roce_en_lock);
931 if (!mdev->roce.roce_en)
932 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
935 mdev->roce.roce_en++;
936 mutex_unlock(&mlx5_roce_en_lock);
940 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
942 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
946 mutex_lock(&mlx5_roce_en_lock);
947 if (mdev->roce.roce_en) {
948 mdev->roce.roce_en--;
949 if (mdev->roce.roce_en == 0)
950 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
953 mdev->roce.roce_en++;
955 mutex_unlock(&mlx5_roce_en_lock);
958 EXPORT_SYMBOL(mlx5_nic_vport_disable_roce);
960 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
961 int vf, u8 port_num, void *out)
963 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
964 int is_group_manager;
968 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
969 in = kvzalloc(in_sz, GFP_KERNEL);
975 MLX5_SET(query_vport_counter_in, in, opcode,
976 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
978 if (is_group_manager) {
979 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
980 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
986 if (MLX5_CAP_GEN(dev, num_ports) == 2)
987 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
989 err = mlx5_cmd_exec_inout(dev, query_vport_counter, in, out);
994 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
996 int mlx5_query_vport_down_stats(struct mlx5_core_dev *mdev, u16 vport,
997 u8 other_vport, u64 *rx_discard_vport_down,
998 u64 *tx_discard_vport_down)
1000 u32 out[MLX5_ST_SZ_DW(query_vnic_env_out)] = {};
1001 u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {};
1004 MLX5_SET(query_vnic_env_in, in, opcode,
1005 MLX5_CMD_OP_QUERY_VNIC_ENV);
1006 MLX5_SET(query_vnic_env_in, in, op_mod, 0);
1007 MLX5_SET(query_vnic_env_in, in, vport_number, vport);
1008 MLX5_SET(query_vnic_env_in, in, other_vport, other_vport);
1010 err = mlx5_cmd_exec_inout(mdev, query_vnic_env, in, out);
1014 *rx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1015 vport_env.receive_discard_vport_down);
1016 *tx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1017 vport_env.transmit_discard_vport_down);
1021 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
1022 u8 other_vport, u8 port_num,
1024 struct mlx5_hca_vport_context *req)
1026 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
1027 int is_group_manager;
1032 mlx5_core_dbg(dev, "vf %d\n", vf);
1033 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
1034 in = kzalloc(in_sz, GFP_KERNEL);
1038 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
1040 if (is_group_manager) {
1041 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
1042 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
1049 if (MLX5_CAP_GEN(dev, num_ports) > 1)
1050 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
1052 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
1053 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
1054 if (req->field_select & MLX5_HCA_VPORT_SEL_STATE_POLICY)
1055 MLX5_SET(hca_vport_context, ctx, vport_state_policy,
1057 if (req->field_select & MLX5_HCA_VPORT_SEL_PORT_GUID)
1058 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
1059 if (req->field_select & MLX5_HCA_VPORT_SEL_NODE_GUID)
1060 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
1061 MLX5_SET(hca_vport_context, ctx, cap_mask1, req->cap_mask1);
1062 MLX5_SET(hca_vport_context, ctx, cap_mask1_field_select,
1063 req->cap_mask1_perm);
1064 err = mlx5_cmd_exec_in(dev, modify_hca_vport_context, in);
1069 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);
1071 int mlx5_nic_vport_affiliate_multiport(struct mlx5_core_dev *master_mdev,
1072 struct mlx5_core_dev *port_mdev)
1074 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1078 in = kvzalloc(inlen, GFP_KERNEL);
1082 err = mlx5_nic_vport_enable_roce(port_mdev);
1086 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1087 MLX5_SET(modify_nic_vport_context_in, in,
1088 nic_vport_context.affiliated_vhca_id,
1089 MLX5_CAP_GEN(master_mdev, vhca_id));
1090 MLX5_SET(modify_nic_vport_context_in, in,
1091 nic_vport_context.affiliation_criteria,
1092 MLX5_CAP_GEN(port_mdev, affiliate_nic_vport_criteria));
1093 MLX5_SET(modify_nic_vport_context_in, in, opcode,
1094 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
1096 err = mlx5_cmd_exec_in(port_mdev, modify_nic_vport_context, in);
1098 mlx5_nic_vport_disable_roce(port_mdev);
1104 EXPORT_SYMBOL_GPL(mlx5_nic_vport_affiliate_multiport);
1106 int mlx5_nic_vport_unaffiliate_multiport(struct mlx5_core_dev *port_mdev)
1108 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1112 in = kvzalloc(inlen, GFP_KERNEL);
1116 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1117 MLX5_SET(modify_nic_vport_context_in, in,
1118 nic_vport_context.affiliated_vhca_id, 0);
1119 MLX5_SET(modify_nic_vport_context_in, in,
1120 nic_vport_context.affiliation_criteria, 0);
1121 MLX5_SET(modify_nic_vport_context_in, in, opcode,
1122 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
1124 err = mlx5_cmd_exec_in(port_mdev, modify_nic_vport_context, in);
1126 mlx5_nic_vport_disable_roce(port_mdev);
1131 EXPORT_SYMBOL_GPL(mlx5_nic_vport_unaffiliate_multiport);
1133 u64 mlx5_query_nic_system_image_guid(struct mlx5_core_dev *mdev)
1135 int port_type_cap = MLX5_CAP_GEN(mdev, port_type);
1138 if (mdev->sys_image_guid)
1139 return mdev->sys_image_guid;
1141 if (port_type_cap == MLX5_CAP_PORT_TYPE_ETH)
1142 mlx5_query_nic_vport_system_image_guid(mdev, &tmp);
1144 mlx5_query_hca_vport_system_image_guid(mdev, &tmp);
1146 mdev->sys_image_guid = tmp;
1150 EXPORT_SYMBOL_GPL(mlx5_query_nic_system_image_guid);
1152 int mlx5_vport_get_other_func_cap(struct mlx5_core_dev *dev, u16 function_id, void *out)
1154 u16 opmod = (MLX5_CAP_GENERAL << 1) | (HCA_CAP_OPMOD_GET_MAX & 0x01);
1155 u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)] = {};
1157 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
1158 MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
1159 MLX5_SET(query_hca_cap_in, in, function_id, function_id);
1160 MLX5_SET(query_hca_cap_in, in, other_function, true);
1161 return mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);