drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c

   1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
   2 /* Copyright (c) 2019 Mellanox Technologies. */
   3
   4 #include "dr_types.h"
   5 #include "dr_ste.h"
   6
   7 enum dr_action_domain {
   8         DR_ACTION_DOMAIN_NIC_INGRESS,
   9         DR_ACTION_DOMAIN_NIC_EGRESS,
  10         DR_ACTION_DOMAIN_FDB_INGRESS,
  11         DR_ACTION_DOMAIN_FDB_EGRESS,
  12         DR_ACTION_DOMAIN_MAX,
  13 };
  14
  15 enum dr_action_valid_state {
  16         DR_ACTION_STATE_ERR,
  17         DR_ACTION_STATE_NO_ACTION,
  18         DR_ACTION_STATE_ENCAP,
  19         DR_ACTION_STATE_DECAP,
  20         DR_ACTION_STATE_MODIFY_HDR,
  21         DR_ACTION_STATE_POP_VLAN,
  22         DR_ACTION_STATE_PUSH_VLAN,
  23         DR_ACTION_STATE_NON_TERM,
  24         DR_ACTION_STATE_TERM,
  25         DR_ACTION_STATE_MAX,
  26 };
  27
  28 static const char * const action_type_to_str[] = {
  29         [DR_ACTION_TYP_TNL_L2_TO_L2] = "DR_ACTION_TYP_TNL_L2_TO_L2",
  30         [DR_ACTION_TYP_L2_TO_TNL_L2] = "DR_ACTION_TYP_L2_TO_TNL_L2",
  31         [DR_ACTION_TYP_TNL_L3_TO_L2] = "DR_ACTION_TYP_TNL_L3_TO_L2",
  32         [DR_ACTION_TYP_L2_TO_TNL_L3] = "DR_ACTION_TYP_L2_TO_TNL_L3",
  33         [DR_ACTION_TYP_DROP] = "DR_ACTION_TYP_DROP",
  34         [DR_ACTION_TYP_QP] = "DR_ACTION_TYP_QP",
  35         [DR_ACTION_TYP_FT] = "DR_ACTION_TYP_FT",
  36         [DR_ACTION_TYP_CTR] = "DR_ACTION_TYP_CTR",
  37         [DR_ACTION_TYP_TAG] = "DR_ACTION_TYP_TAG",
  38         [DR_ACTION_TYP_MODIFY_HDR] = "DR_ACTION_TYP_MODIFY_HDR",
  39         [DR_ACTION_TYP_VPORT] = "DR_ACTION_TYP_VPORT",
  40         [DR_ACTION_TYP_POP_VLAN] = "DR_ACTION_TYP_POP_VLAN",
  41         [DR_ACTION_TYP_PUSH_VLAN] = "DR_ACTION_TYP_PUSH_VLAN",
  42         [DR_ACTION_TYP_INSERT_HDR] = "DR_ACTION_TYP_INSERT_HDR",
  43         [DR_ACTION_TYP_REMOVE_HDR] = "DR_ACTION_TYP_REMOVE_HDR",
  44         [DR_ACTION_TYP_MAX] = "DR_ACTION_UNKNOWN",
  45 };
  46
  47 static const char *dr_action_id_to_str(enum mlx5dr_action_type action_id)
  48 {
  49         if (action_id > DR_ACTION_TYP_MAX)
  50                 action_id = DR_ACTION_TYP_MAX;
  51         return action_type_to_str[action_id];
  52 }
  53
  54 static const enum dr_action_valid_state
  55 next_action_state[DR_ACTION_DOMAIN_MAX][DR_ACTION_STATE_MAX][DR_ACTION_TYP_MAX] = {
  56         [DR_ACTION_DOMAIN_NIC_INGRESS] = {
  57                 [DR_ACTION_STATE_NO_ACTION] = {
  58                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
  59                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
  60                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
  61                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
  62                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_NON_TERM,
  63                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
  64                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
  65                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
  66                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
  67                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
  68                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
  69                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
  70                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
  71                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
  72                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
  73                 },
  74                 [DR_ACTION_STATE_DECAP] = {
  75                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
  76                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
  77                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
  78                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
  79                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_DECAP,
  80                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
  81                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
  82                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
  83                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
  84                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
  85                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
  86                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
  87                 },
  88                 [DR_ACTION_STATE_ENCAP] = {
  89                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
  90                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
  91                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
  92                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
  93                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_ENCAP,
  94                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
  95                 },
  96                 [DR_ACTION_STATE_MODIFY_HDR] = {
  97                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
  98                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
  99                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 100                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 101                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_MODIFY_HDR,
 102                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 103                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 104                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 105                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 106                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 107                 },
 108                 [DR_ACTION_STATE_POP_VLAN] = {
 109                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 110                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 111                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 112                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 113                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_POP_VLAN,
 114                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 115                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 116                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 117                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 118                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 119                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 120                 },
 121                 [DR_ACTION_STATE_PUSH_VLAN] = {
 122                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 123                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 124                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 125                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_PUSH_VLAN,
 126                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 127                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 128                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 129                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 130                 },
 131                 [DR_ACTION_STATE_NON_TERM] = {
 132                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 133                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 134                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 135                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 136                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_NON_TERM,
 137                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 138                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
 139                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
 140                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 141                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 142                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 143                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 144                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 145                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 146                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 147                 },
 148                 [DR_ACTION_STATE_TERM] = {
 149                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 150                 },
 151         },
 152         [DR_ACTION_DOMAIN_NIC_EGRESS] = {
 153                 [DR_ACTION_STATE_NO_ACTION] = {
 154                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 155                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 156                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 157                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 158                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 159                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 160                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 161                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 162                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 163                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 164                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 165                 },
 166                 [DR_ACTION_STATE_DECAP] = {
 167                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 168                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 169                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 170                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
 171                 },
 172                 [DR_ACTION_STATE_ENCAP] = {
 173                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 174                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 175                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 176                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 177                 },
 178                 [DR_ACTION_STATE_MODIFY_HDR] = {
 179                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 180                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 181                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 182                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 183                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 184                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 185                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 186                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 187                 },
 188                 [DR_ACTION_STATE_POP_VLAN] = {
 189                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 190                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 191                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 192                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 193                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 194                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 195                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 196                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 197                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 198                 },
 199                 [DR_ACTION_STATE_PUSH_VLAN] = {
 200                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 201                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 202                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 203                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 204                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 205                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 206                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 207                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 208                 },
 209                 [DR_ACTION_STATE_NON_TERM] = {
 210                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 211                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 212                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 213                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 214                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 215                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 216                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 217                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 218                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 219                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 220                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 221                 },
 222                 [DR_ACTION_STATE_TERM] = {
 223                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 224                 },
 225         },
 226         [DR_ACTION_DOMAIN_FDB_INGRESS] = {
 227                 [DR_ACTION_STATE_NO_ACTION] = {
 228                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 229                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 230                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 231                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 232                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
 233                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
 234                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 235                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 236                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 237                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 238                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 239                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 240                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 241                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 242                 },
 243                 [DR_ACTION_STATE_DECAP] = {
 244                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 245                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 246                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
 247                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 248                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 249                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 250                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 251                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 252                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 253                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 254                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 255                 },
 256                 [DR_ACTION_STATE_ENCAP] = {
 257                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 258                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 259                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 260                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 261                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 262                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 263                 },
 264                 [DR_ACTION_STATE_MODIFY_HDR] = {
 265                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 266                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 267                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 268                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 269                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 270                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 271                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 272                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 273                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 274                 },
 275                 [DR_ACTION_STATE_POP_VLAN] = {
 276                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 277                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 278                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 279                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 280                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 281                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 282                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 283                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 284                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 285                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 286                 },
 287                 [DR_ACTION_STATE_PUSH_VLAN] = {
 288                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 289                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 290                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 291                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 292                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 293                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 294                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 295                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 296                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 297                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 298                 },
 299                 [DR_ACTION_STATE_NON_TERM] = {
 300                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 301                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 302                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 303                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 304                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
 305                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
 306                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 307                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 308                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 309                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 310                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 311                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 312                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 313                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 314                 },
 315                 [DR_ACTION_STATE_TERM] = {
 316                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 317                 },
 318         },
 319         [DR_ACTION_DOMAIN_FDB_EGRESS] = {
 320                 [DR_ACTION_STATE_NO_ACTION] = {
 321                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 322                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 323                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 324                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 325                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 326                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 327                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 328                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 329                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 330                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 331                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 332                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 333                 },
 334                 [DR_ACTION_STATE_DECAP] = {
 335                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 336                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 337                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
 338                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 339                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 340                 },
 341                 [DR_ACTION_STATE_ENCAP] = {
 342                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 343                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 344                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 345                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 346                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 347                 },
 348                 [DR_ACTION_STATE_MODIFY_HDR] = {
 349                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 350                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 351                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 352                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 353                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 354                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 355                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 356                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 357                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 358                 },
 359                 [DR_ACTION_STATE_POP_VLAN] = {
 360                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 361                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 362                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 363                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 364                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 365                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 366                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 367                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 368                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 369                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 370                 },
 371                 [DR_ACTION_STATE_PUSH_VLAN] = {
 372                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 373                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 374                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 375                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 376                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 377                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 378                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 379                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 380                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 381                 },
 382                 [DR_ACTION_STATE_NON_TERM] = {
 383                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 384                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 385                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 386                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 387                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 388                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 389                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 390                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 391                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 392                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 393                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 394                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 395                 },
 396                 [DR_ACTION_STATE_TERM] = {
 397                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 398                 },
 399         },
 400 };
 401
 402 static int
 403 dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type,
 404                                   enum mlx5dr_action_type *action_type)
 405 {
 406         switch (reformat_type) {
 407         case DR_ACTION_REFORMAT_TYP_TNL_L2_TO_L2:
 408                 *action_type = DR_ACTION_TYP_TNL_L2_TO_L2;
 409                 break;
 410         case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L2:
 411                 *action_type = DR_ACTION_TYP_L2_TO_TNL_L2;
 412                 break;
 413         case DR_ACTION_REFORMAT_TYP_TNL_L3_TO_L2:
 414                 *action_type = DR_ACTION_TYP_TNL_L3_TO_L2;
 415                 break;
 416         case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L3:
 417                 *action_type = DR_ACTION_TYP_L2_TO_TNL_L3;
 418                 break;
 419         case DR_ACTION_REFORMAT_TYP_INSERT_HDR:
 420                 *action_type = DR_ACTION_TYP_INSERT_HDR;
 421                 break;
 422         case DR_ACTION_REFORMAT_TYP_REMOVE_HDR:
 423                 *action_type = DR_ACTION_TYP_REMOVE_HDR;
 424                 break;
 425         default:
 426                 return -EINVAL;
 427         }
 428
 429         return 0;
 430 }
 431
 432 /* Apply the actions on the rule STE array starting from the last_ste.
 433  * Actions might require more than one STE, new_num_stes will return
 434  * the new size of the STEs array, rule with actions.
 435  */
 436 static void dr_actions_apply(struct mlx5dr_domain *dmn,
 437                              enum mlx5dr_domain_nic_type nic_type,
 438                              u8 *action_type_set,
 439                              u8 *last_ste,
 440                              struct mlx5dr_ste_actions_attr *attr,
 441                              u32 *new_num_stes)
 442 {
 443         struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx;
 444         u32 added_stes = 0;
 445
 446         if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
 447                 mlx5dr_ste_set_actions_rx(ste_ctx, dmn, action_type_set,
 448                                           last_ste, attr, &added_stes);
 449         else
 450                 mlx5dr_ste_set_actions_tx(ste_ctx, dmn, action_type_set,
 451                                           last_ste, attr, &added_stes);
 452
 453         *new_num_stes += added_stes;
 454 }
 455
 456 static enum dr_action_domain
 457 dr_action_get_action_domain(enum mlx5dr_domain_type domain,
 458                             enum mlx5dr_domain_nic_type nic_type)
 459 {
 460         switch (domain) {
 461         case MLX5DR_DOMAIN_TYPE_NIC_RX:
 462                 return DR_ACTION_DOMAIN_NIC_INGRESS;
 463         case MLX5DR_DOMAIN_TYPE_NIC_TX:
 464                 return DR_ACTION_DOMAIN_NIC_EGRESS;
 465         case MLX5DR_DOMAIN_TYPE_FDB:
 466                 if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
 467                         return DR_ACTION_DOMAIN_FDB_INGRESS;
 468                 return DR_ACTION_DOMAIN_FDB_EGRESS;
 469         default:
 470                 WARN_ON(true);
 471                 return DR_ACTION_DOMAIN_MAX;
 472         }
 473 }
 474
 475 static
 476 int dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,
 477                                           u32 action_type,
 478                                           u32 *state)
 479 {
 480         u32 cur_state = *state;
 481
 482         /* Check action state machine is valid */
 483         *state = next_action_state[action_domain][cur_state][action_type];
 484
 485         if (*state == DR_ACTION_STATE_ERR)
 486                 return -EOPNOTSUPP;
 487
 488         return 0;
 489 }
 490
 491 static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn,
 492                                       struct mlx5dr_action *dest_action,
 493                                       u64 *final_icm_addr)
 494 {
 495         int ret;
 496
 497         switch (dest_action->action_type) {
 498         case DR_ACTION_TYP_FT:
 499                 /* Allow destination flow table only if table is a terminating
 500                  * table, since there is an *assumption* that in such case FW
 501                  * will recalculate the CS.
 502                  */
 503                 if (dest_action->dest_tbl->is_fw_tbl) {
 504                         *final_icm_addr = dest_action->dest_tbl->fw_tbl.rx_icm_addr;
 505                 } else {
 506                         mlx5dr_dbg(dmn,
 507                                    "Destination FT should be terminating when modify TTL is used\n");
 508                         return -EINVAL;
 509                 }
 510                 break;
 511
 512         case DR_ACTION_TYP_VPORT:
 513                 /* If destination is vport we will get the FW flow table
 514                  * that recalculates the CS and forwards to the vport.
 515                  */
 516                 ret = mlx5dr_domain_get_recalc_cs_ft_addr(dest_action->vport->dmn,
 517                                                           dest_action->vport->caps->num,
 518                                                           final_icm_addr);
 519                 if (ret) {
 520                         mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n");
 521                         return ret;
 522                 }
 523                 break;
 524
 525         default:
 526                 break;
 527         }
 528
 529         return 0;
 530 }
 531
 532 static void dr_action_print_sequence(struct mlx5dr_domain *dmn,
 533                                      struct mlx5dr_action *actions[],
 534                                      int last_idx)
 535 {
 536         int i;
 537
 538         for (i = 0; i <= last_idx; i++)
 539                 mlx5dr_err(dmn, "< %s (%d) > ",
 540                            dr_action_id_to_str(actions[i]->action_type),
 541                            actions[i]->action_type);
 542 }
 543
 544 #define WITH_VLAN_NUM_HW_ACTIONS 6
 545
 546 int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
 547                                  struct mlx5dr_matcher_rx_tx *nic_matcher,
 548                                  struct mlx5dr_action *actions[],
 549                                  u32 num_actions,
 550                                  u8 *ste_arr,
 551                                  u32 *new_hw_ste_arr_sz)
 552 {
 553         struct mlx5dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn;
 554         bool rx_rule = nic_dmn->type == DR_DOMAIN_NIC_TYPE_RX;
 555         struct mlx5dr_domain *dmn = matcher->tbl->dmn;
 556         u8 action_type_set[DR_ACTION_TYP_MAX] = {};
 557         struct mlx5dr_ste_actions_attr attr = {};
 558         struct mlx5dr_action *dest_action = NULL;
 559         u32 state = DR_ACTION_STATE_NO_ACTION;
 560         enum dr_action_domain action_domain;
 561         bool recalc_cs_required = false;
 562         u8 *last_ste;
 563         int i, ret;
 564
 565         attr.gvmi = dmn->info.caps.gvmi;
 566         attr.hit_gvmi = dmn->info.caps.gvmi;
 567         attr.final_icm_addr = nic_dmn->default_icm_addr;
 568         action_domain = dr_action_get_action_domain(dmn->type, nic_dmn->type);
 569
 570         for (i = 0; i < num_actions; i++) {
 571                 struct mlx5dr_action_dest_tbl *dest_tbl;
 572                 struct mlx5dr_action *action;
 573                 int max_actions_type = 1;
 574                 u32 action_type;
 575
 576                 action = actions[i];
 577                 action_type = action->action_type;
 578
 579                 switch (action_type) {
 580                 case DR_ACTION_TYP_DROP:
 581                         attr.final_icm_addr = nic_dmn->drop_icm_addr;
 582                         break;
 583                 case DR_ACTION_TYP_FT:
 584                         dest_action = action;
 585                         dest_tbl = action->dest_tbl;
 586                         if (!dest_tbl->is_fw_tbl) {
 587                                 if (dest_tbl->tbl->dmn != dmn) {
 588                                         mlx5dr_err(dmn,
 589                                                    "Destination table belongs to a different domain\n");
 590                                         return -EINVAL;
 591                                 }
 592                                 if (dest_tbl->tbl->level <= matcher->tbl->level) {
 593                                         mlx5_core_dbg_once(dmn->mdev,
 594                                                            "Connecting table to a lower/same level destination table\n");
 595                                         mlx5dr_dbg(dmn,
 596                                                    "Connecting table at level %d to a destination table at level %d\n",
 597                                                    matcher->tbl->level,
 598                                                    dest_tbl->tbl->level);
 599                                 }
 600                                 attr.final_icm_addr = rx_rule ?
 601                                         dest_tbl->tbl->rx.s_anchor->chunk->icm_addr :
 602                                         dest_tbl->tbl->tx.s_anchor->chunk->icm_addr;
 603                         } else {
 604                                 struct mlx5dr_cmd_query_flow_table_details output;
 605                                 int ret;
 606
 607                                 /* get the relevant addresses */
 608                                 if (!action->dest_tbl->fw_tbl.rx_icm_addr) {
 609                                         ret = mlx5dr_cmd_query_flow_table(dmn->mdev,
 610                                                                           dest_tbl->fw_tbl.type,
 611                                                                           dest_tbl->fw_tbl.id,
 612                                                                           &output);
 613                                         if (!ret) {
 614                                                 dest_tbl->fw_tbl.tx_icm_addr =
 615                                                         output.sw_owner_icm_root_1;
 616                                                 dest_tbl->fw_tbl.rx_icm_addr =
 617                                                         output.sw_owner_icm_root_0;
 618                                         } else {
 619                                                 mlx5dr_err(dmn,
 620                                                            "Failed mlx5_cmd_query_flow_table ret: %d\n",
 621                                                            ret);
 622                                                 return ret;
 623                                         }
 624                                 }
 625                                 attr.final_icm_addr = rx_rule ?
 626                                         dest_tbl->fw_tbl.rx_icm_addr :
 627                                         dest_tbl->fw_tbl.tx_icm_addr;
 628                         }
 629                         break;
 630                 case DR_ACTION_TYP_QP:
 631                         mlx5dr_info(dmn, "Domain doesn't support QP\n");
 632                         return -EOPNOTSUPP;
 633                 case DR_ACTION_TYP_CTR:
 634                         attr.ctr_id = action->ctr->ctr_id +
 635                                 action->ctr->offeset;
 636                         break;
 637                 case DR_ACTION_TYP_TAG:
 638                         attr.flow_tag = action->flow_tag->flow_tag;
 639                         break;
 640                 case DR_ACTION_TYP_TNL_L2_TO_L2:
 641                         break;
 642                 case DR_ACTION_TYP_TNL_L3_TO_L2:
 643                         attr.decap_index = action->rewrite->index;
 644                         attr.decap_actions = action->rewrite->num_of_actions;
 645                         attr.decap_with_vlan =
 646                                 attr.decap_actions == WITH_VLAN_NUM_HW_ACTIONS;
 647                         break;
 648                 case DR_ACTION_TYP_MODIFY_HDR:
 649                         attr.modify_index = action->rewrite->index;
 650                         attr.modify_actions = action->rewrite->num_of_actions;
 651                         recalc_cs_required = action->rewrite->modify_ttl &&
 652                                              !mlx5dr_ste_supp_ttl_cs_recalc(&dmn->info.caps);
 653                         break;
 654                 case DR_ACTION_TYP_L2_TO_TNL_L2:
 655                 case DR_ACTION_TYP_L2_TO_TNL_L3:
 656                         if (rx_rule &&
 657                             !(dmn->ste_ctx->actions_caps & DR_STE_CTX_ACTION_CAP_RX_ENCAP)) {
 658                                 mlx5dr_info(dmn, "Device doesn't support Encap on RX\n");
 659                                 return -EOPNOTSUPP;
 660                         }
 661                         attr.reformat.size = action->reformat->size;
 662                         attr.reformat.id = action->reformat->id;
 663                         break;
 664                 case DR_ACTION_TYP_SAMPLER:
 665                         attr.final_icm_addr = rx_rule ? action->sampler->rx_icm_addr :
 666                                                         action->sampler->tx_icm_addr;
 667                         break;
 668                 case DR_ACTION_TYP_VPORT:
 669                         attr.hit_gvmi = action->vport->caps->vhca_gvmi;
 670                         dest_action = action;
 671                         if (rx_rule) {
 672                                 if (action->vport->caps->num == MLX5_VPORT_UPLINK) {
 673                                         mlx5dr_dbg(dmn, "Device doesn't support Loopback on WIRE vport\n");
 674                                         return -EOPNOTSUPP;
 675                                 }
 676                                 attr.final_icm_addr = action->vport->caps->icm_address_rx;
 677                         } else {
 678                                 attr.final_icm_addr = action->vport->caps->icm_address_tx;
 679                         }
 680                         break;
 681                 case DR_ACTION_TYP_POP_VLAN:
 682                         if (!rx_rule && !(dmn->ste_ctx->actions_caps &
 683                                           DR_STE_CTX_ACTION_CAP_TX_POP)) {
 684                                 mlx5dr_dbg(dmn, "Device doesn't support POP VLAN action on TX\n");
 685                                 return -EOPNOTSUPP;
 686                         }
 687
 688                         max_actions_type = MLX5DR_MAX_VLANS;
 689                         attr.vlans.count++;
 690                         break;
 691                 case DR_ACTION_TYP_PUSH_VLAN:
 692                         if (rx_rule && !(dmn->ste_ctx->actions_caps &
 693                                          DR_STE_CTX_ACTION_CAP_RX_PUSH)) {
 694                                 mlx5dr_dbg(dmn, "Device doesn't support PUSH VLAN action on RX\n");
 695                                 return -EOPNOTSUPP;
 696                         }
 697
 698                         max_actions_type = MLX5DR_MAX_VLANS;
 699                         if (attr.vlans.count == MLX5DR_MAX_VLANS) {
 700                                 mlx5dr_dbg(dmn, "Max VLAN push/pop count exceeded\n");
 701                                 return -EINVAL;
 702                         }
 703
 704                         attr.vlans.headers[attr.vlans.count++] = action->push_vlan->vlan_hdr;
 705                         break;
 706                 case DR_ACTION_TYP_INSERT_HDR:
 707                 case DR_ACTION_TYP_REMOVE_HDR:
 708                         attr.reformat.size = action->reformat->size;
 709                         attr.reformat.id = action->reformat->id;
 710                         attr.reformat.param_0 = action->reformat->param_0;
 711                         attr.reformat.param_1 = action->reformat->param_1;
 712                         break;
 713                 default:
 714                         mlx5dr_err(dmn, "Unsupported action type %d\n", action_type);
 715                         return -EINVAL;
 716                 }
 717
 718                 /* Check action duplication */
 719                 if (++action_type_set[action_type] > max_actions_type) {
 720                         mlx5dr_err(dmn, "Action type %d supports only max %d time(s)\n",
 721                                    action_type, max_actions_type);
 722                         return -EINVAL;
 723                 }
 724
 725                 /* Check action state machine is valid */
 726                 if (dr_action_validate_and_get_next_state(action_domain,
 727                                                           action_type,
 728                                                           &state)) {
 729                         mlx5dr_err(dmn, "Invalid action (gvmi: %d, is_rx: %d) sequence provided:",
 730                                    attr.gvmi, rx_rule);
 731                         dr_action_print_sequence(dmn, actions, i);
 732                         return -EOPNOTSUPP;
 733                 }
 734         }
 735
 736         *new_hw_ste_arr_sz = nic_matcher->num_of_builders;
 737         last_ste = ste_arr + DR_STE_SIZE * (nic_matcher->num_of_builders - 1);
 738
 739         /* Due to a HW bug in some devices, modifying TTL on RX flows will
 740          * cause an incorrect checksum calculation. In this case we will
 741          * use a FW table to recalculate.
 742          */
 743         if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB &&
 744             rx_rule && recalc_cs_required && dest_action) {
 745                 ret = dr_action_handle_cs_recalc(dmn, dest_action, &attr.final_icm_addr);
 746                 if (ret) {
 747                         mlx5dr_err(dmn,
 748                                    "Failed to handle checksum recalculation err %d\n",
 749                                    ret);
 750                         return ret;
 751                 }
 752         }
 753
 754         dr_actions_apply(dmn,
 755                          nic_dmn->type,
 756                          action_type_set,
 757                          last_ste,
 758                          &attr,
 759                          new_hw_ste_arr_sz);
 760
 761         return 0;
 762 }
 763
 764 static unsigned int action_size[DR_ACTION_TYP_MAX] = {
 765         [DR_ACTION_TYP_TNL_L2_TO_L2] = sizeof(struct mlx5dr_action_reformat),
 766         [DR_ACTION_TYP_L2_TO_TNL_L2] = sizeof(struct mlx5dr_action_reformat),
 767         [DR_ACTION_TYP_TNL_L3_TO_L2] = sizeof(struct mlx5dr_action_rewrite),
 768         [DR_ACTION_TYP_L2_TO_TNL_L3] = sizeof(struct mlx5dr_action_reformat),
 769         [DR_ACTION_TYP_FT]           = sizeof(struct mlx5dr_action_dest_tbl),
 770         [DR_ACTION_TYP_CTR]          = sizeof(struct mlx5dr_action_ctr),
 771         [DR_ACTION_TYP_TAG]          = sizeof(struct mlx5dr_action_flow_tag),
 772         [DR_ACTION_TYP_MODIFY_HDR]   = sizeof(struct mlx5dr_action_rewrite),
 773         [DR_ACTION_TYP_VPORT]        = sizeof(struct mlx5dr_action_vport),
 774         [DR_ACTION_TYP_PUSH_VLAN]    = sizeof(struct mlx5dr_action_push_vlan),
 775         [DR_ACTION_TYP_INSERT_HDR]   = sizeof(struct mlx5dr_action_reformat),
 776         [DR_ACTION_TYP_REMOVE_HDR]   = sizeof(struct mlx5dr_action_reformat),
 777         [DR_ACTION_TYP_SAMPLER]      = sizeof(struct mlx5dr_action_sampler),
 778 };
 779
 780 static struct mlx5dr_action *
 781 dr_action_create_generic(enum mlx5dr_action_type action_type)
 782 {
 783         struct mlx5dr_action *action;
 784         int extra_size;
 785
 786         if (action_type < DR_ACTION_TYP_MAX)
 787                 extra_size = action_size[action_type];
 788         else
 789                 return NULL;
 790
 791         action = kzalloc(sizeof(*action) + extra_size, GFP_KERNEL);
 792         if (!action)
 793                 return NULL;
 794
 795         action->action_type = action_type;
 796         refcount_set(&action->refcount, 1);
 797         action->data = action + 1;
 798
 799         return action;
 800 }
 801
 802 struct mlx5dr_action *mlx5dr_action_create_drop(void)
 803 {
 804         return dr_action_create_generic(DR_ACTION_TYP_DROP);
 805 }
 806
 807 struct mlx5dr_action *
 808 mlx5dr_action_create_dest_table_num(struct mlx5dr_domain *dmn, u32 table_num)
 809 {
 810         struct mlx5dr_action *action;
 811
 812         action = dr_action_create_generic(DR_ACTION_TYP_FT);
 813         if (!action)
 814                 return NULL;
 815
 816         action->dest_tbl->is_fw_tbl = true;
 817         action->dest_tbl->fw_tbl.dmn = dmn;
 818         action->dest_tbl->fw_tbl.id = table_num;
 819         action->dest_tbl->fw_tbl.type = FS_FT_FDB;
 820         refcount_inc(&dmn->refcount);
 821
 822         return action;
 823 }
 824
 825 struct mlx5dr_action *
 826 mlx5dr_action_create_dest_table(struct mlx5dr_table *tbl)
 827 {
 828         struct mlx5dr_action *action;
 829
 830         refcount_inc(&tbl->refcount);
 831
 832         action = dr_action_create_generic(DR_ACTION_TYP_FT);
 833         if (!action)
 834                 goto dec_ref;
 835
 836         action->dest_tbl->tbl = tbl;
 837
 838         return action;
 839
 840 dec_ref:
 841         refcount_dec(&tbl->refcount);
 842         return NULL;
 843 }
 844
 845 struct mlx5dr_action *
 846 mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain *dmn,
 847                                    struct mlx5dr_action_dest *dests,
 848                                    u32 num_of_dests,
 849                                    bool ignore_flow_level)
 850 {
 851         struct mlx5dr_cmd_flow_destination_hw_info *hw_dests;
 852         struct mlx5dr_action **ref_actions;
 853         struct mlx5dr_action *action;
 854         bool reformat_req = false;
 855         u32 num_of_ref = 0;
 856         int ret;
 857         int i;
 858
 859         if (dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
 860                 mlx5dr_err(dmn, "Multiple destination support is for FDB only\n");
 861                 return NULL;
 862         }
 863
 864         hw_dests = kzalloc(sizeof(*hw_dests) * num_of_dests, GFP_KERNEL);
 865         if (!hw_dests)
 866                 return NULL;
 867
 868         ref_actions = kzalloc(sizeof(*ref_actions) * num_of_dests * 2, GFP_KERNEL);
 869         if (!ref_actions)
 870                 goto free_hw_dests;
 871
 872         for (i = 0; i < num_of_dests; i++) {
 873                 struct mlx5dr_action *reformat_action = dests[i].reformat;
 874                 struct mlx5dr_action *dest_action = dests[i].dest;
 875
 876                 ref_actions[num_of_ref++] = dest_action;
 877
 878                 switch (dest_action->action_type) {
 879                 case DR_ACTION_TYP_VPORT:
 880                         hw_dests[i].vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID;
 881                         hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
 882                         hw_dests[i].vport.num = dest_action->vport->caps->num;
 883                         hw_dests[i].vport.vhca_id = dest_action->vport->caps->vhca_gvmi;
 884                         if (reformat_action) {
 885                                 reformat_req = true;
 886                                 hw_dests[i].vport.reformat_id =
 887                                         reformat_action->reformat->id;
 888                                 ref_actions[num_of_ref++] = reformat_action;
 889                                 hw_dests[i].vport.flags |= MLX5_FLOW_DEST_VPORT_REFORMAT_ID;
 890                         }
 891                         break;
 892
 893                 case DR_ACTION_TYP_FT:
 894                         hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 895                         if (dest_action->dest_tbl->is_fw_tbl)
 896                                 hw_dests[i].ft_id = dest_action->dest_tbl->fw_tbl.id;
 897                         else
 898                                 hw_dests[i].ft_id = dest_action->dest_tbl->tbl->table_id;
 899                         break;
 900
 901                 default:
 902                         mlx5dr_dbg(dmn, "Invalid multiple destinations action\n");
 903                         goto free_ref_actions;
 904                 }
 905         }
 906
 907         action = dr_action_create_generic(DR_ACTION_TYP_FT);
 908         if (!action)
 909                 goto free_ref_actions;
 910
 911         ret = mlx5dr_fw_create_md_tbl(dmn,
 912                                       hw_dests,
 913                                       num_of_dests,
 914                                       reformat_req,
 915                                       &action->dest_tbl->fw_tbl.id,
 916                                       &action->dest_tbl->fw_tbl.group_id,
 917                                       ignore_flow_level);
 918         if (ret)
 919                 goto free_action;
 920
 921         refcount_inc(&dmn->refcount);
 922
 923         for (i = 0; i < num_of_ref; i++)
 924                 refcount_inc(&ref_actions[i]->refcount);
 925
 926         action->dest_tbl->is_fw_tbl = true;
 927         action->dest_tbl->fw_tbl.dmn = dmn;
 928         action->dest_tbl->fw_tbl.type = FS_FT_FDB;
 929         action->dest_tbl->fw_tbl.ref_actions = ref_actions;
 930         action->dest_tbl->fw_tbl.num_of_ref_actions = num_of_ref;
 931
 932         kfree(hw_dests);
 933
 934         return action;
 935
 936 free_action:
 937         kfree(action);
 938 free_ref_actions:
 939         kfree(ref_actions);
 940 free_hw_dests:
 941         kfree(hw_dests);
 942         return NULL;
 943 }
 944
 945 struct mlx5dr_action *
 946 mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain *dmn,
 947                                         struct mlx5_flow_table *ft)
 948 {
 949         struct mlx5dr_action *action;
 950
 951         action = dr_action_create_generic(DR_ACTION_TYP_FT);
 952         if (!action)
 953                 return NULL;
 954
 955         action->dest_tbl->is_fw_tbl = 1;
 956         action->dest_tbl->fw_tbl.type = ft->type;
 957         action->dest_tbl->fw_tbl.id = ft->id;
 958         action->dest_tbl->fw_tbl.dmn = dmn;
 959
 960         refcount_inc(&dmn->refcount);
 961
 962         return action;
 963 }
 964
 965 struct mlx5dr_action *
 966 mlx5dr_action_create_flow_counter(u32 counter_id)
 967 {
 968         struct mlx5dr_action *action;
 969
 970         action = dr_action_create_generic(DR_ACTION_TYP_CTR);
 971         if (!action)
 972                 return NULL;
 973
 974         action->ctr->ctr_id = counter_id;
 975
 976         return action;
 977 }
 978
 979 struct mlx5dr_action *mlx5dr_action_create_tag(u32 tag_value)
 980 {
 981         struct mlx5dr_action *action;
 982
 983         action = dr_action_create_generic(DR_ACTION_TYP_TAG);
 984         if (!action)
 985                 return NULL;
 986
 987         action->flow_tag->flow_tag = tag_value & 0xffffff;
 988
 989         return action;
 990 }
 991
 992 struct mlx5dr_action *
 993 mlx5dr_action_create_flow_sampler(struct mlx5dr_domain *dmn, u32 sampler_id)
 994 {
 995         struct mlx5dr_action *action;
 996         u64 icm_rx, icm_tx;
 997         int ret;
 998
 999         ret = mlx5dr_cmd_query_flow_sampler(dmn->mdev, sampler_id,
1000                                             &icm_rx, &icm_tx);
1001         if (ret)
1002                 return NULL;
1003
1004         action = dr_action_create_generic(DR_ACTION_TYP_SAMPLER);
1005         if (!action)
1006                 return NULL;
1007
1008         action->sampler->dmn = dmn;
1009         action->sampler->sampler_id = sampler_id;
1010         action->sampler->rx_icm_addr = icm_rx;
1011         action->sampler->tx_icm_addr = icm_tx;
1012
1013         refcount_inc(&dmn->refcount);
1014         return action;
1015 }
1016
1017 static int
1018 dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type,
1019                                  struct mlx5dr_domain *dmn,
1020                                  u8 reformat_param_0,
1021                                  u8 reformat_param_1,
1022                                  size_t data_sz,
1023                                  void *data)
1024 {
1025         if (reformat_type == DR_ACTION_TYP_INSERT_HDR) {
1026                 if ((!data && data_sz) || (data && !data_sz) ||
1027                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_size) < data_sz ||
1028                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_offset) < reformat_param_1) {
1029                         mlx5dr_dbg(dmn, "Invalid reformat parameters for INSERT_HDR\n");
1030                         goto out_err;
1031                 }
1032         } else if (reformat_type == DR_ACTION_TYP_REMOVE_HDR) {
1033                 if (data ||
1034                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_size) < data_sz ||
1035                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_offset) < reformat_param_1) {
1036                         mlx5dr_dbg(dmn, "Invalid reformat parameters for REMOVE_HDR\n");
1037                         goto out_err;
1038                 }
1039         } else if (reformat_param_0 || reformat_param_1 ||
1040                    reformat_type > DR_ACTION_TYP_REMOVE_HDR) {
1041                 mlx5dr_dbg(dmn, "Invalid reformat parameters\n");
1042                 goto out_err;
1043         }
1044
1045         if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB)
1046                 return 0;
1047
1048         if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) {
1049                 if (reformat_type != DR_ACTION_TYP_TNL_L2_TO_L2 &&
1050                     reformat_type != DR_ACTION_TYP_TNL_L3_TO_L2) {
1051                         mlx5dr_dbg(dmn, "Action reformat type not support on RX domain\n");
1052                         goto out_err;
1053                 }
1054         } else if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) {
1055                 if (reformat_type != DR_ACTION_TYP_L2_TO_TNL_L2 &&
1056                     reformat_type != DR_ACTION_TYP_L2_TO_TNL_L3) {
1057                         mlx5dr_dbg(dmn, "Action reformat type not support on TX domain\n");
1058                         goto out_err;
1059                 }
1060         }
1061
1062         return 0;
1063
1064 out_err:
1065         return -EINVAL;
1066 }
1067
1068 #define ACTION_CACHE_LINE_SIZE 64
1069
1070 static int
1071 dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
1072                                  u8 reformat_param_0, u8 reformat_param_1,
1073                                  size_t data_sz, void *data,
1074                                  struct mlx5dr_action *action)
1075 {
1076         u32 reformat_id;
1077         int ret;
1078
1079         switch (action->action_type) {
1080         case DR_ACTION_TYP_L2_TO_TNL_L2:
1081         case DR_ACTION_TYP_L2_TO_TNL_L3:
1082         {
1083                 enum mlx5_reformat_ctx_type rt;
1084
1085                 if (action->action_type == DR_ACTION_TYP_L2_TO_TNL_L2)
1086                         rt = MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL;
1087                 else
1088                         rt = MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
1089
1090                 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev, rt, 0, 0,
1091                                                      data_sz, data,
1092                                                      &reformat_id);
1093                 if (ret)
1094                         return ret;
1095
1096                 action->reformat->id = reformat_id;
1097                 action->reformat->size = data_sz;
1098                 return 0;
1099         }
1100         case DR_ACTION_TYP_TNL_L2_TO_L2:
1101         {
1102                 return 0;
1103         }
1104         case DR_ACTION_TYP_TNL_L3_TO_L2:
1105         {
1106                 u8 hw_actions[ACTION_CACHE_LINE_SIZE] = {};
1107                 int ret;
1108
1109                 ret = mlx5dr_ste_set_action_decap_l3_list(dmn->ste_ctx,
1110                                                           data, data_sz,
1111                                                           hw_actions,
1112                                                           ACTION_CACHE_LINE_SIZE,
1113                                                           &action->rewrite->num_of_actions);
1114                 if (ret) {
1115                         mlx5dr_dbg(dmn, "Failed creating decap l3 action list\n");
1116                         return ret;
1117                 }
1118
1119                 action->rewrite->chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool,
1120                                                                 DR_CHUNK_SIZE_8);
1121                 if (!action->rewrite->chunk) {
1122                         mlx5dr_dbg(dmn, "Failed allocating modify header chunk\n");
1123                         return -ENOMEM;
1124                 }
1125
1126                 action->rewrite->data = (void *)hw_actions;
1127                 action->rewrite->index = (action->rewrite->chunk->icm_addr -
1128                                          dmn->info.caps.hdr_modify_icm_addr) /
1129                                          ACTION_CACHE_LINE_SIZE;
1130
1131                 ret = mlx5dr_send_postsend_action(dmn, action);
1132                 if (ret) {
1133                         mlx5dr_dbg(dmn, "Writing decap l3 actions to ICM failed\n");
1134                         mlx5dr_icm_free_chunk(action->rewrite->chunk);
1135                         return ret;
1136                 }
1137                 return 0;
1138         }
1139         case DR_ACTION_TYP_INSERT_HDR:
1140                 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev,
1141                                                      MLX5_REFORMAT_TYPE_INSERT_HDR,
1142                                                      reformat_param_0,
1143                                                      reformat_param_1,
1144                                                      data_sz, data,
1145                                                      &reformat_id);
1146                 if (ret)
1147                         return ret;
1148
1149                 action->reformat->id = reformat_id;
1150                 action->reformat->size = data_sz;
1151                 action->reformat->param_0 = reformat_param_0;
1152                 action->reformat->param_1 = reformat_param_1;
1153                 return 0;
1154         case DR_ACTION_TYP_REMOVE_HDR:
1155                 action->reformat->id = 0;
1156                 action->reformat->size = data_sz;
1157                 action->reformat->param_0 = reformat_param_0;
1158                 action->reformat->param_1 = reformat_param_1;
1159                 return 0;
1160         default:
1161                 mlx5dr_info(dmn, "Reformat type is not supported %d\n", action->action_type);
1162                 return -EINVAL;
1163         }
1164 }
1165
1166 #define CVLAN_ETHERTYPE 0x8100
1167 #define SVLAN_ETHERTYPE 0x88a8
1168
1169 struct mlx5dr_action *mlx5dr_action_create_pop_vlan(void)
1170 {
1171         return dr_action_create_generic(DR_ACTION_TYP_POP_VLAN);
1172 }
1173
1174 struct mlx5dr_action *mlx5dr_action_create_push_vlan(struct mlx5dr_domain *dmn,
1175                                                      __be32 vlan_hdr)
1176 {
1177         u32 vlan_hdr_h = ntohl(vlan_hdr);
1178         u16 ethertype = vlan_hdr_h >> 16;
1179         struct mlx5dr_action *action;
1180
1181         if (ethertype != SVLAN_ETHERTYPE && ethertype != CVLAN_ETHERTYPE) {
1182                 mlx5dr_dbg(dmn, "Invalid vlan ethertype\n");
1183                 return NULL;
1184         }
1185
1186         action = dr_action_create_generic(DR_ACTION_TYP_PUSH_VLAN);
1187         if (!action)
1188                 return NULL;
1189
1190         action->push_vlan->vlan_hdr = vlan_hdr_h;
1191         return action;
1192 }
1193
1194 struct mlx5dr_action *
1195 mlx5dr_action_create_packet_reformat(struct mlx5dr_domain *dmn,
1196                                      enum mlx5dr_action_reformat_type reformat_type,
1197                                      u8 reformat_param_0,
1198                                      u8 reformat_param_1,
1199                                      size_t data_sz,
1200                                      void *data)
1201 {
1202         enum mlx5dr_action_type action_type;
1203         struct mlx5dr_action *action;
1204         int ret;
1205
1206         refcount_inc(&dmn->refcount);
1207
1208         /* General checks */
1209         ret = dr_action_reformat_to_action_type(reformat_type, &action_type);
1210         if (ret) {
1211                 mlx5dr_dbg(dmn, "Invalid reformat_type provided\n");
1212                 goto dec_ref;
1213         }
1214
1215         ret = dr_action_verify_reformat_params(action_type, dmn,
1216                                                reformat_param_0, reformat_param_1,
1217                                                data_sz, data);
1218         if (ret)
1219                 goto dec_ref;
1220
1221         action = dr_action_create_generic(action_type);
1222         if (!action)
1223                 goto dec_ref;
1224
1225         action->reformat->dmn = dmn;
1226
1227         ret = dr_action_create_reformat_action(dmn,
1228                                                reformat_param_0,
1229                                                reformat_param_1,
1230                                                data_sz,
1231                                                data,
1232                                                action);
1233         if (ret) {
1234                 mlx5dr_dbg(dmn, "Failed creating reformat action %d\n", ret);
1235                 goto free_action;
1236         }
1237
1238         return action;
1239
1240 free_action:
1241         kfree(action);
1242 dec_ref:
1243         refcount_dec(&dmn->refcount);
1244         return NULL;
1245 }
1246
1247 static int
1248 dr_action_modify_sw_to_hw_add(struct mlx5dr_domain *dmn,
1249                               __be64 *sw_action,
1250                               __be64 *hw_action,
1251                               const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1252 {
1253         const struct mlx5dr_ste_action_modify_field *hw_action_info;
1254         u8 max_length;
1255         u16 sw_field;
1256         u32 data;
1257
1258         /* Get SW modify action data */
1259         sw_field = MLX5_GET(set_action_in, sw_action, field);
1260         data = MLX5_GET(set_action_in, sw_action, data);
1261
1262         /* Convert SW data to HW modify action format */
1263         hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1264         if (!hw_action_info) {
1265                 mlx5dr_dbg(dmn, "Modify add action invalid field given\n");
1266                 return -EINVAL;
1267         }
1268
1269         max_length = hw_action_info->end - hw_action_info->start + 1;
1270
1271         mlx5dr_ste_set_action_add(dmn->ste_ctx,
1272                                   hw_action,
1273                                   hw_action_info->hw_field,
1274                                   hw_action_info->start,
1275                                   max_length,
1276                                   data);
1277
1278         *ret_hw_info = hw_action_info;
1279
1280         return 0;
1281 }
1282
1283 static int
1284 dr_action_modify_sw_to_hw_set(struct mlx5dr_domain *dmn,
1285                               __be64 *sw_action,
1286                               __be64 *hw_action,
1287                               const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1288 {
1289         const struct mlx5dr_ste_action_modify_field *hw_action_info;
1290         u8 offset, length, max_length;
1291         u16 sw_field;
1292         u32 data;
1293
1294         /* Get SW modify action data */
1295         length = MLX5_GET(set_action_in, sw_action, length);
1296         offset = MLX5_GET(set_action_in, sw_action, offset);
1297         sw_field = MLX5_GET(set_action_in, sw_action, field);
1298         data = MLX5_GET(set_action_in, sw_action, data);
1299
1300         /* Convert SW data to HW modify action format */
1301         hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1302         if (!hw_action_info) {
1303                 mlx5dr_dbg(dmn, "Modify set action invalid field given\n");
1304                 return -EINVAL;
1305         }
1306
1307         /* PRM defines that length zero specific length of 32bits */
1308         length = length ? length : 32;
1309
1310         max_length = hw_action_info->end - hw_action_info->start + 1;
1311
1312         if (length + offset > max_length) {
1313                 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1314                 return -EINVAL;
1315         }
1316
1317         mlx5dr_ste_set_action_set(dmn->ste_ctx,
1318                                   hw_action,
1319                                   hw_action_info->hw_field,
1320                                   hw_action_info->start + offset,
1321                                   length,
1322                                   data);
1323
1324         *ret_hw_info = hw_action_info;
1325
1326         return 0;
1327 }
1328
1329 static int
1330 dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain *dmn,
1331                                __be64 *sw_action,
1332                                __be64 *hw_action,
1333                                const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1334                                const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1335 {
1336         u8 src_offset, dst_offset, src_max_length, dst_max_length, length;
1337         const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1338         const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1339         u16 src_field, dst_field;
1340
1341         /* Get SW modify action data */
1342         src_field = MLX5_GET(copy_action_in, sw_action, src_field);
1343         dst_field = MLX5_GET(copy_action_in, sw_action, dst_field);
1344         src_offset = MLX5_GET(copy_action_in, sw_action, src_offset);
1345         dst_offset = MLX5_GET(copy_action_in, sw_action, dst_offset);
1346         length = MLX5_GET(copy_action_in, sw_action, length);
1347
1348         /* Convert SW data to HW modify action format */
1349         hw_src_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, src_field);
1350         hw_dst_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, dst_field);
1351         if (!hw_src_action_info || !hw_dst_action_info) {
1352                 mlx5dr_dbg(dmn, "Modify copy action invalid field given\n");
1353                 return -EINVAL;
1354         }
1355
1356         /* PRM defines that length zero specific length of 32bits */
1357         length = length ? length : 32;
1358
1359         src_max_length = hw_src_action_info->end -
1360                          hw_src_action_info->start + 1;
1361         dst_max_length = hw_dst_action_info->end -
1362                          hw_dst_action_info->start + 1;
1363
1364         if (length + src_offset > src_max_length ||
1365             length + dst_offset > dst_max_length) {
1366                 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1367                 return -EINVAL;
1368         }
1369
1370         mlx5dr_ste_set_action_copy(dmn->ste_ctx,
1371                                    hw_action,
1372                                    hw_dst_action_info->hw_field,
1373                                    hw_dst_action_info->start + dst_offset,
1374                                    length,
1375                                    hw_src_action_info->hw_field,
1376                                    hw_src_action_info->start + src_offset);
1377
1378         *ret_dst_hw_info = hw_dst_action_info;
1379         *ret_src_hw_info = hw_src_action_info;
1380
1381         return 0;
1382 }
1383
1384 static int
1385 dr_action_modify_sw_to_hw(struct mlx5dr_domain *dmn,
1386                           __be64 *sw_action,
1387                           __be64 *hw_action,
1388                           const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1389                           const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1390 {
1391         u8 action;
1392         int ret;
1393
1394         *hw_action = 0;
1395         *ret_src_hw_info = NULL;
1396
1397         /* Get SW modify action type */
1398         action = MLX5_GET(set_action_in, sw_action, action_type);
1399
1400         switch (action) {
1401         case MLX5_ACTION_TYPE_SET:
1402                 ret = dr_action_modify_sw_to_hw_set(dmn, sw_action,
1403                                                     hw_action,
1404                                                     ret_dst_hw_info);
1405                 break;
1406
1407         case MLX5_ACTION_TYPE_ADD:
1408                 ret = dr_action_modify_sw_to_hw_add(dmn, sw_action,
1409                                                     hw_action,
1410                                                     ret_dst_hw_info);
1411                 break;
1412
1413         case MLX5_ACTION_TYPE_COPY:
1414                 ret = dr_action_modify_sw_to_hw_copy(dmn, sw_action,
1415                                                      hw_action,
1416                                                      ret_dst_hw_info,
1417                                                      ret_src_hw_info);
1418                 break;
1419
1420         default:
1421                 mlx5dr_info(dmn, "Unsupported action_type for modify action\n");
1422                 ret = -EOPNOTSUPP;
1423         }
1424
1425         return ret;
1426 }
1427
1428 static int
1429 dr_action_modify_check_set_field_limitation(struct mlx5dr_action *action,
1430                                             const __be64 *sw_action)
1431 {
1432         u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1433         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1434
1435         if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1436                 action->rewrite->allow_rx = 0;
1437                 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1438                         mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1439                                    sw_field);
1440                         return -EINVAL;
1441                 }
1442         } else if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1443                 action->rewrite->allow_tx = 0;
1444                 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1445                         mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1446                                    sw_field);
1447                         return -EINVAL;
1448                 }
1449         }
1450
1451         if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1452                 mlx5dr_dbg(dmn, "Modify SET actions not supported on both RX and TX\n");
1453                 return -EINVAL;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int
1460 dr_action_modify_check_add_field_limitation(struct mlx5dr_action *action,
1461                                             const __be64 *sw_action)
1462 {
1463         u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1464         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1465
1466         if (sw_field != MLX5_ACTION_IN_FIELD_OUT_IP_TTL &&
1467             sw_field != MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT &&
1468             sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM &&
1469             sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM) {
1470                 mlx5dr_dbg(dmn, "Unsupported field %d for add action\n",
1471                            sw_field);
1472                 return -EINVAL;
1473         }
1474
1475         return 0;
1476 }
1477
1478 static int
1479 dr_action_modify_check_copy_field_limitation(struct mlx5dr_action *action,
1480                                              const __be64 *sw_action)
1481 {
1482         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1483         u16 sw_fields[2];
1484         int i;
1485
1486         sw_fields[0] = MLX5_GET(copy_action_in, sw_action, src_field);
1487         sw_fields[1] = MLX5_GET(copy_action_in, sw_action, dst_field);
1488
1489         for (i = 0; i < 2; i++) {
1490                 if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1491                         action->rewrite->allow_rx = 0;
1492                         if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1493                                 mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1494                                            sw_fields[i]);
1495                                 return -EINVAL;
1496                         }
1497                 } else if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1498                         action->rewrite->allow_tx = 0;
1499                         if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1500                                 mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1501                                            sw_fields[i]);
1502                                 return -EINVAL;
1503                         }
1504                 }
1505         }
1506
1507         if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1508                 mlx5dr_dbg(dmn, "Modify copy actions not supported on both RX and TX\n");
1509                 return -EINVAL;
1510         }
1511
1512         return 0;
1513 }
1514
1515 static int
1516 dr_action_modify_check_field_limitation(struct mlx5dr_action *action,
1517                                         const __be64 *sw_action)
1518 {
1519         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1520         u8 action_type;
1521         int ret;
1522
1523         action_type = MLX5_GET(set_action_in, sw_action, action_type);
1524
1525         switch (action_type) {
1526         case MLX5_ACTION_TYPE_SET:
1527                 ret = dr_action_modify_check_set_field_limitation(action,
1528                                                                   sw_action);
1529                 break;
1530
1531         case MLX5_ACTION_TYPE_ADD:
1532                 ret = dr_action_modify_check_add_field_limitation(action,
1533                                                                   sw_action);
1534                 break;
1535
1536         case MLX5_ACTION_TYPE_COPY:
1537                 ret = dr_action_modify_check_copy_field_limitation(action,
1538                                                                    sw_action);
1539                 break;
1540
1541         default:
1542                 mlx5dr_info(dmn, "Unsupported action %d modify action\n",
1543                             action_type);
1544                 ret = -EOPNOTSUPP;
1545         }
1546
1547         return ret;
1548 }
1549
1550 static bool
1551 dr_action_modify_check_is_ttl_modify(const void *sw_action)
1552 {
1553         u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1554
1555         return sw_field == MLX5_ACTION_IN_FIELD_OUT_IP_TTL;
1556 }
1557
1558 static int dr_actions_convert_modify_header(struct mlx5dr_action *action,
1559                                             u32 max_hw_actions,
1560                                             u32 num_sw_actions,
1561                                             __be64 sw_actions[],
1562                                             __be64 hw_actions[],
1563                                             u32 *num_hw_actions,
1564                                             bool *modify_ttl)
1565 {
1566         const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1567         const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1568         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1569         int ret, i, hw_idx = 0;
1570         __be64 *sw_action;
1571         __be64 hw_action;
1572         u16 hw_field = 0;
1573         u32 l3_type = 0;
1574         u32 l4_type = 0;
1575
1576         *modify_ttl = false;
1577
1578         action->rewrite->allow_rx = 1;
1579         action->rewrite->allow_tx = 1;
1580
1581         for (i = 0; i < num_sw_actions; i++) {
1582                 sw_action = &sw_actions[i];
1583
1584                 ret = dr_action_modify_check_field_limitation(action,
1585                                                               sw_action);
1586                 if (ret)
1587                         return ret;
1588
1589                 if (!(*modify_ttl))
1590                         *modify_ttl = dr_action_modify_check_is_ttl_modify(sw_action);
1591
1592                 /* Convert SW action to HW action */
1593                 ret = dr_action_modify_sw_to_hw(dmn,
1594                                                 sw_action,
1595                                                 &hw_action,
1596                                                 &hw_dst_action_info,
1597                                                 &hw_src_action_info);
1598                 if (ret)
1599                         return ret;
1600
1601                 /* Due to a HW limitation we cannot modify 2 different L3 types */
1602                 if (l3_type && hw_dst_action_info->l3_type &&
1603                     hw_dst_action_info->l3_type != l3_type) {
1604                         mlx5dr_dbg(dmn, "Action list can't support two different L3 types\n");
1605                         return -EINVAL;
1606                 }
1607                 if (hw_dst_action_info->l3_type)
1608                         l3_type = hw_dst_action_info->l3_type;
1609
1610                 /* Due to a HW limitation we cannot modify two different L4 types */
1611                 if (l4_type && hw_dst_action_info->l4_type &&
1612                     hw_dst_action_info->l4_type != l4_type) {
1613                         mlx5dr_dbg(dmn, "Action list can't support two different L4 types\n");
1614                         return -EINVAL;
1615                 }
1616                 if (hw_dst_action_info->l4_type)
1617                         l4_type = hw_dst_action_info->l4_type;
1618
1619                 /* HW reads and executes two actions at once this means we
1620                  * need to create a gap if two actions access the same field
1621                  */
1622                 if ((hw_idx % 2) && (hw_field == hw_dst_action_info->hw_field ||
1623                                      (hw_src_action_info &&
1624                                       hw_field == hw_src_action_info->hw_field))) {
1625                         /* Check if after gap insertion the total number of HW
1626                          * modify actions doesn't exceeds the limit
1627                          */
1628                         hw_idx++;
1629                         if ((num_sw_actions + hw_idx - i) >= max_hw_actions) {
1630                                 mlx5dr_dbg(dmn, "Modify header action number exceeds HW limit\n");
1631                                 return -EINVAL;
1632                         }
1633                 }
1634                 hw_field = hw_dst_action_info->hw_field;
1635
1636                 hw_actions[hw_idx] = hw_action;
1637                 hw_idx++;
1638         }
1639
1640         *num_hw_actions = hw_idx;
1641
1642         return 0;
1643 }
1644
1645 static int dr_action_create_modify_action(struct mlx5dr_domain *dmn,
1646                                           size_t actions_sz,
1647                                           __be64 actions[],
1648                                           struct mlx5dr_action *action)
1649 {
1650         struct mlx5dr_icm_chunk *chunk;
1651         u32 max_hw_actions;
1652         u32 num_hw_actions;
1653         u32 num_sw_actions;
1654         __be64 *hw_actions;
1655         bool modify_ttl;
1656         int ret;
1657
1658         num_sw_actions = actions_sz / DR_MODIFY_ACTION_SIZE;
1659         max_hw_actions = mlx5dr_icm_pool_chunk_size_to_entries(DR_CHUNK_SIZE_16);
1660
1661         if (num_sw_actions > max_hw_actions) {
1662                 mlx5dr_dbg(dmn, "Max number of actions %d exceeds limit %d\n",
1663                            num_sw_actions, max_hw_actions);
1664                 return -EINVAL;
1665         }
1666
1667         chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool, DR_CHUNK_SIZE_16);
1668         if (!chunk)
1669                 return -ENOMEM;
1670
1671         hw_actions = kcalloc(1, max_hw_actions * DR_MODIFY_ACTION_SIZE, GFP_KERNEL);
1672         if (!hw_actions) {
1673                 ret = -ENOMEM;
1674                 goto free_chunk;
1675         }
1676
1677         ret = dr_actions_convert_modify_header(action,
1678                                                max_hw_actions,
1679                                                num_sw_actions,
1680                                                actions,
1681                                                hw_actions,
1682                                                &num_hw_actions,
1683                                                &modify_ttl);
1684         if (ret)
1685                 goto free_hw_actions;
1686
1687         action->rewrite->chunk = chunk;
1688         action->rewrite->modify_ttl = modify_ttl;
1689         action->rewrite->data = (u8 *)hw_actions;
1690         action->rewrite->num_of_actions = num_hw_actions;
1691         action->rewrite->index = (chunk->icm_addr -
1692                                   dmn->info.caps.hdr_modify_icm_addr) /
1693                                   ACTION_CACHE_LINE_SIZE;
1694
1695         ret = mlx5dr_send_postsend_action(dmn, action);
1696         if (ret)
1697                 goto free_hw_actions;
1698
1699         return 0;
1700
1701 free_hw_actions:
1702         kfree(hw_actions);
1703 free_chunk:
1704         mlx5dr_icm_free_chunk(chunk);
1705         return ret;
1706 }
1707
1708 struct mlx5dr_action *
1709 mlx5dr_action_create_modify_header(struct mlx5dr_domain *dmn,
1710                                    u32 flags,
1711                                    size_t actions_sz,
1712                                    __be64 actions[])
1713 {
1714         struct mlx5dr_action *action;
1715         int ret = 0;
1716
1717         refcount_inc(&dmn->refcount);
1718
1719         if (actions_sz % DR_MODIFY_ACTION_SIZE) {
1720                 mlx5dr_dbg(dmn, "Invalid modify actions size provided\n");
1721                 goto dec_ref;
1722         }
1723
1724         action = dr_action_create_generic(DR_ACTION_TYP_MODIFY_HDR);
1725         if (!action)
1726                 goto dec_ref;
1727
1728         action->rewrite->dmn = dmn;
1729
1730         ret = dr_action_create_modify_action(dmn,
1731                                              actions_sz,
1732                                              actions,
1733                                              action);
1734         if (ret) {
1735                 mlx5dr_dbg(dmn, "Failed creating modify header action %d\n", ret);
1736                 goto free_action;
1737         }
1738
1739         return action;
1740
1741 free_action:
1742         kfree(action);
1743 dec_ref:
1744         refcount_dec(&dmn->refcount);
1745         return NULL;
1746 }
1747
1748 struct mlx5dr_action *
1749 mlx5dr_action_create_dest_vport(struct mlx5dr_domain *dmn,
1750                                 u16 vport, u8 vhca_id_valid,
1751                                 u16 vhca_id)
1752 {
1753         struct mlx5dr_cmd_vport_cap *vport_cap;
1754         struct mlx5dr_domain *vport_dmn;
1755         struct mlx5dr_action *action;
1756         u8 peer_vport;
1757
1758         peer_vport = vhca_id_valid && (vhca_id != dmn->info.caps.gvmi);
1759         vport_dmn = peer_vport ? dmn->peer_dmn : dmn;
1760         if (!vport_dmn) {
1761                 mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n");
1762                 return NULL;
1763         }
1764
1765         if (vport_dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
1766                 mlx5dr_dbg(dmn, "Domain doesn't support vport actions\n");
1767                 return NULL;
1768         }
1769
1770         vport_cap = mlx5dr_get_vport_cap(&vport_dmn->info.caps, vport);
1771         if (!vport_cap) {
1772                 mlx5dr_err(dmn,
1773                            "Failed to get vport 0x%x caps - vport is disabled or invalid\n",
1774                            vport);
1775                 return NULL;
1776         }
1777
1778         action = dr_action_create_generic(DR_ACTION_TYP_VPORT);
1779         if (!action)
1780                 return NULL;
1781
1782         action->vport->dmn = vport_dmn;
1783         action->vport->caps = vport_cap;
1784
1785         return action;
1786 }
1787
1788 int mlx5dr_action_destroy(struct mlx5dr_action *action)
1789 {
1790         if (refcount_read(&action->refcount) > 1)
1791                 return -EBUSY;
1792
1793         switch (action->action_type) {
1794         case DR_ACTION_TYP_FT:
1795                 if (action->dest_tbl->is_fw_tbl)
1796                         refcount_dec(&action->dest_tbl->fw_tbl.dmn->refcount);
1797                 else
1798                         refcount_dec(&action->dest_tbl->tbl->refcount);
1799
1800                 if (action->dest_tbl->is_fw_tbl &&
1801                     action->dest_tbl->fw_tbl.num_of_ref_actions) {
1802                         struct mlx5dr_action **ref_actions;
1803                         int i;
1804
1805                         ref_actions = action->dest_tbl->fw_tbl.ref_actions;
1806                         for (i = 0; i < action->dest_tbl->fw_tbl.num_of_ref_actions; i++)
1807                                 refcount_dec(&ref_actions[i]->refcount);
1808
1809                         kfree(ref_actions);
1810
1811                         mlx5dr_fw_destroy_md_tbl(action->dest_tbl->fw_tbl.dmn,
1812                                                  action->dest_tbl->fw_tbl.id,
1813                                                  action->dest_tbl->fw_tbl.group_id);
1814                 }
1815                 break;
1816         case DR_ACTION_TYP_TNL_L2_TO_L2:
1817         case DR_ACTION_TYP_REMOVE_HDR:
1818                 refcount_dec(&action->reformat->dmn->refcount);
1819                 break;
1820         case DR_ACTION_TYP_TNL_L3_TO_L2:
1821                 mlx5dr_icm_free_chunk(action->rewrite->chunk);
1822                 refcount_dec(&action->rewrite->dmn->refcount);
1823                 break;
1824         case DR_ACTION_TYP_L2_TO_TNL_L2:
1825         case DR_ACTION_TYP_L2_TO_TNL_L3:
1826         case DR_ACTION_TYP_INSERT_HDR:
1827                 mlx5dr_cmd_destroy_reformat_ctx((action->reformat->dmn)->mdev,
1828                                                 action->reformat->id);
1829                 refcount_dec(&action->reformat->dmn->refcount);
1830                 break;
1831         case DR_ACTION_TYP_MODIFY_HDR:
1832                 mlx5dr_icm_free_chunk(action->rewrite->chunk);
1833                 kfree(action->rewrite->data);
1834                 refcount_dec(&action->rewrite->dmn->refcount);
1835                 break;
1836         case DR_ACTION_TYP_SAMPLER:
1837                 refcount_dec(&action->sampler->dmn->refcount);
1838                 break;
1839         default:
1840                 break;
1841         }
1842
1843         kfree(action);
1844         return 0;
1845 }