drivers/net/ethernet/mellanox/mlx5/core/qp.c

   1 /*
   2  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/gfp.h>
  34 #include <linux/export.h>
  35 #include <linux/mlx5/cmd.h>
  36 #include <linux/mlx5/qp.h>
  37 #include <linux/mlx5/driver.h>
  38 #include <linux/mlx5/transobj.h>
  39
  40 #include "mlx5_core.h"
  41
  42 static struct mlx5_core_rsc_common *mlx5_get_rsc(struct mlx5_core_dev *dev,
  43                                                  u32 rsn)
  44 {
  45         struct mlx5_qp_table *table = &dev->priv.qp_table;
  46         struct mlx5_core_rsc_common *common;
  47
  48         spin_lock(&table->lock);
  49
  50         common = radix_tree_lookup(&table->tree, rsn);
  51         if (common)
  52                 atomic_inc(&common->refcount);
  53
  54         spin_unlock(&table->lock);
  55
  56         if (!common) {
  57                 mlx5_core_warn(dev, "Async event for bogus resource 0x%x\n",
  58                                rsn);
  59                 return NULL;
  60         }
  61         return common;
  62 }
  63
  64 void mlx5_core_put_rsc(struct mlx5_core_rsc_common *common)
  65 {
  66         if (atomic_dec_and_test(&common->refcount))
  67                 complete(&common->free);
  68 }
  69
  70 static u64 qp_allowed_event_types(void)
  71 {
  72         u64 mask;
  73
  74         mask = BIT(MLX5_EVENT_TYPE_PATH_MIG) |
  75                BIT(MLX5_EVENT_TYPE_COMM_EST) |
  76                BIT(MLX5_EVENT_TYPE_SQ_DRAINED) |
  77                BIT(MLX5_EVENT_TYPE_SRQ_LAST_WQE) |
  78                BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR) |
  79                BIT(MLX5_EVENT_TYPE_PATH_MIG_FAILED) |
  80                BIT(MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR) |
  81                BIT(MLX5_EVENT_TYPE_WQ_ACCESS_ERROR);
  82
  83         return mask;
  84 }
  85
  86 static u64 rq_allowed_event_types(void)
  87 {
  88         u64 mask;
  89
  90         mask = BIT(MLX5_EVENT_TYPE_SRQ_LAST_WQE) |
  91                BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR);
  92
  93         return mask;
  94 }
  95
  96 static u64 sq_allowed_event_types(void)
  97 {
  98         return BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR);
  99 }
 100
 101 static u64 dct_allowed_event_types(void)
 102 {
 103         return BIT(MLX5_EVENT_TYPE_DCT_DRAINED);
 104 }
 105
 106 static bool is_event_type_allowed(int rsc_type, int event_type)
 107 {
 108         switch (rsc_type) {
 109         case MLX5_EVENT_QUEUE_TYPE_QP:
 110                 return BIT(event_type) & qp_allowed_event_types();
 111         case MLX5_EVENT_QUEUE_TYPE_RQ:
 112                 return BIT(event_type) & rq_allowed_event_types();
 113         case MLX5_EVENT_QUEUE_TYPE_SQ:
 114                 return BIT(event_type) & sq_allowed_event_types();
 115         case MLX5_EVENT_QUEUE_TYPE_DCT:
 116                 return BIT(event_type) & dct_allowed_event_types();
 117         default:
 118                 WARN(1, "Event arrived for unknown resource type");
 119                 return false;
 120         }
 121 }
 122
 123 void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type)
 124 {
 125         struct mlx5_core_rsc_common *common = mlx5_get_rsc(dev, rsn);
 126         struct mlx5_core_dct *dct;
 127         struct mlx5_core_qp *qp;
 128
 129         if (!common)
 130                 return;
 131
 132         if (!is_event_type_allowed((rsn >> MLX5_USER_INDEX_LEN), event_type)) {
 133                 mlx5_core_warn(dev, "event 0x%.2x is not allowed on resource 0x%.8x\n",
 134                                event_type, rsn);
 135                 goto out;
 136         }
 137
 138         switch (common->res) {
 139         case MLX5_RES_QP:
 140         case MLX5_RES_RQ:
 141         case MLX5_RES_SQ:
 142                 qp = (struct mlx5_core_qp *)common;
 143                 qp->event(qp, event_type);
 144                 break;
 145         case MLX5_RES_DCT:
 146                 dct = (struct mlx5_core_dct *)common;
 147                 if (event_type == MLX5_EVENT_TYPE_DCT_DRAINED)
 148                         complete(&dct->drained);
 149                 break;
 150         default:
 151                 mlx5_core_warn(dev, "invalid resource type for 0x%x\n", rsn);
 152         }
 153 out:
 154         mlx5_core_put_rsc(common);
 155 }
 156
 157 static int create_resource_common(struct mlx5_core_dev *dev,
 158                                   struct mlx5_core_qp *qp,
 159                                   int rsc_type)
 160 {
 161         struct mlx5_qp_table *table = &dev->priv.qp_table;
 162         int err;
 163
 164         qp->common.res = rsc_type;
 165         spin_lock_irq(&table->lock);
 166         err = radix_tree_insert(&table->tree,
 167                                 qp->qpn | (rsc_type << MLX5_USER_INDEX_LEN),
 168                                 qp);
 169         spin_unlock_irq(&table->lock);
 170         if (err)
 171                 return err;
 172
 173         atomic_set(&qp->common.refcount, 1);
 174         init_completion(&qp->common.free);
 175         qp->pid = current->pid;
 176
 177         return 0;
 178 }
 179
 180 static void destroy_resource_common(struct mlx5_core_dev *dev,
 181                                     struct mlx5_core_qp *qp)
 182 {
 183         struct mlx5_qp_table *table = &dev->priv.qp_table;
 184         unsigned long flags;
 185
 186         spin_lock_irqsave(&table->lock, flags);
 187         radix_tree_delete(&table->tree,
 188                           qp->qpn | (qp->common.res << MLX5_USER_INDEX_LEN));
 189         spin_unlock_irqrestore(&table->lock, flags);
 190         mlx5_core_put_rsc((struct mlx5_core_rsc_common *)qp);
 191         wait_for_completion(&qp->common.free);
 192 }
 193
 194 int mlx5_core_create_dct(struct mlx5_core_dev *dev,
 195                          struct mlx5_core_dct *dct,
 196                          u32 *in, int inlen)
 197 {
 198         u32 out[MLX5_ST_SZ_DW(create_dct_out)]   = {0};
 199         u32 din[MLX5_ST_SZ_DW(destroy_dct_in)]   = {0};
 200         u32 dout[MLX5_ST_SZ_DW(destroy_dct_out)] = {0};
 201         struct mlx5_core_qp *qp = &dct->mqp;
 202         int err;
 203
 204         init_completion(&dct->drained);
 205         MLX5_SET(create_dct_in, in, opcode, MLX5_CMD_OP_CREATE_DCT);
 206
 207         err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out));
 208         if (err) {
 209                 mlx5_core_warn(dev, "create DCT failed, ret %d\n", err);
 210                 return err;
 211         }
 212
 213         qp->qpn = MLX5_GET(create_dct_out, out, dctn);
 214         qp->uid = MLX5_GET(create_dct_in, in, uid);
 215         err = create_resource_common(dev, qp, MLX5_RES_DCT);
 216         if (err)
 217                 goto err_cmd;
 218
 219         return 0;
 220 err_cmd:
 221         MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
 222         MLX5_SET(destroy_dct_in, din, dctn, qp->qpn);
 223         MLX5_SET(destroy_dct_in, din, uid, qp->uid);
 224         mlx5_cmd_exec(dev, (void *)&in, sizeof(din),
 225                       (void *)&out, sizeof(dout));
 226         return err;
 227 }
 228 EXPORT_SYMBOL_GPL(mlx5_core_create_dct);
 229
 230 int mlx5_core_create_qp(struct mlx5_core_dev *dev,
 231                         struct mlx5_core_qp *qp,
 232                         u32 *in, int inlen)
 233 {
 234         u32 out[MLX5_ST_SZ_DW(create_qp_out)] = {0};
 235         u32 dout[MLX5_ST_SZ_DW(destroy_qp_out)];
 236         u32 din[MLX5_ST_SZ_DW(destroy_qp_in)];
 237         int err;
 238
 239         MLX5_SET(create_qp_in, in, opcode, MLX5_CMD_OP_CREATE_QP);
 240
 241         err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
 242         if (err)
 243                 return err;
 244
 245         qp->uid = MLX5_GET(create_qp_in, in, uid);
 246         qp->qpn = MLX5_GET(create_qp_out, out, qpn);
 247         mlx5_core_dbg(dev, "qpn = 0x%x\n", qp->qpn);
 248
 249         err = create_resource_common(dev, qp, MLX5_RES_QP);
 250         if (err)
 251                 goto err_cmd;
 252
 253         err = mlx5_debug_qp_add(dev, qp);
 254         if (err)
 255                 mlx5_core_dbg(dev, "failed adding QP 0x%x to debug file system\n",
 256                               qp->qpn);
 257
 258         atomic_inc(&dev->num_qps);
 259
 260         return 0;
 261
 262 err_cmd:
 263         memset(din, 0, sizeof(din));
 264         memset(dout, 0, sizeof(dout));
 265         MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
 266         MLX5_SET(destroy_qp_in, din, qpn, qp->qpn);
 267         MLX5_SET(destroy_qp_in, din, uid, qp->uid);
 268         mlx5_cmd_exec(dev, din, sizeof(din), dout, sizeof(dout));
 269         return err;
 270 }
 271 EXPORT_SYMBOL_GPL(mlx5_core_create_qp);
 272
 273 static int mlx5_core_drain_dct(struct mlx5_core_dev *dev,
 274                                struct mlx5_core_dct *dct)
 275 {
 276         u32 out[MLX5_ST_SZ_DW(drain_dct_out)] = {0};
 277         u32 in[MLX5_ST_SZ_DW(drain_dct_in)]   = {0};
 278         struct mlx5_core_qp *qp = &dct->mqp;
 279
 280         MLX5_SET(drain_dct_in, in, opcode, MLX5_CMD_OP_DRAIN_DCT);
 281         MLX5_SET(drain_dct_in, in, dctn, qp->qpn);
 282         MLX5_SET(drain_dct_in, in, uid, qp->uid);
 283         return mlx5_cmd_exec(dev, (void *)&in, sizeof(in),
 284                              (void *)&out, sizeof(out));
 285 }
 286
 287 int mlx5_core_destroy_dct(struct mlx5_core_dev *dev,
 288                           struct mlx5_core_dct *dct)
 289 {
 290         u32 out[MLX5_ST_SZ_DW(destroy_dct_out)] = {0};
 291         u32 in[MLX5_ST_SZ_DW(destroy_dct_in)]   = {0};
 292         struct mlx5_core_qp *qp = &dct->mqp;
 293         int err;
 294
 295         err = mlx5_core_drain_dct(dev, dct);
 296         if (err) {
 297                 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
 298                         goto destroy;
 299                 } else {
 300                         mlx5_core_warn(dev, "failed drain DCT 0x%x with error 0x%x\n", qp->qpn, err);
 301                         return err;
 302                 }
 303         }
 304         wait_for_completion(&dct->drained);
 305 destroy:
 306         destroy_resource_common(dev, &dct->mqp);
 307         MLX5_SET(destroy_dct_in, in, opcode, MLX5_CMD_OP_DESTROY_DCT);
 308         MLX5_SET(destroy_dct_in, in, dctn, qp->qpn);
 309         MLX5_SET(destroy_dct_in, in, uid, qp->uid);
 310         err = mlx5_cmd_exec(dev, (void *)&in, sizeof(in),
 311                             (void *)&out, sizeof(out));
 312         return err;
 313 }
 314 EXPORT_SYMBOL_GPL(mlx5_core_destroy_dct);
 315
 316 int mlx5_core_destroy_qp(struct mlx5_core_dev *dev,
 317                          struct mlx5_core_qp *qp)
 318 {
 319         u32 out[MLX5_ST_SZ_DW(destroy_qp_out)] = {0};
 320         u32 in[MLX5_ST_SZ_DW(destroy_qp_in)]   = {0};
 321         int err;
 322
 323         mlx5_debug_qp_remove(dev, qp);
 324
 325         destroy_resource_common(dev, qp);
 326
 327         MLX5_SET(destroy_qp_in, in, opcode, MLX5_CMD_OP_DESTROY_QP);
 328         MLX5_SET(destroy_qp_in, in, qpn, qp->qpn);
 329         MLX5_SET(destroy_qp_in, in, uid, qp->uid);
 330         err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 331         if (err)
 332                 return err;
 333
 334         atomic_dec(&dev->num_qps);
 335         return 0;
 336 }
 337 EXPORT_SYMBOL_GPL(mlx5_core_destroy_qp);
 338
 339 int mlx5_core_set_delay_drop(struct mlx5_core_dev *dev,
 340                              u32 timeout_usec)
 341 {
 342         u32 out[MLX5_ST_SZ_DW(set_delay_drop_params_out)] = {0};
 343         u32 in[MLX5_ST_SZ_DW(set_delay_drop_params_in)]   = {0};
 344
 345         MLX5_SET(set_delay_drop_params_in, in, opcode,
 346                  MLX5_CMD_OP_SET_DELAY_DROP_PARAMS);
 347         MLX5_SET(set_delay_drop_params_in, in, delay_drop_timeout,
 348                  timeout_usec / 100);
 349         return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 350 }
 351 EXPORT_SYMBOL_GPL(mlx5_core_set_delay_drop);
 352
 353 struct mbox_info {
 354         u32 *in;
 355         u32 *out;
 356         int inlen;
 357         int outlen;
 358 };
 359
 360 static int mbox_alloc(struct mbox_info *mbox, int inlen, int outlen)
 361 {
 362         mbox->inlen  = inlen;
 363         mbox->outlen = outlen;
 364         mbox->in = kzalloc(mbox->inlen, GFP_KERNEL);
 365         mbox->out = kzalloc(mbox->outlen, GFP_KERNEL);
 366         if (!mbox->in || !mbox->out) {
 367                 kfree(mbox->in);
 368                 kfree(mbox->out);
 369                 return -ENOMEM;
 370         }
 371
 372         return 0;
 373 }
 374
 375 static void mbox_free(struct mbox_info *mbox)
 376 {
 377         kfree(mbox->in);
 378         kfree(mbox->out);
 379 }
 380
 381 static int modify_qp_mbox_alloc(struct mlx5_core_dev *dev, u16 opcode, int qpn,
 382                                 u32 opt_param_mask, void *qpc,
 383                                 struct mbox_info *mbox, u16 uid)
 384 {
 385         mbox->out = NULL;
 386         mbox->in = NULL;
 387
 388 #define MBOX_ALLOC(mbox, typ)  \
 389         mbox_alloc(mbox, MLX5_ST_SZ_BYTES(typ##_in), MLX5_ST_SZ_BYTES(typ##_out))
 390
 391 #define MOD_QP_IN_SET(typ, in, _opcode, _qpn, _uid)                            \
 392         do {                                                                   \
 393                 MLX5_SET(typ##_in, in, opcode, _opcode);                       \
 394                 MLX5_SET(typ##_in, in, qpn, _qpn);                             \
 395                 MLX5_SET(typ##_in, in, uid, _uid);                             \
 396         } while (0)
 397
 398 #define MOD_QP_IN_SET_QPC(typ, in, _opcode, _qpn, _opt_p, _qpc, _uid)          \
 399         do {                                                                   \
 400                 MOD_QP_IN_SET(typ, in, _opcode, _qpn, _uid);                   \
 401                 MLX5_SET(typ##_in, in, opt_param_mask, _opt_p);                \
 402                 memcpy(MLX5_ADDR_OF(typ##_in, in, qpc), _qpc,                  \
 403                        MLX5_ST_SZ_BYTES(qpc));                                 \
 404         } while (0)
 405
 406         switch (opcode) {
 407         /* 2RST & 2ERR */
 408         case MLX5_CMD_OP_2RST_QP:
 409                 if (MBOX_ALLOC(mbox, qp_2rst))
 410                         return -ENOMEM;
 411                 MOD_QP_IN_SET(qp_2rst, mbox->in, opcode, qpn, uid);
 412                 break;
 413         case MLX5_CMD_OP_2ERR_QP:
 414                 if (MBOX_ALLOC(mbox, qp_2err))
 415                         return -ENOMEM;
 416                 MOD_QP_IN_SET(qp_2err, mbox->in, opcode, qpn, uid);
 417                 break;
 418
 419         /* MODIFY with QPC */
 420         case MLX5_CMD_OP_RST2INIT_QP:
 421                 if (MBOX_ALLOC(mbox, rst2init_qp))
 422                         return -ENOMEM;
 423                 MOD_QP_IN_SET_QPC(rst2init_qp, mbox->in, opcode, qpn,
 424                                   opt_param_mask, qpc, uid);
 425                 break;
 426         case MLX5_CMD_OP_INIT2RTR_QP:
 427                 if (MBOX_ALLOC(mbox, init2rtr_qp))
 428                         return -ENOMEM;
 429                 MOD_QP_IN_SET_QPC(init2rtr_qp, mbox->in, opcode, qpn,
 430                                   opt_param_mask, qpc, uid);
 431                 break;
 432         case MLX5_CMD_OP_RTR2RTS_QP:
 433                 if (MBOX_ALLOC(mbox, rtr2rts_qp))
 434                         return -ENOMEM;
 435                 MOD_QP_IN_SET_QPC(rtr2rts_qp, mbox->in, opcode, qpn,
 436                                   opt_param_mask, qpc, uid);
 437                 break;
 438         case MLX5_CMD_OP_RTS2RTS_QP:
 439                 if (MBOX_ALLOC(mbox, rts2rts_qp))
 440                         return -ENOMEM;
 441                 MOD_QP_IN_SET_QPC(rts2rts_qp, mbox->in, opcode, qpn,
 442                                   opt_param_mask, qpc, uid);
 443                 break;
 444         case MLX5_CMD_OP_SQERR2RTS_QP:
 445                 if (MBOX_ALLOC(mbox, sqerr2rts_qp))
 446                         return -ENOMEM;
 447                 MOD_QP_IN_SET_QPC(sqerr2rts_qp, mbox->in, opcode, qpn,
 448                                   opt_param_mask, qpc, uid);
 449                 break;
 450         case MLX5_CMD_OP_INIT2INIT_QP:
 451                 if (MBOX_ALLOC(mbox, init2init_qp))
 452                         return -ENOMEM;
 453                 MOD_QP_IN_SET_QPC(init2init_qp, mbox->in, opcode, qpn,
 454                                   opt_param_mask, qpc, uid);
 455                 break;
 456         default:
 457                 mlx5_core_err(dev, "Unknown transition for modify QP: OP(0x%x) QPN(0x%x)\n",
 458                               opcode, qpn);
 459                 return -EINVAL;
 460         }
 461         return 0;
 462 }
 463
 464 int mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 opcode,
 465                         u32 opt_param_mask, void *qpc,
 466                         struct mlx5_core_qp *qp)
 467 {
 468         struct mbox_info mbox;
 469         int err;
 470
 471         err = modify_qp_mbox_alloc(dev, opcode, qp->qpn,
 472                                    opt_param_mask, qpc, &mbox, qp->uid);
 473         if (err)
 474                 return err;
 475
 476         err = mlx5_cmd_exec(dev, mbox.in, mbox.inlen, mbox.out, mbox.outlen);
 477         mbox_free(&mbox);
 478         return err;
 479 }
 480 EXPORT_SYMBOL_GPL(mlx5_core_qp_modify);
 481
 482 void mlx5_init_qp_table(struct mlx5_core_dev *dev)
 483 {
 484         struct mlx5_qp_table *table = &dev->priv.qp_table;
 485
 486         memset(table, 0, sizeof(*table));
 487         spin_lock_init(&table->lock);
 488         INIT_RADIX_TREE(&table->tree, GFP_ATOMIC);
 489         mlx5_qp_debugfs_init(dev);
 490 }
 491
 492 void mlx5_cleanup_qp_table(struct mlx5_core_dev *dev)
 493 {
 494         mlx5_qp_debugfs_cleanup(dev);
 495 }
 496
 497 int mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp,
 498                        u32 *out, int outlen)
 499 {
 500         u32 in[MLX5_ST_SZ_DW(query_qp_in)] = {0};
 501
 502         MLX5_SET(query_qp_in, in, opcode, MLX5_CMD_OP_QUERY_QP);
 503         MLX5_SET(query_qp_in, in, qpn, qp->qpn);
 504         return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
 505 }
 506 EXPORT_SYMBOL_GPL(mlx5_core_qp_query);
 507
 508 int mlx5_core_dct_query(struct mlx5_core_dev *dev, struct mlx5_core_dct *dct,
 509                         u32 *out, int outlen)
 510 {
 511         u32 in[MLX5_ST_SZ_DW(query_dct_in)] = {0};
 512         struct mlx5_core_qp *qp = &dct->mqp;
 513
 514         MLX5_SET(query_dct_in, in, opcode, MLX5_CMD_OP_QUERY_DCT);
 515         MLX5_SET(query_dct_in, in, dctn, qp->qpn);
 516
 517         return mlx5_cmd_exec(dev, (void *)&in, sizeof(in),
 518                              (void *)out, outlen);
 519 }
 520 EXPORT_SYMBOL_GPL(mlx5_core_dct_query);
 521
 522 int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn)
 523 {
 524         u32 out[MLX5_ST_SZ_DW(alloc_xrcd_out)] = {0};
 525         u32 in[MLX5_ST_SZ_DW(alloc_xrcd_in)]   = {0};
 526         int err;
 527
 528         MLX5_SET(alloc_xrcd_in, in, opcode, MLX5_CMD_OP_ALLOC_XRCD);
 529         err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 530         if (!err)
 531                 *xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd);
 532         return err;
 533 }
 534 EXPORT_SYMBOL_GPL(mlx5_core_xrcd_alloc);
 535
 536 int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn)
 537 {
 538         u32 out[MLX5_ST_SZ_DW(dealloc_xrcd_out)] = {0};
 539         u32 in[MLX5_ST_SZ_DW(dealloc_xrcd_in)]   = {0};
 540
 541         MLX5_SET(dealloc_xrcd_in, in, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
 542         MLX5_SET(dealloc_xrcd_in, in, xrcd, xrcdn);
 543         return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 544 }
 545 EXPORT_SYMBOL_GPL(mlx5_core_xrcd_dealloc);
 546
 547 static void destroy_rq_tracked(struct mlx5_core_dev *dev, u32 rqn, u16 uid)
 548 {
 549         u32 in[MLX5_ST_SZ_DW(destroy_rq_in)]   = {};
 550         u32 out[MLX5_ST_SZ_DW(destroy_rq_out)] = {};
 551
 552         MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ);
 553         MLX5_SET(destroy_rq_in, in, rqn, rqn);
 554         MLX5_SET(destroy_rq_in, in, uid, uid);
 555         mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 556 }
 557
 558 int mlx5_core_create_rq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
 559                                 struct mlx5_core_qp *rq)
 560 {
 561         int err;
 562         u32 rqn;
 563
 564         err = mlx5_core_create_rq(dev, in, inlen, &rqn);
 565         if (err)
 566                 return err;
 567
 568         rq->uid = MLX5_GET(create_rq_in, in, uid);
 569         rq->qpn = rqn;
 570         err = create_resource_common(dev, rq, MLX5_RES_RQ);
 571         if (err)
 572                 goto err_destroy_rq;
 573
 574         return 0;
 575
 576 err_destroy_rq:
 577         destroy_rq_tracked(dev, rq->qpn, rq->uid);
 578
 579         return err;
 580 }
 581 EXPORT_SYMBOL(mlx5_core_create_rq_tracked);
 582
 583 void mlx5_core_destroy_rq_tracked(struct mlx5_core_dev *dev,
 584                                   struct mlx5_core_qp *rq)
 585 {
 586         destroy_resource_common(dev, rq);
 587         destroy_rq_tracked(dev, rq->qpn, rq->uid);
 588 }
 589 EXPORT_SYMBOL(mlx5_core_destroy_rq_tracked);
 590
 591 static void destroy_sq_tracked(struct mlx5_core_dev *dev, u32 sqn, u16 uid)
 592 {
 593         u32 in[MLX5_ST_SZ_DW(destroy_sq_in)]   = {};
 594         u32 out[MLX5_ST_SZ_DW(destroy_sq_out)] = {};
 595
 596         MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ);
 597         MLX5_SET(destroy_sq_in, in, sqn, sqn);
 598         MLX5_SET(destroy_sq_in, in, uid, uid);
 599         mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 600 }
 601
 602 int mlx5_core_create_sq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
 603                                 struct mlx5_core_qp *sq)
 604 {
 605         int err;
 606         u32 sqn;
 607
 608         err = mlx5_core_create_sq(dev, in, inlen, &sqn);
 609         if (err)
 610                 return err;
 611
 612         sq->uid = MLX5_GET(create_sq_in, in, uid);
 613         sq->qpn = sqn;
 614         err = create_resource_common(dev, sq, MLX5_RES_SQ);
 615         if (err)
 616                 goto err_destroy_sq;
 617
 618         return 0;
 619
 620 err_destroy_sq:
 621         destroy_sq_tracked(dev, sq->qpn, sq->uid);
 622
 623         return err;
 624 }
 625 EXPORT_SYMBOL(mlx5_core_create_sq_tracked);
 626
 627 void mlx5_core_destroy_sq_tracked(struct mlx5_core_dev *dev,
 628                                   struct mlx5_core_qp *sq)
 629 {
 630         destroy_resource_common(dev, sq);
 631         destroy_sq_tracked(dev, sq->qpn, sq->uid);
 632 }
 633 EXPORT_SYMBOL(mlx5_core_destroy_sq_tracked);
 634
 635 int mlx5_core_alloc_q_counter(struct mlx5_core_dev *dev, u16 *counter_id)
 636 {
 637         u32 in[MLX5_ST_SZ_DW(alloc_q_counter_in)]   = {0};
 638         u32 out[MLX5_ST_SZ_DW(alloc_q_counter_out)] = {0};
 639         int err;
 640
 641         MLX5_SET(alloc_q_counter_in, in, opcode, MLX5_CMD_OP_ALLOC_Q_COUNTER);
 642         err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 643         if (!err)
 644                 *counter_id = MLX5_GET(alloc_q_counter_out, out,
 645                                        counter_set_id);
 646         return err;
 647 }
 648 EXPORT_SYMBOL_GPL(mlx5_core_alloc_q_counter);
 649
 650 int mlx5_core_dealloc_q_counter(struct mlx5_core_dev *dev, u16 counter_id)
 651 {
 652         u32 in[MLX5_ST_SZ_DW(dealloc_q_counter_in)]   = {0};
 653         u32 out[MLX5_ST_SZ_DW(dealloc_q_counter_out)] = {0};
 654
 655         MLX5_SET(dealloc_q_counter_in, in, opcode,
 656                  MLX5_CMD_OP_DEALLOC_Q_COUNTER);
 657         MLX5_SET(dealloc_q_counter_in, in, counter_set_id, counter_id);
 658         return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 659 }
 660 EXPORT_SYMBOL_GPL(mlx5_core_dealloc_q_counter);
 661
 662 int mlx5_core_query_q_counter(struct mlx5_core_dev *dev, u16 counter_id,
 663                               int reset, void *out, int out_size)
 664 {
 665         u32 in[MLX5_ST_SZ_DW(query_q_counter_in)] = {0};
 666
 667         MLX5_SET(query_q_counter_in, in, opcode, MLX5_CMD_OP_QUERY_Q_COUNTER);
 668         MLX5_SET(query_q_counter_in, in, clear, reset);
 669         MLX5_SET(query_q_counter_in, in, counter_set_id, counter_id);
 670         return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
 671 }
 672 EXPORT_SYMBOL_GPL(mlx5_core_query_q_counter);