1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
7 #include <linux/mlx5/driver.h>
9 #define MLX5_MAX_IRQ_NAME (32)
10 #define MLX5_IRQ_NAME_FORMAT_STR ("%s@pci:%s")
11 #define MLX5_MAX_IRQ_FORMATTED_NAME \
12 (MLX5_MAX_IRQ_NAME + sizeof(MLX5_IRQ_NAME_FORMAT_STR))
13 /* max irq_index is 2047, so four chars */
14 #define MLX5_MAX_IRQ_IDX_CHARS (4)
15 #define MLX5_EQ_REFS_PER_IRQ (2)
20 struct mlx5_irq_pool {
21 char name[MLX5_MAX_IRQ_NAME - MLX5_MAX_IRQ_IDX_CHARS];
22 struct xa_limit xa_num_irqs;
23 struct mutex lock; /* sync IRQs creations */
28 struct mlx5_core_dev *dev;
31 struct mlx5_irq_pool *mlx5_irq_pool_get(struct mlx5_core_dev *dev);
32 static inline bool mlx5_irq_pool_is_sf_pool(struct mlx5_irq_pool *pool)
34 return !strncmp("mlx5_sf", pool->name, strlen("mlx5_sf"));
37 struct mlx5_irq *mlx5_irq_alloc(struct mlx5_irq_pool *pool, int i,
38 struct irq_affinity_desc *af_desc,
39 struct cpu_rmap **rmap);
40 int mlx5_irq_get_locked(struct mlx5_irq *irq);
41 int mlx5_irq_read_locked(struct mlx5_irq *irq);
42 int mlx5_irq_put(struct mlx5_irq *irq);
44 #endif /* __PCI_IRQ_H__ */