2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/kernel.h>
34 #include <linux/random.h>
35 #include <linux/vmalloc.h>
36 #include <linux/hardirq.h>
37 #include <linux/mlx5/driver.h>
38 #include <linux/kern_levels.h>
39 #include "mlx5_core.h"
42 #include "lib/events.h"
43 #include "lib/pci_vsc.h"
45 #include "diag/fw_tracer.h"
46 #include "diag/reporter_vnic.h"
53 MLX5_DROP_HEALTH_WORK,
57 MLX5_SENSOR_NO_ERR = 0,
58 MLX5_SENSOR_PCI_COMM_ERR = 1,
59 MLX5_SENSOR_PCI_ERR = 2,
60 MLX5_SENSOR_NIC_DISABLED = 3,
61 MLX5_SENSOR_NIC_SW_RESET = 4,
62 MLX5_SENSOR_FW_SYND_RFR = 5,
66 MLX5_SEVERITY_MASK = 0x7,
67 MLX5_SEVERITY_VALID_MASK = 0x8,
70 u8 mlx5_get_nic_state(struct mlx5_core_dev *dev)
72 return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7;
75 void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state)
77 u32 cur_cmdq_addr_l_sz;
79 cur_cmdq_addr_l_sz = ioread32be(&dev->iseg->cmdq_addr_l_sz);
80 iowrite32be((cur_cmdq_addr_l_sz & 0xFFFFF000) |
81 state << MLX5_NIC_IFC_OFFSET,
82 &dev->iseg->cmdq_addr_l_sz);
85 static bool sensor_pci_not_working(struct mlx5_core_dev *dev)
87 struct mlx5_core_health *health = &dev->priv.health;
88 struct health_buffer __iomem *h = health->health;
90 /* Offline PCI reads return 0xffffffff */
91 return (ioread32be(&h->fw_ver) == 0xffffffff);
94 static int mlx5_health_get_rfr(u8 rfr_severity)
96 return rfr_severity >> MLX5_RFR_BIT_OFFSET;
99 static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev)
101 struct mlx5_core_health *health = &dev->priv.health;
102 struct health_buffer __iomem *h = health->health;
103 u8 synd = ioread8(&h->synd);
106 rfr = mlx5_health_get_rfr(ioread8(&h->rfr_severity));
109 mlx5_core_dbg(dev, "FW requests reset, synd: %d\n", synd);
113 u32 mlx5_health_check_fatal_sensors(struct mlx5_core_dev *dev)
115 if (sensor_pci_not_working(dev))
116 return MLX5_SENSOR_PCI_COMM_ERR;
117 if (pci_channel_offline(dev->pdev))
118 return MLX5_SENSOR_PCI_ERR;
119 if (mlx5_get_nic_state(dev) == MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED)
120 return MLX5_SENSOR_NIC_DISABLED;
121 if (mlx5_get_nic_state(dev) == MLX5_INITIAL_SEG_NIC_INTERFACE_SW_RESET)
122 return MLX5_SENSOR_NIC_SW_RESET;
123 if (sensor_fw_synd_rfr(dev))
124 return MLX5_SENSOR_FW_SYND_RFR;
126 return MLX5_SENSOR_NO_ERR;
129 static int lock_sem_sw_reset(struct mlx5_core_dev *dev, bool lock)
131 enum mlx5_vsc_state state;
134 if (!mlx5_core_is_pf(dev))
137 /* Try to lock GW access, this stage doesn't return
138 * EBUSY because locked GW does not mean that other PF
139 * already started the reset.
141 ret = mlx5_vsc_gw_lock(dev);
147 state = lock ? MLX5_VSC_LOCK : MLX5_VSC_UNLOCK;
148 /* At this stage, if the return status == EBUSY, then we know
149 * for sure that another PF started the reset, so don't allow
152 ret = mlx5_vsc_sem_set_space(dev, MLX5_SEMAPHORE_SW_RESET, state);
154 mlx5_core_warn(dev, "Failed to lock SW reset semaphore\n");
156 /* Unlock GW access */
157 mlx5_vsc_gw_unlock(dev);
162 static bool reset_fw_if_needed(struct mlx5_core_dev *dev)
164 bool supported = (ioread32be(&dev->iseg->initializing) >>
165 MLX5_FW_RESET_SUPPORTED_OFFSET) & 1;
171 /* The reset only needs to be issued by one PF. The health buffer is
172 * shared between all functions, and will be cleared during a reset.
173 * Check again to avoid a redundant 2nd reset. If the fatal errors was
174 * PCI related a reset won't help.
176 fatal_error = mlx5_health_check_fatal_sensors(dev);
177 if (fatal_error == MLX5_SENSOR_PCI_COMM_ERR ||
178 fatal_error == MLX5_SENSOR_NIC_DISABLED ||
179 fatal_error == MLX5_SENSOR_NIC_SW_RESET) {
180 mlx5_core_warn(dev, "Not issuing FW reset. Either it's already done or won't help.");
184 mlx5_core_warn(dev, "Issuing FW Reset\n");
185 /* Write the NIC interface field to initiate the reset, the command
186 * interface address also resides here, don't overwrite it.
188 mlx5_set_nic_state(dev, MLX5_INITIAL_SEG_NIC_INTERFACE_SW_RESET);
193 static void enter_error_state(struct mlx5_core_dev *dev, bool force)
195 if (mlx5_health_check_fatal_sensors(dev) || force) { /* protected state setting */
196 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
200 mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_SYS_ERROR, (void *)1);
203 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
205 bool err_detected = false;
207 /* Mark the device as fatal in order to abort FW commands */
208 if ((mlx5_health_check_fatal_sensors(dev) || force) &&
209 dev->state == MLX5_DEVICE_STATE_UP) {
210 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
213 mutex_lock(&dev->intf_state_mutex);
214 if (!err_detected && dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
215 goto unlock;/* a previous error is still being handled */
217 enter_error_state(dev, force);
219 mutex_unlock(&dev->intf_state_mutex);
222 void mlx5_error_sw_reset(struct mlx5_core_dev *dev)
224 unsigned long end, delay_ms = mlx5_tout_ms(dev, PCI_TOGGLE);
227 mutex_lock(&dev->intf_state_mutex);
228 if (dev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR)
231 mlx5_core_err(dev, "start\n");
233 if (mlx5_health_check_fatal_sensors(dev) == MLX5_SENSOR_FW_SYND_RFR) {
234 /* Get cr-dump and reset FW semaphore */
235 lock = lock_sem_sw_reset(dev, true);
237 if (lock == -EBUSY) {
238 delay_ms = mlx5_tout_ms(dev, FULL_CRDUMP);
239 goto recover_from_sw_reset;
241 /* Execute SW reset */
242 reset_fw_if_needed(dev);
245 recover_from_sw_reset:
246 /* Recover from SW reset */
247 end = jiffies + msecs_to_jiffies(delay_ms);
249 if (mlx5_get_nic_state(dev) == MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED)
253 } while (!time_after(jiffies, end));
255 if (mlx5_get_nic_state(dev) != MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED) {
256 dev_err(&dev->pdev->dev, "NIC IFC still %d after %lums.\n",
257 mlx5_get_nic_state(dev), delay_ms);
260 /* Release FW semaphore if you are the lock owner */
262 lock_sem_sw_reset(dev, false);
264 mlx5_core_err(dev, "end\n");
267 mutex_unlock(&dev->intf_state_mutex);
270 static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
272 u8 nic_interface = mlx5_get_nic_state(dev);
274 switch (nic_interface) {
275 case MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER:
276 mlx5_core_warn(dev, "Expected to see disabled NIC but it is full driver\n");
279 case MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED:
280 mlx5_core_warn(dev, "starting teardown\n");
283 case MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC:
284 mlx5_core_warn(dev, "Expected to see disabled NIC but it is no dram nic\n");
287 case MLX5_INITIAL_SEG_NIC_INTERFACE_SW_RESET:
288 /* The IFC mode field is 3 bits, so it will read 0x7 in 2 cases:
289 * 1. PCI has been disabled (ie. PCI-AER, PF driver unloaded
290 * and this is a VF), this is not recoverable by SW reset.
291 * Logging of this is handled elsewhere.
292 * 2. FW reset has been issued by another function, driver can
293 * be reloaded to recover after the mode switches to
294 * MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED.
296 if (dev->priv.health.fatal_error != MLX5_SENSOR_PCI_COMM_ERR)
297 mlx5_core_warn(dev, "NIC SW reset in progress\n");
301 mlx5_core_warn(dev, "Expected to see disabled NIC but it is has invalid value %d\n",
305 mlx5_disable_device(dev);
308 int mlx5_health_wait_pci_up(struct mlx5_core_dev *dev)
312 end = jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, FW_RESET));
313 while (sensor_pci_not_working(dev)) {
314 if (time_after(jiffies, end))
316 if (test_bit(MLX5_BREAK_FW_WAIT, &dev->intf_state)) {
317 mlx5_core_warn(dev, "device is being removed, stop waiting for PCI\n");
325 static int mlx5_health_try_recover(struct mlx5_core_dev *dev)
327 mlx5_core_warn(dev, "handling bad device here\n");
328 mlx5_handle_bad_state(dev);
329 if (mlx5_health_wait_pci_up(dev)) {
330 mlx5_core_err(dev, "health recovery flow aborted, PCI reads still not working\n");
333 mlx5_core_err(dev, "starting health recovery flow\n");
334 if (mlx5_recover_device(dev) || mlx5_health_check_fatal_sensors(dev)) {
335 mlx5_core_err(dev, "health recovery failed\n");
339 mlx5_core_info(dev, "health recovery succeeded\n");
343 static const char *hsynd_str(u8 synd)
346 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR:
347 return "firmware internal error";
348 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC:
349 return "irisc not responding";
350 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR:
351 return "unrecoverable hardware error";
352 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR:
353 return "firmware CRC error";
354 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR:
355 return "ICM fetch PCI error";
356 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR:
357 return "HW fatal error\n";
358 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN:
359 return "async EQ buffer overrun";
360 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR:
362 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV:
363 return "Invalid EQ referenced";
364 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR:
365 return "FFSER error";
366 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR:
367 return "High temperature";
368 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PCI_POISONED_ERR:
369 return "ICM fetch PCI data poisoned error";
371 return "unrecognized error";
375 static const char *mlx5_loglevel_str(int level)
386 case LOGLEVEL_WARNING:
388 case LOGLEVEL_NOTICE:
395 return "Unknown log level";
398 static int mlx5_health_get_severity(u8 rfr_severity)
400 return rfr_severity & MLX5_SEVERITY_VALID_MASK ?
401 rfr_severity & MLX5_SEVERITY_MASK : LOGLEVEL_ERR;
404 static void print_health_info(struct mlx5_core_dev *dev)
406 struct mlx5_core_health *health = &dev->priv.health;
407 struct health_buffer __iomem *h = health->health;
412 /* If the syndrome is 0, the device is OK and no need to print buffer */
413 if (!ioread8(&h->synd))
416 if (ioread32be(&h->fw_ver) == 0xFFFFFFFF) {
417 mlx5_log(dev, LOGLEVEL_ERR, "PCI slot is unavailable\n");
421 rfr_severity = ioread8(&h->rfr_severity);
422 severity = mlx5_health_get_severity(rfr_severity);
423 mlx5_log(dev, severity, "Health issue observed, %s, severity(%d) %s:\n",
424 hsynd_str(ioread8(&h->synd)), severity, mlx5_loglevel_str(severity));
426 for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
427 mlx5_log(dev, severity, "assert_var[%d] 0x%08x\n", i,
428 ioread32be(h->assert_var + i));
430 mlx5_log(dev, severity, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
431 mlx5_log(dev, severity, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
432 mlx5_log(dev, severity, "fw_ver %d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev),
434 mlx5_log(dev, severity, "time %u\n", ioread32be(&h->time));
435 mlx5_log(dev, severity, "hw_id 0x%08x\n", ioread32be(&h->hw_id));
436 mlx5_log(dev, severity, "rfr %d\n", mlx5_health_get_rfr(rfr_severity));
437 mlx5_log(dev, severity, "severity %d (%s)\n", severity, mlx5_loglevel_str(severity));
438 mlx5_log(dev, severity, "irisc_index %d\n", ioread8(&h->irisc_index));
439 mlx5_log(dev, severity, "synd 0x%x: %s\n", ioread8(&h->synd),
440 hsynd_str(ioread8(&h->synd)));
441 mlx5_log(dev, severity, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
442 mlx5_log(dev, severity, "raw fw_ver 0x%08x\n", ioread32be(&h->fw_ver));
446 mlx5_fw_reporter_diagnose(struct devlink_health_reporter *reporter,
447 struct devlink_fmsg *fmsg,
448 struct netlink_ext_ack *extack)
450 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter);
451 struct mlx5_core_health *health = &dev->priv.health;
452 struct health_buffer __iomem *h = health->health;
453 u8 synd = ioread8(&h->synd);
455 devlink_fmsg_u8_pair_put(fmsg, "Syndrome", synd);
459 devlink_fmsg_string_pair_put(fmsg, "Description", hsynd_str(synd));
464 struct mlx5_fw_reporter_ctx {
470 mlx5_fw_reporter_ctx_pairs_put(struct devlink_fmsg *fmsg,
471 struct mlx5_fw_reporter_ctx *fw_reporter_ctx)
473 devlink_fmsg_u8_pair_put(fmsg, "syndrome", fw_reporter_ctx->err_synd);
474 devlink_fmsg_u32_pair_put(fmsg, "fw_miss_counter", fw_reporter_ctx->miss_counter);
478 mlx5_fw_reporter_heath_buffer_data_put(struct mlx5_core_dev *dev,
479 struct devlink_fmsg *fmsg)
481 struct mlx5_core_health *health = &dev->priv.health;
482 struct health_buffer __iomem *h = health->health;
486 if (!ioread8(&h->synd))
489 devlink_fmsg_pair_nest_start(fmsg, "health buffer");
490 devlink_fmsg_obj_nest_start(fmsg);
491 devlink_fmsg_arr_pair_nest_start(fmsg, "assert_var");
492 for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
493 devlink_fmsg_u32_put(fmsg, ioread32be(h->assert_var + i));
494 devlink_fmsg_arr_pair_nest_end(fmsg);
495 devlink_fmsg_u32_pair_put(fmsg, "assert_exit_ptr",
496 ioread32be(&h->assert_exit_ptr));
497 devlink_fmsg_u32_pair_put(fmsg, "assert_callra",
498 ioread32be(&h->assert_callra));
499 devlink_fmsg_u32_pair_put(fmsg, "time", ioread32be(&h->time));
500 devlink_fmsg_u32_pair_put(fmsg, "hw_id", ioread32be(&h->hw_id));
501 rfr_severity = ioread8(&h->rfr_severity);
502 devlink_fmsg_u8_pair_put(fmsg, "rfr", mlx5_health_get_rfr(rfr_severity));
503 devlink_fmsg_u8_pair_put(fmsg, "severity", mlx5_health_get_severity(rfr_severity));
504 devlink_fmsg_u8_pair_put(fmsg, "irisc_index", ioread8(&h->irisc_index));
505 devlink_fmsg_u8_pair_put(fmsg, "synd", ioread8(&h->synd));
506 devlink_fmsg_u32_pair_put(fmsg, "ext_synd", ioread16be(&h->ext_synd));
507 devlink_fmsg_u32_pair_put(fmsg, "raw_fw_ver", ioread32be(&h->fw_ver));
508 devlink_fmsg_obj_nest_end(fmsg);
509 devlink_fmsg_pair_nest_end(fmsg);
513 mlx5_fw_reporter_dump(struct devlink_health_reporter *reporter,
514 struct devlink_fmsg *fmsg, void *priv_ctx,
515 struct netlink_ext_ack *extack)
517 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter);
520 err = mlx5_fw_tracer_trigger_core_dump_general(dev);
525 struct mlx5_fw_reporter_ctx *fw_reporter_ctx = priv_ctx;
527 mlx5_fw_reporter_ctx_pairs_put(fmsg, fw_reporter_ctx);
530 mlx5_fw_reporter_heath_buffer_data_put(dev, fmsg);
532 return mlx5_fw_tracer_get_saved_traces_objects(dev->tracer, fmsg);
535 static void mlx5_fw_reporter_err_work(struct work_struct *work)
537 struct mlx5_fw_reporter_ctx fw_reporter_ctx;
538 struct mlx5_core_health *health;
540 health = container_of(work, struct mlx5_core_health, report_work);
542 if (IS_ERR_OR_NULL(health->fw_reporter))
545 fw_reporter_ctx.err_synd = health->synd;
546 fw_reporter_ctx.miss_counter = health->miss_counter;
547 if (fw_reporter_ctx.err_synd) {
548 devlink_health_report(health->fw_reporter,
549 "FW syndrome reported", &fw_reporter_ctx);
552 if (fw_reporter_ctx.miss_counter)
553 devlink_health_report(health->fw_reporter,
554 "FW miss counter reported",
558 static const struct devlink_health_reporter_ops mlx5_fw_reporter_pf_ops = {
560 .diagnose = mlx5_fw_reporter_diagnose,
561 .dump = mlx5_fw_reporter_dump,
564 static const struct devlink_health_reporter_ops mlx5_fw_reporter_ops = {
566 .diagnose = mlx5_fw_reporter_diagnose,
570 mlx5_fw_fatal_reporter_recover(struct devlink_health_reporter *reporter,
572 struct netlink_ext_ack *extack)
574 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter);
576 return mlx5_health_try_recover(dev);
580 mlx5_fw_fatal_reporter_dump(struct devlink_health_reporter *reporter,
581 struct devlink_fmsg *fmsg, void *priv_ctx,
582 struct netlink_ext_ack *extack)
584 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter);
585 u32 crdump_size = dev->priv.health.crdump_size;
589 if (!mlx5_core_is_pf(dev))
592 cr_data = kvmalloc(crdump_size, GFP_KERNEL);
595 err = mlx5_crdump_collect(dev, cr_data);
600 struct mlx5_fw_reporter_ctx *fw_reporter_ctx = priv_ctx;
602 mlx5_fw_reporter_ctx_pairs_put(fmsg, fw_reporter_ctx);
605 devlink_fmsg_binary_pair_put(fmsg, "crdump_data", cr_data, crdump_size);
612 static void mlx5_fw_fatal_reporter_err_work(struct work_struct *work)
614 struct mlx5_fw_reporter_ctx fw_reporter_ctx;
615 struct mlx5_core_health *health;
616 struct mlx5_core_dev *dev;
617 struct devlink *devlink;
618 struct mlx5_priv *priv;
620 health = container_of(work, struct mlx5_core_health, fatal_report_work);
621 priv = container_of(health, struct mlx5_priv, health);
622 dev = container_of(priv, struct mlx5_core_dev, priv);
623 devlink = priv_to_devlink(dev);
625 mutex_lock(&dev->intf_state_mutex);
626 if (test_bit(MLX5_DROP_HEALTH_WORK, &health->flags)) {
627 mlx5_core_err(dev, "health works are not permitted at this stage\n");
628 mutex_unlock(&dev->intf_state_mutex);
631 mutex_unlock(&dev->intf_state_mutex);
632 enter_error_state(dev, false);
633 if (IS_ERR_OR_NULL(health->fw_fatal_reporter)) {
635 if (mlx5_health_try_recover(dev))
636 mlx5_core_err(dev, "health recovery failed\n");
637 devl_unlock(devlink);
640 fw_reporter_ctx.err_synd = health->synd;
641 fw_reporter_ctx.miss_counter = health->miss_counter;
642 if (devlink_health_report(health->fw_fatal_reporter,
643 "FW fatal error reported", &fw_reporter_ctx) == -ECANCELED) {
644 /* If recovery wasn't performed, due to grace period,
645 * unload the driver. This ensures that the driver
646 * closes all its resources and it is not subjected to
647 * requests from the kernel.
649 mlx5_core_err(dev, "Driver is in error state. Unloading\n");
650 mlx5_unload_one(dev, false);
654 static const struct devlink_health_reporter_ops mlx5_fw_fatal_reporter_pf_ops = {
656 .recover = mlx5_fw_fatal_reporter_recover,
657 .dump = mlx5_fw_fatal_reporter_dump,
660 static const struct devlink_health_reporter_ops mlx5_fw_fatal_reporter_ops = {
662 .recover = mlx5_fw_fatal_reporter_recover,
665 #define MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD 180000
666 #define MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD 60000
667 #define MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD 30000
668 #define MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD
670 void mlx5_fw_reporters_create(struct mlx5_core_dev *dev)
672 const struct devlink_health_reporter_ops *fw_fatal_ops;
673 struct mlx5_core_health *health = &dev->priv.health;
674 const struct devlink_health_reporter_ops *fw_ops;
675 struct devlink *devlink = priv_to_devlink(dev);
678 fw_fatal_ops = &mlx5_fw_fatal_reporter_pf_ops;
679 fw_ops = &mlx5_fw_reporter_pf_ops;
680 if (mlx5_core_is_ecpf(dev)) {
681 grace_period = MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD;
682 } else if (mlx5_core_is_pf(dev)) {
683 grace_period = MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD;
686 grace_period = MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD;
687 fw_fatal_ops = &mlx5_fw_fatal_reporter_ops;
688 fw_ops = &mlx5_fw_reporter_ops;
691 health->fw_reporter =
692 devl_health_reporter_create(devlink, fw_ops, 0, dev);
693 if (IS_ERR(health->fw_reporter))
694 mlx5_core_warn(dev, "Failed to create fw reporter, err = %ld\n",
695 PTR_ERR(health->fw_reporter));
697 health->fw_fatal_reporter =
698 devl_health_reporter_create(devlink,
702 if (IS_ERR(health->fw_fatal_reporter))
703 mlx5_core_warn(dev, "Failed to create fw fatal reporter, err = %ld\n",
704 PTR_ERR(health->fw_fatal_reporter));
707 static void mlx5_fw_reporters_destroy(struct mlx5_core_dev *dev)
709 struct mlx5_core_health *health = &dev->priv.health;
711 if (!IS_ERR_OR_NULL(health->fw_reporter))
712 devlink_health_reporter_destroy(health->fw_reporter);
714 if (!IS_ERR_OR_NULL(health->fw_fatal_reporter))
715 devlink_health_reporter_destroy(health->fw_fatal_reporter);
718 static unsigned long get_next_poll_jiffies(struct mlx5_core_dev *dev)
722 get_random_bytes(&next, sizeof(next));
724 next += jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, HEALTH_POLL_INTERVAL));
729 void mlx5_trigger_health_work(struct mlx5_core_dev *dev)
731 struct mlx5_core_health *health = &dev->priv.health;
733 if (!mlx5_dev_is_lightweight(dev))
734 queue_work(health->wq, &health->fatal_report_work);
737 #define MLX5_MSEC_PER_HOUR (MSEC_PER_SEC * 60 * 60)
738 static void mlx5_health_log_ts_update(struct work_struct *work)
740 struct delayed_work *dwork = to_delayed_work(work);
741 u32 out[MLX5_ST_SZ_DW(mrtc_reg)] = {};
742 u32 in[MLX5_ST_SZ_DW(mrtc_reg)] = {};
743 struct mlx5_core_health *health;
744 struct mlx5_core_dev *dev;
745 struct mlx5_priv *priv;
748 health = container_of(dwork, struct mlx5_core_health, update_fw_log_ts_work);
749 priv = container_of(health, struct mlx5_priv, health);
750 dev = container_of(priv, struct mlx5_core_dev, priv);
752 now_us = ktime_to_us(ktime_get_real());
754 MLX5_SET(mrtc_reg, in, time_h, now_us >> 32);
755 MLX5_SET(mrtc_reg, in, time_l, now_us & 0xFFFFFFFF);
756 mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out), MLX5_REG_MRTC, 0, 1);
758 queue_delayed_work(health->wq, &health->update_fw_log_ts_work,
759 msecs_to_jiffies(MLX5_MSEC_PER_HOUR));
762 static void poll_health(struct timer_list *t)
764 struct mlx5_core_dev *dev = from_timer(dev, t, priv.health.timer);
765 struct mlx5_core_health *health = &dev->priv.health;
766 struct health_buffer __iomem *h = health->health;
771 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
774 fatal_error = mlx5_health_check_fatal_sensors(dev);
776 if (fatal_error && !health->fatal_error) {
777 mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error);
778 dev->priv.health.fatal_error = fatal_error;
779 print_health_info(dev);
780 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
781 mlx5_trigger_health_work(dev);
785 count = ioread32be(health->health_counter);
786 if (count == health->prev)
787 ++health->miss_counter;
789 health->miss_counter = 0;
791 health->prev = count;
792 if (health->miss_counter == MAX_MISSES) {
793 mlx5_core_err(dev, "device's health compromised - reached miss count\n");
794 print_health_info(dev);
795 queue_work(health->wq, &health->report_work);
798 prev_synd = health->synd;
799 health->synd = ioread8(&h->synd);
800 if (health->synd && health->synd != prev_synd)
801 queue_work(health->wq, &health->report_work);
804 mod_timer(&health->timer, get_next_poll_jiffies(dev));
807 void mlx5_start_health_poll(struct mlx5_core_dev *dev)
809 u64 poll_interval_ms = mlx5_tout_ms(dev, HEALTH_POLL_INTERVAL);
810 struct mlx5_core_health *health = &dev->priv.health;
812 timer_setup(&health->timer, poll_health, 0);
813 health->fatal_error = MLX5_SENSOR_NO_ERR;
814 clear_bit(MLX5_DROP_HEALTH_WORK, &health->flags);
815 health->health = &dev->iseg->health;
816 health->health_counter = &dev->iseg->health_counter;
818 health->timer.expires = jiffies + msecs_to_jiffies(poll_interval_ms);
819 add_timer(&health->timer);
822 void mlx5_stop_health_poll(struct mlx5_core_dev *dev, bool disable_health)
824 struct mlx5_core_health *health = &dev->priv.health;
827 set_bit(MLX5_DROP_HEALTH_WORK, &health->flags);
829 del_timer_sync(&health->timer);
832 void mlx5_start_health_fw_log_up(struct mlx5_core_dev *dev)
834 struct mlx5_core_health *health = &dev->priv.health;
836 if (mlx5_core_is_pf(dev) && MLX5_CAP_MCAM_REG(dev, mrtc))
837 queue_delayed_work(health->wq, &health->update_fw_log_ts_work, 0);
840 void mlx5_drain_health_wq(struct mlx5_core_dev *dev)
842 struct mlx5_core_health *health = &dev->priv.health;
844 set_bit(MLX5_DROP_HEALTH_WORK, &health->flags);
845 cancel_delayed_work_sync(&health->update_fw_log_ts_work);
846 cancel_work_sync(&health->report_work);
847 cancel_work_sync(&health->fatal_report_work);
850 void mlx5_health_cleanup(struct mlx5_core_dev *dev)
852 struct mlx5_core_health *health = &dev->priv.health;
854 cancel_delayed_work_sync(&health->update_fw_log_ts_work);
855 destroy_workqueue(health->wq);
856 mlx5_reporter_vnic_destroy(dev);
857 mlx5_fw_reporters_destroy(dev);
860 int mlx5_health_init(struct mlx5_core_dev *dev)
862 struct devlink *devlink = priv_to_devlink(dev);
863 struct mlx5_core_health *health;
866 if (!mlx5_dev_is_lightweight(dev)) {
868 mlx5_fw_reporters_create(dev);
869 devl_unlock(devlink);
871 mlx5_reporter_vnic_create(dev);
873 health = &dev->priv.health;
874 name = kmalloc(64, GFP_KERNEL);
878 strcpy(name, "mlx5_health");
879 strcat(name, dev_name(dev->device));
880 health->wq = create_singlethread_workqueue(name);
884 INIT_WORK(&health->fatal_report_work, mlx5_fw_fatal_reporter_err_work);
885 INIT_WORK(&health->report_work, mlx5_fw_reporter_err_work);
886 INIT_DELAYED_WORK(&health->update_fw_log_ts_work, mlx5_health_log_ts_update);
891 mlx5_reporter_vnic_destroy(dev);
892 mlx5_fw_reporters_destroy(dev);