2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
55 struct mlx5_nic_flow_attr {
62 MLX5E_TC_FLOW_ESWITCH = BIT(0),
63 MLX5E_TC_FLOW_NIC = BIT(1),
64 MLX5E_TC_FLOW_OFFLOADED = BIT(2),
67 struct mlx5e_tc_flow {
68 struct rhash_head node;
71 struct mlx5_flow_handle *rule;
72 struct list_head encap; /* flows sharing the same encap ID */
73 struct list_head mod_hdr; /* flows sharing the same mod hdr ID */
75 struct mlx5_esw_flow_attr esw_attr[0];
76 struct mlx5_nic_flow_attr nic_attr[0];
80 struct mlx5e_tc_flow_parse_attr {
81 struct mlx5_flow_spec spec;
82 int num_mod_hdr_actions;
83 void *mod_hdr_actions;
87 MLX5_HEADER_TYPE_VXLAN = 0x0,
88 MLX5_HEADER_TYPE_NVGRE = 0x1,
91 #define MLX5E_TC_TABLE_NUM_ENTRIES 1024
92 #define MLX5E_TC_TABLE_NUM_GROUPS 4
99 struct mlx5e_mod_hdr_entry {
100 /* a node of a hash table which keeps all the mod_hdr entries */
101 struct hlist_node mod_hdr_hlist;
103 /* flows sharing the same mod_hdr entry */
104 struct list_head flows;
106 struct mod_hdr_key key;
111 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
113 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
115 return jhash(key->actions,
116 key->num_actions * MLX5_MH_ACT_SZ, 0);
119 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
120 struct mod_hdr_key *b)
122 if (a->num_actions != b->num_actions)
125 return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
128 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
129 struct mlx5e_tc_flow *flow,
130 struct mlx5e_tc_flow_parse_attr *parse_attr)
132 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
133 int num_actions, actions_size, namespace, err;
134 struct mlx5e_mod_hdr_entry *mh;
135 struct mod_hdr_key key;
139 num_actions = parse_attr->num_mod_hdr_actions;
140 actions_size = MLX5_MH_ACT_SZ * num_actions;
142 key.actions = parse_attr->mod_hdr_actions;
143 key.num_actions = num_actions;
145 hash_key = hash_mod_hdr_info(&key);
147 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
148 namespace = MLX5_FLOW_NAMESPACE_FDB;
149 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
150 mod_hdr_hlist, hash_key) {
151 if (!cmp_mod_hdr_info(&mh->key, &key)) {
157 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
158 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
159 mod_hdr_hlist, hash_key) {
160 if (!cmp_mod_hdr_info(&mh->key, &key)) {
170 mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
174 mh->key.actions = (void *)mh + sizeof(*mh);
175 memcpy(mh->key.actions, key.actions, actions_size);
176 mh->key.num_actions = num_actions;
177 INIT_LIST_HEAD(&mh->flows);
179 err = mlx5_modify_header_alloc(priv->mdev, namespace,
186 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
187 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
189 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
192 list_add(&flow->mod_hdr, &mh->flows);
193 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
194 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
196 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
205 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
206 struct mlx5e_tc_flow *flow)
208 struct list_head *next = flow->mod_hdr.next;
210 list_del(&flow->mod_hdr);
212 if (list_empty(next)) {
213 struct mlx5e_mod_hdr_entry *mh;
215 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
217 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
218 hash_del(&mh->mod_hdr_hlist);
223 static struct mlx5_flow_handle *
224 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
225 struct mlx5e_tc_flow_parse_attr *parse_attr,
226 struct mlx5e_tc_flow *flow)
228 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
229 struct mlx5_core_dev *dev = priv->mdev;
230 struct mlx5_flow_destination dest = {};
231 struct mlx5_flow_act flow_act = {
232 .action = attr->action,
233 .flow_tag = attr->flow_tag,
236 struct mlx5_fc *counter = NULL;
237 struct mlx5_flow_handle *rule;
238 bool table_created = false;
241 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
242 dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
243 dest.ft = priv->fs.vlan.ft.t;
244 } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
245 counter = mlx5_fc_create(dev, true);
247 return ERR_CAST(counter);
249 dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
250 dest.counter = counter;
253 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
254 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
255 flow_act.modify_id = attr->mod_hdr_id;
256 kfree(parse_attr->mod_hdr_actions);
259 goto err_create_mod_hdr_id;
263 if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
265 mlx5_create_auto_grouped_flow_table(priv->fs.ns,
267 MLX5E_TC_TABLE_NUM_ENTRIES,
268 MLX5E_TC_TABLE_NUM_GROUPS,
270 if (IS_ERR(priv->fs.tc.t)) {
271 netdev_err(priv->netdev,
272 "Failed to create tc offload table\n");
273 rule = ERR_CAST(priv->fs.tc.t);
277 table_created = true;
280 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
281 rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
282 &flow_act, &dest, 1);
291 mlx5_destroy_flow_table(priv->fs.tc.t);
292 priv->fs.tc.t = NULL;
295 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
296 mlx5e_detach_mod_hdr(priv, flow);
297 err_create_mod_hdr_id:
298 mlx5_fc_destroy(dev, counter);
303 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
304 struct mlx5e_tc_flow *flow)
306 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
307 struct mlx5_fc *counter = NULL;
309 counter = mlx5_flow_rule_counter(flow->rule);
310 mlx5_del_flow_rules(flow->rule);
311 mlx5_fc_destroy(priv->mdev, counter);
313 if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) {
314 mlx5_destroy_flow_table(priv->fs.tc.t);
315 priv->fs.tc.t = NULL;
318 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
319 mlx5e_detach_mod_hdr(priv, flow);
322 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
323 struct mlx5e_tc_flow *flow);
325 static struct mlx5_flow_handle *
326 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
327 struct mlx5e_tc_flow_parse_attr *parse_attr,
328 struct mlx5e_tc_flow *flow)
330 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
331 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
332 struct mlx5_flow_handle *rule;
335 err = mlx5_eswitch_add_vlan_action(esw, attr);
341 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
342 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
343 kfree(parse_attr->mod_hdr_actions);
350 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
357 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
358 mlx5e_detach_mod_hdr(priv, flow);
360 mlx5_eswitch_del_vlan_action(esw, attr);
362 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
363 mlx5e_detach_encap(priv, flow);
367 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
368 struct mlx5e_tc_flow *flow)
370 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
371 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
373 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
374 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
375 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
378 mlx5_eswitch_del_vlan_action(esw, attr);
380 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
381 mlx5e_detach_encap(priv, flow);
382 kvfree(attr->parse_attr);
385 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
386 mlx5e_detach_mod_hdr(priv, flow);
389 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
390 struct mlx5e_encap_entry *e)
392 struct mlx5e_tc_flow *flow;
395 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
396 e->encap_size, e->encap_header,
399 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
403 e->flags |= MLX5_ENCAP_ENTRY_VALID;
404 mlx5e_rep_queue_neigh_stats_work(priv);
406 list_for_each_entry(flow, &e->flows, encap) {
407 flow->esw_attr->encap_id = e->encap_id;
408 flow->rule = mlx5e_tc_add_fdb_flow(priv,
409 flow->esw_attr->parse_attr,
411 if (IS_ERR(flow->rule)) {
412 err = PTR_ERR(flow->rule);
413 mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
417 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
421 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
422 struct mlx5e_encap_entry *e)
424 struct mlx5e_tc_flow *flow;
425 struct mlx5_fc *counter;
427 list_for_each_entry(flow, &e->flows, encap) {
428 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
429 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
430 counter = mlx5_flow_rule_counter(flow->rule);
431 mlx5_del_flow_rules(flow->rule);
432 mlx5_fc_destroy(priv->mdev, counter);
436 if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
437 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
438 mlx5_encap_dealloc(priv->mdev, e->encap_id);
442 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
444 struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
445 u64 bytes, packets, lastuse = 0;
446 struct mlx5e_tc_flow *flow;
447 struct mlx5e_encap_entry *e;
448 struct mlx5_fc *counter;
449 struct neigh_table *tbl;
450 bool neigh_used = false;
453 if (m_neigh->family == AF_INET)
455 #if IS_ENABLED(CONFIG_IPV6)
456 else if (m_neigh->family == AF_INET6)
457 tbl = ipv6_stub->nd_tbl;
462 list_for_each_entry(e, &nhe->encap_list, encap_list) {
463 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
465 list_for_each_entry(flow, &e->flows, encap) {
466 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
467 counter = mlx5_flow_rule_counter(flow->rule);
468 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
469 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
478 nhe->reported_lastuse = jiffies;
480 /* find the relevant neigh according to the cached device and
483 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
485 WARN(1, "The neighbour already freed\n");
489 neigh_event_send(n, NULL);
494 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
495 struct mlx5e_tc_flow *flow)
497 struct list_head *next = flow->encap.next;
499 list_del(&flow->encap);
500 if (list_empty(next)) {
501 struct mlx5e_encap_entry *e;
503 e = list_entry(next, struct mlx5e_encap_entry, flows);
504 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
506 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
507 mlx5_encap_dealloc(priv->mdev, e->encap_id);
509 hash_del_rcu(&e->encap_hlist);
510 kfree(e->encap_header);
515 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
516 struct mlx5e_tc_flow *flow)
518 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
519 mlx5e_tc_del_fdb_flow(priv, flow);
521 mlx5e_tc_del_nic_flow(priv, flow);
524 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
525 struct tc_cls_flower_offload *f)
527 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
529 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
531 void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
533 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
536 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
537 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
539 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
540 struct flow_dissector_key_keyid *key =
541 skb_flow_dissector_target(f->dissector,
542 FLOW_DISSECTOR_KEY_ENC_KEYID,
544 struct flow_dissector_key_keyid *mask =
545 skb_flow_dissector_target(f->dissector,
546 FLOW_DISSECTOR_KEY_ENC_KEYID,
548 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
549 be32_to_cpu(mask->keyid));
550 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
551 be32_to_cpu(key->keyid));
555 static int parse_tunnel_attr(struct mlx5e_priv *priv,
556 struct mlx5_flow_spec *spec,
557 struct tc_cls_flower_offload *f)
559 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
561 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
564 struct flow_dissector_key_control *enc_control =
565 skb_flow_dissector_target(f->dissector,
566 FLOW_DISSECTOR_KEY_ENC_CONTROL,
569 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
570 struct flow_dissector_key_ports *key =
571 skb_flow_dissector_target(f->dissector,
572 FLOW_DISSECTOR_KEY_ENC_PORTS,
574 struct flow_dissector_key_ports *mask =
575 skb_flow_dissector_target(f->dissector,
576 FLOW_DISSECTOR_KEY_ENC_PORTS,
578 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
579 struct net_device *up_dev = mlx5_eswitch_get_uplink_netdev(esw);
580 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
582 /* Full udp dst port must be given */
583 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
584 goto vxlan_match_offload_err;
586 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
587 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
588 parse_vxlan_attr(spec, f);
590 netdev_warn(priv->netdev,
591 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
595 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
596 udp_dport, ntohs(mask->dst));
597 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
598 udp_dport, ntohs(key->dst));
600 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
601 udp_sport, ntohs(mask->src));
602 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
603 udp_sport, ntohs(key->src));
604 } else { /* udp dst port must be given */
605 vxlan_match_offload_err:
606 netdev_warn(priv->netdev,
607 "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
611 if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
612 struct flow_dissector_key_ipv4_addrs *key =
613 skb_flow_dissector_target(f->dissector,
614 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
616 struct flow_dissector_key_ipv4_addrs *mask =
617 skb_flow_dissector_target(f->dissector,
618 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
620 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
621 src_ipv4_src_ipv6.ipv4_layout.ipv4,
623 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
624 src_ipv4_src_ipv6.ipv4_layout.ipv4,
627 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
628 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
630 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
631 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
634 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
635 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
636 } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
637 struct flow_dissector_key_ipv6_addrs *key =
638 skb_flow_dissector_target(f->dissector,
639 FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
641 struct flow_dissector_key_ipv6_addrs *mask =
642 skb_flow_dissector_target(f->dissector,
643 FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
646 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
647 src_ipv4_src_ipv6.ipv6_layout.ipv6),
648 &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
649 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
650 src_ipv4_src_ipv6.ipv6_layout.ipv6),
651 &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
653 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
654 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
655 &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
656 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
657 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
658 &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
660 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
661 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
664 /* Enforce DMAC when offloading incoming tunneled flows.
665 * Flow counters require a match on the DMAC.
667 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
668 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
669 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
670 dmac_47_16), priv->netdev->dev_addr);
672 /* let software handle IP fragments */
673 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
674 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
679 static int __parse_cls_flower(struct mlx5e_priv *priv,
680 struct mlx5_flow_spec *spec,
681 struct tc_cls_flower_offload *f,
684 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
686 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
691 *min_inline = MLX5_INLINE_MODE_L2;
693 if (f->dissector->used_keys &
694 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
695 BIT(FLOW_DISSECTOR_KEY_BASIC) |
696 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
697 BIT(FLOW_DISSECTOR_KEY_VLAN) |
698 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
699 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
700 BIT(FLOW_DISSECTOR_KEY_PORTS) |
701 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
702 BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
703 BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
704 BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
705 BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
706 BIT(FLOW_DISSECTOR_KEY_TCP) |
707 BIT(FLOW_DISSECTOR_KEY_IP))) {
708 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
709 f->dissector->used_keys);
713 if ((dissector_uses_key(f->dissector,
714 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
715 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
716 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
717 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
718 struct flow_dissector_key_control *key =
719 skb_flow_dissector_target(f->dissector,
720 FLOW_DISSECTOR_KEY_ENC_CONTROL,
722 switch (key->addr_type) {
723 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
724 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
725 if (parse_tunnel_attr(priv, spec, f))
732 /* In decap flow, header pointers should point to the inner
733 * headers, outer header were already set by parse_tunnel_attr
735 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
737 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
741 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
742 struct flow_dissector_key_control *key =
743 skb_flow_dissector_target(f->dissector,
744 FLOW_DISSECTOR_KEY_CONTROL,
747 struct flow_dissector_key_control *mask =
748 skb_flow_dissector_target(f->dissector,
749 FLOW_DISSECTOR_KEY_CONTROL,
751 addr_type = key->addr_type;
753 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
754 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
755 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
756 key->flags & FLOW_DIS_IS_FRAGMENT);
758 /* the HW doesn't need L3 inline to match on frag=no */
759 if (key->flags & FLOW_DIS_IS_FRAGMENT)
760 *min_inline = MLX5_INLINE_MODE_IP;
764 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
765 struct flow_dissector_key_basic *key =
766 skb_flow_dissector_target(f->dissector,
767 FLOW_DISSECTOR_KEY_BASIC,
769 struct flow_dissector_key_basic *mask =
770 skb_flow_dissector_target(f->dissector,
771 FLOW_DISSECTOR_KEY_BASIC,
773 ip_proto = key->ip_proto;
775 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
776 ntohs(mask->n_proto));
777 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
778 ntohs(key->n_proto));
780 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
782 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
786 *min_inline = MLX5_INLINE_MODE_IP;
789 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
790 struct flow_dissector_key_eth_addrs *key =
791 skb_flow_dissector_target(f->dissector,
792 FLOW_DISSECTOR_KEY_ETH_ADDRS,
794 struct flow_dissector_key_eth_addrs *mask =
795 skb_flow_dissector_target(f->dissector,
796 FLOW_DISSECTOR_KEY_ETH_ADDRS,
799 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
802 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
806 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
809 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
814 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
815 struct flow_dissector_key_vlan *key =
816 skb_flow_dissector_target(f->dissector,
817 FLOW_DISSECTOR_KEY_VLAN,
819 struct flow_dissector_key_vlan *mask =
820 skb_flow_dissector_target(f->dissector,
821 FLOW_DISSECTOR_KEY_VLAN,
823 if (mask->vlan_id || mask->vlan_priority) {
824 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
825 MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
827 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
828 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
830 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
831 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
835 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
836 struct flow_dissector_key_ipv4_addrs *key =
837 skb_flow_dissector_target(f->dissector,
838 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
840 struct flow_dissector_key_ipv4_addrs *mask =
841 skb_flow_dissector_target(f->dissector,
842 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
845 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
846 src_ipv4_src_ipv6.ipv4_layout.ipv4),
847 &mask->src, sizeof(mask->src));
848 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
849 src_ipv4_src_ipv6.ipv4_layout.ipv4),
850 &key->src, sizeof(key->src));
851 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
852 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
853 &mask->dst, sizeof(mask->dst));
854 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
855 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
856 &key->dst, sizeof(key->dst));
858 if (mask->src || mask->dst)
859 *min_inline = MLX5_INLINE_MODE_IP;
862 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
863 struct flow_dissector_key_ipv6_addrs *key =
864 skb_flow_dissector_target(f->dissector,
865 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
867 struct flow_dissector_key_ipv6_addrs *mask =
868 skb_flow_dissector_target(f->dissector,
869 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
872 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
873 src_ipv4_src_ipv6.ipv6_layout.ipv6),
874 &mask->src, sizeof(mask->src));
875 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
876 src_ipv4_src_ipv6.ipv6_layout.ipv6),
877 &key->src, sizeof(key->src));
879 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
880 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
881 &mask->dst, sizeof(mask->dst));
882 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
883 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
884 &key->dst, sizeof(key->dst));
886 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
887 ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
888 *min_inline = MLX5_INLINE_MODE_IP;
891 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
892 struct flow_dissector_key_ip *key =
893 skb_flow_dissector_target(f->dissector,
894 FLOW_DISSECTOR_KEY_IP,
896 struct flow_dissector_key_ip *mask =
897 skb_flow_dissector_target(f->dissector,
898 FLOW_DISSECTOR_KEY_IP,
901 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
902 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
904 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
905 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2);
907 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
908 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
911 !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
912 ft_field_support.outer_ipv4_ttl))
915 if (mask->tos || mask->ttl)
916 *min_inline = MLX5_INLINE_MODE_IP;
919 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
920 struct flow_dissector_key_ports *key =
921 skb_flow_dissector_target(f->dissector,
922 FLOW_DISSECTOR_KEY_PORTS,
924 struct flow_dissector_key_ports *mask =
925 skb_flow_dissector_target(f->dissector,
926 FLOW_DISSECTOR_KEY_PORTS,
930 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
931 tcp_sport, ntohs(mask->src));
932 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
933 tcp_sport, ntohs(key->src));
935 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
936 tcp_dport, ntohs(mask->dst));
937 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
938 tcp_dport, ntohs(key->dst));
942 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
943 udp_sport, ntohs(mask->src));
944 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
945 udp_sport, ntohs(key->src));
947 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
948 udp_dport, ntohs(mask->dst));
949 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
950 udp_dport, ntohs(key->dst));
953 netdev_err(priv->netdev,
954 "Only UDP and TCP transport are supported\n");
958 if (mask->src || mask->dst)
959 *min_inline = MLX5_INLINE_MODE_TCP_UDP;
962 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
963 struct flow_dissector_key_tcp *key =
964 skb_flow_dissector_target(f->dissector,
965 FLOW_DISSECTOR_KEY_TCP,
967 struct flow_dissector_key_tcp *mask =
968 skb_flow_dissector_target(f->dissector,
969 FLOW_DISSECTOR_KEY_TCP,
972 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
974 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
978 *min_inline = MLX5_INLINE_MODE_TCP_UDP;
984 static int parse_cls_flower(struct mlx5e_priv *priv,
985 struct mlx5e_tc_flow *flow,
986 struct mlx5_flow_spec *spec,
987 struct tc_cls_flower_offload *f)
989 struct mlx5_core_dev *dev = priv->mdev;
990 struct mlx5_eswitch *esw = dev->priv.eswitch;
991 struct mlx5e_rep_priv *rpriv = priv->ppriv;
992 struct mlx5_eswitch_rep *rep;
996 err = __parse_cls_flower(priv, spec, f, &min_inline);
998 if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1000 if (rep->vport != FDB_UPLINK_VPORT &&
1001 (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1002 esw->offloads.inline_mode < min_inline)) {
1003 netdev_warn(priv->netdev,
1004 "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1005 min_inline, esw->offloads.inline_mode);
1013 struct pedit_headers {
1021 static int pedit_header_offsets[] = {
1022 [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1023 [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1024 [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1025 [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1026 [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1029 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1031 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1032 struct pedit_headers *masks,
1033 struct pedit_headers *vals)
1035 u32 *curr_pmask, *curr_pval;
1037 if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1040 curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1041 curr_pval = (u32 *)(pedit_header(vals, hdr_type) + offset);
1043 if (*curr_pmask & mask) /* disallow acting twice on the same location */
1046 *curr_pmask |= mask;
1047 *curr_pval |= (val & mask);
1055 struct mlx5_fields {
1061 #define OFFLOAD(fw_field, size, field, off) \
1062 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1064 static struct mlx5_fields fields[] = {
1065 OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1066 OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1067 OFFLOAD(DMAC_15_0, 2, eth.h_dest[4], 0),
1068 OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1069 OFFLOAD(SMAC_15_0, 2, eth.h_source[4], 0),
1070 OFFLOAD(ETHERTYPE, 2, eth.h_proto, 0),
1072 OFFLOAD(IP_TTL, 1, ip4.ttl, 0),
1073 OFFLOAD(SIPV4, 4, ip4.saddr, 0),
1074 OFFLOAD(DIPV4, 4, ip4.daddr, 0),
1076 OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1077 OFFLOAD(SIPV6_95_64, 4, ip6.saddr.s6_addr32[1], 0),
1078 OFFLOAD(SIPV6_63_32, 4, ip6.saddr.s6_addr32[2], 0),
1079 OFFLOAD(SIPV6_31_0, 4, ip6.saddr.s6_addr32[3], 0),
1080 OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1081 OFFLOAD(DIPV6_95_64, 4, ip6.daddr.s6_addr32[1], 0),
1082 OFFLOAD(DIPV6_63_32, 4, ip6.daddr.s6_addr32[2], 0),
1083 OFFLOAD(DIPV6_31_0, 4, ip6.daddr.s6_addr32[3], 0),
1084 OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1086 OFFLOAD(TCP_SPORT, 2, tcp.source, 0),
1087 OFFLOAD(TCP_DPORT, 2, tcp.dest, 0),
1088 OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1090 OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1091 OFFLOAD(UDP_DPORT, 2, udp.dest, 0),
1094 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1095 * max from the SW pedit action. On success, it says how many HW actions were
1098 static int offload_pedit_fields(struct pedit_headers *masks,
1099 struct pedit_headers *vals,
1100 struct mlx5e_tc_flow_parse_attr *parse_attr)
1102 struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1103 int i, action_size, nactions, max_actions, first, last, next_z;
1104 void *s_masks_p, *a_masks_p, *vals_p;
1105 struct mlx5_fields *f;
1106 u8 cmd, field_bsize;
1113 set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1114 add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1115 set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1116 add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1118 action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1119 action = parse_attr->mod_hdr_actions;
1120 max_actions = parse_attr->num_mod_hdr_actions;
1123 for (i = 0; i < ARRAY_SIZE(fields); i++) {
1125 /* avoid seeing bits set from previous iterations */
1129 s_masks_p = (void *)set_masks + f->offset;
1130 a_masks_p = (void *)add_masks + f->offset;
1132 memcpy(&s_mask, s_masks_p, f->size);
1133 memcpy(&a_mask, a_masks_p, f->size);
1135 if (!s_mask && !a_mask) /* nothing to offload here */
1138 if (s_mask && a_mask) {
1139 printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1143 if (nactions == max_actions) {
1144 printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1149 cmd = MLX5_ACTION_TYPE_SET;
1151 vals_p = (void *)set_vals + f->offset;
1152 /* clear to denote we consumed this field */
1153 memset(s_masks_p, 0, f->size);
1155 cmd = MLX5_ACTION_TYPE_ADD;
1157 vals_p = (void *)add_vals + f->offset;
1158 /* clear to denote we consumed this field */
1159 memset(a_masks_p, 0, f->size);
1162 field_bsize = f->size * BITS_PER_BYTE;
1164 if (field_bsize == 32) {
1165 mask_be32 = *(__be32 *)&mask;
1166 mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1167 } else if (field_bsize == 16) {
1168 mask_be16 = *(__be16 *)&mask;
1169 mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1172 first = find_first_bit(&mask, field_bsize);
1173 next_z = find_next_zero_bit(&mask, field_bsize, first);
1174 last = find_last_bit(&mask, field_bsize);
1175 if (first < next_z && next_z < last) {
1176 printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1181 MLX5_SET(set_action_in, action, action_type, cmd);
1182 MLX5_SET(set_action_in, action, field, f->field);
1184 if (cmd == MLX5_ACTION_TYPE_SET) {
1185 MLX5_SET(set_action_in, action, offset, first);
1186 /* length is num of bits to be written, zero means length of 32 */
1187 MLX5_SET(set_action_in, action, length, (last - first + 1));
1190 if (field_bsize == 32)
1191 MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1192 else if (field_bsize == 16)
1193 MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1194 else if (field_bsize == 8)
1195 MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1197 action += action_size;
1201 parse_attr->num_mod_hdr_actions = nactions;
1205 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1206 const struct tc_action *a, int namespace,
1207 struct mlx5e_tc_flow_parse_attr *parse_attr)
1209 int nkeys, action_size, max_actions;
1211 nkeys = tcf_pedit_nkeys(a);
1212 action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1214 if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1215 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1216 else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1217 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1219 /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1220 max_actions = min(max_actions, nkeys * 16);
1222 parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1223 if (!parse_attr->mod_hdr_actions)
1226 parse_attr->num_mod_hdr_actions = max_actions;
1230 static const struct pedit_headers zero_masks = {};
1232 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1233 const struct tc_action *a, int namespace,
1234 struct mlx5e_tc_flow_parse_attr *parse_attr)
1236 struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1237 int nkeys, i, err = -EOPNOTSUPP;
1238 u32 mask, val, offset;
1241 nkeys = tcf_pedit_nkeys(a);
1243 memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1244 memset(vals, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1246 for (i = 0; i < nkeys; i++) {
1247 htype = tcf_pedit_htype(a, i);
1248 cmd = tcf_pedit_cmd(a, i);
1249 err = -EOPNOTSUPP; /* can't be all optimistic */
1251 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1252 printk(KERN_WARNING "mlx5: legacy pedit isn't offloaded\n");
1256 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1257 printk(KERN_WARNING "mlx5: pedit cmd %d isn't offloaded\n", cmd);
1261 mask = tcf_pedit_mask(a, i);
1262 val = tcf_pedit_val(a, i);
1263 offset = tcf_pedit_offset(a, i);
1265 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1270 err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1274 err = offload_pedit_fields(masks, vals, parse_attr);
1276 goto out_dealloc_parsed_actions;
1278 for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1279 cmd_masks = &masks[cmd];
1280 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1281 printk(KERN_WARNING "mlx5: attempt to offload an unsupported field (cmd %d)\n",
1283 print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1284 16, 1, cmd_masks, sizeof(zero_masks), true);
1286 goto out_dealloc_parsed_actions;
1292 out_dealloc_parsed_actions:
1293 kfree(parse_attr->mod_hdr_actions);
1298 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1300 u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1301 TCA_CSUM_UPDATE_FLAG_UDP;
1303 /* The HW recalcs checksums only if re-writing headers */
1304 if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1305 netdev_warn(priv->netdev,
1306 "TC csum action is only offloaded with pedit\n");
1310 if (update_flags & ~prot_flags) {
1311 netdev_warn(priv->netdev,
1312 "can't offload TC csum action for some header/s - flags %#x\n",
1320 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1321 struct mlx5e_tc_flow_parse_attr *parse_attr,
1322 struct mlx5e_tc_flow *flow)
1324 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1325 const struct tc_action *a;
1329 if (!tcf_exts_has_actions(exts))
1332 attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1335 tcf_exts_to_list(exts, &actions);
1336 list_for_each_entry(a, &actions, list) {
1337 if (is_tcf_gact_shot(a)) {
1338 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1339 if (MLX5_CAP_FLOWTABLE(priv->mdev,
1340 flow_table_properties_nic_receive.flow_counter))
1341 attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1345 if (is_tcf_pedit(a)) {
1346 err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1351 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1352 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1356 if (is_tcf_csum(a)) {
1357 if (csum_offload_supported(priv, attr->action,
1358 tcf_csum_update_flags(a)))
1364 if (is_tcf_skbedit_mark(a)) {
1365 u32 mark = tcf_skbedit_mark(a);
1367 if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
1368 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
1373 attr->flow_tag = mark;
1374 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1384 static inline int cmp_encap_info(struct ip_tunnel_key *a,
1385 struct ip_tunnel_key *b)
1387 return memcmp(a, b, sizeof(*a));
1390 static inline int hash_encap_info(struct ip_tunnel_key *key)
1392 return jhash(key, sizeof(*key), 0);
1395 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
1396 struct net_device *mirred_dev,
1397 struct net_device **out_dev,
1399 struct neighbour **out_n,
1402 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1404 struct neighbour *n = NULL;
1406 #if IS_ENABLED(CONFIG_INET)
1409 rt = ip_route_output_key(dev_net(mirred_dev), fl4);
1410 ret = PTR_ERR_OR_ZERO(rt);
1416 /* if the egress device isn't on the same HW e-switch, we use the uplink */
1417 if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
1418 *out_dev = mlx5_eswitch_get_uplink_netdev(esw);
1420 *out_dev = rt->dst.dev;
1422 *out_ttl = ip4_dst_hoplimit(&rt->dst);
1423 n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
1432 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
1433 struct net_device *mirred_dev,
1434 struct net_device **out_dev,
1436 struct neighbour **out_n,
1439 struct neighbour *n = NULL;
1440 struct dst_entry *dst;
1442 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
1443 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1446 ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
1451 *out_ttl = ip6_dst_hoplimit(dst);
1453 /* if the egress device isn't on the same HW e-switch, we use the uplink */
1454 if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
1455 *out_dev = mlx5_eswitch_get_uplink_netdev(esw);
1457 *out_dev = dst->dev;
1462 n = dst_neigh_lookup(dst, &fl6->daddr);
1471 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
1472 char buf[], int encap_size,
1473 unsigned char h_dest[ETH_ALEN],
1477 __be16 udp_dst_port,
1480 struct ethhdr *eth = (struct ethhdr *)buf;
1481 struct iphdr *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
1482 struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
1483 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
1485 memset(buf, 0, encap_size);
1487 ether_addr_copy(eth->h_dest, h_dest);
1488 ether_addr_copy(eth->h_source, out_dev->dev_addr);
1489 eth->h_proto = htons(ETH_P_IP);
1495 ip->protocol = IPPROTO_UDP;
1499 udp->dest = udp_dst_port;
1500 vxh->vx_flags = VXLAN_HF_VNI;
1501 vxh->vx_vni = vxlan_vni_field(vx_vni);
1504 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
1505 char buf[], int encap_size,
1506 unsigned char h_dest[ETH_ALEN],
1508 struct in6_addr *daddr,
1509 struct in6_addr *saddr,
1510 __be16 udp_dst_port,
1513 struct ethhdr *eth = (struct ethhdr *)buf;
1514 struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
1515 struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
1516 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
1518 memset(buf, 0, encap_size);
1520 ether_addr_copy(eth->h_dest, h_dest);
1521 ether_addr_copy(eth->h_source, out_dev->dev_addr);
1522 eth->h_proto = htons(ETH_P_IPV6);
1524 ip6_flow_hdr(ip6h, 0, 0);
1525 /* the HW fills up ipv6 payload len */
1526 ip6h->nexthdr = IPPROTO_UDP;
1527 ip6h->hop_limit = ttl;
1528 ip6h->daddr = *daddr;
1529 ip6h->saddr = *saddr;
1531 udp->dest = udp_dst_port;
1532 vxh->vx_flags = VXLAN_HF_VNI;
1533 vxh->vx_vni = vxlan_vni_field(vx_vni);
1536 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
1537 struct net_device *mirred_dev,
1538 struct mlx5e_encap_entry *e)
1540 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
1541 int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
1542 struct ip_tunnel_key *tun_key = &e->tun_info.key;
1543 struct net_device *out_dev;
1544 struct neighbour *n = NULL;
1545 struct flowi4 fl4 = {};
1550 if (max_encap_size < ipv4_encap_size) {
1551 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
1552 ipv4_encap_size, max_encap_size);
1556 encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
1560 switch (e->tunnel_type) {
1561 case MLX5_HEADER_TYPE_VXLAN:
1562 fl4.flowi4_proto = IPPROTO_UDP;
1563 fl4.fl4_dport = tun_key->tp_dst;
1569 fl4.flowi4_tos = tun_key->tos;
1570 fl4.daddr = tun_key->u.ipv4.dst;
1571 fl4.saddr = tun_key->u.ipv4.src;
1573 err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
1578 /* used by mlx5e_detach_encap to lookup a neigh hash table
1579 * entry in the neigh hash table when a user deletes a rule
1581 e->m_neigh.dev = n->dev;
1582 e->m_neigh.family = n->ops->family;
1583 memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
1584 e->out_dev = out_dev;
1586 /* It's importent to add the neigh to the hash table before checking
1587 * the neigh validity state. So if we'll get a notification, in case the
1588 * neigh changes it's validity state, we would find the relevant neigh
1591 err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
1595 read_lock_bh(&n->lock);
1596 nud_state = n->nud_state;
1597 ether_addr_copy(e->h_dest, n->ha);
1598 read_unlock_bh(&n->lock);
1600 switch (e->tunnel_type) {
1601 case MLX5_HEADER_TYPE_VXLAN:
1602 gen_vxlan_header_ipv4(out_dev, encap_header,
1603 ipv4_encap_size, e->h_dest, ttl,
1605 fl4.saddr, tun_key->tp_dst,
1606 tunnel_id_to_key32(tun_key->tun_id));
1610 goto destroy_neigh_entry;
1612 e->encap_size = ipv4_encap_size;
1613 e->encap_header = encap_header;
1615 if (!(nud_state & NUD_VALID)) {
1616 neigh_event_send(n, NULL);
1621 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
1622 ipv4_encap_size, encap_header, &e->encap_id);
1624 goto destroy_neigh_entry;
1626 e->flags |= MLX5_ENCAP_ENTRY_VALID;
1627 mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
1631 destroy_neigh_entry:
1632 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1634 kfree(encap_header);
1640 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
1641 struct net_device *mirred_dev,
1642 struct mlx5e_encap_entry *e)
1644 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
1645 int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
1646 struct ip_tunnel_key *tun_key = &e->tun_info.key;
1647 struct net_device *out_dev;
1648 struct neighbour *n = NULL;
1649 struct flowi6 fl6 = {};
1654 if (max_encap_size < ipv6_encap_size) {
1655 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
1656 ipv6_encap_size, max_encap_size);
1660 encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
1664 switch (e->tunnel_type) {
1665 case MLX5_HEADER_TYPE_VXLAN:
1666 fl6.flowi6_proto = IPPROTO_UDP;
1667 fl6.fl6_dport = tun_key->tp_dst;
1674 fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
1675 fl6.daddr = tun_key->u.ipv6.dst;
1676 fl6.saddr = tun_key->u.ipv6.src;
1678 err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
1683 /* used by mlx5e_detach_encap to lookup a neigh hash table
1684 * entry in the neigh hash table when a user deletes a rule
1686 e->m_neigh.dev = n->dev;
1687 e->m_neigh.family = n->ops->family;
1688 memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
1689 e->out_dev = out_dev;
1691 /* It's importent to add the neigh to the hash table before checking
1692 * the neigh validity state. So if we'll get a notification, in case the
1693 * neigh changes it's validity state, we would find the relevant neigh
1696 err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
1700 read_lock_bh(&n->lock);
1701 nud_state = n->nud_state;
1702 ether_addr_copy(e->h_dest, n->ha);
1703 read_unlock_bh(&n->lock);
1705 switch (e->tunnel_type) {
1706 case MLX5_HEADER_TYPE_VXLAN:
1707 gen_vxlan_header_ipv6(out_dev, encap_header,
1708 ipv6_encap_size, e->h_dest, ttl,
1710 &fl6.saddr, tun_key->tp_dst,
1711 tunnel_id_to_key32(tun_key->tun_id));
1715 goto destroy_neigh_entry;
1718 e->encap_size = ipv6_encap_size;
1719 e->encap_header = encap_header;
1721 if (!(nud_state & NUD_VALID)) {
1722 neigh_event_send(n, NULL);
1727 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
1728 ipv6_encap_size, encap_header, &e->encap_id);
1730 goto destroy_neigh_entry;
1732 e->flags |= MLX5_ENCAP_ENTRY_VALID;
1733 mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
1737 destroy_neigh_entry:
1738 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1740 kfree(encap_header);
1746 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
1747 struct ip_tunnel_info *tun_info,
1748 struct net_device *mirred_dev,
1749 struct net_device **encap_dev,
1750 struct mlx5e_tc_flow *flow)
1752 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1753 struct net_device *up_dev = mlx5_eswitch_get_uplink_netdev(esw);
1754 unsigned short family = ip_tunnel_info_af(tun_info);
1755 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1756 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1757 struct ip_tunnel_key *key = &tun_info->key;
1758 struct mlx5e_encap_entry *e;
1759 int tunnel_type, err = 0;
1763 /* udp dst port must be set */
1764 if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
1765 goto vxlan_encap_offload_err;
1767 /* setting udp src port isn't supported */
1768 if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
1769 vxlan_encap_offload_err:
1770 netdev_warn(priv->netdev,
1771 "must set udp dst port and not set udp src port\n");
1775 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
1776 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
1777 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
1779 netdev_warn(priv->netdev,
1780 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
1784 hash_key = hash_encap_info(key);
1786 hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
1787 encap_hlist, hash_key) {
1788 if (!cmp_encap_info(&e->tun_info.key, key)) {
1797 e = kzalloc(sizeof(*e), GFP_KERNEL);
1801 e->tun_info = *tun_info;
1802 e->tunnel_type = tunnel_type;
1803 INIT_LIST_HEAD(&e->flows);
1805 if (family == AF_INET)
1806 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
1807 else if (family == AF_INET6)
1808 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
1810 if (err && err != -EAGAIN)
1813 hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
1816 list_add(&flow->encap, &e->flows);
1817 *encap_dev = e->out_dev;
1818 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1819 attr->encap_id = e->encap_id;
1828 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1829 struct mlx5e_tc_flow_parse_attr *parse_attr,
1830 struct mlx5e_tc_flow *flow)
1832 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1833 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1834 struct ip_tunnel_info *info = NULL;
1835 const struct tc_action *a;
1840 if (!tcf_exts_has_actions(exts))
1843 memset(attr, 0, sizeof(*attr));
1844 attr->in_rep = rpriv->rep;
1846 tcf_exts_to_list(exts, &actions);
1847 list_for_each_entry(a, &actions, list) {
1848 if (is_tcf_gact_shot(a)) {
1849 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
1850 MLX5_FLOW_CONTEXT_ACTION_COUNT;
1854 if (is_tcf_pedit(a)) {
1855 err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
1860 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1864 if (is_tcf_csum(a)) {
1865 if (csum_offload_supported(priv, attr->action,
1866 tcf_csum_update_flags(a)))
1872 if (is_tcf_mirred_egress_redirect(a)) {
1873 int ifindex = tcf_mirred_ifindex(a);
1874 struct net_device *out_dev, *encap_dev = NULL;
1875 struct mlx5e_priv *out_priv;
1877 out_dev = __dev_get_by_index(dev_net(priv->netdev), ifindex);
1879 if (switchdev_port_same_parent_id(priv->netdev,
1881 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
1882 MLX5_FLOW_CONTEXT_ACTION_COUNT;
1883 out_priv = netdev_priv(out_dev);
1884 rpriv = out_priv->ppriv;
1885 attr->out_rep = rpriv->rep;
1887 err = mlx5e_attach_encap(priv, info,
1888 out_dev, &encap_dev, flow);
1889 if (err && err != -EAGAIN)
1891 attr->action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
1892 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
1893 MLX5_FLOW_CONTEXT_ACTION_COUNT;
1894 out_priv = netdev_priv(encap_dev);
1895 rpriv = out_priv->ppriv;
1896 attr->out_rep = rpriv->rep;
1897 attr->parse_attr = parse_attr;
1899 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
1900 priv->netdev->name, out_dev->name);
1906 if (is_tcf_tunnel_set(a)) {
1907 info = tcf_tunnel_info(a);
1915 if (is_tcf_vlan(a)) {
1916 if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
1917 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
1918 } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
1919 if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q))
1922 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
1923 attr->vlan = tcf_vlan_push_vid(a);
1924 } else { /* action is TCA_VLAN_ACT_MODIFY */
1930 if (is_tcf_tunnel_release(a)) {
1931 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
1940 int mlx5e_configure_flower(struct mlx5e_priv *priv,
1941 struct tc_cls_flower_offload *f)
1943 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1944 struct mlx5e_tc_flow_parse_attr *parse_attr;
1945 struct mlx5e_tc_table *tc = &priv->fs.tc;
1946 struct mlx5e_tc_flow *flow;
1947 int attr_size, err = 0;
1950 if (esw && esw->mode == SRIOV_OFFLOADS) {
1951 flow_flags = MLX5E_TC_FLOW_ESWITCH;
1952 attr_size = sizeof(struct mlx5_esw_flow_attr);
1954 flow_flags = MLX5E_TC_FLOW_NIC;
1955 attr_size = sizeof(struct mlx5_nic_flow_attr);
1958 flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
1959 parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
1960 if (!parse_attr || !flow) {
1965 flow->cookie = f->cookie;
1966 flow->flags = flow_flags;
1968 err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
1972 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
1973 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
1975 goto err_handle_encap_flow;
1976 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
1978 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
1981 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
1984 if (IS_ERR(flow->rule)) {
1985 err = PTR_ERR(flow->rule);
1989 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
1990 err = rhashtable_insert_fast(&tc->ht, &flow->node,
1995 if (flow->flags & MLX5E_TC_FLOW_ESWITCH &&
1996 !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2001 mlx5e_tc_del_flow(priv, flow);
2003 err_handle_encap_flow:
2004 if (err == -EAGAIN) {
2005 err = rhashtable_insert_fast(&tc->ht, &flow->node,
2008 mlx5e_tc_del_flow(priv, flow);
2019 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2020 struct tc_cls_flower_offload *f)
2022 struct mlx5e_tc_flow *flow;
2023 struct mlx5e_tc_table *tc = &priv->fs.tc;
2025 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2030 rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
2032 mlx5e_tc_del_flow(priv, flow);
2039 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2040 struct tc_cls_flower_offload *f)
2042 struct mlx5e_tc_table *tc = &priv->fs.tc;
2043 struct mlx5e_tc_flow *flow;
2044 struct mlx5_fc *counter;
2049 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2054 if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2057 counter = mlx5_flow_rule_counter(flow->rule);
2061 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2063 tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2068 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
2069 .head_offset = offsetof(struct mlx5e_tc_flow, node),
2070 .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2071 .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2072 .automatic_shrinking = true,
2075 int mlx5e_tc_init(struct mlx5e_priv *priv)
2077 struct mlx5e_tc_table *tc = &priv->fs.tc;
2079 hash_init(tc->mod_hdr_tbl);
2081 tc->ht_params = mlx5e_tc_flow_ht_params;
2082 return rhashtable_init(&tc->ht, &tc->ht_params);
2085 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2087 struct mlx5e_tc_flow *flow = ptr;
2088 struct mlx5e_priv *priv = arg;
2090 mlx5e_tc_del_flow(priv, flow);
2094 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
2096 struct mlx5e_tc_table *tc = &priv->fs.tc;
2098 rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
2100 if (!IS_ERR_OR_NULL(tc->t)) {
2101 mlx5_destroy_flow_table(tc->t);